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compare: 6502:84153e809e1fc30fafdcdfdc28a7d909064e9782
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6502:master
6502:revert-2359-fix-2357
6502:gh-pages
6502:V2.19
6502:V2.18
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6502:V2.13.0rc1
6502:V2.12.0

2 Commits
90723d7dd1 ... 84153e809e

Author SHA1 Message Date
Bob Andrews
84153e809e
Merge pull request #2438 from ops/exehdr 
Add missing EXEHDR
 2024-05-15 14:11:08 +02:00
Olli Savia
074ec82126 Added missing EXEHDR 2024-04-02 19:25:15 +03:00
3 changed files with 3 additions and 0 deletions
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1
cfg/vic20-asm-32k.cfg
View File

@ -14,6 +14,7 @@ MEMORY {
SEGMENTS {
ZEROPAGE: load = ZP, type = zp, optional = yes;
LOADADDR: load = LOADADDR, type = ro;
EXEHDR: load = MAIN, type = ro, optional = yes;
CODE: load = MAIN, type = ro;
RODATA: load = MAIN, type = ro;
DATA: load = MAIN, type = rw;

1
cfg/vic20-asm-3k.cfg
View File

@ -14,6 +14,7 @@ MEMORY {
SEGMENTS {
ZEROPAGE: load = ZP, type = zp, optional = yes;
LOADADDR: load = LOADADDR, type = ro;
EXEHDR: load = MAIN, type = ro, optional = yes;
CODE: load = MAIN, type = ro;
RODATA: load = MAIN, type = ro;
DATA: load = MAIN, type = rw;

1
cfg/vic20-asm.cfg
View File

@ -14,6 +14,7 @@ MEMORY {
SEGMENTS {
ZEROPAGE: load = ZP, type = zp, optional = yes;
LOADADDR: load = LOADADDR, type = ro;
EXEHDR: load = MAIN, type = ro, optional = yes;
CODE: load = MAIN, type = ro;
RODATA: load = MAIN, type = ro;
DATA: load = MAIN, type = rw;