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3 Commits

Author SHA1 Message Date
TomCh
8e27e7dd66
Merge 96e3449a17 into c0bfb0b0fe 2024-05-07 21:40:41 +01:00
tomcw
96e3449a17 Fix TODO comment that D7 is not readable in MB mode 2024-05-07 21:39:43 +01:00
tomcw
07e945f4d3 Tweak comments 2024-05-07 20:50:05 +01:00
3 changed files with 6 additions and 6 deletions

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@ -668,7 +668,7 @@ BYTE MockingboardCard::IOReadInternal(WORD PC, WORD nAddr, BYTE bWrite, BYTE nVa
return MemReadFloatingBus(nExecutedCycles);
#endif
// NB. Mockingboard: SSI263.bit7 not readable (TODO: check this with real h/w)
// NB. Mockingboard: SSI263.bit7 not readable
const BYTE subunit = QueryType() == CT_SDMusic ? SY6522_DEVICE_A : !(nAddr & 0x80) ? SY6522_DEVICE_A : SY6522_DEVICE_B;
const BYTE reg = nAddr & 0xf;
return m_MBSubUnit[subunit].sy6522.Read(reg);

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@ -140,9 +140,9 @@ void SSI263::Write(BYTE nReg, BYTE nValue)
ssiRegs[nReg] = nValue;
#endif
// SSI263 datasheet is not clear, but a write to DURPHON must de-assert the IRQ and clear D7.
// . Empirically writes to regs 0,1 & 2 all de-assert the IRQ (and writes to 3,4..7 don't) (GH#1197)
// NB. The same for Mockingboard as there's no automatic handshake from the 6522 (CA2 isn't connected to the SSI263). So a write to reg0, 1 or 2 completes the handshake.
// SSI263 datasheet is not clear, but a write to DURPHON de-asserts the IRQ and clears D7.
// . Empirically writes to regs 0,1,2 (and reg3.CTL=1) all de-assert the IRQ (and writes to reg3.CTL=0 and regs 4..7 don't) (GH#1197)
// NB. The same for Mockingboard as there's no automatic handshake from the 6522 (CA2 isn't connected to the SSI263). So writes to regs 0, 1 or 2 complete the "handshake".
if (nReg <= SSI_RATEINF)
{
CpuIrqDeassert(IS_SPEECH);
@ -771,7 +771,7 @@ void SSI263::SetSpeechIRQ(void)
else if (m_cardMode == PH_Phasor)
{
// Phasor (in native mode): SSI263 IRQ (A/!R) pin is connected directly to the 6502's IRQ
// . And A/!R is connected to the 6522's CA1 but only when in Mockingboard mode
// . And Mockingboard mode: A/!R is connected to the 6522's CA1
CpuIrqAssert(IS_SPEECH);
}
else

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@ -51,7 +51,7 @@ public:
m_inflection = 0;
m_rateInflection = 0;
m_ctrlArtAmp = powerCycle ? CONTROL_MASK : 0; // Chip power-on, so CTL=1 (power-down / standby)
m_filterFreq = powerCycle ? FILTER_FREQ_SILENCE : 0; // Empirically seen at chip power-on (GH#175)
m_filterFreq = powerCycle ? FILTER_FREQ_SILENCE : 0; // Empirically observed at chip power-on (GH#175)
m_currentMode.mode = 0;