From aa9657f0b8e0547a414ae7bfde99423bbf090281 Mon Sep 17 00:00:00 2001 From: Jason Turner Date: Thu, 8 Sep 2016 18:57:10 -0600 Subject: [PATCH] Handle retl to some extent --- src/main.cpp | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/src/main.cpp b/src/main.cpp index 7006cb2..1e37092 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -346,7 +346,8 @@ struct i386 : ASMLine pushl, sbbb, negb, - notb + notb, + retl }; static OpCode parse_opcode(Type t, const std::string &o) @@ -391,6 +392,7 @@ struct i386 : ASMLine if (o == "negb") return OpCode::negb; if (o == "sbbb") return OpCode::sbbb; if (o == "pushl") return OpCode::pushl; + if (o == "retl") return OpCode::retl; } } throw std::runtime_error("Unknown opcode: " + o); @@ -463,6 +465,10 @@ void translate_instruction(std::vector &instructions, const i386::OpCod case i386::OpCode::ret: instructions.emplace_back(mos6502::OpCode::rts); break; + case i386::OpCode::retl: + /// \todo I don't know if this is completely correct for retl translation + instructions.emplace_back(mos6502::OpCode::rts); + break; case i386::OpCode::movl: if (o1.type == Operand::Type::reg && o2.type == Operand::Type::reg) { instructions.emplace_back(mos6502::OpCode::lda, get_register(o1.reg_num)); @@ -557,6 +563,10 @@ void translate_instruction(std::vector &instructions, const i386::OpCod // ands the values instructions.emplace_back(mos6502::OpCode::lda, Operand(o1.type, fixup_8bit_literal(o1.value))); instructions.emplace_back(mos6502::OpCode::bit, get_register(o2.reg_num)); + } else if (o1.type == Operand::Type::literal && o2.type == Operand::Type::literal) { + // ands the values + instructions.emplace_back(mos6502::OpCode::lda, Operand(o1.type, fixup_8bit_literal(o1.value))); + instructions.emplace_back(mos6502::OpCode::bit, o2); } else { throw std::runtime_error("Cannot translate testb instruction"); }