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pattern matching

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This commit is contained in:
Mark Canlas 2020-08-12 22:16:53 -04:00
parent 22e8d615ab
commit 1470f01a90
1 changed files with 26 additions and 8 deletions
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34
src/main/scala/com/htmlism/MatchOpcodes.scala
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@ -266,12 +266,27 @@ object MatchOpcodes {
Seq(ASL, ROL, LSR, ROR, STX, LDX, DEC, INC)(aaa)
val addressingMode =
Seq(Immediate, ZeroPage, Accumulator, Absolute, NoMode, ZeroPageX, NoMode, AbsoluteX)(bbb)
Seq(Immediate, ZeroPage, Accumulator, Absolute, NoMode, ZeroPageX, Implied, AbsoluteX)(bbb)
if (addressingMode == NoMode)
None
else
val useLookup =
(instruction -> addressingMode).some
(instruction, addressingMode) match {
case (ASL | ROL | LSR | ROR, ZeroPage | Accumulator | Absolute | ZeroPageX | AbsoluteX) =>
useLookup
case (STX, ZeroPage | Absolute) =>
useLookup
case (DEC | INC, ZeroPage | Absolute | AbsoluteX | ZeroPageX) =>
useLookup
case (LDX, Immediate | ZeroPage | Absolute) =>
useLookup
case _ =>
None
}
}
def c00(aaa: Int, bbb: Int): Option[(Instruction, AddressingMode)] = {
@ -281,18 +296,21 @@ object MatchOpcodes {
val addressingMode =
Seq(Immediate, ZeroPage, NoMode, Absolute, NoMode, ZeroPageX, NoMode, AbsoluteX)(bbb)
val useLookup =
(instruction -> addressingMode).some
(instruction, addressingMode) match {
case (BIT, ZeroPage | Absolute) =>
(instruction -> addressingMode).some
useLookup
case (STY, ZeroPage | Absolute | ZeroPageX) =>
(instruction -> addressingMode).some
useLookup
case (LDY, Immediate | ZeroPage | Absolute | ZeroPageX | AbsoluteX) =>
(instruction -> addressingMode).some
useLookup
case (CPY | CPX, Immediate | ZeroPage | Absolute) =>
(instruction -> addressingMode).some
useLookup
case _ =>
None