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scala 3 fmt

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This commit is contained in:
Mark Canlas 2023-06-13 14:01:45 -04:00
parent b675f551e0
commit d73f04481b
9 changed files with 29 additions and 58 deletions
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3
firepower-core/src/test/scala/com/htmlism/firepower/core/ComplicatedResourceSuite.scala
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@ -30,7 +30,7 @@ object ComplicatedResourceSuite extends FunSuite:
def canon: PlayerTwo =
PlayerTwo
test("use write lease") {
test("use write lease"):
val asm =
PlayerOne
.withWriteLease { implicit w =>
@ -38,4 +38,3 @@ object ComplicatedResourceSuite extends FunSuite:
}
expect.eql(List("LDA 23", "STA 40"), asm)
}

9
firepower-core/src/test/scala/com/htmlism/firepower/core/FeatureSpec.scala
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@ -10,17 +10,15 @@ object ExampleRegister extends ZeroPageAddress(0x01, "example") with WriteOnlyBy
class ExampleRegister
class FeatureSpec extends AnyFunSuite with Matchers:
test("zero page address as write only supports writing") {
test("zero page address as write only supports writing"):
ExampleRegister
.writeConst(2)[Reg.A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
}
test("zero page address as read/write supports writing") {
test("zero page address as read/write supports writing"):
ExampleRegister
.writeConst(2)[Reg.A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
}
test("writing to an address can use A, X, and Y registers for bouncing") {
test("writing to an address can use A, X, and Y registers for bouncing"):
ExampleRegister
.writeConst(2)[Reg.A] shouldBe "LDA 2 STA 1 ; example = 2, via A"
@ -29,7 +27,6 @@ class FeatureSpec extends AnyFunSuite with Matchers:
ExampleRegister
.writeConst(2)[Reg.Y] shouldBe "LDY 2 STY 1 ; example = 2, via Y"
}
ignore("the write payload is a typesafe enum") {}

12
firepower-core/src/test/scala/com/htmlism/firepower/core/MoveSuite.scala
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@ -3,18 +3,14 @@ package com.htmlism.firepower.core
import weaver._
object MoveSuite extends FunSuite:
test("TODO move constant") {
test("TODO move constant"):
success
}
test("TODO move register") {
test("TODO move register"):
success
}
test("TODO move register, indexed") {
test("TODO move register, indexed"):
success
}
test("TODO move wide") {
test("TODO move wide"):
success
}

9
firepower-core/src/test/scala/com/htmlism/firepower/core/RegisterSuite.scala
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@ -6,14 +6,11 @@ object RegisterSuite extends FunSuite:
private def reg[A](implicit ev: Register[A]) =
ev
test("the accumulator is a register") {
test("the accumulator is a register"):
expect.eql("A", reg[Reg.A].name)
}
test("X is a register") {
test("X is a register"):
expect.eql("X", reg[Reg.X].name)
}
test("Y is a register") {
test("Y is a register"):
expect.eql("Y", reg[Reg.Y].name)
}

9
nescant/src/test/scala/com/htmlism/nescant/dsl/ByteSinkSpec.scala
View File

@ -5,16 +5,13 @@ import org.scalatest.flatspec._
import org.scalatest.matchers._
class ByteSinkSpec extends AnyFlatSpec with should.Matchers:
"A zero page address" should "be a byte-wide sync" in {
"A zero page address" should "be a byte-wide sync" in:
123.z.write(456)
}
"A global address" should "be a byte-wide sync" in {
"A global address" should "be a byte-wide sync" in:
123.g.write(456)
}
"A read write location" should "be a byte-wide sync" in {
"A read write location" should "be a byte-wide sync" in:
val sink = ReadWriteLocation[Int]("", 0.z)
sink.write(456)
}

15
nescant/src/test/scala/com/htmlism/nescant/dsl/ByteSourceSpec.scala
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@ -8,26 +8,21 @@ class ByteSourceSpec extends AnyFlatSpec with should.Matchers:
private val sink =
123.z
"A number" should "be a byte-wide source" in {
"A number" should "be a byte-wide source" in:
sink.write(456)
}
"A zero page address" should "be a byte-wide source" in {
"A zero page address" should "be a byte-wide source" in:
sink.write(456.z)
}
"A global address" should "be a byte-wide source" in {
"A global address" should "be a byte-wide source" in:
sink.write(456.g)
}
"A volatile device" should "be a byte-wide source" in {
"A volatile device" should "be a byte-wide source" in:
val src = VolatileDevice[Int]("", 0.z)
sink.write(src)
}
"A read write location" should "be a byte-wide source" in {
"A read write location" should "be a byte-wide source" in:
val src = ReadWriteLocation[Int]("", 0.z)
sink.write(src)
}

6
nescant/src/test/scala/com/htmlism/nescant/dsl/PostFixOpsSpec.scala
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@ -5,10 +5,8 @@ import org.scalatest.flatspec._
import org.scalatest.matchers._
class PostFixOpsSpec extends AnyFlatSpec with should.Matchers:
"Numbers" should "support zero page ops" in {
"Numbers" should "support zero page ops" in:
123.z shouldBe ZeroPageAddress(123)
}
it should "support global address ops" in {
it should "support global address ops" in:
123.g shouldBe GlobalAddress(123)
}

12
src/test/scala/com/htmlism/mos6502/dsl/DslSpec.scala
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@ -6,7 +6,7 @@ import org.scalatest.matchers._
class DslSpec extends AnyFlatSpec with should.Matchers:
"the dsl" should "compile" in {
"the dsl" should "compile" in:
val doc =
asmDoc { implicit ctx =>
group("constants test") { implicit g =>
@ -25,9 +25,8 @@ class DslSpec extends AnyFlatSpec with should.Matchers:
)
)
)
}
"enum" should "compile" in {
"enum" should "compile" in:
val doc =
asmDoc { implicit ctx =>
enumAsm[Triforce]
@ -45,9 +44,8 @@ class DslSpec extends AnyFlatSpec with should.Matchers:
)
)
)
}
"bit field" should "compile" in {
"bit field" should "compile" in:
val doc =
asmDoc { implicit ctx =>
bitField[TestDirection]
@ -66,9 +64,8 @@ class DslSpec extends AnyFlatSpec with should.Matchers:
)
)
)
}
"label" should "compile" in {
"label" should "compile" in:
val doc =
asmDoc { implicit ctx =>
asm { implicit a =>
@ -85,7 +82,6 @@ class DslSpec extends AnyFlatSpec with should.Matchers:
)
)
)
}
sealed trait Triforce

12
src/test/scala/com/htmlism/mos6502/dsl/snake/Easy6502Spec.scala
View File

@ -9,7 +9,7 @@ import com.htmlism.mos6502.model._
class Easy6502Spec extends AnyFlatSpec with should.Matchers:
"the three pixel demo" should "have the right instructions" in {
"the three pixel demo" should "have the right instructions" in:
val doc =
withAssemblyContext { implicit ctx =>
val scr =
@ -30,9 +30,8 @@ class Easy6502Spec extends AnyFlatSpec with should.Matchers:
)
doc.printOut()
}
"define style dsl" should "compile" in {
"define style dsl" should "compile" in:
val doc =
asmDoc { implicit ctx =>
enumAsm[Color]
@ -50,9 +49,8 @@ class Easy6502Spec extends AnyFlatSpec with should.Matchers:
println(
doc.toAsm
)
}
"loop demo" should "compile" in {
"loop demo" should "compile" in:
val doc =
asmDoc { implicit ctx =>
asm { implicit a =>
@ -65,9 +63,8 @@ class Easy6502Spec extends AnyFlatSpec with should.Matchers:
println(
doc.toAsm
)
}
"snake" should "compile" in {
"snake" should "compile" in:
val sysRandom = VolatileDevice[Int]("sysRandom", 0xfe.z)
val sysLastKey = VolatileDevice[AsciiValue]("sysLastKey", 0xff.z)
@ -161,7 +158,6 @@ class Easy6502Spec extends AnyFlatSpec with should.Matchers:
println(
doc.toAsm
)
}
def withAssemblyContext(f: AssemblyContext => Unit): AssemblyContext =
val ctx: AssemblyContext =