allow assignment

This commit is contained in:
Mark Canlas 2020-08-15 16:23:36 -04:00
parent d87d23b2ed
commit f797c6df02
2 changed files with 23 additions and 12 deletions

View File

@ -11,20 +11,29 @@ package object dsl {
.toDoc
}
def group(s: String)(f: DefinitionGroupContext => Unit)(implicit ctx: AsmDocumentContext): Unit = {
def group[A](s: String)(f: DefinitionGroupContext => A)(implicit ctx: AsmDocumentContext): A = {
val g: DefinitionGroupContext =
new DefinitionGroupContext
f(g)
val ret =
f(g)
ctx
.push(g.toGroup(s))
ret
}
def define[A <: Address : Operand](name: String, x: A)(implicit ctx: DefinitionGroupContext): Unit =
def define[A <: Address : Operand](name: String, x: A)(implicit ctx: DefinitionGroupContext): Definition[A] = {
val definition =
Definition(name, x)
ctx
.push(Definition(name, x))
definition
}
implicit class AddressOps(n: Int) {
def z: ZeroAddress =
ZeroAddress(n)

View File

@ -9,22 +9,24 @@ class DslSpec extends AnyFlatSpec with should.Matchers {
val doc =
asmDoc { implicit ctx =>
group("snake things") { implicit g =>
define("snakeBodyStart", 0x12.z)
define("snakeDirection", 0x02.z)
define("snakeLength", 0x03.z)
(define("snakeBodyStart", 0x12.z),
define("snakeDirection", 0x02.z),
define("snakeLength", 0x03.z))
}
group("ASCII values of keys controlling the snake") { implicit g =>
define("ASCII_w", 0x77.z)
define("ASCII_a", 0x61.z)
define("ASCII_s", 0x73.z)
define("ASCII_d", 0x64.z)
(define("ASCII_w", 0x77.z),
define("ASCII_a", 0x61.z),
define("ASCII_s", 0x73.z),
define("ASCII_d", 0x64.z))
}
group("System variables") { implicit g =>
define("sysRandom", 0xfe.z)
define("sysLastKey", 0xff.z)
(define("sysRandom", 0xfe.z),
define("sysLastKey", 0xff.z))
}
()
}
doc shouldEqual AsmDocument(List(