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6502_65C02_functional_tests/bin_files/6502_functional_test.lst
Klaus2m5 fe99e56162 fixed BRK not tested with interrupts disabled 
added option to skip the remainder of a failing test in report.i65
added otion to skip undefined opcode as NOP test for the 65C02
replaced binaries with the current version of the test
2017-12-07 16:49:40 +01:00

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AS65 Assembler for R6502 [1.42]. Copyright 1994-2007, Frank A. Kingswood Page 1
---------------------------------------------------- 6502_functional_test.a65 ----------------------------------------------------
6104 lines read, no errors in pass 1.
;
; 6 5 0 2 F U N C T I O N A L T E S T
;
; Copyright (C) 2012-2015 Klaus Dormann
;
; This program is free software: you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation, either version 3 of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program. If not, see <http://www.gnu.org/licenses/>.
; This program is designed to test all opcodes of a 6502 emulator using all
; addressing modes with focus on propper setting of the processor status
; register bits.
;
; version 04-dec-2017
; contact info at http://2m5.de or email K@2m5.de
;
; assembled with AS65 from http://www.kingswood-consulting.co.uk/assemblers/
; command line switches: -l -m -s2 -w -h0
; | | | | no page headers in listing
; | | | wide listing (133 char/col)
; | | write intel hex file instead of binary
; | expand macros in listing
; generate pass2 listing
;
; No IO - should be run from a monitor with access to registers.
; To run load intel hex image with a load command, than alter PC to 400 hex
; (code_segment) and enter a go command.
; Loop on program counter determines error or successful completion of test.
; Check listing for relevant traps (jump/branch *).
; Please note that in early tests some instructions will have to be used before
; they are actually tested!
;
; RESET, NMI or IRQ should not occur and will be trapped if vectors are enabled.
; Tests documented behavior of the original NMOS 6502 only! No unofficial
; opcodes. Additional opcodes of newer versions of the CPU (65C02, 65816) will
; not be tested. Decimal ops will only be tested with valid BCD operands and
; N V Z flags will be ignored.
;
; Debugging hints:
; Most of the code is written sequentially. if you hit a trap, check the
; immediately preceeding code for the instruction to be tested. Results are
; tested first, flags are checked second by pushing them onto the stack and
; pulling them to the accumulator after the result was checked. The "real"
; flags are no longer valid for the tested instruction at this time!
; If the tested instruction was indexed, the relevant index (X or Y) must
; also be checked. Opposed to the flags, X and Y registers are still valid.
;
; versions:
; 28-jul-2012 1st version distributed for testing
; 29-jul-2012 fixed references to location 0, now #0
; added license - GPLv3
; 30-jul-2012 added configuration options
; 01-aug-2012 added trap macro to allow user to change error handling
; 01-dec-2012 fixed trap in branch field must be a branch
; 02-mar-2013 fixed PLA flags not tested
; 19-jul-2013 allowed ROM vectors to be loaded when load_data_direct = 0
; added test sequence check to detect if tests jump their fence
; 23-jul-2013 added RAM integrity check option
; 16-aug-2013 added error report to standard output option
; 13-dec-2014 added binary/decimal opcode table switch test
; 14-dec-2014 improved relative address test
; 23-aug-2015 added option to disable self modifying tests
; 24-aug-2015 all self modifying immediate opcodes now execute in data RAM
; added small branch offset pretest
; 21-oct-2015 added option to disable decimal mode ADC & SBC tests
; 04-dec-2017 fixed BRK only tested with interrupts enabled
; added option to skip the remainder of a failing test
; in report.i65
; C O N F I G U R A T I O N
;ROM_vectors writable (0=no, 1=yes)
;if ROM vectors can not be used interrupts will not be trapped
;as a consequence BRK can not be tested but will be emulated to test RTI
0001 = ROM_vectors = 1
;load_data_direct (0=move from code segment, 1=load directly)
;loading directly is preferred but may not be supported by your platform
;0 produces only consecutive object code, 1 is not suitable for a binary image
0001 = load_data_direct = 1
;I_flag behavior (0=force enabled, 1=force disabled, 2=prohibit change, 3=allow
;change) 2 requires extra code and is not recommended. SEI & CLI can only be
;tested if you allow changing the interrupt status (I_flag = 3)
0003 = I_flag = 3
;configure memory - try to stay away from memory used by the system
;zero_page memory start address, $50 (80) consecutive Bytes required
; add 2 if I_flag = 2
000a = zero_page = $a
;data_segment memory start address, $6A (106) consecutive Bytes required
0200 = data_segment = $200
if (data_segment & $ff) != 0
ERROR ERROR ERROR low byte of data_segment MUST be $00 !!
endif
;code_segment memory start address, 13kB of consecutive space required
; add 2.5 kB if I_flag = 2
0400 = code_segment = $400
;self modifying code may be disabled to allow running in ROM
;0=part of the code is self modifying and must reside in RAM
;1=tests disabled: branch range
0000 = disable_selfmod = 0
;report errors through I/O channel (0=use standard self trap loops, 1=include
;report.i65 as I/O channel, add 3.5 kB)
0000 = report = 0
;RAM integrity test option. Checks for undesired RAM writes.
;set lowest non RAM or RAM mirror address page (-1=disable, 0=64k, $40=16k)
;leave disabled if a monitor, OS or background interrupt is allowed to alter RAM
ffff = ram_top = -1
;disable test decimal mode ADC & SBC, 0=enable, 1=disable,
;2=disable including decimal flag in processor status
0000 = disable_decimal = 0
noopt ;do not take shortcuts
;macros for error & success traps to allow user modification
;example:
;trap macro
; jsr my_error_handler
; endm
;trap_eq macro
; bne skip\?
; trap ;failed equal (zero)
;skip\?
; endm
;
; my_error_handler should pop the calling address from the stack and report it.
; putting larger portions of code (more than 3 bytes) inside the trap macro
; may lead to branch range problems for some tests.
if report = 0
trap macro
jmp * ;failed anyway
endm
trap_eq macro
beq * ;failed equal (zero)
endm
trap_ne macro
bne * ;failed not equal (non zero)
endm
trap_cs macro
bcs * ;failed carry set
endm
trap_cc macro
bcc * ;failed carry clear
endm
trap_mi macro
bmi * ;failed minus (bit 7 set)
endm
trap_pl macro
bpl * ;failed plus (bit 7 clear)
endm
trap_vs macro
bvs * ;failed overflow set
endm
trap_vc macro
bvc * ;failed overflow clear
endm
; please observe that during the test the stack gets invalidated
; therefore a RTS inside the success macro is not possible
success macro
jmp * ;test passed, no errors
endm
endif
if report = 1
trap macro
jsr report_error
endm
trap_eq macro
bne skip\?
trap ;failed equal (zero)
skip\?
endm
trap_ne macro
beq skip\?
trap ;failed not equal (non zero)
skip\?
endm
trap_cs macro
bcc skip\?
trap ;failed carry set
skip\?
endm
trap_cc macro
bcs skip\?
trap ;failed carry clear
skip\?
endm
trap_mi macro
bpl skip\?
trap ;failed minus (bit 7 set)
skip\?
endm
trap_pl macro
bmi skip\?
trap ;failed plus (bit 7 clear)
skip\?
endm
trap_vs macro
bvc skip\?
trap ;failed overflow set
skip\?
endm
trap_vc macro
bvs skip\?
trap ;failed overflow clear
skip\?
endm
; please observe that during the test the stack gets invalidated
; therefore a RTS inside the success macro is not possible
success macro
jsr report_success
endm
endif
0001 = carry equ %00000001 ;flag bits in status
0002 = zero equ %00000010
0004 = intdis equ %00000100
0008 = decmode equ %00001000
0010 = break equ %00010000
0020 = reserv equ %00100000
0040 = overfl equ %01000000
0080 = minus equ %10000000
0001 = fc equ carry
0002 = fz equ zero
0003 = fzc equ carry+zero
0040 = fv equ overfl
0042 = fvz equ overfl+zero
0080 = fn equ minus
0081 = fnc equ minus+carry
0082 = fnz equ minus+zero
0083 = fnzc equ minus+zero+carry
00c0 = fnv equ minus+overfl
0030 = fao equ break+reserv ;bits always on after PHP, BRK
0034 = fai equ fao+intdis ;+ forced interrupt disable
0038 = faod equ fao+decmode ;+ ignore decimal
003c = faid equ fai+decmode ;+ ignore decimal
00ff = m8 equ $ff ;8 bit mask
00fb = m8i equ $ff&~intdis ;8 bit mask - interrupt disable
;macros to allow masking of status bits.
;masking test of decimal bit
;masking of interrupt enable/disable on load and compare
;masking of always on bits after PHP or BRK (unused & break) on compare
if disable_decimal < 2
if I_flag = 0
load_flag macro
lda #\1&m8i ;force enable interrupts (mask I)
endm
cmp_flag macro
cmp #(\1|fao)&m8i ;I_flag is always enabled + always on bits
endm
eor_flag macro
eor #(\1&m8i|fao) ;mask I, invert expected flags + always on bits
endm
endif
if I_flag = 1
load_flag macro
lda #\1|intdis ;force disable interrupts
endm
cmp_flag macro
cmp #(\1|fai)&m8 ;I_flag is always disabled + always on bits
endm
eor_flag macro
eor #(\1|fai) ;invert expected flags + always on bits + I
endm
endif
if I_flag = 2
load_flag macro
lda #\1
ora flag_I_on ;restore I-flag
and flag_I_off
endm
cmp_flag macro
eor flag_I_on ;I_flag is never changed
cmp #(\1|fao)&m8i ;expected flags + always on bits, mask I
endm
eor_flag macro
eor flag_I_on ;I_flag is never changed
eor #(\1&m8i|fao) ;mask I, invert expected flags + always on bits
endm
endif
if I_flag = 3
load_flag macro
lda #\1 ;allow test to change I-flag (no mask)
endm
cmp_flag macro
cmp #(\1|fao)&m8 ;expected flags + always on bits
endm
eor_flag macro
eor #\1|fao ;invert expected flags + always on bits
endm
endif
else
if I_flag = 0
load_flag macro
lda #\1&m8i ;force enable interrupts (mask I)
endm
cmp_flag macro
ora #decmode ;ignore decimal mode bit
cmp #(\1|faod)&m8i ;I_flag is always enabled + always on bits
endm
eor_flag macro
ora #decmode ;ignore decimal mode bit
eor #(\1&m8i|faod) ;mask I, invert expected flags + always on bits
endm
endif
if I_flag = 1
load_flag macro
lda #\1|intdis ;force disable interrupts
endm
cmp_flag macro
ora #decmode ;ignore decimal mode bit
cmp #(\1|faid)&m8 ;I_flag is always disabled + always on bits
endm
eor_flag macro
ora #decmode ;ignore decimal mode bit
eor #(\1|faid) ;invert expected flags + always on bits + I
endm
endif
if I_flag = 2
load_flag macro
lda #\1
ora flag_I_on ;restore I-flag
and flag_I_off
endm
cmp_flag macro
eor flag_I_on ;I_flag is never changed
ora #decmode ;ignore decimal mode bit
cmp #(\1|faod)&m8i ;expected flags + always on bits, mask I
endm
eor_flag macro
eor flag_I_on ;I_flag is never changed
ora #decmode ;ignore decimal mode bit
eor #(\1&m8i|faod) ;mask I, invert expected flags + always on bits
endm
endif
if I_flag = 3
load_flag macro
lda #\1 ;allow test to change I-flag (no mask)
endm
cmp_flag macro
ora #decmode ;ignore decimal mode bit
cmp #(\1|faod)&m8 ;expected flags + always on bits
endm
eor_flag macro
ora #decmode ;ignore decimal mode bit
eor #\1|faod ;invert expected flags + always on bits
endm
endif
endif
;macros to set (register|memory|zeropage) & status
set_stat macro ;setting flags in the processor status register
load_flag \1
pha ;use stack to load status
plp
endm
set_a macro ;precharging accu & status
load_flag \2
pha ;use stack to load status
lda #\1 ;precharge accu
plp
endm
set_x macro ;precharging index & status
load_flag \2
pha ;use stack to load status
ldx #\1 ;precharge index x
plp
endm
set_y macro ;precharging index & status
load_flag \2
pha ;use stack to load status
ldy #\1 ;precharge index y
plp
endm
set_ax macro ;precharging indexed accu & immediate status
load_flag \2
pha ;use stack to load status
lda \1,x ;precharge accu
plp
endm
set_ay macro ;precharging indexed accu & immediate status
load_flag \2
pha ;use stack to load status
lda \1,y ;precharge accu
plp
endm
set_z macro ;precharging indexed zp & immediate status
load_flag \2
pha ;use stack to load status
lda \1,x ;load to zeropage
sta zpt
plp
endm
set_zx macro ;precharging zp,x & immediate status
load_flag \2
pha ;use stack to load status
lda \1,x ;load to indexed zeropage
sta zpt,x
plp
endm
set_abs macro ;precharging indexed memory & immediate status
load_flag \2
pha ;use stack to load status
lda \1,x ;load to memory
sta abst
plp
endm
set_absx macro ;precharging abs,x & immediate status
load_flag \2
pha ;use stack to load status
lda \1,x ;load to indexed memory
sta abst,x
plp
endm
;macros to test (register|memory|zeropage) & status & (mask)
tst_stat macro ;testing flags in the processor status register
php ;save status
pla ;use stack to retrieve status
pha
cmp_flag \1
trap_ne
plp ;restore status
endm
tst_a macro ;testing result in accu & flags
php ;save flags
cmp #\1 ;test result
trap_ne
pla ;load status
pha
cmp_flag \2
trap_ne
plp ;restore status
endm
tst_x macro ;testing result in x index & flags
php ;save flags
cpx #\1 ;test result
trap_ne
pla ;load status
pha
cmp_flag \2
trap_ne
plp ;restore status
endm
tst_y macro ;testing result in y index & flags
php ;save flags
cpy #\1 ;test result
trap_ne
pla ;load status
pha
cmp_flag \2
trap_ne
plp ;restore status
endm
tst_ax macro ;indexed testing result in accu & flags
php ;save flags
cmp \1,x ;test result
trap_ne
pla ;load status
eor_flag \3
cmp \2,x ;test flags
trap_ne ;
endm
tst_ay macro ;indexed testing result in accu & flags
php ;save flags
cmp \1,y ;test result
trap_ne ;
pla ;load status
eor_flag \3
cmp \2,y ;test flags
trap_ne
endm
tst_z macro ;indexed testing result in zp & flags
php ;save flags
lda zpt
cmp \1,x ;test result
trap_ne
pla ;load status
eor_flag \3
cmp \2,x ;test flags
trap_ne
endm
tst_zx macro ;testing result in zp,x & flags
php ;save flags
lda zpt,x
cmp \1,x ;test result
trap_ne
pla ;load status
eor_flag \3
cmp \2,x ;test flags
trap_ne
endm
tst_abs macro ;indexed testing result in memory & flags
php ;save flags
lda abst
cmp \1,x ;test result
trap_ne
pla ;load status
eor_flag \3
cmp \2,x ;test flags
trap_ne
endm
tst_absx macro ;testing result in abs,x & flags
php ;save flags
lda abst,x
cmp \1,x ;test result
trap_ne
pla ;load status
eor_flag \3
cmp \2,x ;test flags
trap_ne
endm
; RAM integrity test
; verifies that none of the previous tests has altered RAM outside of the
; designated write areas.
; uses zpt word as indirect pointer, zpt+2 word as checksum
if ram_top > -1
check_ram macro
cld
lda #0
sta zpt ;set low byte of indirect pointer
sta zpt+3 ;checksum high byte
if disable_selfmod = 0
sta range_adr ;reset self modifying code
endif
clc
ldx #zp_bss-zero_page ;zeropage - write test area
ccs3\? adc zero_page,x
bcc ccs2\?
inc zpt+3 ;carry to high byte
clc
ccs2\? inx
bne ccs3\?
ldx #hi(abs1) ;set high byte of indirect pointer
stx zpt+1
ldy #lo(abs1) ;data after write & execute test area
ccs5\? adc (zpt),y
bcc ccs4\?
inc zpt+3 ;carry to high byte
clc
ccs4\? iny
bne ccs5\?
inx ;advance RAM high address
stx zpt+1
cpx #ram_top
bne ccs5\?
sta zpt+2 ;checksum low is
cmp ram_chksm ;checksum low expected
trap_ne ;checksum mismatch
lda zpt+3 ;checksum high is
cmp ram_chksm+1 ;checksum high expected
trap_ne ;checksum mismatch
endm
else
check_ram macro
;RAM check disabled - RAM size not set
endm
endif
next_test macro ;make sure, tests don't jump the fence
lda test_case ;previous test
cmp #test_num
trap_ne ;test is out of sequence
test_num = test_num + 1
lda #test_num ;*** next tests' number
sta test_case
;check_ram ;uncomment to find altered RAM after each test
endm
if load_data_direct = 1
data
else
bss ;uninitialized segment, copy of data at end of code!
endif
; org zero_page
0000 = org 0 ;edited to provide binaries loading from 0
0000 : 00000000000000.. ds zero_page
;break test interrupt save
000a : 00 irq_a ds 1 ;a register
000b : 00 irq_x ds 1 ;x register
if I_flag = 2
;masking for I bit in status
flag_I_on ds 1 ;or mask to load flags
flag_I_off ds 1 ;and mask to load flags
endif
000c : zpt ;5 bytes store/modify test area
;add/subtract operand generation and result/flag prediction
000c : 00 adfc ds 1 ;carry flag before op
000d : 00 ad1 ds 1 ;operand 1 - accumulator
000e : 00 ad2 ds 1 ;operand 2 - memory / immediate
000f : 00 adrl ds 1 ;expected result bits 0-7
0010 : 00 adrh ds 1 ;expected result bit 8 (carry)
0011 : 00 adrf ds 1 ;expected flags NV0000ZC (only binary mode)
0012 : 00 sb2 ds 1 ;operand 2 complemented for subtract
0013 : zp_bss
0013 : c3824100 zp1 db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
0017 : 7f zp7f db $7f ;test pattern for compare
;logical zeropage operands
0018 : 001f7180 zpOR db 0,$1f,$71,$80 ;test pattern for OR
001c : 0fff7f80 zpAN db $0f,$ff,$7f,$80 ;test pattern for AND
0020 : ff0f8f8f zpEO db $ff,$0f,$8f,$8f ;test pattern for EOR
;indirect addressing pointers
0024 : 1702 ind1 dw abs1 ;indirect pointer to pattern in absolute memory
0026 : 1802 dw abs1+1
0028 : 1902 dw abs1+2
002a : 1a02 dw abs1+3
002c : 1b02 dw abs7f
002e : 1f01 inw1 dw abs1-$f8 ;indirect pointer for wrap-test pattern
0030 : 0302 indt dw abst ;indirect pointer to store area in absolute memory
0032 : 0402 dw abst+1
0034 : 0502 dw abst+2
0036 : 0602 dw abst+3
0038 : 0b01 inwt dw abst-$f8 ;indirect pointer for wrap-test store
003a : 4e02 indAN dw absAN ;indirect pointer to AND pattern in absolute memory
003c : 4f02 dw absAN+1
003e : 5002 dw absAN+2
0040 : 5102 dw absAN+3
0042 : 5202 indEO dw absEO ;indirect pointer to EOR pattern in absolute memory
0044 : 5302 dw absEO+1
0046 : 5402 dw absEO+2
0048 : 5502 dw absEO+3
004a : 4a02 indOR dw absOR ;indirect pointer to OR pattern in absolute memory
004c : 4b02 dw absOR+1
004e : 4c02 dw absOR+2
0050 : 4d02 dw absOR+3
;add/subtract indirect pointers
0052 : 0302 adi2 dw ada2 ;indirect pointer to operand 2 in absolute memory
0054 : 0402 sbi2 dw sba2 ;indirect pointer to complemented operand 2 (SBC)
0056 : 0401 adiy2 dw ada2-$ff ;with offset for indirect indexed
0058 : 0501 sbiy2 dw sba2-$ff
005a : zp_bss_end
0200 = org data_segment
0200 : 00 test_case ds 1 ;current test number
0201 : 0000 ram_chksm ds 2 ;checksum for RAM integrity test
;add/subtract operand copy - abs tests write area
0203 : abst ;5 bytes store/modify test area
0203 : 00 ada2 ds 1 ;operand 2
0204 : 00 sba2 ds 1 ;operand 2 complemented for subtract
0205 : 000000 ds 3 ;fill remaining bytes
0208 : data_bss
if load_data_direct = 1
0208 : 2900 ex_andi and #0 ;execute immediate opcodes
020a : 60 rts
020b : 4900 ex_eori eor #0 ;execute immediate opcodes
020d : 60 rts
020e : 0900 ex_orai ora #0 ;execute immediate opcodes
0210 : 60 rts
0211 : 6900 ex_adci adc #0 ;execute immediate opcodes
0213 : 60 rts
0214 : e900 ex_sbci sbc #0 ;execute immediate opcodes
0216 : 60 rts
else
ex_andi ds 3
ex_eori ds 3
ex_orai ds 3
ex_adci ds 3
ex_sbci ds 3
endif
0217 : c3824100 abs1 db $c3,$82,$41,0 ;test patterns for LDx BIT ROL ROR ASL LSR
021b : 7f abs7f db $7f ;test pattern for compare
;loads
021c : 80800002 fLDx db fn,fn,0,fz ;expected flags for load
;shifts
0220 : rASL ;expected result ASL & ROL -carry
0220 : 86048200 rROL db $86,$04,$82,0 ; "
0224 : 87058301 rROLc db $87,$05,$83,1 ;expected result ROL +carry
0228 : rLSR ;expected result LSR & ROR -carry
0228 : 61412000 rROR db $61,$41,$20,0 ; "
022c : e1c1a080 rRORc db $e1,$c1,$a0,$80 ;expected result ROR +carry
0230 : fASL ;expected flags for shifts
0230 : 81018002 fROL db fnc,fc,fn,fz ;no carry in
0234 : 81018000 fROLc db fnc,fc,fn,0 ;carry in
0238 : fLSR
0238 : 01000102 fROR db fc,0,fc,fz ;no carry in
023c : 81808180 fRORc db fnc,fn,fnc,fn ;carry in
;increments (decrements)
0240 : 7f80ff0001 rINC db $7f,$80,$ff,0,1 ;expected result for INC/DEC
0245 : 0080800200 fINC db 0,fn,fn,fz,0 ;expected flags for INC/DEC
;logical memory operand
024a : 001f7180 absOR db 0,$1f,$71,$80 ;test pattern for OR
024e : 0fff7f80 absAN db $0f,$ff,$7f,$80 ;test pattern for AND
0252 : ff0f8f8f absEO db $ff,$0f,$8f,$8f ;test pattern for EOR
;logical accu operand
0256 : 00f11f00 absORa db 0,$f1,$1f,0 ;test pattern for OR
025a : f0ffffff absANa db $f0,$ff,$ff,$ff ;test pattern for AND
025e : fff0f00f absEOa db $ff,$f0,$f0,$0f ;test pattern for EOR
;logical results
0262 : 00ff7f80 absrlo db 0,$ff,$7f,$80
0266 : 02800080 absflo db fz,fn,0,fn
026a : data_bss_end
code
0400 = org code_segment
0400 : d8 start cld
0401 : a2ff ldx #$ff
0403 : 9a txs
0404 : a900 lda #0 ;*** test 0 = initialize
0406 : 8d0002 sta test_case
0000 = test_num = 0
;stop interrupts before initializing BSS
if I_flag = 1
sei
endif
;initialize I/O for report channel
if report = 1
jsr report_init
endif
;pretest small branch offset
0409 : a205 ldx #5
040b : 4c3304 jmp psb_test
040e : psb_bwok
040e : a005 ldy #5
0410 : d008 bne psb_forw
trap ;branch should be taken
0412 : 4c1204 > jmp * ;failed anyway
0415 : 88 dey ;forward landing zone
0416 : 88 dey
0417 : 88 dey
0418 : 88 dey
0419 : 88 dey
041a : psb_forw
041a : 88 dey
041b : 88 dey
041c : 88 dey
041d : 88 dey
041e : 88 dey
041f : f017 beq psb_fwok
trap ;forward offset
0421 : 4c2104 > jmp * ;failed anyway
0424 : ca dex ;backward landing zone
0425 : ca dex
0426 : ca dex
0427 : ca dex
0428 : ca dex
0429 : psb_back
0429 : ca dex
042a : ca dex
042b : ca dex
042c : ca dex
042d : ca dex
042e : f0de beq psb_bwok
trap ;backward offset
0430 : 4c3004 > jmp * ;failed anyway
0433 : psb_test
0433 : d0f4 bne psb_back
trap ;branch should be taken
0435 : 4c3504 > jmp * ;failed anyway
0438 : psb_fwok
;initialize BSS segment
if load_data_direct != 1
ldx #zp_end-zp_init-1
ld_zp lda zp_init,x
sta zp_bss,x
dex
bpl ld_zp
ldx #data_end-data_init-1
ld_data lda data_init,x
sta data_bss,x
dex
bpl ld_data
if ROM_vectors = 1
ldx #5
ld_vect lda vec_init,x
sta vec_bss,x
dex
bpl ld_vect
endif
endif
;retain status of interrupt flag
if I_flag = 2
php
pla
and #4 ;isolate flag
sta flag_I_on ;or mask
eor #lo(~4) ;reverse
sta flag_I_off ;and mask
endif
;generate checksum for RAM integrity test
if ram_top > -1
lda #0
sta zpt ;set low byte of indirect pointer
sta ram_chksm+1 ;checksum high byte
if disable_selfmod = 0
sta range_adr ;reset self modifying code
endif
clc
ldx #zp_bss-zero_page ;zeropage - write test area
gcs3 adc zero_page,x
bcc gcs2
inc ram_chksm+1 ;carry to high byte
clc
gcs2 inx
bne gcs3
ldx #hi(abs1) ;set high byte of indirect pointer
stx zpt+1
ldy #lo(abs1) ;data after write & execute test area
gcs5 adc (zpt),y
bcc gcs4
inc ram_chksm+1 ;carry to high byte
clc
gcs4 iny
bne gcs5
inx ;advance RAM high address
stx zpt+1
cpx #ram_top
bne gcs5
sta ram_chksm ;checksum complete
endif
next_test
0438 : ad0002 > lda test_case ;previous test
043b : c900 > cmp #test_num
> trap_ne ;test is out of sequence
043d : d0fe > bne * ;failed not equal (non zero)
>
0001 = >test_num = test_num + 1
043f : a901 > lda #test_num ;*** next tests' number
0441 : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
if disable_selfmod = 0
;testing relative addressing with BEQ
0444 : a0fe ldy #$fe ;testing maximum range, not -1/-2 (invalid/self adr)
0446 : range_loop
0446 : 88 dey ;next relative address
0447 : 98 tya
0448 : aa tax ;precharge count to end of loop
0449 : 1008 bpl range_fw ;calculate relative address
044b : 18 clc ;avoid branch self or to relative address of branch
044c : 6902 adc #2
044e : ea nop ;offset landing zone - tolerate +/-5 offset to branch
044f : ea nop
0450 : ea nop
0451 : ea nop
0452 : ea nop
0453 : range_fw
0453 : ea nop
0454 : ea nop
0455 : ea nop
0456 : ea nop
0457 : ea nop
0458 : 497f eor #$7f ;complement except sign
045a : 8de604 sta range_adr ;load into test target
045d : a900 lda #0 ;should set zero flag in status register
045f : 4ce504 jmp range_op
0462 : ca dex ; offset landing zone - backward branch too far
0463 : ca dex
0464 : ca dex
0465 : ca dex
0466 : ca dex
;relative address target field with branch under test in the middle
0467 : ca dex ;-128 - max backward
0468 : ca dex
0469 : ca dex
046a : ca dex
046b : ca dex
046c : ca dex
046d : ca dex
046e : ca dex
046f : ca dex ;-120
0470 : ca dex
0471 : ca dex
0472 : ca dex
0473 : ca dex
0474 : ca dex
0475 : ca dex
0476 : ca dex
0477 : ca dex
0478 : ca dex
0479 : ca dex ;-110
047a : ca dex
047b : ca dex
047c : ca dex
047d : ca dex
047e : ca dex
047f : ca dex
0480 : ca dex
0481 : ca dex
0482 : ca dex
0483 : ca dex ;-100
0484 : ca dex
0485 : ca dex
0486 : ca dex
0487 : ca dex
0488 : ca dex
0489 : ca dex
048a : ca dex
048b : ca dex
048c : ca dex
048d : ca dex ;-90
048e : ca dex
048f : ca dex
0490 : ca dex
0491 : ca dex
0492 : ca dex
0493 : ca dex
0494 : ca dex
0495 : ca dex
0496 : ca dex
0497 : ca dex ;-80
0498 : ca dex
0499 : ca dex
049a : ca dex
049b : ca dex
049c : ca dex
049d : ca dex
049e : ca dex
049f : ca dex
04a0 : ca dex
04a1 : ca dex ;-70
04a2 : ca dex
04a3 : ca dex
04a4 : ca dex
04a5 : ca dex
04a6 : ca dex
04a7 : ca dex
04a8 : ca dex
04a9 : ca dex
04aa : ca dex
04ab : ca dex ;-60
04ac : ca dex
04ad : ca dex
04ae : ca dex
04af : ca dex
04b0 : ca dex
04b1 : ca dex
04b2 : ca dex
04b3 : ca dex
04b4 : ca dex
04b5 : ca dex ;-50
04b6 : ca dex
04b7 : ca dex
04b8 : ca dex
04b9 : ca dex
04ba : ca dex
04bb : ca dex
04bc : ca dex
04bd : ca dex
04be : ca dex
04bf : ca dex ;-40
04c0 : ca dex
04c1 : ca dex
04c2 : ca dex
04c3 : ca dex
04c4 : ca dex
04c5 : ca dex
04c6 : ca dex
04c7 : ca dex
04c8 : ca dex
04c9 : ca dex ;-30
04ca : ca dex
04cb : ca dex
04cc : ca dex
04cd : ca dex
04ce : ca dex
04cf : ca dex
04d0 : ca dex
04d1 : ca dex
04d2 : ca dex
04d3 : ca dex ;-20
04d4 : ca dex
04d5 : ca dex
04d6 : ca dex
04d7 : ca dex
04d8 : ca dex
04d9 : ca dex
04da : ca dex
04db : ca dex
04dc : ca dex
04dd : ca dex ;-10
04de : ca dex
04df : ca dex
04e0 : ca dex
04e1 : ca dex
04e2 : ca dex
04e3 : ca dex
04e4 : ca dex ;-3
04e5 : range_op ;test target with zero flag=0, z=1 if previous dex
04e6 = range_adr = *+1 ;modifiable relative address
04e5 : f03e beq *+64 ;+64 if called without modification
04e7 : ca dex ;+0
04e8 : ca dex
04e9 : ca dex
04ea : ca dex
04eb : ca dex
04ec : ca dex
04ed : ca dex
04ee : ca dex
04ef : ca dex
04f0 : ca dex
04f1 : ca dex ;+10
04f2 : ca dex
04f3 : ca dex
04f4 : ca dex
04f5 : ca dex
04f6 : ca dex
04f7 : ca dex
04f8 : ca dex
04f9 : ca dex
04fa : ca dex
04fb : ca dex ;+20
04fc : ca dex
04fd : ca dex
04fe : ca dex
04ff : ca dex
0500 : ca dex
0501 : ca dex
0502 : ca dex
0503 : ca dex
0504 : ca dex
0505 : ca dex ;+30
0506 : ca dex
0507 : ca dex
0508 : ca dex
0509 : ca dex
050a : ca dex
050b : ca dex
050c : ca dex
050d : ca dex
050e : ca dex
050f : ca dex ;+40
0510 : ca dex
0511 : ca dex
0512 : ca dex
0513 : ca dex
0514 : ca dex
0515 : ca dex
0516 : ca dex
0517 : ca dex
0518 : ca dex
0519 : ca dex ;+50
051a : ca dex
051b : ca dex
051c : ca dex
051d : ca dex
051e : ca dex
051f : ca dex
0520 : ca dex
0521 : ca dex
0522 : ca dex
0523 : ca dex ;+60
0524 : ca dex
0525 : ca dex
0526 : ca dex
0527 : ca dex
0528 : ca dex
0529 : ca dex
052a : ca dex
052b : ca dex
052c : ca dex
052d : ca dex ;+70
052e : ca dex
052f : ca dex
0530 : ca dex
0531 : ca dex
0532 : ca dex
0533 : ca dex
0534 : ca dex
0535 : ca dex
0536 : ca dex
0537 : ca dex ;+80
0538 : ca dex
0539 : ca dex
053a : ca dex
053b : ca dex
053c : ca dex
053d : ca dex
053e : ca dex
053f : ca dex
0540 : ca dex
0541 : ca dex ;+90
0542 : ca dex
0543 : ca dex
0544 : ca dex
0545 : ca dex
0546 : ca dex
0547 : ca dex
0548 : ca dex
0549 : ca dex
054a : ca dex
054b : ca dex ;+100
054c : ca dex
054d : ca dex
054e : ca dex
054f : ca dex
0550 : ca dex
0551 : ca dex
0552 : ca dex
0553 : ca dex
0554 : ca dex
0555 : ca dex ;+110
0556 : ca dex
0557 : ca dex
0558 : ca dex
0559 : ca dex
055a : ca dex
055b : ca dex
055c : ca dex
055d : ca dex
055e : ca dex
055f : ca dex ;+120
0560 : ca dex
0561 : ca dex
0562 : ca dex
0563 : ca dex
0564 : ca dex
0565 : ca dex
0566 : ea nop ;offset landing zone - forward branch too far
0567 : ea nop
0568 : ea nop
0569 : ea nop
056a : ea nop
056b : f008 beq range_ok ;+127 - max forward
trap ; bad range
056d : 4c6d05 > jmp * ;failed anyway
0570 : ea nop ;offset landing zone - tolerate +/-5 offset to branch
0571 : ea nop
0572 : ea nop
0573 : ea nop
0574 : ea nop
0575 : range_ok
0575 : ea nop
0576 : ea nop
0577 : ea nop
0578 : ea nop
0579 : ea nop
057a : c000 cpy #0
057c : f003 beq range_end
057e : 4c4604 jmp range_loop
0581 : range_end ;range test successful
endif
next_test
0581 : ad0002 > lda test_case ;previous test
0584 : c901 > cmp #test_num
> trap_ne ;test is out of sequence
0586 : d0fe > bne * ;failed not equal (non zero)
>
0002 = >test_num = test_num + 1
0588 : a902 > lda #test_num ;*** next tests' number
058a : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
;partial test BNE & CMP, CPX, CPY immediate
058d : c001 cpy #1 ;testing BNE true
058f : d003 bne test_bne
trap
0591 : 4c9105 > jmp * ;failed anyway
0594 : test_bne
0594 : a900 lda #0
0596 : c900 cmp #0 ;test compare immediate
trap_ne
0598 : d0fe > bne * ;failed not equal (non zero)
trap_cc
059a : 90fe > bcc * ;failed carry clear
trap_mi
059c : 30fe > bmi * ;failed minus (bit 7 set)
059e : c901 cmp #1
trap_eq
05a0 : f0fe > beq * ;failed equal (zero)
trap_cs
05a2 : b0fe > bcs * ;failed carry set
trap_pl
05a4 : 10fe > bpl * ;failed plus (bit 7 clear)
05a6 : aa tax
05a7 : e000 cpx #0 ;test compare x immediate
trap_ne
05a9 : d0fe > bne * ;failed not equal (non zero)
trap_cc
05ab : 90fe > bcc * ;failed carry clear
trap_mi
05ad : 30fe > bmi * ;failed minus (bit 7 set)
05af : e001 cpx #1
trap_eq
05b1 : f0fe > beq * ;failed equal (zero)
trap_cs
05b3 : b0fe > bcs * ;failed carry set
trap_pl
05b5 : 10fe > bpl * ;failed plus (bit 7 clear)
05b7 : a8 tay
05b8 : c000 cpy #0 ;test compare y immediate
trap_ne
05ba : d0fe > bne * ;failed not equal (non zero)
trap_cc
05bc : 90fe > bcc * ;failed carry clear
trap_mi
05be : 30fe > bmi * ;failed minus (bit 7 set)
05c0 : c001 cpy #1
trap_eq
05c2 : f0fe > beq * ;failed equal (zero)
trap_cs
05c4 : b0fe > bcs * ;failed carry set
trap_pl
05c6 : 10fe > bpl * ;failed plus (bit 7 clear)
next_test
05c8 : ad0002 > lda test_case ;previous test
05cb : c902 > cmp #test_num
> trap_ne ;test is out of sequence
05cd : d0fe > bne * ;failed not equal (non zero)
>
0003 = >test_num = test_num + 1
05cf : a903 > lda #test_num ;*** next tests' number
05d1 : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
;testing stack operations PHA PHP PLA PLP
05d4 : a2ff ldx #$ff ;initialize stack
05d6 : 9a txs
05d7 : a955 lda #$55
05d9 : 48 pha
05da : a9aa lda #$aa
05dc : 48 pha
05dd : cdfe01 cmp $1fe ;on stack ?
trap_ne
05e0 : d0fe > bne * ;failed not equal (non zero)
05e2 : ba tsx
05e3 : 8a txa ;overwrite accu
05e4 : c9fd cmp #$fd ;sp decremented?
trap_ne
05e6 : d0fe > bne * ;failed not equal (non zero)
05e8 : 68 pla
05e9 : c9aa cmp #$aa ;successful retreived from stack?
trap_ne
05eb : d0fe > bne * ;failed not equal (non zero)
05ed : 68 pla
05ee : c955 cmp #$55
trap_ne
05f0 : d0fe > bne * ;failed not equal (non zero)
05f2 : cdff01 cmp $1ff ;remains on stack?
trap_ne
05f5 : d0fe > bne * ;failed not equal (non zero)
05f7 : ba tsx
05f8 : e0ff cpx #$ff ;sp incremented?
trap_ne
05fa : d0fe > bne * ;failed not equal (non zero)
next_test
05fc : ad0002 > lda test_case ;previous test
05ff : c903 > cmp #test_num
> trap_ne ;test is out of sequence
0601 : d0fe > bne * ;failed not equal (non zero)
>
0004 = >test_num = test_num + 1
0603 : a904 > lda #test_num ;*** next tests' number
0605 : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
;testing branch decisions BPL BMI BVC BVS BCC BCS BNE BEQ
set_stat $ff ;all on
> load_flag $ff
0608 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
060a : 48 > pha ;use stack to load status
060b : 28 > plp
060c : 101a bpl nbr1 ;branches should not be taken
060e : 501b bvc nbr2
0610 : 901c bcc nbr3
0612 : d01d bne nbr4
0614 : 3003 bmi br1 ;branches should be taken
trap
0616 : 4c1606 > jmp * ;failed anyway
0619 : 7003 br1 bvs br2
trap
061b : 4c1b06 > jmp * ;failed anyway
061e : b003 br2 bcs br3
trap
0620 : 4c2006 > jmp * ;failed anyway
0623 : f00f br3 beq br4
trap
0625 : 4c2506 > jmp * ;failed anyway
0628 : nbr1
trap ;previous bpl taken
0628 : 4c2806 > jmp * ;failed anyway
062b : nbr2
trap ;previous bvc taken
062b : 4c2b06 > jmp * ;failed anyway
062e : nbr3
trap ;previous bcc taken
062e : 4c2e06 > jmp * ;failed anyway
0631 : nbr4
trap ;previous bne taken
0631 : 4c3106 > jmp * ;failed anyway
0634 : 08 br4 php
0635 : ba tsx
0636 : e0fe cpx #$fe ;sp after php?
trap_ne
0638 : d0fe > bne * ;failed not equal (non zero)
063a : 68 pla
cmp_flag $ff ;returned all flags on?
063b : c9ff > cmp #($ff |fao)&m8 ;expected flags + always on bits
trap_ne
063d : d0fe > bne * ;failed not equal (non zero)
063f : ba tsx
0640 : e0ff cpx #$ff ;sp after php?
trap_ne
0642 : d0fe > bne * ;failed not equal (non zero)
set_stat 0 ;all off
> load_flag 0
0644 : a900 > lda #0 ;allow test to change I-flag (no mask)
>
0646 : 48 > pha ;use stack to load status
0647 : 28 > plp
0648 : 301a bmi nbr11 ;branches should not be taken
064a : 701b bvs nbr12
064c : b01c bcs nbr13
064e : f01d beq nbr14
0650 : 1003 bpl br11 ;branches should be taken
trap
0652 : 4c5206 > jmp * ;failed anyway
0655 : 5003 br11 bvc br12
trap
0657 : 4c5706 > jmp * ;failed anyway
065a : 9003 br12 bcc br13
trap
065c : 4c5c06 > jmp * ;failed anyway
065f : d00f br13 bne br14
trap
0661 : 4c6106 > jmp * ;failed anyway
0664 : nbr11
trap ;previous bmi taken
0664 : 4c6406 > jmp * ;failed anyway
0667 : nbr12
trap ;previous bvs taken
0667 : 4c6706 > jmp * ;failed anyway
066a : nbr13
trap ;previous bcs taken
066a : 4c6a06 > jmp * ;failed anyway
066d : nbr14
trap ;previous beq taken
066d : 4c6d06 > jmp * ;failed anyway
0670 : 08 br14 php
0671 : 68 pla
cmp_flag 0 ;flags off except break (pushed by sw) + reserved?
0672 : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
trap_ne
0674 : d0fe > bne * ;failed not equal (non zero)
;crosscheck flags
set_stat zero
> load_flag zero
0676 : a902 > lda #zero ;allow test to change I-flag (no mask)
>
0678 : 48 > pha ;use stack to load status
0679 : 28 > plp
067a : d002 bne brzs1
067c : f003 beq brzs2
067e : brzs1
trap ;branch zero/non zero
067e : 4c7e06 > jmp * ;failed anyway
0681 : b002 brzs2 bcs brzs3
0683 : 9003 bcc brzs4
0685 : brzs3
trap ;branch carry/no carry
0685 : 4c8506 > jmp * ;failed anyway
0688 : 3002 brzs4 bmi brzs5
068a : 1003 bpl brzs6
068c : brzs5
trap ;branch minus/plus
068c : 4c8c06 > jmp * ;failed anyway
068f : 7002 brzs6 bvs brzs7
0691 : 5003 bvc brzs8
0693 : brzs7
trap ;branch overflow/no overflow
0693 : 4c9306 > jmp * ;failed anyway
0696 : brzs8
set_stat carry
> load_flag carry
0696 : a901 > lda #carry ;allow test to change I-flag (no mask)
>
0698 : 48 > pha ;use stack to load status
0699 : 28 > plp
069a : f002 beq brcs1
069c : d003 bne brcs2
069e : brcs1
trap ;branch zero/non zero
069e : 4c9e06 > jmp * ;failed anyway
06a1 : 9002 brcs2 bcc brcs3
06a3 : b003 bcs brcs4
06a5 : brcs3
trap ;branch carry/no carry
06a5 : 4ca506 > jmp * ;failed anyway
06a8 : 3002 brcs4 bmi brcs5
06aa : 1003 bpl brcs6
06ac : brcs5
trap ;branch minus/plus
06ac : 4cac06 > jmp * ;failed anyway
06af : 7002 brcs6 bvs brcs7
06b1 : 5003 bvc brcs8
06b3 : brcs7
trap ;branch overflow/no overflow
06b3 : 4cb306 > jmp * ;failed anyway
06b6 : brcs8
set_stat minus
> load_flag minus
06b6 : a980 > lda #minus ;allow test to change I-flag (no mask)
>
06b8 : 48 > pha ;use stack to load status
06b9 : 28 > plp
06ba : f002 beq brmi1
06bc : d003 bne brmi2
06be : brmi1
trap ;branch zero/non zero
06be : 4cbe06 > jmp * ;failed anyway
06c1 : b002 brmi2 bcs brmi3
06c3 : 9003 bcc brmi4
06c5 : brmi3
trap ;branch carry/no carry
06c5 : 4cc506 > jmp * ;failed anyway
06c8 : 1002 brmi4 bpl brmi5
06ca : 3003 bmi brmi6
06cc : brmi5
trap ;branch minus/plus
06cc : 4ccc06 > jmp * ;failed anyway
06cf : 7002 brmi6 bvs brmi7
06d1 : 5003 bvc brmi8
06d3 : brmi7
trap ;branch overflow/no overflow
06d3 : 4cd306 > jmp * ;failed anyway
06d6 : brmi8
set_stat overfl
> load_flag overfl
06d6 : a940 > lda #overfl ;allow test to change I-flag (no mask)
>
06d8 : 48 > pha ;use stack to load status
06d9 : 28 > plp
06da : f002 beq brvs1
06dc : d003 bne brvs2
06de : brvs1
trap ;branch zero/non zero
06de : 4cde06 > jmp * ;failed anyway
06e1 : b002 brvs2 bcs brvs3
06e3 : 9003 bcc brvs4
06e5 : brvs3
trap ;branch carry/no carry
06e5 : 4ce506 > jmp * ;failed anyway
06e8 : 3002 brvs4 bmi brvs5
06ea : 1003 bpl brvs6
06ec : brvs5
trap ;branch minus/plus
06ec : 4cec06 > jmp * ;failed anyway
06ef : 5002 brvs6 bvc brvs7
06f1 : 7003 bvs brvs8
06f3 : brvs7
trap ;branch overflow/no overflow
06f3 : 4cf306 > jmp * ;failed anyway
06f6 : brvs8
set_stat $ff-zero
> load_flag $ff-zero
06f6 : a9fd > lda #$ff-zero ;allow test to change I-flag (no mask)
>
06f8 : 48 > pha ;use stack to load status
06f9 : 28 > plp
06fa : f002 beq brzc1
06fc : d003 bne brzc2
06fe : brzc1
trap ;branch zero/non zero
06fe : 4cfe06 > jmp * ;failed anyway
0701 : 9002 brzc2 bcc brzc3
0703 : b003 bcs brzc4
0705 : brzc3
trap ;branch carry/no carry
0705 : 4c0507 > jmp * ;failed anyway
0708 : 1002 brzc4 bpl brzc5
070a : 3003 bmi brzc6
070c : brzc5
trap ;branch minus/plus
070c : 4c0c07 > jmp * ;failed anyway
070f : 5002 brzc6 bvc brzc7
0711 : 7003 bvs brzc8
0713 : brzc7
trap ;branch overflow/no overflow
0713 : 4c1307 > jmp * ;failed anyway
0716 : brzc8
set_stat $ff-carry
> load_flag $ff-carry
0716 : a9fe > lda #$ff-carry ;allow test to change I-flag (no mask)
>
0718 : 48 > pha ;use stack to load status
0719 : 28 > plp
071a : d002 bne brcc1
071c : f003 beq brcc2
071e : brcc1
trap ;branch zero/non zero
071e : 4c1e07 > jmp * ;failed anyway
0721 : b002 brcc2 bcs brcc3
0723 : 9003 bcc brcc4
0725 : brcc3
trap ;branch carry/no carry
0725 : 4c2507 > jmp * ;failed anyway
0728 : 1002 brcc4 bpl brcc5
072a : 3003 bmi brcc6
072c : brcc5
trap ;branch minus/plus
072c : 4c2c07 > jmp * ;failed anyway
072f : 5002 brcc6 bvc brcc7
0731 : 7003 bvs brcc8
0733 : brcc7
trap ;branch overflow/no overflow
0733 : 4c3307 > jmp * ;failed anyway
0736 : brcc8
set_stat $ff-minus
> load_flag $ff-minus
0736 : a97f > lda #$ff-minus ;allow test to change I-flag (no mask)
>
0738 : 48 > pha ;use stack to load status
0739 : 28 > plp
073a : d002 bne brpl1
073c : f003 beq brpl2
073e : brpl1
trap ;branch zero/non zero
073e : 4c3e07 > jmp * ;failed anyway
0741 : 9002 brpl2 bcc brpl3
0743 : b003 bcs brpl4
0745 : brpl3
trap ;branch carry/no carry
0745 : 4c4507 > jmp * ;failed anyway
0748 : 3002 brpl4 bmi brpl5
074a : 1003 bpl brpl6
074c : brpl5
trap ;branch minus/plus
074c : 4c4c07 > jmp * ;failed anyway
074f : 5002 brpl6 bvc brpl7
0751 : 7003 bvs brpl8
0753 : brpl7
trap ;branch overflow/no overflow
0753 : 4c5307 > jmp * ;failed anyway
0756 : brpl8
set_stat $ff-overfl
> load_flag $ff-overfl
0756 : a9bf > lda #$ff-overfl ;allow test to change I-flag (no mask)
>
0758 : 48 > pha ;use stack to load status
0759 : 28 > plp
075a : d002 bne brvc1
075c : f003 beq brvc2
075e : brvc1
trap ;branch zero/non zero
075e : 4c5e07 > jmp * ;failed anyway
0761 : 9002 brvc2 bcc brvc3
0763 : b003 bcs brvc4
0765 : brvc3
trap ;branch carry/no carry
0765 : 4c6507 > jmp * ;failed anyway
0768 : 1002 brvc4 bpl brvc5
076a : 3003 bmi brvc6
076c : brvc5
trap ;branch minus/plus
076c : 4c6c07 > jmp * ;failed anyway
076f : 7002 brvc6 bvs brvc7
0771 : 5003 bvc brvc8
0773 : brvc7
trap ;branch overflow/no overflow
0773 : 4c7307 > jmp * ;failed anyway
0776 : brvc8
next_test
0776 : ad0002 > lda test_case ;previous test
0779 : c904 > cmp #test_num
> trap_ne ;test is out of sequence
077b : d0fe > bne * ;failed not equal (non zero)
>
0005 = >test_num = test_num + 1
077d : a905 > lda #test_num ;*** next tests' number
077f : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
; test PHA does not alter flags or accumulator but PLA does
0782 : a255 ldx #$55 ;x & y protected
0784 : a0aa ldy #$aa
set_a 1,$ff ;push
> load_flag $ff
0786 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
0788 : 48 > pha ;use stack to load status
0789 : a901 > lda #1 ;precharge accu
078b : 28 > plp
078c : 48 pha
tst_a 1,$ff
078d : 08 > php ;save flags
078e : c901 > cmp #1 ;test result
> trap_ne
0790 : d0fe > bne * ;failed not equal (non zero)
>
0792 : 68 > pla ;load status
0793 : 48 > pha
> cmp_flag $ff
0794 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0796 : d0fe > bne * ;failed not equal (non zero)
>
0798 : 28 > plp ;restore status
set_a 0,0
> load_flag 0
0799 : a900 > lda #0 ;allow test to change I-flag (no mask)
>
079b : 48 > pha ;use stack to load status
079c : a900 > lda #0 ;precharge accu
079e : 28 > plp
079f : 48 pha
tst_a 0,0
07a0 : 08 > php ;save flags
07a1 : c900 > cmp #0 ;test result
> trap_ne
07a3 : d0fe > bne * ;failed not equal (non zero)
>
07a5 : 68 > pla ;load status
07a6 : 48 > pha
> cmp_flag 0
07a7 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
>
> trap_ne
07a9 : d0fe > bne * ;failed not equal (non zero)
>
07ab : 28 > plp ;restore status
set_a $ff,$ff
> load_flag $ff
07ac : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
07ae : 48 > pha ;use stack to load status
07af : a9ff > lda #$ff ;precharge accu
07b1 : 28 > plp
07b2 : 48 pha
tst_a $ff,$ff
07b3 : 08 > php ;save flags
07b4 : c9ff > cmp #$ff ;test result
> trap_ne
07b6 : d0fe > bne * ;failed not equal (non zero)
>
07b8 : 68 > pla ;load status
07b9 : 48 > pha
> cmp_flag $ff
07ba : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
>
> trap_ne
07bc : d0fe > bne * ;failed not equal (non zero)
>
07be : 28 > plp ;restore status
set_a 1,0
> load_flag 0
07bf : a900 > lda #0 ;allow test to change I-flag (no mask)
>
07c1 : 48 > pha ;use stack to load status
07c2 : a901 > lda #1 ;precharge accu
07c4 : 28 > plp
07c5 : 48 pha
tst_a 1,0
07c6 : 08 > php ;save flags
07c7 : c901 > cmp #1 ;test result
> trap_ne
07c9 : d0fe > bne * ;failed not equal (non zero)
>
07cb : 68 > pla ;load status
07cc : 48 > pha
> cmp_flag 0
07cd : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
>
> trap_ne
07cf : d0fe > bne * ;failed not equal (non zero)
>
07d1 : 28 > plp ;restore status
set_a 0,$ff
> load_flag $ff
07d2 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
07d4 : 48 > pha ;use stack to load status
07d5 : a900 > lda #0 ;precharge accu
07d7 : 28 > plp
07d8 : 48 pha
tst_a 0,$ff
07d9 : 08 > php ;save flags
07da : c900 > cmp #0 ;test result
> trap_ne
07dc : d0fe > bne * ;failed not equal (non zero)
>
07de : 68 > pla ;load status
07df : 48 > pha
> cmp_flag $ff
07e0 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
>
> trap_ne
07e2 : d0fe > bne * ;failed not equal (non zero)
>
07e4 : 28 > plp ;restore status
set_a $ff,0
> load_flag 0
07e5 : a900 > lda #0 ;allow test to change I-flag (no mask)
>
07e7 : 48 > pha ;use stack to load status
07e8 : a9ff > lda #$ff ;precharge accu
07ea : 28 > plp
07eb : 48 pha
tst_a $ff,0
07ec : 08 > php ;save flags
07ed : c9ff > cmp #$ff ;test result
> trap_ne
07ef : d0fe > bne * ;failed not equal (non zero)
>
07f1 : 68 > pla ;load status
07f2 : 48 > pha
> cmp_flag 0
07f3 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
>
> trap_ne
07f5 : d0fe > bne * ;failed not equal (non zero)
>
07f7 : 28 > plp ;restore status
set_a 0,$ff ;pull
> load_flag $ff
07f8 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
07fa : 48 > pha ;use stack to load status
07fb : a900 > lda #0 ;precharge accu
07fd : 28 > plp
07fe : 68 pla
tst_a $ff,$ff-zero
07ff : 08 > php ;save flags
0800 : c9ff > cmp #$ff ;test result
> trap_ne
0802 : d0fe > bne * ;failed not equal (non zero)
>
0804 : 68 > pla ;load status
0805 : 48 > pha
> cmp_flag $ff-zero
0806 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0808 : d0fe > bne * ;failed not equal (non zero)
>
080a : 28 > plp ;restore status
set_a $ff,0
> load_flag 0
080b : a900 > lda #0 ;allow test to change I-flag (no mask)
>
080d : 48 > pha ;use stack to load status
080e : a9ff > lda #$ff ;precharge accu
0810 : 28 > plp
0811 : 68 pla
tst_a 0,zero
0812 : 08 > php ;save flags
0813 : c900 > cmp #0 ;test result
> trap_ne
0815 : d0fe > bne * ;failed not equal (non zero)
>
0817 : 68 > pla ;load status
0818 : 48 > pha
> cmp_flag zero
0819 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
081b : d0fe > bne * ;failed not equal (non zero)
>
081d : 28 > plp ;restore status
set_a $fe,$ff
> load_flag $ff
081e : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
0820 : 48 > pha ;use stack to load status
0821 : a9fe > lda #$fe ;precharge accu
0823 : 28 > plp
0824 : 68 pla
tst_a 1,$ff-zero-minus
0825 : 08 > php ;save flags
0826 : c901 > cmp #1 ;test result
> trap_ne
0828 : d0fe > bne * ;failed not equal (non zero)
>
082a : 68 > pla ;load status
082b : 48 > pha
> cmp_flag $ff-zero-minus
082c : c97d > cmp #($ff-zero-minus|fao)&m8 ;expected flags + always on bits
>
> trap_ne
082e : d0fe > bne * ;failed not equal (non zero)
>
0830 : 28 > plp ;restore status
set_a 0,0
> load_flag 0
0831 : a900 > lda #0 ;allow test to change I-flag (no mask)
>
0833 : 48 > pha ;use stack to load status
0834 : a900 > lda #0 ;precharge accu
0836 : 28 > plp
0837 : 68 pla
tst_a $ff,minus
0838 : 08 > php ;save flags
0839 : c9ff > cmp #$ff ;test result
> trap_ne
083b : d0fe > bne * ;failed not equal (non zero)
>
083d : 68 > pla ;load status
083e : 48 > pha
> cmp_flag minus
083f : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0841 : d0fe > bne * ;failed not equal (non zero)
>
0843 : 28 > plp ;restore status
set_a $ff,$ff
> load_flag $ff
0844 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
0846 : 48 > pha ;use stack to load status
0847 : a9ff > lda #$ff ;precharge accu
0849 : 28 > plp
084a : 68 pla
tst_a 0,$ff-minus
084b : 08 > php ;save flags
084c : c900 > cmp #0 ;test result
> trap_ne
084e : d0fe > bne * ;failed not equal (non zero)
>
0850 : 68 > pla ;load status
0851 : 48 > pha
> cmp_flag $ff-minus
0852 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0854 : d0fe > bne * ;failed not equal (non zero)
>
0856 : 28 > plp ;restore status
set_a $fe,0
> load_flag 0
0857 : a900 > lda #0 ;allow test to change I-flag (no mask)
>
0859 : 48 > pha ;use stack to load status
085a : a9fe > lda #$fe ;precharge accu
085c : 28 > plp
085d : 68 pla
tst_a 1,0
085e : 08 > php ;save flags
085f : c901 > cmp #1 ;test result
> trap_ne
0861 : d0fe > bne * ;failed not equal (non zero)
>
0863 : 68 > pla ;load status
0864 : 48 > pha
> cmp_flag 0
0865 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0867 : d0fe > bne * ;failed not equal (non zero)
>
0869 : 28 > plp ;restore status
086a : e055 cpx #$55 ;x & y unchanged?
trap_ne
086c : d0fe > bne * ;failed not equal (non zero)
086e : c0aa cpy #$aa
trap_ne
0870 : d0fe > bne * ;failed not equal (non zero)
next_test
0872 : ad0002 > lda test_case ;previous test
0875 : c905 > cmp #test_num
> trap_ne ;test is out of sequence
0877 : d0fe > bne * ;failed not equal (non zero)
>
0006 = >test_num = test_num + 1
0879 : a906 > lda #test_num ;*** next tests' number
087b : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
; partial pretest EOR #
set_a $3c,0
> load_flag 0
087e : a900 > lda #0 ;allow test to change I-flag (no mask)
>
0880 : 48 > pha ;use stack to load status
0881 : a93c > lda #$3c ;precharge accu
0883 : 28 > plp
0884 : 49c3 eor #$c3
tst_a $ff,fn
0886 : 08 > php ;save flags
0887 : c9ff > cmp #$ff ;test result
> trap_ne
0889 : d0fe > bne * ;failed not equal (non zero)
>
088b : 68 > pla ;load status
088c : 48 > pha
> cmp_flag fn
088d : c9b0 > cmp #(fn|fao)&m8 ;expected flags + always on bits
>
> trap_ne
088f : d0fe > bne * ;failed not equal (non zero)
>
0891 : 28 > plp ;restore status
set_a $c3,0
> load_flag 0
0892 : a900 > lda #0 ;allow test to change I-flag (no mask)
>
0894 : 48 > pha ;use stack to load status
0895 : a9c3 > lda #$c3 ;precharge accu
0897 : 28 > plp
0898 : 49c3 eor #$c3
tst_a 0,fz
089a : 08 > php ;save flags
089b : c900 > cmp #0 ;test result
> trap_ne
089d : d0fe > bne * ;failed not equal (non zero)
>
089f : 68 > pla ;load status
08a0 : 48 > pha
> cmp_flag fz
08a1 : c932 > cmp #(fz|fao)&m8 ;expected flags + always on bits
>
> trap_ne
08a3 : d0fe > bne * ;failed not equal (non zero)
>
08a5 : 28 > plp ;restore status
next_test
08a6 : ad0002 > lda test_case ;previous test
08a9 : c906 > cmp #test_num
> trap_ne ;test is out of sequence
08ab : d0fe > bne * ;failed not equal (non zero)
>
0007 = >test_num = test_num + 1
08ad : a907 > lda #test_num ;*** next tests' number
08af : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
; PC modifying instructions except branches (NOP, JMP, JSR, RTS, BRK, RTI)
; testing NOP
08b2 : a224 ldx #$24
08b4 : a042 ldy #$42
set_a $18,0
> load_flag 0
08b6 : a900 > lda #0 ;allow test to change I-flag (no mask)
>
08b8 : 48 > pha ;use stack to load status
08b9 : a918 > lda #$18 ;precharge accu
08bb : 28 > plp
08bc : ea nop
tst_a $18,0
08bd : 08 > php ;save flags
08be : c918 > cmp #$18 ;test result
> trap_ne
08c0 : d0fe > bne * ;failed not equal (non zero)
>
08c2 : 68 > pla ;load status
08c3 : 48 > pha
> cmp_flag 0
08c4 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
>
> trap_ne
08c6 : d0fe > bne * ;failed not equal (non zero)
>
08c8 : 28 > plp ;restore status
08c9 : e024 cpx #$24
trap_ne
08cb : d0fe > bne * ;failed not equal (non zero)
08cd : c042 cpy #$42
trap_ne
08cf : d0fe > bne * ;failed not equal (non zero)
08d1 : a2db ldx #$db
08d3 : a0bd ldy #$bd
set_a $e7,$ff
> load_flag $ff
08d5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
08d7 : 48 > pha ;use stack to load status
08d8 : a9e7 > lda #$e7 ;precharge accu
08da : 28 > plp
08db : ea nop
tst_a $e7,$ff
08dc : 08 > php ;save flags
08dd : c9e7 > cmp #$e7 ;test result
> trap_ne
08df : d0fe > bne * ;failed not equal (non zero)
>
08e1 : 68 > pla ;load status
08e2 : 48 > pha
> cmp_flag $ff
08e3 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
>
> trap_ne
08e5 : d0fe > bne * ;failed not equal (non zero)
>
08e7 : 28 > plp ;restore status
08e8 : e0db cpx #$db
trap_ne
08ea : d0fe > bne * ;failed not equal (non zero)
08ec : c0bd cpy #$bd
trap_ne
08ee : d0fe > bne * ;failed not equal (non zero)
next_test
08f0 : ad0002 > lda test_case ;previous test
08f3 : c907 > cmp #test_num
> trap_ne ;test is out of sequence
08f5 : d0fe > bne * ;failed not equal (non zero)
>
0008 = >test_num = test_num + 1
08f7 : a908 > lda #test_num ;*** next tests' number
08f9 : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
; jump absolute
set_stat $0
> load_flag $0
08fc : a900 > lda #$0 ;allow test to change I-flag (no mask)
>
08fe : 48 > pha ;use stack to load status
08ff : 28 > plp
0900 : a946 lda #'F'
0902 : a241 ldx #'A'
0904 : a052 ldy #'R' ;N=0, V=0, Z=0, C=0
0906 : 4cef36 jmp test_far
0909 : ea nop
090a : ea nop
trap_ne ;runover protection
090b : d0fe > bne * ;failed not equal (non zero)
090d : e8 inx
090e : e8 inx
090f : far_ret
trap_eq ;returned flags OK?
090f : f0fe > beq * ;failed equal (zero)
trap_pl
0911 : 10fe > bpl * ;failed plus (bit 7 clear)
trap_cc
0913 : 90fe > bcc * ;failed carry clear
trap_vc
0915 : 50fe > bvc * ;failed overflow clear
0917 : c9ec cmp #('F'^$aa) ;returned registers OK?
trap_ne
0919 : d0fe > bne * ;failed not equal (non zero)
091b : e042 cpx #('A'+1)
trap_ne
091d : d0fe > bne * ;failed not equal (non zero)
091f : c04f cpy #('R'-3)
trap_ne
0921 : d0fe > bne * ;failed not equal (non zero)
0923 : ca dex
0924 : c8 iny
0925 : c8 iny
0926 : c8 iny
0927 : 49aa eor #$aa ;N=0, V=1, Z=0, C=1
0929 : 4c3209 jmp test_near
092c : ea nop
092d : ea nop
trap_ne ;runover protection
092e : d0fe > bne * ;failed not equal (non zero)
0930 : e8 inx
0931 : e8 inx
0932 : test_near
trap_eq ;passed flags OK?
0932 : f0fe > beq * ;failed equal (zero)
trap_mi
0934 : 30fe > bmi * ;failed minus (bit 7 set)
trap_cc
0936 : 90fe > bcc * ;failed carry clear
trap_vc
0938 : 50fe > bvc * ;failed overflow clear
093a : c946 cmp #'F' ;passed registers OK?
trap_ne
093c : d0fe > bne * ;failed not equal (non zero)
093e : e041 cpx #'A'
trap_ne
0940 : d0fe > bne * ;failed not equal (non zero)
0942 : c052 cpy #'R'
trap_ne
0944 : d0fe > bne * ;failed not equal (non zero)
next_test
0946 : ad0002 > lda test_case ;previous test
0949 : c908 > cmp #test_num
> trap_ne ;test is out of sequence
094b : d0fe > bne * ;failed not equal (non zero)
>
0009 = >test_num = test_num + 1
094d : a909 > lda #test_num ;*** next tests' number
094f : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
; jump indirect
set_stat 0
> load_flag 0
0952 : a900 > lda #0 ;allow test to change I-flag (no mask)
>
0954 : 48 > pha ;use stack to load status
0955 : 28 > plp
0956 : a949 lda #'I'
0958 : a24e ldx #'N'
095a : a044 ldy #'D' ;N=0, V=0, Z=0, C=0
095c : 6c1e37 jmp (ptr_tst_ind)
095f : ea nop
trap_ne ;runover protection
0960 : d0fe > bne * ;failed not equal (non zero)
0962 : 88 dey
0963 : 88 dey
0964 : ind_ret
0964 : 08 php ;either SP or Y count will fail, if we do not hit
0965 : 88 dey
0966 : 88 dey
0967 : 88 dey
0968 : 28 plp
trap_eq ;returned flags OK?
0969 : f0fe > beq * ;failed equal (zero)
trap_pl
096b : 10fe > bpl * ;failed plus (bit 7 clear)
trap_cc
096d : 90fe > bcc * ;failed carry clear
trap_vc
096f : 50fe > bvc * ;failed overflow clear
0971 : c9e3 cmp #('I'^$aa) ;returned registers OK?
trap_ne
0973 : d0fe > bne * ;failed not equal (non zero)
0975 : e04f cpx #('N'+1)
trap_ne
0977 : d0fe > bne * ;failed not equal (non zero)
0979 : c03e cpy #('D'-6)
trap_ne
097b : d0fe > bne * ;failed not equal (non zero)
097d : ba tsx ;SP check
097e : e0ff cpx #$ff
trap_ne
0980 : d0fe > bne * ;failed not equal (non zero)
next_test
0982 : ad0002 > lda test_case ;previous test
0985 : c909 > cmp #test_num
> trap_ne ;test is out of sequence
0987 : d0fe > bne * ;failed not equal (non zero)
>
000a = >test_num = test_num + 1
0989 : a90a > lda #test_num ;*** next tests' number
098b : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
; jump subroutine & return from subroutine
set_stat 0
> load_flag 0
098e : a900 > lda #0 ;allow test to change I-flag (no mask)
>
0990 : 48 > pha ;use stack to load status
0991 : 28 > plp
0992 : a94a lda #'J'
0994 : a253 ldx #'S'
0996 : a052 ldy #'R' ;N=0, V=0, Z=0, C=0
0998 : 205d37 jsr test_jsr
099a = jsr_ret = *-1 ;last address of jsr = return address
099b : 08 php ;either SP or Y count will fail, if we do not hit
099c : 88 dey
099d : 88 dey
099e : 88 dey
099f : 28 plp
trap_eq ;returned flags OK?
09a0 : f0fe > beq * ;failed equal (zero)
trap_pl
09a2 : 10fe > bpl * ;failed plus (bit 7 clear)
trap_cc
09a4 : 90fe > bcc * ;failed carry clear
trap_vc
09a6 : 50fe > bvc * ;failed overflow clear
09a8 : c9e0 cmp #('J'^$aa) ;returned registers OK?
trap_ne
09aa : d0fe > bne * ;failed not equal (non zero)
09ac : e054 cpx #('S'+1)
trap_ne
09ae : d0fe > bne * ;failed not equal (non zero)
09b0 : c04c cpy #('R'-6)
trap_ne
09b2 : d0fe > bne * ;failed not equal (non zero)
09b4 : ba tsx ;sp?
09b5 : e0ff cpx #$ff
trap_ne
09b7 : d0fe > bne * ;failed not equal (non zero)
next_test
09b9 : ad0002 > lda test_case ;previous test
09bc : c90a > cmp #test_num
> trap_ne ;test is out of sequence
09be : d0fe > bne * ;failed not equal (non zero)
>
000b = >test_num = test_num + 1
09c0 : a90b > lda #test_num ;*** next tests' number
09c2 : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
; break & return from interrupt
if ROM_vectors = 1
load_flag 0 ;with interrupts enabled if allowed!
09c5 : a900 > lda #0 ;allow test to change I-flag (no mask)
09c7 : 48 pha
09c8 : a942 lda #'B'
09ca : a252 ldx #'R'
09cc : a04b ldy #'K'
09ce : 28 plp ;N=0, V=0, Z=0, C=0
09cf : 00 brk
else
lda #hi brk_ret0 ;emulated break
pha
lda #lo brk_ret0
pha
load_flag fao ;set break & unused on stack
pha
load_flag intdis ;during interrupt
pha
lda #'B'
ldx #'R'
ldy #'K'
plp ;N=0, V=0, Z=0, C=0
jmp irq_trap
endif
09d0 : 88 dey ;should not be executed
09d1 : brk_ret0 ;address of break return
09d1 : 08 php ;either SP or Y count will fail, if we do not hit
09d2 : 88 dey
09d3 : 88 dey
09d4 : 88 dey
09d5 : c9e8 cmp #'B'^$aa ;returned registers OK?
;the IRQ vector was never executed if A & X stay unmodified
trap_ne
09d7 : d0fe > bne * ;failed not equal (non zero)
09d9 : e053 cpx #'R'+1
trap_ne
09db : d0fe > bne * ;failed not equal (non zero)
09dd : c045 cpy #'K'-6
trap_ne
09df : d0fe > bne * ;failed not equal (non zero)
09e1 : 68 pla ;returned flags OK (unchanged)?
cmp_flag 0
09e2 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
trap_ne
09e4 : d0fe > bne * ;failed not equal (non zero)
09e6 : ba tsx ;sp?
09e7 : e0ff cpx #$ff
trap_ne
09e9 : d0fe > bne * ;failed not equal (non zero)
if ROM_vectors = 1
load_flag $ff ;with interrupts disabled if allowed!
09eb : a9ff > lda #$ff ;allow test to change I-flag (no mask)
09ed : 48 pha
09ee : a9bd lda #$ff-'B'
09f0 : a2ad ldx #$ff-'R'
09f2 : a0b4 ldy #$ff-'K'
09f4 : 28 plp ;N=1, V=1, Z=1, C=1
09f5 : 00 brk
else
lda #hi brk_ret1 ;emulated break
pha
lda #lo brk_ret1
pha
load_flag $ff
pha ;set break & unused on stack
pha ;actual flags
lda #$ff-'B'
ldx #$ff-'R'
ldy #$ff-'K'
plp ;N=1, V=1, Z=1, C=1
jmp irq_trap
endif
09f6 : 88 dey ;should not be executed
09f7 : brk_ret1 ;address of break return
09f7 : 08 php ;either SP or Y count will fail, if we do not hit
09f8 : 88 dey
09f9 : 88 dey
09fa : 88 dey
09fb : c917 cmp #($ff-'B')^$aa ;returned registers OK?
;the IRQ vector was never executed if A & X stay unmodified
trap_ne
09fd : d0fe > bne * ;failed not equal (non zero)
09ff : e0ae cpx #$ff-'R'+1
trap_ne
0a01 : d0fe > bne * ;failed not equal (non zero)
0a03 : c0ae cpy #$ff-'K'-6
trap_ne
0a05 : d0fe > bne * ;failed not equal (non zero)
0a07 : 68 pla ;returned flags OK (unchanged)?
cmp_flag $ff
0a08 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
trap_ne
0a0a : d0fe > bne * ;failed not equal (non zero)
0a0c : ba tsx ;sp?
0a0d : e0ff cpx #$ff
trap_ne
0a0f : d0fe > bne * ;failed not equal (non zero)
next_test
0a11 : ad0002 > lda test_case ;previous test
0a14 : c90b > cmp #test_num
> trap_ne ;test is out of sequence
0a16 : d0fe > bne * ;failed not equal (non zero)
>
000c = >test_num = test_num + 1
0a18 : a90c > lda #test_num ;*** next tests' number
0a1a : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
; test set and clear flags CLC CLI CLD CLV SEC SEI SED
set_stat $ff
> load_flag $ff
0a1d : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
0a1f : 48 > pha ;use stack to load status
0a20 : 28 > plp
0a21 : 18 clc
tst_stat $ff-carry
0a22 : 08 > php ;save status
0a23 : 68 > pla ;use stack to retrieve status
0a24 : 48 > pha
> cmp_flag $ff-carry
0a25 : c9fe > cmp #($ff-carry|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a27 : d0fe > bne * ;failed not equal (non zero)
>
0a29 : 28 > plp ;restore status
0a2a : 38 sec
tst_stat $ff
0a2b : 08 > php ;save status
0a2c : 68 > pla ;use stack to retrieve status
0a2d : 48 > pha
> cmp_flag $ff
0a2e : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a30 : d0fe > bne * ;failed not equal (non zero)
>
0a32 : 28 > plp ;restore status
if I_flag = 3
0a33 : 58 cli
tst_stat $ff-intdis
0a34 : 08 > php ;save status
0a35 : 68 > pla ;use stack to retrieve status
0a36 : 48 > pha
> cmp_flag $ff-intdis
0a37 : c9fb > cmp #($ff-intdis|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a39 : d0fe > bne * ;failed not equal (non zero)
>
0a3b : 28 > plp ;restore status
0a3c : 78 sei
tst_stat $ff
0a3d : 08 > php ;save status
0a3e : 68 > pla ;use stack to retrieve status
0a3f : 48 > pha
> cmp_flag $ff
0a40 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a42 : d0fe > bne * ;failed not equal (non zero)
>
0a44 : 28 > plp ;restore status
endif
0a45 : d8 cld
tst_stat $ff-decmode
0a46 : 08 > php ;save status
0a47 : 68 > pla ;use stack to retrieve status
0a48 : 48 > pha
> cmp_flag $ff-decmode
0a49 : c9f7 > cmp #($ff-decmode|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a4b : d0fe > bne * ;failed not equal (non zero)
>
0a4d : 28 > plp ;restore status
0a4e : f8 sed
tst_stat $ff
0a4f : 08 > php ;save status
0a50 : 68 > pla ;use stack to retrieve status
0a51 : 48 > pha
> cmp_flag $ff
0a52 : c9ff > cmp #($ff|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a54 : d0fe > bne * ;failed not equal (non zero)
>
0a56 : 28 > plp ;restore status
0a57 : b8 clv
tst_stat $ff-overfl
0a58 : 08 > php ;save status
0a59 : 68 > pla ;use stack to retrieve status
0a5a : 48 > pha
> cmp_flag $ff-overfl
0a5b : c9bf > cmp #($ff-overfl|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a5d : d0fe > bne * ;failed not equal (non zero)
>
0a5f : 28 > plp ;restore status
set_stat 0
> load_flag 0
0a60 : a900 > lda #0 ;allow test to change I-flag (no mask)
>
0a62 : 48 > pha ;use stack to load status
0a63 : 28 > plp
tst_stat 0
0a64 : 08 > php ;save status
0a65 : 68 > pla ;use stack to retrieve status
0a66 : 48 > pha
> cmp_flag 0
0a67 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a69 : d0fe > bne * ;failed not equal (non zero)
>
0a6b : 28 > plp ;restore status
0a6c : 38 sec
tst_stat carry
0a6d : 08 > php ;save status
0a6e : 68 > pla ;use stack to retrieve status
0a6f : 48 > pha
> cmp_flag carry
0a70 : c931 > cmp #(carry|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a72 : d0fe > bne * ;failed not equal (non zero)
>
0a74 : 28 > plp ;restore status
0a75 : 18 clc
tst_stat 0
0a76 : 08 > php ;save status
0a77 : 68 > pla ;use stack to retrieve status
0a78 : 48 > pha
> cmp_flag 0
0a79 : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a7b : d0fe > bne * ;failed not equal (non zero)
>
0a7d : 28 > plp ;restore status
if I_flag = 3
0a7e : 78 sei
tst_stat intdis
0a7f : 08 > php ;save status
0a80 : 68 > pla ;use stack to retrieve status
0a81 : 48 > pha
> cmp_flag intdis
0a82 : c934 > cmp #(intdis|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a84 : d0fe > bne * ;failed not equal (non zero)
>
0a86 : 28 > plp ;restore status
0a87 : 58 cli
tst_stat 0
0a88 : 08 > php ;save status
0a89 : 68 > pla ;use stack to retrieve status
0a8a : 48 > pha
> cmp_flag 0
0a8b : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a8d : d0fe > bne * ;failed not equal (non zero)
>
0a8f : 28 > plp ;restore status
endif
0a90 : f8 sed
tst_stat decmode
0a91 : 08 > php ;save status
0a92 : 68 > pla ;use stack to retrieve status
0a93 : 48 > pha
> cmp_flag decmode
0a94 : c938 > cmp #(decmode|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a96 : d0fe > bne * ;failed not equal (non zero)
>
0a98 : 28 > plp ;restore status
0a99 : d8 cld
tst_stat 0
0a9a : 08 > php ;save status
0a9b : 68 > pla ;use stack to retrieve status
0a9c : 48 > pha
> cmp_flag 0
0a9d : c930 > cmp #(0 |fao)&m8 ;expected flags + always on bits
>
> trap_ne
0a9f : d0fe > bne * ;failed not equal (non zero)
>
0aa1 : 28 > plp ;restore status
set_stat overfl
> load_flag overfl
0aa2 : a940 > lda #overfl ;allow test to change I-flag (no mask)
>
0aa4 : 48 > pha ;use stack to load status
0aa5 : 28 > plp
tst_stat overfl
0aa6 : 08 > php ;save status
0aa7 : 68 > pla ;use stack to retrieve status
0aa8 : 48 > pha
> cmp_flag overfl
0aa9 : c970 > cmp #(overfl|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0aab : d0fe > bne * ;failed not equal (non zero)
>
0aad : 28 > plp ;restore status
0aae : b8 clv
tst_stat 0
0aaf : 08 > php ;save status
0ab0 : 68 > pla ;use stack to retrieve status
0ab1 : 48 > pha
> cmp_flag 0
0ab2 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0ab4 : d0fe > bne * ;failed not equal (non zero)
>
0ab6 : 28 > plp ;restore status
next_test
0ab7 : ad0002 > lda test_case ;previous test
0aba : c90c > cmp #test_num
> trap_ne ;test is out of sequence
0abc : d0fe > bne * ;failed not equal (non zero)
>
000d = >test_num = test_num + 1
0abe : a90d > lda #test_num ;*** next tests' number
0ac0 : 8d0002 > sta test_case
> ;check_ram ;uncomment to find altered RAM after each test
; testing index register increment/decrement and transfer
; INX INY DEX DEY TAX TXA TAY TYA
0ac3 : a2fe ldx #$fe
set_stat $ff
> load_flag $ff
0ac5 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
0ac7 : 48 > pha ;use stack to load status
0ac8 : 28 > plp
0ac9 : e8 inx ;ff
tst_x $ff,$ff-zero
0aca : 08 > php ;save flags
0acb : e0ff > cpx #$ff ;test result
> trap_ne
0acd : d0fe > bne * ;failed not equal (non zero)
>
0acf : 68 > pla ;load status
0ad0 : 48 > pha
> cmp_flag $ff-zero
0ad1 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0ad3 : d0fe > bne * ;failed not equal (non zero)
>
0ad5 : 28 > plp ;restore status
0ad6 : e8 inx ;00
tst_x 0,$ff-minus
0ad7 : 08 > php ;save flags
0ad8 : e000 > cpx #0 ;test result
> trap_ne
0ada : d0fe > bne * ;failed not equal (non zero)
>
0adc : 68 > pla ;load status
0add : 48 > pha
> cmp_flag $ff-minus
0ade : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0ae0 : d0fe > bne * ;failed not equal (non zero)
>
0ae2 : 28 > plp ;restore status
0ae3 : e8 inx ;01
tst_x 1,$ff-minus-zero
0ae4 : 08 > php ;save flags
0ae5 : e001 > cpx #1 ;test result
> trap_ne
0ae7 : d0fe > bne * ;failed not equal (non zero)
>
0ae9 : 68 > pla ;load status
0aea : 48 > pha
> cmp_flag $ff-minus-zero
0aeb : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0aed : d0fe > bne * ;failed not equal (non zero)
>
0aef : 28 > plp ;restore status
0af0 : ca dex ;00
tst_x 0,$ff-minus
0af1 : 08 > php ;save flags
0af2 : e000 > cpx #0 ;test result
> trap_ne
0af4 : d0fe > bne * ;failed not equal (non zero)
>
0af6 : 68 > pla ;load status
0af7 : 48 > pha
> cmp_flag $ff-minus
0af8 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0afa : d0fe > bne * ;failed not equal (non zero)
>
0afc : 28 > plp ;restore status
0afd : ca dex ;ff
tst_x $ff,$ff-zero
0afe : 08 > php ;save flags
0aff : e0ff > cpx #$ff ;test result
> trap_ne
0b01 : d0fe > bne * ;failed not equal (non zero)
>
0b03 : 68 > pla ;load status
0b04 : 48 > pha
> cmp_flag $ff-zero
0b05 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0b07 : d0fe > bne * ;failed not equal (non zero)
>
0b09 : 28 > plp ;restore status
0b0a : ca dex ;fe
set_stat 0
> load_flag 0
0b0b : a900 > lda #0 ;allow test to change I-flag (no mask)
>
0b0d : 48 > pha ;use stack to load status
0b0e : 28 > plp
0b0f : e8 inx ;ff
tst_x $ff,minus
0b10 : 08 > php ;save flags
0b11 : e0ff > cpx #$ff ;test result
> trap_ne
0b13 : d0fe > bne * ;failed not equal (non zero)
>
0b15 : 68 > pla ;load status
0b16 : 48 > pha
> cmp_flag minus
0b17 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0b19 : d0fe > bne * ;failed not equal (non zero)
>
0b1b : 28 > plp ;restore status
0b1c : e8 inx ;00
tst_x 0,zero
0b1d : 08 > php ;save flags
0b1e : e000 > cpx #0 ;test result
> trap_ne
0b20 : d0fe > bne * ;failed not equal (non zero)
>
0b22 : 68 > pla ;load status
0b23 : 48 > pha
> cmp_flag zero
0b24 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0b26 : d0fe > bne * ;failed not equal (non zero)
>
0b28 : 28 > plp ;restore status
0b29 : e8 inx ;01
tst_x 1,0
0b2a : 08 > php ;save flags
0b2b : e001 > cpx #1 ;test result
> trap_ne
0b2d : d0fe > bne * ;failed not equal (non zero)
>
0b2f : 68 > pla ;load status
0b30 : 48 > pha
> cmp_flag 0
0b31 : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0b33 : d0fe > bne * ;failed not equal (non zero)
>
0b35 : 28 > plp ;restore status
0b36 : ca dex ;00
tst_x 0,zero
0b37 : 08 > php ;save flags
0b38 : e000 > cpx #0 ;test result
> trap_ne
0b3a : d0fe > bne * ;failed not equal (non zero)
>
0b3c : 68 > pla ;load status
0b3d : 48 > pha
> cmp_flag zero
0b3e : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0b40 : d0fe > bne * ;failed not equal (non zero)
>
0b42 : 28 > plp ;restore status
0b43 : ca dex ;ff
tst_x $ff,minus
0b44 : 08 > php ;save flags
0b45 : e0ff > cpx #$ff ;test result
> trap_ne
0b47 : d0fe > bne * ;failed not equal (non zero)
>
0b49 : 68 > pla ;load status
0b4a : 48 > pha
> cmp_flag minus
0b4b : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0b4d : d0fe > bne * ;failed not equal (non zero)
>
0b4f : 28 > plp ;restore status
0b50 : a0fe ldy #$fe
set_stat $ff
> load_flag $ff
0b52 : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
0b54 : 48 > pha ;use stack to load status
0b55 : 28 > plp
0b56 : c8 iny ;ff
tst_y $ff,$ff-zero
0b57 : 08 > php ;save flags
0b58 : c0ff > cpy #$ff ;test result
> trap_ne
0b5a : d0fe > bne * ;failed not equal (non zero)
>
0b5c : 68 > pla ;load status
0b5d : 48 > pha
> cmp_flag $ff-zero
0b5e : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0b60 : d0fe > bne * ;failed not equal (non zero)
>
0b62 : 28 > plp ;restore status
0b63 : c8 iny ;00
tst_y 0,$ff-minus
0b64 : 08 > php ;save flags
0b65 : c000 > cpy #0 ;test result
> trap_ne
0b67 : d0fe > bne * ;failed not equal (non zero)
>
0b69 : 68 > pla ;load status
0b6a : 48 > pha
> cmp_flag $ff-minus
0b6b : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0b6d : d0fe > bne * ;failed not equal (non zero)
>
0b6f : 28 > plp ;restore status
0b70 : c8 iny ;01
tst_y 1,$ff-minus-zero
0b71 : 08 > php ;save flags
0b72 : c001 > cpy #1 ;test result
> trap_ne
0b74 : d0fe > bne * ;failed not equal (non zero)
>
0b76 : 68 > pla ;load status
0b77 : 48 > pha
> cmp_flag $ff-minus-zero
0b78 : c97d > cmp #($ff-minus-zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0b7a : d0fe > bne * ;failed not equal (non zero)
>
0b7c : 28 > plp ;restore status
0b7d : 88 dey ;00
tst_y 0,$ff-minus
0b7e : 08 > php ;save flags
0b7f : c000 > cpy #0 ;test result
> trap_ne
0b81 : d0fe > bne * ;failed not equal (non zero)
>
0b83 : 68 > pla ;load status
0b84 : 48 > pha
> cmp_flag $ff-minus
0b85 : c97f > cmp #($ff-minus|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0b87 : d0fe > bne * ;failed not equal (non zero)
>
0b89 : 28 > plp ;restore status
0b8a : 88 dey ;ff
tst_y $ff,$ff-zero
0b8b : 08 > php ;save flags
0b8c : c0ff > cpy #$ff ;test result
> trap_ne
0b8e : d0fe > bne * ;failed not equal (non zero)
>
0b90 : 68 > pla ;load status
0b91 : 48 > pha
> cmp_flag $ff-zero
0b92 : c9fd > cmp #($ff-zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0b94 : d0fe > bne * ;failed not equal (non zero)
>
0b96 : 28 > plp ;restore status
0b97 : 88 dey ;fe
set_stat 0
> load_flag 0
0b98 : a900 > lda #0 ;allow test to change I-flag (no mask)
>
0b9a : 48 > pha ;use stack to load status
0b9b : 28 > plp
0b9c : c8 iny ;ff
tst_y $ff,0+minus
0b9d : 08 > php ;save flags
0b9e : c0ff > cpy #$ff ;test result
> trap_ne
0ba0 : d0fe > bne * ;failed not equal (non zero)
>
0ba2 : 68 > pla ;load status
0ba3 : 48 > pha
> cmp_flag 0+minus
0ba4 : c9b0 > cmp #(0+minus|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0ba6 : d0fe > bne * ;failed not equal (non zero)
>
0ba8 : 28 > plp ;restore status
0ba9 : c8 iny ;00
tst_y 0,zero
0baa : 08 > php ;save flags
0bab : c000 > cpy #0 ;test result
> trap_ne
0bad : d0fe > bne * ;failed not equal (non zero)
>
0baf : 68 > pla ;load status
0bb0 : 48 > pha
> cmp_flag zero
0bb1 : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0bb3 : d0fe > bne * ;failed not equal (non zero)
>
0bb5 : 28 > plp ;restore status
0bb6 : c8 iny ;01
tst_y 1,0
0bb7 : 08 > php ;save flags
0bb8 : c001 > cpy #1 ;test result
> trap_ne
0bba : d0fe > bne * ;failed not equal (non zero)
>
0bbc : 68 > pla ;load status
0bbd : 48 > pha
> cmp_flag 0
0bbe : c930 > cmp #(0|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0bc0 : d0fe > bne * ;failed not equal (non zero)
>
0bc2 : 28 > plp ;restore status
0bc3 : 88 dey ;00
tst_y 0,zero
0bc4 : 08 > php ;save flags
0bc5 : c000 > cpy #0 ;test result
> trap_ne
0bc7 : d0fe > bne * ;failed not equal (non zero)
>
0bc9 : 68 > pla ;load status
0bca : 48 > pha
> cmp_flag zero
0bcb : c932 > cmp #(zero|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0bcd : d0fe > bne * ;failed not equal (non zero)
>
0bcf : 28 > plp ;restore status
0bd0 : 88 dey ;ff
tst_y $ff,minus
0bd1 : 08 > php ;save flags
0bd2 : c0ff > cpy #$ff ;test result
> trap_ne
0bd4 : d0fe > bne * ;failed not equal (non zero)
>
0bd6 : 68 > pla ;load status
0bd7 : 48 > pha
> cmp_flag minus
0bd8 : c9b0 > cmp #(minus|fao)&m8 ;expected flags + always on bits
>
> trap_ne
0bda : d0fe > bne * ;failed not equal (non zero)
>
0bdc : 28 > plp ;restore status
0bdd : a2ff ldx #$ff
set_stat $ff
> load_flag $ff
0bdf : a9ff > lda #$ff ;allow test to change I-flag (no mask)
>
0be1 : 48 > pha ;use stack to load status
0be2 : 28 > plp
0be3 : 8a txa
tst_a $ff,$ff-zero
0be4 : 08 > php ;save flags
0be5 : c9ff > cmp #$ff ;test result
> trap_ne
0be7 : d0fe > bne * ;failed not equal (non zero)
>
0be9 : 68 > pla ;load status
0bea : 48 > pha