; Copyright 2020 faddenSoft. All Rights Reserved.
; See the LICENSE.txt file for distribution terms (Apache 2.0).
;
; Sources:
;   NiftyList, by Dave Lyons
;   Various Apple II reference materials found online

*SYNOPSIS Symbols for E1/Cxxx I/O locations

;
; This is just the list from Cxxx-IO.sym65, with the addresses in bank $e1
; and "_E1" appended to the symbol names.
;
KBD_E1          < $E1C000   ;R last key pressed + 128
CLR80COL_E1     > $E1C000   ;W use $C002-C005 for aux mem (80STOREOFF)
SET80COL_E1     @ $E1C001   ;W use PAGE2 for aux mem (80STOREON)
RDMAINRAM_E1    @ $E1C002   ;W if 80STORE off: read main mem $0200-BFFF
RDCARDRAM_E1    @ $E1C003   ;W if 80STORE off: read aux mem $0200-BFFF
WRMAINRAM_E1    @ $E1C004   ;W if 80STORE off: write main mem $0200-BFFF
WRCARDRAM_E1    @ $E1C005   ;W if 80STORE off: write aux mem $0200-BFFF
SETSLOTCXROM_E1 @ $E1C006   ;W use peripheral ROM ($C100-CFFF)
SETINTCXROM_E1  @ $E1C007   ;W use internal ROM ($C100-CFFF)
SETSTDZP_E1     @ $E1C008   ;W use main stack and zero page
SETALTZP_E1     @ $E1C009   ;W use aux stack and zero page
SETINTC3ROM_E1  @ $E1C00A   ;W use internal slot 3 ROM
SETSLOTC3ROM_E1 @ $E1C00B   ;W use external slot 3 ROM
CLR80VID_E1     @ $E1C00C   ;W disable 80-column display mode
SET80VID_E1     @ $E1C00D   ;W enable 80-column display mode
CLRALTCHAR_E1   @ $E1C00E   ;W use primary char set
SETALTCHAR_E1   @ $E1C00F   ;W use alternate char set
KBDSTRB_E1      @ $E1C010   ;RW keyboard strobe
RDLCBNK2_E1     @ $E1C011   ;R bit 7: reading from LC bank 2 ($Dx)?
RDLCRAM_E1      @ $E1C012   ;R bit 7: reading from LC RAM?
RDRAMRD_E1      @ $E1C013   ;R bit 7: reading from aux/alt 48K?
RDRAMWRT_E1     @ $E1C014   ;R bit 7: writing to aux/alt 48K?
RDCXROM_E1      @ $E1C015   ;R bit 7: using internal slot ROM?
RDALTZP_E1      @ $E1C016   ;R bit 7: using alt zero page, stack, & LC?
RDC3ROM_E1      @ $E1C017   ;R bit 7: using external (slot 3) ROM?
RD80COL_E1      @ $E1C018   ;R bit 7: 80STORE is on?
RDVBLBAR_E1     @ $E1C019   ;R bit 7: not VBL (VBL signal is low)?
RDTEXT_E1       @ $E1C01A   ;R bit 7: using text mode?
RDMIX_E1        @ $E1C01B   ;R bit 7: using mixed mode?
RDPAGE2_E1      @ $E1C01C   ;R bit 7: using page 2?
RDHIRES_E1      @ $E1C01D   ;R bit 7: using hi-res graphics?
ALTCHARSET_E1   @ $E1C01E   ;R bit 7: using alt char set?
RD80VID_E1      @ $E1C01F   ;R bit 7: using 80 columns?
TAPEOUT_E1      @ $E1C020   ;RW toggle caseette tape output
MONOCOLOR_E1    @ $E1C021   ;W color/mono
TBCOLOR_E1      @ $E1C022   ;RW screen color (low is BG, high is FG)
VGCINT_E1       @ $E1C023   ;R VGC interrupts
MOUSEDATA_E1    @ $E1C024   ;R mouse data: high bit is button
KEYMODREG_E1    @ $E1C025   ;R modifier key state
DATAREG_E1      @ $E1C026   ;RW ADB command/data
KMSTATUS_E1     @ $E1C027   ;RW ADB status
ROMBANK_E1      @ $E1C028   ;RW ROM bank select (IIc Plus)
NEWVIDEO_E1     @ $E1C029   ;RW video select (SHR)
LANGSEL_E1      @ $E1C02B   ;RW ROM bank select
CHARROM_E1      @ $E1C02C   ;R addr for character ROM test
SLTROMSEL_E1    @ $E1C02D   ;RW slot vs. ROM selection
VERTCNT_E1      @ $E1C02E   ;R read video counter bits (V5-VB)
HORIZCNT_E1     @ $E1C02F   ;R read video counter bits (VA-H0)
SPKR_E1         @ $E1C030   ;RW toggle speaker
DISKREG_E1      @ $E1C031   ;RW disk interface
SCANINT_E1      @ $E1C032   ;W VGC interrupt clear
CLOCKDATA_E1    @ $E1C033   ;RW battery RAM interface
CLOCKCTL_E1     @ $E1C034   ;RW bits 0-3 = border color
SHADOW_E1       @ $E1C035   ;RW inhibit shadowing
CYAREG_E1       @ $E1C036   ;RW Configure Your Apple
DMAREG_E1       @ $E1C037   ;RW
SCCBREG_E1      @ $E1C038   ;RW SCC command channel B
SCCAREG_E1      @ $E1C039   ;RW SCC command channel A
SCCBDATA_E1     @ $E1C03A   ;RW SCC data channel B
SCCADATA_E1     @ $E1C03B   ;RW SCC data channel A
SOUNDCTL_E1     @ $E1C03C   ;RW sound settings (0-3=volume)
SOUNDDATA_E1    @ $E1C03D   ;RW sound data
SOUNDADRL_E1    @ $E1C03E   ;RW low pointer
SOUNDADRH_E1    @ $E1C03F   ;RW high pointer
STROBE_E1       @ $E1C040   ;R game I/O strobe
INTEN_E1        @ $E1C041   ;RW read VBL interrupt

MMDELTAX_E1     @ $E1C044   ;R mouse delta movement X
MMDELTAY_E1     @ $E1C045   ;R mouse delta movement Y
DIAGTYPE_E1     @ $E1C046   ;W self-test diagnostics
CLRVBLINT_E1    @ $E1C047   ;W clear VBL interrupt
CLRXYINT_E1     @ $E1C048   ;W clear XY interrupt

EMUBYTE_E1      @ $E1C04F   ;RW used by emulators to identify themselves
TXTCLR_E1       @ $E1C050   ;RW display graphics
TXTSET_E1       @ $E1C051   ;RW display text
MIXCLR_E1       @ $E1C052   ;RW display full screen
MIXSET_E1       @ $E1C053   ;RW display split screen
TXTPAGE1_E1     @ $E1C054   ;RW display page 1
TXTPAGE2_E1     @ $E1C055   ;RW display page 2 (or read/write aux mem)
LORES_E1        @ $E1C056   ;RW display lo-res graphics
HIRES_E1        @ $E1C057   ;RW display hi-res graphics
SETAN0_E1       @ $E1C058   ;RW annunciator 0 off
CLRAN0_E1       @ $E1C059   ;RW annunciator 0 on
SETAN1_E1       @ $E1C05A   ;RW annunciator 1 off
CLRAN1_E1       @ $E1C05B   ;RW annunciator 1 on
SETAN2_E1       @ $E1C05C   ;RW annunciator 2 off
CLRAN2_E1       @ $E1C05D   ;RW annunciator 2 on
SETAN3_E1       @ $E1C05E   ;RW annunciator 3 off
SETDHIRES_E1    = $E1C05E   ;W if IOUDIS set, turn on double hi-res
CLRAN3_E1       @ $E1C05F   ;RW annunciator 3 on
CLRDHIRES_E1    = $E1C05F   ;W if IOUDIS set, turn off double hi-res
TAPEIN_E1       @ $E1C060   ;R read cassette input
BUTN3_E1        = $E1C060   ;R switch input 3
BUTN0_E1        @ $E1C061   ;R switch input 0 / open-apple
BUTN1_E1        @ $E1C062   ;R switch input 1 / closed-apple
BUTN2_E1        @ $E1C063   ;R switch input 2 / shift key
PADDL0_E1       @ $E1C064   ;R analog input 0
PADDL1_E1       @ $E1C065   ;R analog input 1
PADDL2_E1       @ $E1C066   ;R analog input 2
PADDL3_E1       @ $E1C067   ;R analog input 3
STATEREG_E1     @ $E1C068   ;RW address state

TESTREG_E1      @ $E1C06D   ;test mode
CLTRM_E1        @ $E1C06E   ;clear test mode
ENTM_E1         @ $E1C06F   ;enable test mode
PTRIG_E1        @ $E1C070   ;RW analog input reset

RDIOUDIS_E1     < $E1C07E   ;R status of IOU disabling
SETIOUDIS_E1    > $E1C07E   ;W disable IOU
RDDHIRES_E1     < $E1C07F   ;R status of double hi-res
CLRIOUDIS_E1    > $E1C07F   ;W enable IOU

LCBANK2_RW_E1   @ $E1C080   ;RW read RAM bank 2, write off
ROMIN_E1        @ $E1C081   ;RWx2 read ROM, write RAM bank 2
ROMIN_RO_E1     @ $E1C082   ;RW read ROM, no write
LCBANK2_E1      @ $E1C083   ;RWx2 read/write RAM bank 2
LCBANK1_RW_E1   @ $E1C088   ;RW read RAM bank 1, write off
ROMIN1_E1       @ $E1C089   ;RWx2 read ROM, write RAM bank 1
ROMIN1_RO_E1    @ $E1C08A   ;RW read ROM, no write
LCBANK1_E1      @ $E1C08B   ;RWx2 read/write RAM bank 1

CLRROM_E1       @ $E1CFFF   ;disable slot C8 ROM
