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6502bench/SourceGen/SGTestData/Expected/20052-branches-and-banks_cc65.cfg

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Regression test rework, part 2 Renamed the remaining tests. Only edits were to the project files that referenced .sym65/.cs.
2020-06-06 22:36:08 +00:00
# 6502bench SourceGen generated linker script for 20052-branches-and-banks
Add linker config scripts to cc65 generator output The system configuration you get with "-t none" works for smaller files but fails for larger ones. This updates the generator to produce a source file and linker script pair. (I kinda saw this one coming -- it's why the gen/asm dialog has a combo box for the file preview -- so it didn't require that much work.) This currently generates a fixed script for a generic system with 64KiB of RAM, using .ORGs to set the addresses as before. With this change, assembling a file with 65536 NOPs succeeds. (issue #39)
2018-11-18 21:49:02 +00:00
MEMORY {
MAIN: file=%O, start=%S, size=65536;
Regression test rework, part 4 Split 2005x-branches-and-banks into two parts, one that stays within the 64K bounds of the 6502, one that puts code in a separate bank.
2020-06-07 00:30:50 +00:00
# MEM000: file=%O, start=$1000, size=11;
# MEM001: file=%O, start=$440000, size=28;
# MEM002: file=%O, start=$44ffc0, size=15;
Fix some 65816 code generation issues Two basic problems: (1) cc65, being a one-pass assembler, can't tell if a forward-referenced label is 16-bit or 24-bit. If the operand is potentially ambiguous, such as "LDA label", we need to add an operand width disambiguator. (The existing tests managed to only do backward references.) (2) 64tass wants the labels on JMP/JSR absolute operands to have 24-bit values that match the current program bank. This is the opposite of cc65, which requires 16-bit values. We need to distinguish PBR vs. DBR instructions (i.e. "LDA abs" vs. "JMP abs") and handle them differently when formatting for "Common". Merlin32 doesn't care, and ACME doesn't work at all, so neither of those needed updating. The 20052-branches-and-banks test was expanded to cover the problematic cases.
2020-07-02 00:59:12 +00:00
# MEM003: file=%O, start=$2000, size=32;
Change PLP handling The "smart" PLP handler tries to recover the flags from an earlier PHP. The non-smart version just marks all the flags as indeterminate. This doesn't work well on the 65816 in native mode, because having the M/X flags in an indeterminate state is rarely what you want. Code rarely uses PLP to reset the flags to a specific state, preferring explicit SEP/REP. The analyzer is more likely to get the correct answer by simply leaving the flags in their prior state. A test case has been added to 20052-branches-and-banks, which now has "smart PLP" disabled.
2020-07-20 18:54:00 +00:00
# MEM004: file=%O, start=$543210, size=148;
Add linker config scripts to cc65 generator output The system configuration you get with "-t none" works for smaller files but fails for larger ones. This updates the generator to produce a source file and linker script pair. (I kinda saw this one coming -- it's why the gen/asm dialog has a combo box for the file preview -- so it didn't require that much work.) This currently generates a fixed script for a generic system with 64KiB of RAM, using .ORGs to set the addresses as before. With this change, assembling a file with 65536 NOPs succeeds. (issue #39)
2018-11-18 21:49:02 +00:00
}
SEGMENTS {
CODE: load=MAIN, type=rw;
Attempt to generate segment names for cc65 This worked, sort of. The problem is that SourceGen will revert to hex output in certain situations, such as a broken symbolic reference. There happens to be one in the ZIPPY example, and it's on a relative branch. The goal with the segment stuff is to allow cc65 to treat the source as relocatable code. In that context, a relative branch to an absolute address doesn't make any sense, so the assembler reports a range error. We don't currently have a mechanism that guarantees no references are broken (and no affordance for finding them), so we can't make this mode the default yet. Instead, we continue to use the generic config, but generate the correct set of lines as comments. (issue #39)
2018-11-18 22:36:03 +00:00
# SEG000: load=MEM000, type=rw;
# SEG001: load=MEM001, type=rw;
# SEG002: load=MEM002, type=rw;
# SEG003: load=MEM003, type=rw;
Fix some 65816 code generation issues Two basic problems: (1) cc65, being a one-pass assembler, can't tell if a forward-referenced label is 16-bit or 24-bit. If the operand is potentially ambiguous, such as "LDA label", we need to add an operand width disambiguator. (The existing tests managed to only do backward references.) (2) 64tass wants the labels on JMP/JSR absolute operands to have 24-bit values that match the current program bank. This is the opposite of cc65, which requires 16-bit values. We need to distinguish PBR vs. DBR instructions (i.e. "LDA abs" vs. "JMP abs") and handle them differently when formatting for "Common". Merlin32 doesn't care, and ACME doesn't work at all, so neither of those needed updating. The 20052-branches-and-banks test was expanded to cover the problematic cases.
2020-07-02 00:59:12 +00:00
# SEG004: load=MEM004, type=rw;
Add linker config scripts to cc65 generator output The system configuration you get with "-t none" works for smaller files but fails for larger ones. This updates the generator to produce a source file and linker script pair. (I kinda saw this one coming -- it's why the gen/asm dialog has a combo box for the file preview -- so it didn't require that much work.) This currently generates a fixed script for a generic system with 64KiB of RAM, using .ORGs to set the addresses as before. With this change, assembling a file with 65536 NOPs succeeds. (issue #39)
2018-11-18 21:49:02 +00:00
}
FEATURES {}
SYMBOLS {}
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