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6502bench/SourceGen/SGTestData/Source/20212-reloc-data-main.S

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; Copyright 2020 faddenSoft. All Rights Reserved.
; See the LICENSE.txt file for distribution terms (Apache 2.0).
;
; Assembler: Merlin 32
;
; Segment #1 : code; main segment, loads anywhere
BANK2_START EXT
BANK2_MOV_DST EXT
BANK8_START EXT
BANK8_ADDR EXT
BANK8_MOV_SRC EXT
ADDR_FFE0 EXT
; expected to start at $02/0000
REL ;generate relocatable code
start
clc
xce
sep #$30
mx %11
ldal start
nop
jsl BANK2_START
jsl BANK8_START
ldal BANK2_START
lda BANK2_START
lda #<BANK2_START
lda #>BANK2_START
lda #^BANK2_START
ldal BANK8_ADDR
lda BANK8_ADDR
lda #<BANK8_ADDR
lda #>BANK8_ADDR
lda #^BANK8_ADDR
nop
; Do some stuff with 16-bit registers. Merlin 32 treats <>^ as shift
; operations rather than byte selectors.
rep #$30
mx %00
lda #<BANK8_ADDR
lda #>BANK8_ADDR
lda #^BANK8_ADDR
nop
; Check MVN/MVP. Handing them correctly requires having two different
; symbol refs on a single instruction.
lda #15
ldx #BANK8_MOV_SRC
ldy #BANK2_MOV_DST
mvn #^BANK8_MOV_SRC,#^BANK2_MOV_DST
nop
; Test whether we're finding symbols for 16-bit address operands
; without reloc data.
lda: $0000,y
sta: $0002,y
check_pea
pea $0000
pea $f000
pea BANK8_ADDR
pea ^BANK8_ADDR
pea check_pea
pea >check_pea
pea ^check_pea
pea check_pea+18
pea check_pea+$1000
nop
jmp :skipdata
; Generate 2/3/4-byte refs. The OMF reloc entry generated by Merlin32
; for ADRL is only 3 bytes wide.
dw ADDR_FFE0
adr ADDR_FFE0
adrl ADDR_FFE0
:skipdata
; Check a situation where we block a relocation from being fully formed.
; The access to addr_dat+2 and addr_dat cause labels to be auto-generated.
; Because we access the high part first, there's no opportunity to find
; a pre-existing label nearby. If the reloc code generates a 3-byte or
; 4-byte data item at addr_dat, the label at addr_dat+2 will be hidden.
phk
plb
lda #$0000
asl A
asl A
tax
lda addr_dat+2,X
pha
lda addr_dat,X
pha
beq :skip_ad
rts
addr_dat
adrl check_pea
adrl :skipdata
:skip_ad
rts