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mirror of https://github.com/fadden/6502bench.git synced 2024-06-11 02:29:53 +00:00

Recognize that LSR always clears the 'N' flag

The instruction shifts 0 into the high bit, so the result is never
negative.  Added a test case to 1003-flags-and-branches.
This commit is contained in:
Andy McFadden 2020-04-23 17:23:12 -07:00
parent ea379fce18
commit 59b7ec0dea
8 changed files with 103 additions and 62 deletions

View File

@ -709,6 +709,12 @@ namespace Asm65 {
}
return flags;
}
private static StatusFlags FlagUpdater_LSR(StatusFlags flags, int immVal,
ref StatusFlags condBranchTakenFlags) {
flags.C = flags.Z = TriState16.INDETERMINATE;
flags.N = 0; // always shifts 0 into high bit
return flags;
}
private static StatusFlags FlagUpdater_ROL(StatusFlags flags, int immVal,
ref StatusFlags condBranchTakenFlags) {
// this rotates the N flag into C, so set C=N
@ -1152,7 +1158,7 @@ namespace Asm65 {
Effect = FlowEffect.Cont,
BaseMemEffect = MemoryEffect.ReadModifyWrite,
FlagsAffected = FlagsAffected_NZC,
StatusFlagUpdater = FlagUpdater_NZC
StatusFlagUpdater = FlagUpdater_LSR
};
private static OpDef OpMVN = new OpDef() {
Mnemonic = OpName.MVN,

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@ -219,50 +219,57 @@ _L10F2 lda #$00
.byte $00
.byte $dc
_L10FA clc
_L10FA lda #$ff
lsr a
bpl _L1101
.byte $00
.byte $dd
_L1101 clc
php
sec
plp
bcc _L1102
bcc _L1109
.byte $00
.byte $00
_L1102 sec
bcs _L1106
_L1109 sec
bcs _L110D
_L1105 clc
_L1106 lda $33
beq _L1105
bcs _L110E
_L110C clc
_L110D lda $33
beq _L110C
bcs _L1115
lda $44
_L110E nop
_L1115 nop
rep #$20
.al
sep #$10
jsr _L112A
jsr _L1131
rep #$30
.xl
jsr _L1130
jsr _L1137
sep #$30
.as
.xs
jsr _L1130
jsr _L1137
rep #$20
.al
sep #$10
jsr _L112A
jsr _L1131
sep #$30
.as
rts
.al
_L112A lda #$1234
_L1131 lda #$1234
ldx #$ff
rts
.as
_L1130 lda #$ff
_L1137 lda #$ff
ldx #$ee
ldy #$dd
rts

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@ -214,49 +214,56 @@ L105F sep #$80
dfb $00
dfb $dc
:L10FA clc
:L10FA lda #$ff
lsr A
bpl :L1101
dfb $00
dfb $dd
:L1101 clc
php
sec
plp
bcc :L1102
bcc :L1109
dfb $00
dfb $00
:L1102 sec
bcs :L1106
:L1109 sec
bcs :L110D
:L1105 clc
:L1106 lda $33
beq :L1105
bcs :L110E
:L110C clc
:L110D lda $33
beq :L110C
bcs :L1115
lda $44
:L110E nop
:L1115 nop
rep #$20
mx %01
sep #$10
jsr :L112A
jsr :L1131
rep #$30
mx %00
jsr :L1130
jsr :L1137
sep #$30
mx %11
jsr :L1130
jsr :L1137
rep #$20
mx %01
sep #$10
jsr :L112A
jsr :L1131
sep #$30
mx %11
rts
mx %01
:L112A lda #$1234
:L1131 lda #$1234
ldx #$ff
rts
mx %11
:L1130 lda #$ff
:L1137 lda #$ff
ldx #$ee
ldy #$dd
rts

View File

@ -219,50 +219,57 @@ L105F sep #$80
!byte $00
!byte $dc
@L10FA clc
@L10FA lda #$ff
lsr
bpl @L1101
!byte $00
!byte $dd
@L1101 clc
php
sec
plp
bcc @L1102
bcc @L1109
!byte $00
!byte $00
@L1102 sec
bcs @L1106
@L1109 sec
bcs @L110D
@L1105 clc
@L1106 lda $33
beq @L1105
bcs @L110E
@L110C clc
@L110D lda $33
beq @L110C
bcs @L1115
lda $44
@L110E nop
@L1115 nop
rep #$20
!al
sep #$10
jsr @L112A
jsr @L1131
rep #$30
!rl
jsr @L1130
jsr @L1137
sep #$30
!as
!rs
jsr @L1130
jsr @L1137
rep #$20
!al
sep #$10
jsr @L112A
jsr @L1131
sep #$30
!as
rts
!al
@L112A lda #$1234
@L1131 lda #$1234
ldx #$ff
rts
!as
@L1130 lda #$ff
@L1137 lda #$ff
ldx #$ee
ldy #$dd
rts

View File

@ -220,50 +220,57 @@ L105F: sep #$80
.byte $00
.byte $dc
@L10FA: clc
@L10FA: lda #$ff
lsr A
bpl @L1101
.byte $00
.byte $dd
@L1101: clc
php
sec
plp
bcc @L1102
bcc @L1109
.byte $00
.byte $00
@L1102: sec
bcs @L1106
@L1109: sec
bcs @L110D
@L1105: clc
@L1106: lda $33
beq @L1105
bcs @L110E
@L110C: clc
@L110D: lda $33
beq @L110C
bcs @L1115
lda $44
@L110E: nop
@L1115: nop
rep #$20
.a16
sep #$10
jsr @L112A
jsr @L1131
rep #$30
.i16
jsr @L1130
jsr @L1137
sep #$30
.a8
.i8
jsr @L1130
jsr @L1137
rep #$20
.a16
sep #$10
jsr @L112A
jsr @L1131
sep #$30
.a8
rts
.a16
@L112A: lda #$1234
@L1131: lda #$1234
ldx #$ff
rts
.a8
@L1130: lda #$ff
@L1137: lda #$ff
ldx #$ee
ldy #$dd
rts

View File

@ -1,7 +1,7 @@
# 6502bench SourceGen generated linker script for 1003-flags-and-branches
MEMORY {
MAIN: file=%O, start=%S, size=65536;
# MEM000: file=%O, start=$1000, size=311;
# MEM000: file=%O, start=$1000, size=318;
}
SEGMENTS {
CODE: load=MAIN, type=rw;

View File

@ -195,6 +195,13 @@ ok_ror2
brk $dc
ok_rol1
; check lsr
lda #$ff
lsr A ;lsr always clears the high bit
bpl ok_lsr
brk $dd
ok_lsr
; simple php/plp pair test
clc
php