6502/6502bench
1
0
Fork 0
mirror of https://github.com/fadden/6502bench.git synced 2025-08-03 12:25:21 +00:00
Code Issues Projects Releases Wiki Activity

Progress toward 64tass expression support

Browse Source 
Gave cc65 its own expression generator, as the precedence table seems
atypical if not unique.  Configured 64tass to use the "simple"
expression mode.

Added some operations on a 32-bit constant to 2007-labels-and-symbols
to exercise the current worst-case expression (shift + AND + add).
Tweaked the Merlin expression generator to handle it.

(issue #16)
This commit is contained in:
Andy McFadden
2018-10-24 13:17:03 -07:00
parent f26a03869a
commit 61914c8f79
12 changed files with 203 additions and 39 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
SourceGen/RuntimeData/Help/codegen.html
View File

@@ -198,7 +198,7 @@ code, but also needs to know how to handle the corner cases.</p>
left to right, with no operator precedence.</li>
<li>The byte selection operators ('&lt;', '&gt;', '^') are actually
word-selection operators, yielding 16-bit values when wide registers
are enabled on the 65816.</p>
are enabled on the 65816.</li>
<li>The assembler tracks register widths when it sees SEP/REP instructions,
but doesn't attempt to track the emulation flag. So if the registers
are long when you switch to emulation, incorrect code is generated.