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Add W65C02S support, part 4 (of 4)

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Added 20233-rockwell unit test to exercise the new opcodes.  Nothing
too fancy.

Fixed branch offset computation.

(issue #87)
This commit is contained in:
Andy McFadden 2020-10-11 18:38:04 -07:00
parent 34ba47e71d
commit 728966f8d2
9 changed files with 276 additions and 1 deletions
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2
SourceGen/CodeAnalysis.cs
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@ -946,7 +946,7 @@ namespace SourceGen {
// function. We totally ignore the DP byte.
mAnattribs[offset].OperandAddress =
Asm65.Helper.RelOffset16(mAnattribs[offset].Address,
(sbyte)(operand << 8)) | bank;
(sbyte)(operand >> 8)) | bank;
break;
case OpDef.AddressMode.PCRelLong:
case OpDef.AddressMode.StackPCRelLong:

1
SourceGen/SGTestData/20233-rockwell Normal file
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@ -0,0 +1 @@
`÷`───Й'╥G в g0В0/Щ©ЗO Въ Тo0ЯЪ0НЙ`

95
SourceGen/SGTestData/20233-rockwell.dis65 Normal file
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@ -0,0 +1,95 @@
### 6502bench SourceGen dis65 v1.0 ###
{
"_ContentVersion":4,
"FileDataLength":44,
"FileDataCrc32":-1269997697,
"ProjectProps":{
"CpuName":"W65C02",
"IncludeUndocumentedInstr":false,
"TwoByteBrk":false,
"EntryFlags":32702671,
"AutoLabelStyle":"Simple",
"AnalysisParams":{
"AnalyzeUncategorizedData":true,
"DefaultTextScanMode":"LowHighAscii",
"MinCharsForString":4,
"SeekNearbyTargets":true,
"UseRelocData":false,
"SmartPlpHandling":false,
"SmartPlbHandling":true},
"PlatformSymbolFileIdentifiers":[],
"ExtensionScriptFileIdentifiers":[],
"ProjectSyms":{
"G_DP":{
"DataDescriptor":{
"Length":1,
"Format":"NumericLE",
"SubFormat":"Hex",
"SymbolRef":null},
"Comment":"",
"HasWidth":false,
"Direction":"ReadWrite",
"MultiMask":null,
"Label":"G_DP",
"Value":32,
"Source":"Project",
"Type":"ExternalAddr",
"LabelAnno":"None"}}},
"AddressMap":[{
"Offset":0,
"Addr":4096}],
"TypeHints":[{
"Low":0,
"High":0,
"Hint":"Code"}],
"StatusFlagOverrides":{
},
"Comments":{
},
"LongComments":{
},
"Notes":{
},
"UserLabels":{
},
"OperandFormats":{
},
"LvTables":{
"11":{
"Variables":[{
"DataDescriptor":{
"Length":1,
"Format":"NumericLE",
"SubFormat":"Hex",
"SymbolRef":null},
"Comment":"",
"HasWidth":true,
"Direction":"ReadWrite",
"MultiMask":null,
"Label":"L_DP",
"Value":48,
"Source":"Variable",
"Type":"ExternalAddr",
"LabelAnno":"None"}],
"ClearPrevious":false}},
"Visualizations":[],
"VisualizationAnimations":[],
"VisualizationSets":{
},
"RelocList":{
},
"DbrValues":{
}}

31
SourceGen/SGTestData/Expected/20233-rockwell_64tass.S Normal file
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@ -0,0 +1,31 @@
.cpu "w65c02"
G_DP = $20
* = $1000
bbr 0,$10,L1004
rts
L1004 bbs 1,$10,_L100B
rts
.byte $80
.byte $80
.byte $80
L_DP .var $30
_L100B nop
rmb 2,$10
smb 3,$10
rmb 4,G_DP
smb 5,G_DP
rmb 6,L_DP
smb 7,L_DP
_L1018 bbr 2,$10,_L1018
bbs 3,$10,_L1018
bbr 4,$20,_L1018
bbs 5,$20,_L1018
bbr 6,$30,_L1018
bbs 7,$30,_L1018
nop
rts

30
SourceGen/SGTestData/Expected/20233-rockwell_Merlin32.S Normal file
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@ -0,0 +1,30 @@
G_DP equ $20
org $1000
dfb $0f,$10,$01
rts
L1004 dfb $9f,$10,$04
rts
dfb $80
dfb $80
dfb $80
]L_DP equ $30
:L100B nop
dfb $27,$10
dfb $b7,$10
dfb $47,$20
dfb $d7,$20
dfb $67,$30
dfb $f7,$30
:L1018 dfb $2f,$10,$fd
dfb $bf,$10,$fa
dfb $4f,$20,$f7
dfb $df,$20,$f4
dfb $6f,$30,$f1
dfb $ff,$30,$ee
nop
rts

32
SourceGen/SGTestData/Expected/20233-rockwell_acme.S Normal file
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@ -0,0 +1,32 @@
!cpu w65c02
G_DP = $20
* = $1000
bbr0 $10,L1004
rts
L1004 bbs1 $10,@L100B
rts
!byte $80
!byte $80
!byte $80
!zone Z00000b
.L_DP = $30
@L100B nop
rmb2 $10
smb3 $10
rmb4 G_DP
smb5 G_DP
rmb6 .L_DP
smb7 .L_DP
@L1018 bbr2 $10,@L1018
bbs3 $10,@L1018
bbr4 $20,@L1018
bbs5 $20,@L1018
bbr6 $30,@L1018
bbs7 $30,@L1018
nop
rts

32
SourceGen/SGTestData/Expected/20233-rockwell_cc65.S Normal file
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@ -0,0 +1,32 @@
.setcpu "65C02"
G_DP = $20
; .segment "SEG000"
.org $1000
bbr0 $10,L1004
rts
L1004: bbs1 $10,L100B
rts
.byte $80
.byte $80
.byte $80
L_DP .set $30
L100B: nop
rmb2 $10
smb3 $10
rmb4 G_DP
smb5 G_DP
rmb6 L_DP
smb7 L_DP
@L1018: bbr2 $10,@L1018
bbs3 $10,@L1018
bbr4 $20,@L1018
bbs5 $20,@L1018
bbr6 $30,@L1018
bbs7 $30,@L1018
nop
rts

11
SourceGen/SGTestData/Expected/20233-rockwell_cc65.cfg Normal file
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@ -0,0 +1,11 @@
# 6502bench SourceGen generated linker script for 20233-rockwell
MEMORY {
MAIN: file=%O, start=%S, size=65536;
# MEM000: file=%O, start=$1000, size=44;
}
SEGMENTS {
CODE: load=MAIN, type=rw;
# SEG000: load=MEM000, type=rw;
}
FEATURES {}
SYMBOLS {}

43
SourceGen/SGTestData/Source/20233-rockwell.S Normal file
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@ -0,0 +1,43 @@
; Copyright 2020 faddenSoft. All Rights Reserved.
; See the LICENSE.txt file for distribution terms (Apache 2.0).
;
; Test Rockwell's 65C02 extensions.
; Assembler: ACME
!cpu w65c02
* = $1000
U_DP = $10 ;don't define
G_DP = $20 ;define as global project symbol
L_DP = $30 ;define as local variable
; Verify both halves of branches are traced. In theory, BBR followed
; by BBS on the same bit number should be always-taken, but we don't
; try to model memory.
bbr0 U_DP,cont0
rts
cont0 bbs1 U_DP,cont1
rts
!byte $80,$80,$80 ;filler to get different branch offset
cont1 nop
; Access the three zero-page values in different ways. Also exercise
; backward and to-self branches.
; EDIT: add $30 to a local variable table here
rmb2 U_DP
smb3 U_DP
rmb4 G_DP
smb5 G_DP
rmb6 L_DP
smb7 L_DP
bback bbr2 U_DP,bback
bbs3 U_DP,bback
bbr4 G_DP,bback
bbs5 G_DP,bback
bbr6 L_DP,bback
bbs7 L_DP,bback
nop
rts