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Fix some comments
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@ -58,6 +58,9 @@ namespace SourceGen.AsmGen {
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/// </summary>
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AssemblerQuirks Quirks { get; }
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/// <summary>
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/// Label localization object. Behavior is assembler-specific.
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/// </summary>
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LabelLocalizer Localizer { get; }
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/// <summary>
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@ -73,8 +76,7 @@ namespace SourceGen.AsmGen {
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/// is primarily intended for undocumented ops, which don't have standard mnemonics,
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/// and hence can vary between assemblers.
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/// </summary>
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/// <param name="op"></param>
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/// <param name="mnemonic"></param>
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/// <param name="op">Opcode to replace.</param>
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/// <returns>Replacement mnemonic, an empty string if the original is fine, or
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/// null if the op is not supported at all and should be emitted as hex.</returns>
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string ReplaceMnemonic(OpDef op);
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@ -83,10 +85,10 @@ namespace SourceGen.AsmGen {
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/// Generates an opcode/operand pair for a short sequence of bytes (1-4 bytes).
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/// Does not produce any source output.
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/// </summary>
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/// <param name="offset"></param>
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/// <param name="count"></param>
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/// <param name="opcode"></param>
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/// <param name="operand"></param>
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/// <param name="offset">Offset to data.</param>
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/// <param name="count">Number of bytes (1-4).</param>
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/// <param name="opcode">Opcode mnemonic.</param>
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/// <param name="operand">Formatted operand.</param>
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void GenerateShortSequence(int offset, int length, out string opcode, out string operand);
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/// <summary>
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@ -99,21 +101,21 @@ namespace SourceGen.AsmGen {
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/// <summary>
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/// Outputs one or more lines of data for the specified offset.
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/// </summary>
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/// <param name="offset"></param>
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/// <param name="offset">Offset to data.</param>
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void OutputDataOp(int offset);
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/// <summary>
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/// Outputs an equate directive. The numeric value is already formatted.
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/// </summary>
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/// <param name="name"></param>
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/// <param name="valueStr"></param>
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/// <param name="comment"></param>
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/// <param name="name">Symbol label.</param>
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/// <param name="valueStr">Formatted value.</param>
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/// <param name="comment">End-of-line comment.</param>
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void OutputEquDirective(string name, string valueStr, string comment);
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/// <summary>
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/// Outputs a code origin directive.
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/// </summary>
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/// <param name="address"></param>
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/// <param name="address">24-bit address.</param>
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void OutputOrgDirective(int address);
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/// <summary>
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@ -122,33 +124,47 @@ namespace SourceGen.AsmGen {
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/// Merlin32 always sets both values (e.g. "MX %00"), cc65 sets each register
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/// individually (".A16", ".I8"). We need to accommodate both styles.
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/// </summary>
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/// <param name="offset"></param>
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/// <param name="prevM"></param>
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/// <param name="prevX"></param>
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/// <param name="newM"></param>
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/// <param name="newX"></param>
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/// <param name="offset">Offset of change.</param>
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/// <param name="prevM">Previous value for M flag.</param>
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/// <param name="prevX">Previous value for X flag.</param>
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/// <param name="newM">New value for M flag.</param>
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/// <param name="newX">New value for X flag.</param>
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void OutputRegWidthDirective(int offset, int prevM, int prevX, int newM, int newX);
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/// <summary>
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/// Output a line of source code. All elements must be fully formatted. The
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/// items will be padded with spaces to fit specific column widths.
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/// Output a line of source code. All elements must be fully formatted, except for
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/// certain assembler-specific things like ':' on labels. The items will be padded
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/// with spaces to fit specific column widths.
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/// </summary>
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/// <param name="label"></param>
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/// <param name="opcode"></param>
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/// <param name="operand"></param>
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/// <param name="comment"></param>
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/// <param name="label">Optional label.</param>
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/// <param name="opcode">Opcode mnemonic.</param>
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/// <param name="operand">Operand; may be empty.</param>
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/// <param name="comment">Optional comment.</param>
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void OutputLine(string label, string opcode, string operand, string comment);
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/// <summary>
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/// Output a line of source code.
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/// Output a line of source code. This will be output as-is.
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/// </summary>
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/// <param name="fullLine"></param>
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/// <param name="fullLine">Full text of line to outut.</param>
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void OutputLine(string fullLine);
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}
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public class AssemblerQuirks {
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/// <summary>
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/// Are the arguments to MVN/MVP reversed?
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/// </summary>
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public bool BlockMoveArgsReversed { get; set; }
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/// <summary>
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/// Does the assembler configure assembler widths based on SEP/REP, but doesn't
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/// track the emulation bit?
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/// </summary>
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public bool TracksSepRepNotEmu { get; set; }
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/// <summary>
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/// Is the assembler unable to generate relative branches that wrap around banks?
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/// (Note this affects long-distance BRLs that don't appear to wrap.)
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/// </summary>
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public bool NoPcRelBankWrap { get; set; }
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}
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}
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@ -30,7 +30,7 @@ CLR80VID @ $C00C ;W 40 columns
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SET80VID @ $C00D ;W 80 columns
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CLRALTCHAR @ $C00E ;W primary char set
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SETALTCHAR @ $C00F ;W alternate char set
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KBDSTRB @ $C010 ;WR keyboard strobe
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KBDSTRB @ $C010 ;RW keyboard strobe
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RDLCBNK2 @ $C011 ;R status of selected $Dx bank
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RDLCRAM @ $C012 ;R status of $Dx ROM / $Dx RAM
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RDRAMRD @ $C013 ;R status of main/aux RAM reading
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@ -86,7 +86,7 @@ DIAGTYPE @ $C046 ;W self-test diagnostics
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CLRVBLINT @ $C047 ;W clear VBL interrupt
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CLRXYINT @ $C048 ;W clear XY interrupt
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EMUBYTE @ $C04F ;WR used by emulators to identify themselves
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EMUBYTE @ $C04F ;RW used by emulators to identify themselves
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TXTCLR @ $C050 ;RW display graphics
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TXTSET @ $C051 ;RW display text
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