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https://github.com/fadden/6502bench.git
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Work around cc65 single-pass behavior
The cc65 assembler runs in a single pass, which means forward address references default to 16 bits. For zero-page references we have to add an explicit width disambiguator. (This is an unusual situation that only occurs if you have a zero-page .ORG in the file after code that references it.) With this change, 2014-label-dp passes, and no other regression tests were affected. (issue #40)
This commit is contained in:
Andy McFadden
parent
c80be07f73
commit
a88c746419
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@ -63,7 +63,8 @@ namespace Asm65 {
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public bool mAllowHighAsciiCharConst; // can we do high-ASCII character constants?
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// (this might need to be generalized)
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public string mForceAbsOpcodeSuffix; // these may be null or empty
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public string mForceDirectOperandPrefix; // these may be null or empty
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public string mForceAbsOpcodeSuffix;
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public string mForceAbsOperandPrefix;
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public string mForceLongOpcodeSuffix;
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public string mForceLongOperandPrefix;
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@ -485,7 +486,9 @@ namespace Asm65 {
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/// <returns></returns>
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public string FormatMnemonic(string mnemonic, OpDef.WidthDisambiguation wdis) {
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string opcodeStr = mnemonic;
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if (wdis == OpDef.WidthDisambiguation.ForceAbs) {
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if (wdis == OpDef.WidthDisambiguation.ForceDirect) {
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// nothing to do for opcode
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} else if (wdis == OpDef.WidthDisambiguation.ForceAbs) {
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if (!string.IsNullOrEmpty(mFormatConfig.mForceAbsOpcodeSuffix)) {
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opcodeStr += mFormatConfig.mForceAbsOpcodeSuffix;
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}
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@ -507,13 +510,18 @@ namespace Asm65 {
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/// Generates an operand format.
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/// </summary>
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/// <param name="addrMode">Addressing mode.</param>
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/// <param name="wdis">Width disambiguation mode.</param>
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/// <returns>Format string.</returns>
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private string GenerateOperandFormat(OpDef.AddressMode addrMode,
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OpDef.WidthDisambiguation wdis) {
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string fmt;
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string wdisStr = string.Empty;
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if (wdis == OpDef.WidthDisambiguation.ForceAbs) {
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if (wdis == OpDef.WidthDisambiguation.ForceDirect) {
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if (!string.IsNullOrEmpty(mFormatConfig.mForceDirectOperandPrefix)) {
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wdisStr = mFormatConfig.mForceDirectOperandPrefix;
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}
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} else if (wdis == OpDef.WidthDisambiguation.ForceAbs) {
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if (!string.IsNullOrEmpty(mFormatConfig.mForceAbsOperandPrefix)) {
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wdisStr = mFormatConfig.mForceAbsOperandPrefix;
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}
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@ -112,9 +112,10 @@ namespace Asm65 {
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/// </summary>
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public enum WidthDisambiguation : byte {
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None = 0,
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ForceDirect, // only needed for forward DP label refs in single-pass assemblers
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ForceAbs,
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ForceLong,
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ForceLongMaybe
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ForceLongMaybe // add opcode suffix but not operand prefix
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// May want an additional item: "force long if operand suffix specified". This
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// would let us generate LDAL for assemblers that like to have that made explicit,
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@ -164,6 +164,7 @@ namespace SourceGen.AsmGen {
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// cc65 v2.17: https://github.com/cc65/cc65/issues/754
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Quirks.NoPcRelBankWrap = true;
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}
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Quirks.SinglePassAssembler = true;
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mWorkDirectory = workDirectory;
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mFileNameBase = fileNameBase;
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@ -182,6 +183,7 @@ namespace SourceGen.AsmGen {
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private void SetFormatConfigValues(ref Formatter.FormatConfig config) {
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config.mForceAbsOpcodeSuffix = string.Empty;
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config.mForceLongOpcodeSuffix = string.Empty;
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config.mForceDirectOperandPrefix = "z:"; // zero
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config.mForceAbsOperandPrefix = "a:"; // absolute
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config.mForceLongOperandPrefix = "f:"; // far
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config.mEndOfLineCommentDelimiter = ";";
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@ -185,6 +185,7 @@ namespace SourceGen.AsmGen {
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private void SetFormatConfigValues(ref Formatter.FormatConfig config) {
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config.mForceAbsOpcodeSuffix = ":";
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config.mForceLongOpcodeSuffix = "l";
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config.mForceDirectOperandPrefix = string.Empty;
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config.mForceAbsOperandPrefix = string.Empty;
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config.mForceLongOperandPrefix = string.Empty;
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config.mEndOfLineCommentDelimiter = ";";
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@ -179,6 +179,7 @@ namespace SourceGen.AsmGen {
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config.mForceAbsOpcodeSuffix = string.Empty;
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config.mForceLongOpcodeSuffix = string.Empty;
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config.mForceDirectOperandPrefix = string.Empty;
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config.mForceAbsOperandPrefix = "@w"; // word
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config.mForceLongOperandPrefix = "@l"; // long
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config.mEndOfLineCommentDelimiter = ";";
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@ -171,6 +171,15 @@ namespace SourceGen.AsmGen {
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if (op.IsWidthPotentiallyAmbiguous) {
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wdis = OpDef.GetWidthDisambiguation(instrLen, operand);
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}
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if (gen.Quirks.SinglePassAssembler && wdis == OpDef.WidthDisambiguation.None &&
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(op.AddrMode == OpDef.AddressMode.DP ||
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op.AddrMode == OpDef.AddressMode.DPIndexX) ||
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op.AddrMode == OpDef.AddressMode.DPIndexY) {
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// Could be a forward reference to a direct-page label.
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if (IsForwardLabelReference(gen, offset)) {
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wdis = OpDef.WidthDisambiguation.ForceDirect;
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}
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}
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string opcodeStr = formatter.FormatOpcode(op, wdis);
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@ -298,6 +307,46 @@ namespace SourceGen.AsmGen {
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}
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}
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/// <summary>
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/// Determines whether the instruction at the specified offset has an operand that is
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/// a forward reference. This only matters for single-pass assemblers.
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/// </summary>
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/// <param name="gen">Source generator reference.</param>
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/// <param name="offset">Offset of instruction opcode.</param>
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/// <returns>True if the instruction's operand is a forward reference to a label.</returns>
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private static bool IsForwardLabelReference(IGenerator gen, int offset) {
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DisasmProject proj = gen.Project;
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Debug.Assert(proj.GetAnattrib(offset).IsInstructionStart);
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FormatDescriptor dfd = proj.GetAnattrib(offset).DataDescriptor;
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if (dfd == null || !dfd.HasSymbol) {
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return false;
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}
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if (!proj.SymbolTable.TryGetValue(dfd.SymbolRef.Label, out Symbol sym)) {
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return false;
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}
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if (!sym.IsInternalLabel) {
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return false;
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}
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// It's an internal label reference. We don't currently have a data structure
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// that lets us go from label name to file offset. This situation is sufficiently
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// rare that an O(n) approach is acceptable. We may need to fix this someday.
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//
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// We only want to know if it is defined after the current instruction. This is
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// probably being used for a direct-page reference, which is probably at the start
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// of the file, so we run from the start to the current instruction.
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for (int i = 0; i < offset; i++) {
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Anattrib attr = proj.GetAnattrib(i);
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if (attr.Symbol != null && attr.Symbol == sym) {
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// Found it earlier in file.
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return false;
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}
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}
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// Must appear later in file.
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return true;
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}
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/// <summary>
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/// Configures some common format config items from the app settings. Uses a
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/// passed-in settings object, rather than the global settings.
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@ -183,5 +183,10 @@ namespace SourceGen.AsmGen {
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/// (Note this affects long-distance BRLs that don't appear to wrap.)
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/// </summary>
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public bool NoPcRelBankWrap { get; set; }
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/// <summary>
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/// Is the assembler implemented as a single pass?
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/// </summary>
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public bool SinglePassAssembler { get; set; }
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}
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}
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292
SourceGen/SGTestData/Expected/2014-label-dp_cc65.S
Normal file
292
SourceGen/SGTestData/Expected/2014-label-dp_cc65.S
Normal file
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@ -0,0 +1,292 @@
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;6502bench SourceGen v1.1.0-dev1
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.setcpu "65816"
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.org $1000
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.a8
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.i8
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sec
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xce
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jsr L101F
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jsr L10AB
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jsr L10F2
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jsr L1106
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jsr L1109
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jsr L112C
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jsr L11F9
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jsr L11FC
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nop
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nop
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nop
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.byte $00,$80
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L101F: ora (L0080,x)
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cop $80
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ora $80,S
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tsb z:L0080
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ora z:L0080
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asl z:L0080
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ora [L0080]
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php
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ora #$80
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asl A
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phd
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tsb a:L0086
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ora a:L0086
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asl a:L0086
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ora f:L0089
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bpl L1041
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L1041: ora (L0080),y
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ora (L0080)
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ora ($80,S),y
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trb z:L0080
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ora z:L0080,x
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asl z:L0080,x
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ora [L0080],y
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clc
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ora L0086,y
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inc A
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tcs
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trb a:L0086
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ora a:L0086,x
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asl a:L0086,x
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ora f:L0089,x
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jsr L0086
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and (L0080,x)
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jsl L0089
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and $80,S
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bit z:L0080
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and z:L0080
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rol z:L0080
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and [L0080]
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plp
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and #$80
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rol A
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pld
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bit a:L0086
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and a:L0086
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rol a:L0086
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and f:L0089
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bmi L1089
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L1089: and (L0080),y
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and (L0080)
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and ($80,S),y
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bit z:L0080,x
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and z:L0080,x
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rol z:L0080,x
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and [L0080],y
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sec
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and L0086,y
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dec A
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tsc
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bit a:L0086,x
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and a:L0086,x
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rol a:L0086,x
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and f:L0089,x
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rti
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L10AB: eor (L0080,x)
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.byte $42,$80
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eor $80,S
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.byte $44,$83,$84
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eor z:L0080
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lsr z:L0080
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eor [L0080]
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pha
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eor #$80
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lsr A
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phk
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jmp L10C2
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L10C2: eor a:L0086
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lsr a:L0086
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eor f:L0089
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bvc L10CE
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L10CE: eor (L0080),y
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eor (L0080)
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eor ($80,S),y
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.byte $54,$83,$84
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eor z:L0080,x
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lsr z:L0080,x
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eor [L0080],y
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cli
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eor L0086,y
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phy
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tcd
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jml L10E7
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L10E7: eor a:L0086,x
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lsr a:L0086,x
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eor f:L0089,x
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rts
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L10F2: adc (L0080,x)
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per $0ff6
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adc $80,S
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stz z:L0080
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adc z:L0080
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ror z:L0080
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adc [L0080]
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pla
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adc #$80
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ror A
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rtl
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L1106: jmp (L0086)
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L1109: adc a:L0086
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ror a:L0086
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adc f:L0089
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bvs L1115
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L1115: adc (L0080),y
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adc (L0080)
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adc ($80,S),y
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stz z:L0080,x
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adc z:L0080,x
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ror z:L0080,x
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adc [L0080],y
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sei
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adc L0086,y
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ply
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tdc
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jmp (L0086,x)
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L112C: adc a:L0086,x
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ror a:L0086,x
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adc f:L0089,x
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bra L1138
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L1138: sta (L0080,x)
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brl L113D
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L113D: sta $80,S
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sty z:L0080
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sta z:L0080
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stx z:L0080
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sta [L0080]
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dey
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bit #$80
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txa
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phb
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sty a:L0086
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sta a:L0086
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stx a:L0086
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sta f:L0089
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bcc L115B
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L115B: sta (L0080),y
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sta (L0080)
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sta ($80,S),y
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sty z:L0080,x
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sta z:L0080,x
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stx z:L0080,y
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sta [L0080],y
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tya
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sta L0086,y
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txs
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txy
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stz a:L0086
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sta a:L0086,x
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stz a:L0086,x
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sta f:L0089,x
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ldy #$80
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lda (L0080,x)
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ldx #$80
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lda $80,S
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ldy z:L0080
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lda z:L0080
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ldx z:L0080
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lda [L0080]
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tay
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lda #$80
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tax
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plb
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ldy a:L0086
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lda a:L0086
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ldx a:L0086
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lda f:L0089
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bcs L11A0
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L11A0: lda (L0080),y
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lda (L0080)
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lda ($80,S),y
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ldy z:L0080,x
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lda z:L0080,x
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ldx z:L0080,y
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lda [L0080],y
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clv
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lda L0086,y
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tsx
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tyx
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ldy a:L0086,x
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lda a:L0086,x
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ldx a:L0086,y
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lda f:L0089,x
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cpy #$80
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cmp (L0080,x)
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rep #$00
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cmp $80,S
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cpy z:L0080
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cmp z:L0080
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dec z:L0080
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cmp [L0080]
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iny
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cmp #$80
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dex
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wai
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cpy a:L0086
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cmp a:L0086
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dec a:L0086
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cmp f:L0089
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bne L11E5
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L11E5: cmp (L0080),y
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cmp (L0080)
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cmp ($80,S),y
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pei (L0080)
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cmp z:L0080,x
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dec z:L0080,x
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cmp [L0080],y
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cld
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cmp L0086,y
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phx
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stp
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L11F9: jml [L0086]
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L11FC: cmp a:L0086,x
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dec a:L0086,x
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cmp f:L0089,x
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cpx #$80
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sbc (L0080,x)
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sep #$00
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sbc $80,S
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cpx z:L0080
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sbc z:L0080
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inc z:L0080
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sbc [L0080]
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inx
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sbc #$80
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nop
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xba
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cpx a:L0086
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sbc a:L0086
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inc a:L0086
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sbc f:L0089
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beq L122A
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L122A: sbc (L0080),y
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sbc (L0080)
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sbc ($80,S),y
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pea L0086
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sbc z:L0080,x
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inc z:L0080,x
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sbc [L0080],y
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sed
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sbc L0086,y
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plx
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xce
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jsr (L0086,x)
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sbc a:L0086,x
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inc a:L0086,x
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sbc f:L0089,x
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.org $0080
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L0080: bit z:L0082
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L0082: bit z:L0082
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bit L0082
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L0086: bit a:L0086
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L0089: lda f:L0089
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