From a902f69aea328d49181eac886cf5e86c921b6df1 Mon Sep 17 00:00:00 2001 From: Andy McFadden Date: Sat, 19 Oct 2019 10:10:26 -0700 Subject: [PATCH] Update A2-Zippy example The ZipChip GS register definitions can take advantage of the new I/O direction feature. Pulling them out into a .sym65 makes sense. --- .../Examples/A2-Zippy/ZIPPY#ff2000.dis65 | 80 ++++++++--------- SourceGen/Examples/A2-Zippy/ZipChipGS.sym65 | 87 +++++++++++++++++++ SourceGen/Examples/README.md | 5 +- 3 files changed, 125 insertions(+), 47 deletions(-) create mode 100644 SourceGen/Examples/A2-Zippy/ZipChipGS.sym65 diff --git a/SourceGen/Examples/A2-Zippy/ZIPPY#ff2000.dis65 b/SourceGen/Examples/A2-Zippy/ZIPPY#ff2000.dis65 index 6167ec0..ecbb2dc 100644 --- a/SourceGen/Examples/A2-Zippy/ZIPPY#ff2000.dis65 +++ b/SourceGen/Examples/A2-Zippy/ZIPPY#ff2000.dis65 @@ -1,81 +1,49 @@ ### 6502bench SourceGen dis65 v1.0 ### { "_ContentVersion":2,"FileDataLength":2087,"FileDataCrc32":315385475,"ProjectProps":{ -"CpuName":"65816","IncludeUndocumentedInstr":false,"EntryFlags":32702671,"AutoLabelStyle":"Simple","AnalysisParams":{ +"CpuName":"65816","IncludeUndocumentedInstr":false,"TwoByteBrk":false,"EntryFlags":32702671,"AutoLabelStyle":"Simple","AnalysisParams":{ "AnalyzeUncategorizedData":true,"DefaultTextScanMode":"LowHighAscii","MinCharsForString":4,"SeekNearbyTargets":true,"SmartPlpHandling":true}, -"PlatformSymbolFileIdentifiers":["RT:Apple/F8-ROM.sym65","RT:Apple/Cxxx-IO.sym65","RT:Apple/ProDOS8.sym65","RT:Apple/IIgs-ROM.sym65"],"ExtensionScriptFileIdentifiers":["RT:Apple/ProDOS8.cs","RT:Apple/IIgs-Toolbox.cs"],"ProjectSyms":{ +"PlatformSymbolFileIdentifiers":["RT:Apple/F8-ROM.sym65","RT:Apple/Cxxx-IO.sym65","RT:Apple/ProDOS8.sym65","RT:Apple/IIgs-ROM.sym65","PROJ:ZipChipGS.sym65"],"ExtensionScriptFileIdentifiers":["RT:Apple/ProDOS8.cs","RT:Apple/IIgs-Toolbox.cs"],"ProjectSyms":{ "DR_ENAB":{ "DataDescriptor":{ "Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"","HasWidth":false,"Label":"DR_ENAB","Value":1690,"Source":"Project","Type":"ExternalAddr"}, +"Comment":"","HasWidth":false,"Direction":"ReadWrite","MultiMask":null,"Label":"DR_ENAB","Value":1690,"Source":"Project","Type":"ExternalAddr"}, "DR_OPTA":{ "DataDescriptor":{ "Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"","HasWidth":false,"Label":"DR_OPTA","Value":1739,"Source":"Project","Type":"ExternalAddr"}, +"Comment":"","HasWidth":false,"Direction":"ReadWrite","MultiMask":null,"Label":"DR_OPTA","Value":1739,"Source":"Project","Type":"ExternalAddr"}, "DR_OPTB":{ "DataDescriptor":{ "Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"","HasWidth":false,"Label":"DR_OPTB","Value":1599,"Source":"Project","Type":"ExternalAddr"}, +"Comment":"","HasWidth":false,"Direction":"ReadWrite","MultiMask":null,"Label":"DR_OPTB","Value":1599,"Source":"Project","Type":"ExternalAddr"}, "DR_OPTC":{ "DataDescriptor":{ "Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"","HasWidth":false,"Label":"DR_OPTC","Value":1847,"Source":"Project","Type":"ExternalAddr"}, +"Comment":"","HasWidth":false,"Direction":"ReadWrite","MultiMask":null,"Label":"DR_OPTC","Value":1847,"Source":"Project","Type":"ExternalAddr"}, "DR_OPTF":{ "DataDescriptor":{ "Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"","HasWidth":false,"Label":"DR_OPTF","Value":1867,"Source":"Project","Type":"ExternalAddr"}, +"Comment":"","HasWidth":false,"Direction":"ReadWrite","MultiMask":null,"Label":"DR_OPTF","Value":1867,"Source":"Project","Type":"ExternalAddr"}, "DR_OPTP":{ "DataDescriptor":{ "Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"","HasWidth":false,"Label":"DR_OPTP","Value":1719,"Source":"Project","Type":"ExternalAddr"}, +"Comment":"","HasWidth":false,"Direction":"ReadWrite","MultiMask":null,"Label":"DR_OPTP","Value":1719,"Source":"Project","Type":"ExternalAddr"}, "DR_SPDBAR":{ "DataDescriptor":{ "Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"","HasWidth":false,"Label":"DR_SPDBAR","Value":1236,"Source":"Project","Type":"ExternalAddr"}, -"ENABLE":{ -"DataDescriptor":{ -"Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"Zip: R=bit options, W=enable card","HasWidth":false,"Label":"ENABLE","Value":49243,"Source":"Project","Type":"ExternalAddr"}, -"LOCK":{ -"DataDescriptor":{ -"Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"Zip: R=get speed, W=lock/unlock","HasWidth":false,"Label":"LOCK","Value":49242,"Source":"Project","Type":"ExternalAddr"}, -"OPTIONS":{ -"DataDescriptor":{ -"Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"Zip: R/W=bit options","HasWidth":false,"Label":"OPTIONS","Value":49241,"Source":"Project","Type":"ExternalAddr"}, +"Comment":"","HasWidth":false,"Direction":"ReadWrite","MultiMask":null,"Label":"DR_SPDBAR","Value":1236,"Source":"Project","Type":"ExternalAddr"}, "PTR":{ "DataDescriptor":{ "Length":2,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"","HasWidth":true,"Label":"PTR","Value":2,"Source":"Project","Type":"ExternalAddr"}, +"Comment":"","HasWidth":true,"Direction":"ReadWrite","MultiMask":null,"Label":"PTR","Value":2,"Source":"Project","Type":"ExternalAddr"}, "PTR2":{ "DataDescriptor":{ "Length":2,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"","HasWidth":true,"Label":"PTR2","Value":4,"Source":"Project","Type":"ExternalAddr"}, -"RESET":{ -"DataDescriptor":{ -"Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"Zip: R=nop, W=force reset","HasWidth":false,"Label":"RESET","Value":49240,"Source":"Project","Type":"ExternalAddr"}, -"SLOTENAB":{ -"DataDescriptor":{ -"Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"Zip: R/W=slot/speaker enable","HasWidth":false,"Label":"SLOTENAB","Value":49244,"Source":"Project","Type":"ExternalAddr"}, -"SPEED":{ -"DataDescriptor":{ -"Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"Zip: R=bank, W=set speed","HasWidth":false,"Label":"SPEED","Value":49245,"Source":"Project","Type":"ExternalAddr"}, -"TAG1":{ -"DataDescriptor":{ -"Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"Zip","HasWidth":false,"Label":"TAG1","Value":49246,"Source":"Project","Type":"ExternalAddr"}, -"TAG2":{ -"DataDescriptor":{ -"Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"Zip","HasWidth":false,"Label":"TAG2","Value":49247,"Source":"Project","Type":"ExternalAddr"}, +"Comment":"","HasWidth":true,"Direction":"ReadWrite","MultiMask":null,"Label":"PTR2","Value":4,"Source":"Project","Type":"ExternalAddr"}, "TMP":{ "DataDescriptor":{ "Length":1,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, -"Comment":"","HasWidth":false,"Label":"TMP","Value":0,"Source":"Project","Type":"ExternalAddr"}}}, +"Comment":"","HasWidth":false,"Direction":"ReadWrite","MultiMask":null,"Label":"TMP","Value":0,"Source":"Project","Type":"ExternalAddr"}}}, "AddressMap":[{ "Offset":0,"Addr":8192}],"TypeHints":[{ "Low":0,"High":0,"Hint":"Code"}],"StatusFlagOverrides":{ @@ -395,6 +363,10 @@ "Length":2,"Format":"NumericLE","SubFormat":"HighAscii","SymbolRef":null}, "436":{ "Length":2,"Format":"NumericLE","SubFormat":"HighAscii","SymbolRef":null}, +"541":{ +"Length":2,"Format":"Junk","SubFormat":"None","SymbolRef":null}, +"546":{ +"Length":2,"Format":"NumericLE","SubFormat":"Binary","SymbolRef":null}, "591":{ "Length":3,"Format":"NumericLE","SubFormat":"Symbol","SymbolRef":{ "Label":"statline","Part":"Low"}}, @@ -611,6 +583,8 @@ "Length":2,"Format":"NumericLE","SubFormat":"HighAscii","SymbolRef":null}, "1847":{ "Length":2,"Format":"NumericLE","SubFormat":"HighAscii","SymbolRef":null}, +"1908":{ +"Length":2,"Format":"NumericLE","SubFormat":"Binary","SymbolRef":null}, "2000":{ "Length":2,"Format":"NumericLE","SubFormat":"Hex","SymbolRef":null}, "2003":{ @@ -620,6 +594,22 @@ "Label":"color_data","Part":"Low"}}, "2017":{ "Length":2,"Format":"NumericLE","SubFormat":"Symbol","SymbolRef":{ -"Label":"color_data","Part":"High"}}}, +"Label":"color_data","Part":"High"}}, +"2072":{ +"Length":1,"Format":"NumericLE","SubFormat":"Decimal","SymbolRef":null}, +"2074":{ +"Length":1,"Format":"NumericLE","SubFormat":"Decimal","SymbolRef":null}, +"2076":{ +"Length":1,"Format":"NumericLE","SubFormat":"Decimal","SymbolRef":null}, +"2078":{ +"Length":1,"Format":"NumericLE","SubFormat":"Decimal","SymbolRef":null}, +"2080":{ +"Length":1,"Format":"NumericLE","SubFormat":"Decimal","SymbolRef":null}, +"2082":{ +"Length":1,"Format":"NumericLE","SubFormat":"Decimal","SymbolRef":null}, +"2084":{ +"Length":1,"Format":"NumericLE","SubFormat":"Decimal","SymbolRef":null}, +"2086":{ +"Length":1,"Format":"NumericLE","SubFormat":"Decimal","SymbolRef":null}}, "LvTables":{ }} diff --git a/SourceGen/Examples/A2-Zippy/ZipChipGS.sym65 b/SourceGen/Examples/A2-Zippy/ZipChipGS.sym65 new file mode 100644 index 0000000..176ce57 --- /dev/null +++ b/SourceGen/Examples/A2-Zippy/ZipChipGS.sym65 @@ -0,0 +1,87 @@ +; Copyright 2018 faddenSoft. All Rights Reserved. +; See the LICENSE.txt file for distribution terms (Apache 2.0). + +*SYNOPSIS ZipChip GS register definitions + +; +; I got this from David Empson, who got it from Zip Technologies. +; + +; ZipChip GS Special Registers Ex ZIP Technology, 12 October 1990 +; +; Registers must be unlocked before they can be accessed (see $C05A). +; Locking them will re-enable the annunciators. +; +; Writing to any I/O location $C058-$C05F (whether registers are locked or +; unlocked) will reset delay in progress. +; +; $C058 R No operation +; +; $C058 W Write any value to force poweron/reset bit to COLD (forces next +; reset to restore ZIP registers to defaults/switch settings). +; +; $C059 R/W 76543210 +; *....... Bank Switch Language Card cache disable=1/enable=0? +; .*...... Paddle delay (5 ms) disable=0/enable=1 $C070/$C020 +; ..*..... External delay (5 ms) disable=0/enable=1 +; ...*.... Counter delay (5 ms) disable=0/enable=1 $C02E/$C07E +; ....*... CPS follow disable=0/enable=1 +; .....*.. Last Reset warm? READ ONLY +; ......*. Hardware DMA READ ONLY +; .......* non-GS (0)/GS (1) READ ONLY +; +; $C05A R 76543210 +; ****.... Current ZIP Speed, 0=100%, F=6.25%, in 6.25% increments +; ....1111 +; +; $C05A W Write values as follows: +; $5x Unlock ZIP registers (must write 4 times) +; $Ax Lock ZIP registers +; other Force ZIP to follow system clock (i.e. disable card) +; +; $C05B R 76543210 +; *....... 1msclk - clock with 1 ms period +; .*...... cshupd - Tag data at $C05F updated (read $C05F to reset) +; ..*..... Bank Switch Language Card cache (0), don't (1) +; ...*.... Board disable - 0=enabled, 1=disabled +; ....*... delay in effect (0=ZIP, 1=Slow) +; .....*.. rombank (0/1) - not in development version +; ......** Cache RAM size (00=8k, 01=16k, 10=32k, 11=64k) +; +; $C05B W Write any value to force ZIP to current speed (i.e. enable card) +; +; $C05C R/W 76543210 +; *******. Slot 7-1 delay enable (all slots 52-54 ms) +; .......* Speaker delay enable (5 ms) +; +; $C05D R Current 65816 bank +; +; $C05D W 76543210 +; ****.... Set ZIP speed, 0=100%, F=6.25%, in 6.25% increments +; ....**** Don't care +; +; $C05E R Read last Tag data written and force the next write to +; create a trash tag value. +; +; $C05E W No operation +; +; $C05F R Read last Tag data written and reset cshupd. Note: apparently +; any write to a ZIP register (unlocked) will clear cshupd, but cshupd says +; that this location must be read. +; +; $C05F W No operation + +ZIP_Reset > $c058 ;W write any value to force poweron/reset bit to COLD +ZIP_Options @ $c059 ;RW bit flags: paddle delay, CPS follow, etc. +ZIP_Speed < $c05a ;R current ZIP speed in 6.25% increments +ZIP_Lock > $c05a ;W $5* unlock (write 4x), $A* lock, other=disable +ZIP_Status < $c05b ;R bit flags: status values +ZIP_Enable > $c05b ;W write any value to enable card +ZIP_SlotEnable @ $c05c ;RW bit flags: enable delay on slots and speaker +ZIP_Bank < $c05d ;R current 65816 bank +ZIP_SetSpeed > $c05d ;W set ZIP speed in 6.25% increments +ZIP_Tag1 < $c05e ;R read last Tag written and force trash tag +ZIP_Nop1 > $c05e ;W no-op with side-effects +ZIP_Tag2 < $c05f ;R read last tag written and reset cshupd +ZIP_Nop2 > $c05f ;W no-op with side-effects + diff --git a/SourceGen/Examples/README.md b/SourceGen/Examples/README.md index 5601a44..d503dbb 100644 --- a/SourceGen/Examples/README.md +++ b/SourceGen/Examples/README.md @@ -4,7 +4,7 @@ These are some sample projects you can play with. The binaries are accompanied by the original source code, so you can compare the SourceGen project to the original. - * Tutorial: simples project, intended for use with the tutorial in + * Tutorial: simple projects, intended for use with the tutorial in the manual. * Scripts: extension script samples. * A2-lz4fh: two functions for unpacking a simplified form of LZ4 compression. @@ -13,7 +13,8 @@ project to the original. * A2-Amper-fdraw: 6502 code that provides an Applesoft BASIC interface to a machine-language graphics library. The public interface of the graphics library is defined in a .sym65 file. This example has multiple - entry points in a jump table, and requires a bit more effort. + entry points in a jump table, and is used to demonstrate address table + formatting in the advanced tutorial. [(Full project)](https://github.com/fadden/fdraw) * A2-Zippy: a program for controlling an Apple IIgs CPU accelerator card. 65816 sources, with a little bit of ProDOS 8 and IIgs toolbox usage.