1
0
mirror of https://github.com/fadden/6502bench.git synced 2024-06-30 06:29:32 +00:00
Commit Graph

7 Commits

Author SHA1 Message Date
Andy McFadden
478afa542e Fix 64tass code gen corner case
On the 65816, if you say "JSR foo" from bank $12, but "foo" is an
address in bank 0, most assemblers will conclude that you're forming
a 16-bit argument with a 16-bit address and assemble happily.  64tass
halts with an error.  Up until v1.55 or so, you could fake it out
by supplying a large offset.

This no longer works.  The preferred way to say "no really I mean to
do this" is to append ",k" to the operand.  We now do that as needed.

I didn't want to define a new ExpressionMode for 64tass just to
support an operand modifier that should probably never actually get
generated (you can't call across banks with JSR!), so this is
implemented with a quirk and an op flag.

64tass v1.56.2625 is now the default.

(issue #104)
2021-08-09 14:11:15 -07:00
Andy McFadden
c16e646701 Add a line to 20052-branches-and-banks
Throw a non-bank-zero JSR <hexaddr> into the mix.
2021-07-31 13:51:35 -07:00
Andy McFadden
288a857e47 Change PLP handling
The "smart" PLP handler tries to recover the flags from an earlier
PHP.  The non-smart version just marks all the flags as indeterminate.
This doesn't work well on the 65816 in native mode, because having
the M/X flags in an indeterminate state is rarely what you want.

Code rarely uses PLP to reset the flags to a specific state, preferring
explicit SEP/REP.  The analyzer is more likely to get the correct
answer by simply leaving the flags in their prior state.

A test case has been added to 20052-branches-and-banks, which now has
"smart PLP" disabled.
2020-07-20 11:54:00 -07:00
Andy McFadden
6d7fdff6b5 Fix 65816 code generation issues
Code generated for 64tass was incorrect for JSR/JMP to a location
outside the file bounds.  A test added to 20052-branches-and-banks
revealed an issue with cc65 generation as well.
2020-07-03 14:02:38 -07:00
Andy McFadden
fdd2bcf847 Fix some 65816 code generation issues
Two basic problems:

(1) cc65, being a one-pass assembler, can't tell if a forward-referenced
label is 16-bit or 24-bit.  If the operand is potentially ambiguous,
such as "LDA label", we need to add an operand width disambiguator.
(The existing tests managed to only do backward references.)

(2) 64tass wants the labels on JMP/JSR absolute operands to have 24-bit
values that match the current program bank.  This is the opposite of
cc65, which requires 16-bit values.  We need to distinguish PBR vs.
DBR instructions (i.e. "LDA abs" vs. "JMP abs") and handle them
differently when formatting for "Common".

Merlin32 doesn't care, and ACME doesn't work at all, so neither of
those needed updating.

The 20052-branches-and-banks test was expanded to cover the problematic
cases.
2020-07-01 17:59:12 -07:00
Andy McFadden
3637bb964d Regression test rework, part 4
Split 2005x-branches-and-banks into two parts, one that stays within
the 64K bounds of the 6502, one that puts code in a separate bank.
2020-06-06 17:30:50 -07:00
Andy McFadden
225ab9e132 Regression test rework, part 2
Renamed the remaining tests.  Only edits were to the project files
that referenced .sym65/.cs.
2020-06-06 15:36:08 -07:00