Variables, types, and comments have been updated to reflect the new
naming scheme.
The project file serialization code is untouched, because the data
is output as serialized enumerated values. Adding a string conversion
layer didn't seem worthwhile.
No changes in behavior.
(issue #89)
We were claiming W65C02S, but it turns out that CPU has the Rockwell
extensions and the STP/WAI instructions. We need to change existing
references to be "WDC 65C02", and add a new CPU definition for the
actual W65C02S chip.
This adds the new CPU definition, the instruction definitions for
the Rockwell extensions, and updates the selectors in project properties
and the instruction chart tool.
This change shouldn't affect any existing projects. Still more to do
before W65C02 works though, mostly because the Rockwell instructions
introduced a new two-argument address mode that has to be handled in
various places.
First, make the per-segment comments and notes optional.
Second, add an "offset segment by $0100" feature that tries to shift
each segment forward 256 bytes. Doing so avoids potential ambiguity
with direct page locations.
The 20212-reloc-data test no longer has the per-segment comments.
This test exercises the relocation data feature. The test file is
generated from a multi-segment OMF file that was hex-edited to have
specific attributes (see 20212-reloc-data-lnk.S for instructions).
The test also serves as a way to exercise the OMF converter.
Also, implement the Bank Relative flag.
The Absolute Indirect and Absolute Indirect Long addressing modes
(e.g. "JMP (addr)" and "JMP [addr]") are 16-bit values in bank 0.
The code analyzer was placing them in the program bank, which
meant the wrong symbol was being used.
Also, tweak some docs.
Works well for things like jump tables. Seeing a bunch of these
scattered in a chunk of data is a decent signal that it's actually
code.
In a bold move, we now exclude PEA operands from auto-label gen when
they don't have relocation data. This is very useful for things
like Int2Hex for which constants are typically pushed with PEA.
Reworked the "use reloc data" setting so it defaults to false and is
explicitly set to true when converting OMF. This provides a minor
optimization since we now check the boolean and skip doing a lookup
in an empty table.
This was a relatively lightweight change to confirm the usefulness
of relocation data. The results were very positive.
The relatively superficial integration of the data into the data
analysis process causes some problems, e.g. the cross-reference table
entries show an offset because the code analyzer's computed operand
offset doesn't match the value of the label. The feature should be
considered experimental
The feature can be enabled or disabled with a project property. The
results were sufficiently useful and non-annoying to make the setting
enabled by default.
A "cooked" form of the relocation data is added to the project, for
use during data analysis.
Also, changed the data grids in the segment viewer to allow multi-
select, so users can copy & paste the contents.
We now put a code hint on the JML instruction in each jump table
entry. This is necessary to ensure that the target address is
recognized as code, since a dynamic segment won't otherwise be
referenced.
Also, fiddle with the note/comment formatting some more.
The GS/OS loader initializes the calls with JSLs to a loader entry
point, and replaces them with JMLs to code in dynamic segments when
the segments are loaded. Since we have all the segments loaded at
once, we can just rewrite them to be JMLs immediately.
Changed bank-start comments to notes, added a summary to the top-of-file
comment.
Also, fixed a bug where the app settings dialog wasn't identifying
display settings as a preset for 64tass and cc65.
Generate multiple .ORG directives for segments that span multiple
banks. Some assemblers don't like it when things cross. This is
pretty rare (Cryllan Mission is an example).
Conversion of OMF Load files to a data/project pair is generally
working. The 65816 source code generators need some work though.
Added generation of the relocation dictionary and constant body for
segments in Load files.
Also, don't reject files with v1 segments (whose length is specified
as a block count) just because the EOF isn't a multiple of 512 bytes.
Some executables don't pad out the last block.
Various tweaks to output formatting.
Added file type determination (Load, Object, Library). Requires
screening the segment and record types.
Also, fix parsing of v0 headers, which placed ORG and ALIGN in
different places.
Added generation of info/error messages to segment parser, which
are displayed in the main OMF viewer window.
Added segment viewer window, which opens when a segment entry in the
viewer list is double-clicked. Currently shows the "raw" header
fields, with place-holder UI for additional stuff.
Added "show undocumented opcodes" checkbox, so you can choose
whether or not to see them at all. (Issue #60)
Added formatter call for the instruction mnemonics so they get
capitalized when the app is configured for upper-case opcodes.
(Issue #59)
Fix a bug where the instruction chart and ASCII chart were writing
their modes to the same setting, stomping each other.
Also, pluralized a button in the file concatenator.
The tool allows you to cut a piece out of a file by specifying an
offset and a length. A pair of hex dumps helps you verify that the
positions are correct.
Also, minor cleanups elsewhere.
The "affected flags" constants were incorrect for BIT, BRK, COP,
RTI, XCE, and the undocmented instructions ANE, DCP, and SAX. The
constants are used for the changed-flag summary shown in the info
window and the instruction chart.
Of greater import: the status flag updater for BIT was incorrectly
marking N/V/C as indeterminate instead of N/V/Z. The undocmented
instructions ANE, DCP, and SAX were also incorrect.
The cycle counts shown in line comments are computed correctly, but
the counts shown in the info window and instruction chart were
displaying the full set of modifiers, ignoring the CPU type. That's
okay for the info window, which spells the modifiers out, though
it'd be better if the bits were explicitly marked as being applicable
to the current CPU or a different one.
This adds a window that displays all of the instructions for a
given CPU in a summary grid. Undocumented instructions are
included, but shown in grey italics.
Also, tweaked AppSettings to not mark itself as dirty if a "set"
operation doesn't actually change anything.
This converts the "problem list viewer" tool to a grid that appears
below the code list view when non-empty. Not all messages are
problems, so it's being renamed to "message list".
If it's a known function, apply basic numeric formatting to the
various fields. Primarily of value for the pathname and buffer
parameters, which are formatted as addresses.
Also, enable horizontal scrolling in the generic show-text dialog.
We were providing platform symbols to plugins through the PlatSym
list, which allowed them to find constants and well-known addresses.
We now pass all project symbols and user labels in as well. The
name "PlatSym" is no longer accurate, so the class has been renamed.
Also, added a bunch of things to the problem list viewer, and
added some more info to the Info panel.
Also, added a minor test to 2011-hinting that does not affect the
output (which is the point).
The analyzer sometimes runs into things that don't seem right, like
hidden labels or references to non-existent symbols, but has no way
to report them. This adds a problem viewer.
I'm not quite ready to turn this into a real feature, so for now it's
a free-floating window accessed from the debug menu.
Also, updated some documentation.
