; Copyright 2018 David Schmidt. All Rights Reserved.
; See the LICENSE.txt file for distribution terms (Apache 2.0).
;
; Adapted from Apple /// reference materials
;

*SYNOPSIS Symbols from hardware I/O areas

KBD             @ $C000 ;last key pressed (KA Data)
KBDBFLG         @ $C008 ;KB data
KBDSTRB         @ $C010 ;RW keyboard strobe
SPKR            @ $C030 ;RW toggle speaker (Apple II type)
SPKRIII         @ $C040 ;RW beeps speaker (Apple /// type)
CLRTEXTGR       @ $C050 ;Clear TEXT/GR mode
SETTEXTGR       @ $C051 ;Set TEXT/GR mode
CLRMIX          @ $C052 ;Clear MIX mode
SETMIX          @ $C053 ;Set MIX mode
CLRPAGE2        @ $C054 ;Clear PAGE2 mode
SETPAGE2        @ $C055 ;Set PAGE2 mode
CLRHIRES        @ $C056 ;Clear HIRES mode
SETHIRES        @ $C057 ;Set HIRES mode
CLRPDL0         @ $C058 ;Clear PDL0 (A/D Addr 0)
SETPDL0         @ $C059 ;Set PDL0 (A/D Addr 0)
CLRPDL2         @ $C05A ;Clear PDL2 (A/D Addr 2)
SETPDL2         @ $C05B ;Set PDL2 (A/D Addr 2)
CLRPDLEN        @ $C05C ;Clear PDLEN (A/D Ramp Start)
SETPDLEN        @ $C05D ;Set PDLEN (A/D Ramp Start)
CLRPDL1         @ $C05E ;Clear PDL1 (A/D Addr 1)
SETPDL1         @ $C05F ;Set PDL1 (A/D Addr 1)
READSW0         @ $C060 ;Read SW0
READSW1         @ $C061 ;Read SW1/MGNSW
READSW2         @ $C062 ;Read SW2
READSW3         @ $C063 ;Read SW3/SCO
JOYRDY          @ $C066 ;Read PDLOT (A/D Ramp Stop)
CLOCK           @ $C070 ;clock
PHASOFF         @ $C080 ;
PHASON          @ $C081 ;
MOTOROFF        @ $C088 ;
MOTORON         @ $C089 ;
DRV0EN          @ $C08A ;
DRV1EN          @ $C08B ;
Q6L             @ $C08C ;
Q6H             @ $C08D ;
Q7L             @ $C08E ;
CLRDSA0         @ $C0D0 ;Clear Drive Select A0
SETDSA0         @ $C0D1 ;Set Drive Select A0
CLRDSA1         @ $C0D2 ;Clear Drive Select A1
SETDSA1         @ $C0D3 ;Set Drive Select A1
CLREN1INT       @ $C0D4 ;
SETEN1INT       @ $C0D5 ;
CLRSIDE2        @ $C0D6 ;
SETSIDE2        @ $C0D7 ;
CLRSCR          @ $C0D8 ;Clear Smooth Scroll  (to turn smooth scroll off)
SETSCR          @ $C0D9 ;Set Smooth Scroll  (to turn smooth scroll on)
CLRENCWRT       @ $C0DA ;Clear Char Set writing
SETENCWRT       @ $C0DB ;Set Char Set writing
CLRENSEL        @ $C0DC ;Clear enable silentype port (ENSEL)
SETENSEL        @ $C0DD ;Set enable silentype port (ENSEL)
CLRENSIO        @ $C0DE ;Clear enable silentype port (ENSIO)
SETENSIO        @ $C0DF ;Set enable silentype port (ENSIO)
ACIADATA        @ $C0F0 ;ACIA DATA REGISTER
ACIASTAT        @ $C0F1 ;ACIA STATUS REGISTER
ACIACMD         @ $C0F2 ;ACIA COMMAND REGISTER
ACIACTL         @ $C0F3 ;ACIA CONTROL REGISTER

; Other hardware registers
Z_REG           @ $FFD0 ;zero page register
D_DDRB          @ $FFD2 ;data direction register B
D_DDRA          @ $FFD3 ;data direction register A
D_TIMER1C_L     @ $FFD4
D_TIMER1C_H     @ $FFD5
D_TIMER1L_L     @ $FFD6
D_TIMER1L_H     @ $FFD7
D_TIMER2C_L     @ $FFD8
D_TIMER2C_H     @ $FFD9
D_ACR           @ $FFDB
D_PCR           @ $FFDC
D_IFR           @ $FFDD
D_IER           @ $FFDE
E_REG           @ $FFDF ;environment register
E_IORB          @ $FFE0
E_DDRB          @ $FFE2
E_DDRA          @ $FFE3
E_TIMER1C_L     @ $FFE6
E_TIMER1C_H     @ $FFE7
E_TIMER1L_L     @ $FFE6
E_TIMER1L_H     @ $FFE7
E_TIMER2C_L     @ $FFE8
E_TIMER2C_H     @ $FFE9
E_ACR           @ $FFEB
E_PCR           @ $FFEC
E_IFR           @ $FFED
E_IER           @ $FFEE
B_REG           @ $FFEF ;bank switch register