mirror of
https://github.com/fadden/6502bench.git
synced 2024-11-19 06:31:02 +00:00
835c1c7fe2
During a discussion with the cc65 developers, I became convinced that generating "MVN $01,$02" is wrong, and "MVN #$01,#$02" is correct. 64tass, cc65, and Merlin 32 all accept this syntax; only ACME does not. Operands without a leading '#' should be treated as 24-bit values, and have the bank byte extracted. This change updates the on-screen display and assembled output to include the '#'. The ACME generator uses a Quirk to suppress the hash mark. (It doesn't currently accept values larger than 8 bits, so there's no ambiguity.)
292 lines
5.6 KiB
ArmAsm
292 lines
5.6 KiB
ArmAsm
;6502bench SourceGen v1.1.0-dev1
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org $1000
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sec
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xce
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jsr L101F
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jsr L10AB
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jsr L10F2
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jsr L1106
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jsr L1109
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jsr L112C
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jsr L11F9
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jsr L11FC
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nop
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nop
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nop
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brk
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dfb $80
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L101F dfb $01,$80
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cop $80
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ora $80,S
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tsb L0080
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ora L0080
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asl L0080
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dfb $07,$80
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php
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ora #$80
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asl A
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phd
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tsb: L0086
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ora: L0086
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asl: L0086
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oral L0089
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bpl L1041
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L1041 ora (L0080),y
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dfb $12,$80
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ora ($80,S),y
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trb L0080
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ora L0080,x
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asl L0080,x
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ora [L0080],y
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clc
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ora L0086,y
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inc A
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tcs
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trb: L0086
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ora: L0086,x
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asl: L0086,x
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oral L0089,x
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jsr L0086
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dfb $21,$80
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jsl L0089
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and $80,S
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bit L0080
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and L0080
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rol L0080
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dfb $27,$80
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plp
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and #$80
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rol A
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pld
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bit: L0086
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and: L0086
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rol: L0086
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andl L0089
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bmi L1089
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L1089 and (L0080),y
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dfb $32,$80
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and ($80,S),y
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bit L0080,x
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and L0080,x
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rol L0080,x
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and [L0080],y
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sec
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and L0086,y
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dec A
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tsc
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bit: L0086,x
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and: L0086,x
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rol: L0086,x
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andl L0089,x
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rti
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L10AB dfb $41,$80
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wdm $80
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eor $80,S
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mvp #$84,#$83
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eor L0080
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lsr L0080
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dfb $47,$80
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pha
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eor #$80
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lsr A
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phk
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jmp L10C2
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L10C2 eor: L0086
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lsr: L0086
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eorl L0089
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bvc L10CE
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L10CE eor (L0080),y
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dfb $52,$80
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eor ($80,S),y
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mvn #$84,#$83
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eor L0080,x
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lsr L0080,x
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eor [L0080],y
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cli
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eor L0086,y
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phy
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tcd
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jml L10E7
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L10E7 eor: L0086,x
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lsr: L0086,x
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eorl L0089,x
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rts
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L10F2 dfb $61,$80
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per $0ff6
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adc $80,S
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stz L0080
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adc L0080
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ror L0080
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dfb $67,$80
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pla
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adc #$80
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ror A
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rtl
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L1106 jmp (L0086)
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L1109 adc: L0086
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ror: L0086
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adcl L0089
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bvs L1115
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L1115 adc (L0080),y
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dfb $72,$80
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adc ($80,S),y
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stz L0080,x
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adc L0080,x
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ror L0080,x
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adc [L0080],y
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sei
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adc L0086,y
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ply
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tdc
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jmp (L0086,x)
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L112C adc: L0086,x
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ror: L0086,x
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adcl L0089,x
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bra L1138
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L1138 dfb $81,$80
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brl L113D
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L113D sta $80,S
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sty L0080
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sta L0080
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stx L0080
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dfb $87,$80
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dey
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bit #$80
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txa
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phb
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sty: L0086
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sta: L0086
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stx: L0086
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stal L0089
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bcc L115B
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L115B sta (L0080),y
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dfb $92,$80
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sta ($80,S),y
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dfb $94,$80
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sta L0080,x
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dfb $96,$80
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sta [L0080],y
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tya
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sta L0086,y
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txs
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txy
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stz: L0086
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sta: L0086,x
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stz: L0086,x
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stal L0089,x
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ldy #$80
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dfb $a1,$80
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ldx #$80
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lda $80,S
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ldy L0080
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lda L0080
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ldx L0080
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dfb $a7,$80
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tay
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lda #$80
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tax
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plb
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ldy: L0086
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lda: L0086
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ldx: L0086
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ldal L0089
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bcs L11A0
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L11A0 lda (L0080),y
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dfb $b2,$80
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lda ($80,S),y
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ldy L0080,x
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lda L0080,x
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ldx L0080,y
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lda [L0080],y
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clv
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lda L0086,y
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tsx
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tyx
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ldy: L0086,x
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lda: L0086,x
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ldx: L0086,y
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ldal L0089,x
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cpy #$80
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dfb $c1,$80
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rep #$00
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cmp $80,S
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cpy L0080
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cmp L0080
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dec L0080
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dfb $c7,$80
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iny
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cmp #$80
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dex
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wai
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cpy: L0086
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cmp: L0086
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dec: L0086
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cmpl L0089
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bne L11E5
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L11E5 cmp (L0080),y
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dfb $d2,$80
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cmp ($80,S),y
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dfb $d4,$80
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cmp L0080,x
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dec L0080,x
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cmp [L0080],y
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cld
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cmp L0086,y
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phx
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stp
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L11F9 jml [L0086]
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L11FC cmp: L0086,x
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dec: L0086,x
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cmpl L0089,x
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cpx #$80
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dfb $e1,$80
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sep #$00
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sbc $80,S
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cpx L0080
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sbc L0080
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inc L0080
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dfb $e7,$80
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inx
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sbc #$80
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nop
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xba
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cpx: L0086
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sbc: L0086
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inc: L0086
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sbcl L0089
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beq L122A
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L122A sbc (L0080),y
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dfb $f2,$80
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sbc ($80,S),y
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pea L0086
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sbc L0080,x
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inc L0080,x
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sbc [L0080],y
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sed
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sbc L0086,y
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plx
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xce
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jsr (L0086,x)
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sbc: L0086,x
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inc: L0086,x
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sbcl L0089,x
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org $0080
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L0080 bit L0082
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L0082 bit L0082
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bit L0082
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L0086 bit: L0086
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L0089 ldal L0089
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