mirror of
https://github.com/fadden/6502bench.git
synced 2024-11-18 15:06:07 +00:00
3ff0fbae34
The regression tests were written with the assumption that all cross assemblers would support 6502, 65C02, and 65816 code. There are a few that support 65816 partially (e.g. ACME) or not at all. To best support these, we need to split some of the tests into pieces, so that important 6502 tests aren't skipped simply because parts of the test also exercise 65816 code. The first step is to change the regression test naming scheme. The old system used 1xxx for tests without project files, and 2xxx for tests with project files. The new system uses 1xxxN / 2xxxN, where N indicates the CPU type: 0 for 6502, 1 for 65C02, and 2 for 65816. For the 1xxxN tests the new value determines which CPU is used, which allows us to move the "allops" 6502/65C02 tests into the no-project category. For 2xxxN it just allows the 6502 and 65816 versions to have the same base name and number. This change updates the first batch of tests. It involves minor changes to the test harness and a whole bunch of renaming.
285 lines
5.3 KiB
ArmAsm
285 lines
5.3 KiB
ArmAsm
org $1000
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sec
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xce
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jsr L101F
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jsr L10AB
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jsr L10F2
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jsr L1106
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jsr L1109
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jsr L112C
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jsr L11F9
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jsr L11FC
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nop
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nop
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nop
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brk
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dfb $00
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L101F ora ($00,x)
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cop $00
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ora $00,S
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tsb $00
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ora $00
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asl $00
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ora [$00]
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php
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ora #$00
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asl A
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phd
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tsb: $0000
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ora: $0000
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asl: $0000
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oral $000000
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bpl :L1041
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:L1041 ora ($00),y
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ora ($00)
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ora ($00,S),y
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trb $00
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ora $00,x
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asl $00,x
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ora [$00],y
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clc
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ora $0000,y
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inc A
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tcs
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trb: $0000
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ora: $0000,x
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asl: $0000,x
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oral $000000,x
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jsr $0000
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and ($00,x)
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jsl $000000
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and $00,S
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bit $00
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and $00
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rol $00
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and [$00]
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plp
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and #$00
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rol A
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pld
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bit: $0000
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and: $0000
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rol: $0000
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andl $000000
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bmi :L1089
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:L1089 and ($00),y
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and ($00)
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and ($00,S),y
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bit $00,x
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and $00,x
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rol $00,x
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and [$00],y
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sec
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and $0000,y
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dec A
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tsc
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bit: $0000,x
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and: $0000,x
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rol: $0000,x
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andl $000000,x
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rti
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L10AB eor ($00,x)
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wdm $00
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eor $00,S
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mvp #$00,#$00
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eor $00
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lsr $00
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eor [$00]
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pha
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eor #$00
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lsr A
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phk
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jmp :L10C2
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:L10C2 eor: $0000
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lsr: $0000
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eorl $000000
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bvc :L10CE
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:L10CE eor ($00),y
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eor ($00)
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eor ($00,S),y
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mvn #$00,#$00
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eor $00,x
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lsr $00,x
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eor [$00],y
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cli
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eor $0000,y
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phy
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tcd
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jml :L10E7
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:L10E7 eor: $0000,x
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lsr: $0000,x
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eorl $000000,x
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rts
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L10F2 adc ($00,x)
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per $0ff6
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adc $00,S
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stz $00
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adc $00
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ror $00
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adc [$00]
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pla
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adc #$00
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ror A
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rtl
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L1106 jmp ($0000)
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L1109 adc: $0000
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ror: $0000
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adcl $000000
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bvs :L1115
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:L1115 adc ($00),y
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adc ($00)
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adc ($00,S),y
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stz $00,x
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adc $00,x
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ror $00,x
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adc [$00],y
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sei
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adc $0000,y
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ply
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tdc
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jmp ($0000,x)
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L112C adc: $0000,x
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ror: $0000,x
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adcl $000000,x
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bra :L1138
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:L1138 sta ($00,x)
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brl :L113D
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:L113D sta $00,S
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sty $00
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sta $00
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stx $00
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sta [$00]
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dey
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bit #$00
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txa
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phb
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sty: $0000
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sta: $0000
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stx: $0000
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stal $000000
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bcc :L115B
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:L115B sta ($00),y
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sta ($00)
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sta ($00,S),y
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sty $00,x
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sta $00,x
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stx $00,y
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sta [$00],y
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tya
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sta $0000,y
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txs
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txy
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stz: $0000
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sta: $0000,x
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stz: $0000,x
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stal $000000,x
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ldy #$00
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lda ($00,x)
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ldx #$00
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lda $00,S
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ldy $00
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lda $00
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ldx $00
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lda [$00]
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tay
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lda #$00
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tax
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plb
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ldy: $0000
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lda: $0000
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ldx: $0000
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ldal $000000
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bcs :L11A0
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:L11A0 lda ($00),y
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lda ($00)
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lda ($00,S),y
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ldy $00,x
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lda $00,x
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ldx $00,y
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lda [$00],y
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clv
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lda $0000,y
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tsx
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tyx
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ldy: $0000,x
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lda: $0000,x
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ldx: $0000,y
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ldal $000000,x
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cpy #$00
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cmp ($00,x)
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rep #$00
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cmp $00,S
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cpy $00
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cmp $00
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dec $00
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cmp [$00]
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iny
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cmp #$00
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dex
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wai
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cpy: $0000
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cmp: $0000
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dec: $0000
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cmpl $000000
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bne :L11E5
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:L11E5 cmp ($00),y
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cmp ($00)
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cmp ($00,S),y
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pei ($00)
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cmp $00,x
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dec $00,x
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cmp [$00],y
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cld
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cmp $0000,y
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phx
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stp
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L11F9 jml [$0000]
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L11FC cmp: $0000,x
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dec: $0000,x
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cmpl $000000,x
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cpx #$00
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sbc ($00,x)
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sep #$00
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sbc $00,S
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cpx $00
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sbc $00
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inc $00
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sbc [$00]
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inx
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sbc #$00
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nop
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xba
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cpx: $0000
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sbc: $0000
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inc: $0000
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sbcl $000000
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beq :L122A
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:L122A sbc ($00),y
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sbc ($00)
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sbc ($00,S),y
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pea $0000
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sbc $00,x
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inc $00,x
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sbc [$00],y
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sed
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sbc $0000,y
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plx
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xce
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jsr ($0000,x)
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sbc: $0000,x
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inc: $0000,x
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sbcl $000000,x
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