mirror of
https://github.com/fadden/6502bench.git
synced 2024-08-19 20:29:36 +00:00
387b50d827
Added support for "relative" address regions to the Merlin 32 and cc65 code generators. These generate "flat" address directives, and so were a little more complicated. Suppressed generation of relative operands for non-addressable regions. Also, tweaked the 20250-nested-regions test to include a negative relative region offset.
98 lines
1.6 KiB
ArmAsm
98 lines
1.6 KiB
ArmAsm
!cpu 6502
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* = $0000
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!word $3000 ;load address
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!pseudopc $1000 {
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!pseudopc *+$1000 {
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!pseudopc *+$1000 {
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L3000 bit L3000
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@L3003 lda @L3003
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and @LE003
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jmp @L200C
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}
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@L200C bit @L200C
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jmp @L1012
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}
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@L1012 bit @L1012
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jsr @L4000
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!pseudopc $0000 {
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!byte $00
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!pet "Null-term PETSCII string",$00
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!byte $80
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!word @L3003
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!word @LE003
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!byte $80
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}
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!pseudopc $4000 {
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@L4000 bit @L4000
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bit @L5000
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bit @L500F
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bit @L500F
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nop
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jmp @L4020
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!pseudopc $5000 {
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@L5000 bit @L5000
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bit @L4000
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nop
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nop
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@L5008 bit @L5008
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bit @L5017
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nop
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@L500F rts
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}
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@L4020 bit @L4020
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bit @L500F
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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jmp @L4040
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!pseudopc $5008 {
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@L5008_0 bit @L5008_0
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bit @L5000
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nop
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@L500F_0 bit @L500F_0
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nop
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nop
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nop
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nop
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nop
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@L5017 rts
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}
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@L4040 bit @L4040
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bit @L5017
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nop
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jmp @LE000
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}
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!pseudopc *+$cf7e {
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@LE000 bit @L200C
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@LE003 nop
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jmp @LD000
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!pseudopc *-$1007 {
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@LD000 bit @LD000
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jmp @LF000
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!pseudopc $f000 {
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@LF000 bit @LF000
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lda @L3003
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and @LE003
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nop
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rts
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}
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}
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}
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}
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