mirror of
https://github.com/fadden/6502bench.git
synced 2024-06-30 06:29:32 +00:00
39b7b20144
This is the first step toward changing the address region map from a linear list to a hierarchy. See issue #107 for the plan. The AddressMap class has been rewritten to support the new approach. The rest of the project has been updated to conform to the new API, but feature-wise is unchanged. While the map class supports nested regions with explicit lengths, the rest of the application still assumes a series of non-overlapping regions with "floating" lengths. The Set Address dialog is currently non-functional. All of the output for cc65 changed because generation of segment comments has been removed. Some of the output for ACME changed as well, because we no longer follow "* = addr" with a redundant pseudopc statement. ACME and 65tass have similar approaches to placing things in memory, and so now have similar implementations.
297 lines
6.1 KiB
ArmAsm
297 lines
6.1 KiB
ArmAsm
.setcpu "6502X"
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.org $1000
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jsr L1035
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jsr L1038
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jsr L1059
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jsr L107D
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jsr L109E
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jsr L10BD
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jsr L10C0
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jsr L10E1
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jsr L1100
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jsr L1103
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jsr L1116
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jsr L1124
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jsr L1169
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jsr L11AE
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jsr L11F3
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jsr L1238
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nop
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nop
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nop
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brk
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.byte $ff
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L1035: ora ($ff,x)
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jam
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L1038: slo ($ff,x)
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.byte $04,$ff
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ora $ff
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asl $ff
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slo $ff
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php
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ora #$ff
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asl A
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anc #$ff
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.byte $0c,$ff,$fe
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ora $feff
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asl $feff
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slo $feff
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bpl @L1056
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@L1056: ora ($ff),y
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.byte $12
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L1059: slo ($ff),y
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.byte $14,$ff
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ora $ff,x
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asl $ff,x
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slo $ff,x
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clc
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ora $feff,y
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.byte $1a
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slo $feff,y
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.byte $1c,$ff,$fe
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ora $feff,x
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asl $feff,x
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slo $feff,x
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jsr $feff
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and ($ff,x)
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.byte $22
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L107D: rla ($ff,x)
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bit $ff
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and $ff
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rol $ff
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rla $ff
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plp
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and #$ff
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rol A
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.byte $2b,$ff
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bit $feff
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and $feff
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rol $feff
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rla $feff
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bmi @L109B
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@L109B: and ($ff),y
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.byte $32
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L109E: rla ($ff),y
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.byte $34,$ff
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and $ff,x
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rol $ff,x
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rla $ff,x
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sec
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and $feff,y
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.byte $3a
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rla $feff,y
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.byte $3c,$ff,$fe
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and $feff,x
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rol $feff,x
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rla $feff,x
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rti
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L10BD: eor ($ff,x)
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.byte $42
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L10C0: sre ($ff,x)
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.byte $44,$ff
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eor $ff
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lsr $ff
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sre $ff
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pha
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eor #$ff
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lsr A
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alr #$ff
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jmp @L10D3
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@L10D3: eor $feff
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lsr $feff
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sre $feff
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bvc @L10DE
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@L10DE: eor ($ff),y
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.byte $52
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L10E1: sre ($ff),y
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.byte $54,$ff
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eor $ff,x
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lsr $ff,x
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sre $ff,x
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cli
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eor $feff,y
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.byte $5a
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sre $feff,y
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.byte $5c,$ff,$fe
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eor $feff,x
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lsr $feff,x
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sre $feff,x
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rts
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L1100: adc ($ff,x)
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.byte $62
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L1103: rra ($ff,x)
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.byte $64,$ff
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adc $ff
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ror $ff
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rra $ff
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pla
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adc #$ff
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ror A
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arr #$ff
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jmp ($feff)
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L1116: adc $feff
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ror $feff
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rra $feff
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bvs @L1121
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@L1121: adc ($ff),y
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.byte $72
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L1124: rra ($ff),y
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.byte $74,$ff
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adc $ff,x
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ror $ff,x
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rra $ff,x
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sei
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adc $feff,y
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.byte $7a
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rra $feff,y
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.byte $7c,$ff,$fe
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adc $feff,x
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ror $feff,x
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rra $feff,x
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.byte $80,$ff
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sta ($ff,x)
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.byte $82,$ff
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sax ($ff,x)
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sty $ff
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sta $ff
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stx $ff
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sax $ff
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dey
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.byte $89,$ff
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txa
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ane #$ff
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sty $feff
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sta $feff
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stx $feff
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sax $feff
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bcc @L1166
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@L1166: sta ($ff),y
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.byte $92
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L1169: sha ($ff),y
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sty $ff,x
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sta $ff,x
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stx $ff,y
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sax $ff,y
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tya
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sta $feff,y
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txs
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tas $feff,y
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shy $feff,x
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sta $feff,x
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shx $feff,y
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sha $feff,y
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ldy #$ff
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lda ($ff,x)
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ldx #$ff
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lax ($ff,x)
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ldy $ff
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lda $ff
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ldx $ff
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lax $ff
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tay
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lda #$ff
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tax
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lax #$ff
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ldy $feff
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lda $feff
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ldx $feff
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lax $feff
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bcs @L11AB
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@L11AB: lda ($ff),y
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.byte $b2
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L11AE: lax ($ff),y
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ldy $ff,x
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lda $ff,x
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ldx $ff,y
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lax $ff,y
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clv
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lda $feff,y
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tsx
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las $feff,y
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ldy $feff,x
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lda $feff,x
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ldx $feff,y
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lax $feff,y
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cpy #$ff
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cmp ($ff,x)
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.byte $c2,$ff
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dcp ($ff,x)
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cpy $ff
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cmp $ff
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dec $ff
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dcp $ff
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iny
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cmp #$ff
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dex
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axs #$ff
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cpy $feff
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cmp $feff
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dec $feff
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dcp $feff
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bne @L11F0
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@L11F0: cmp ($ff),y
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.byte $d2
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L11F3: dcp ($ff),y
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.byte $d4,$ff
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cmp $ff,x
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dec $ff,x
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dcp $ff,x
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cld
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cmp $feff,y
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.byte $da
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dcp $feff,y
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.byte $dc,$ff,$fe
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cmp $feff,x
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dec $feff,x
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dcp $feff,x
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cpx #$ff
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sbc ($ff,x)
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.byte $e2,$ff
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isc ($ff,x)
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cpx $ff
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sbc $ff
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inc $ff
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isc $ff
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inx
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sbc #$ff
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nop
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.byte $eb,$ff
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cpx $feff
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sbc $feff
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inc $feff
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isc $feff
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beq @L1235
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@L1235: sbc ($ff),y
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.byte $f2
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L1238: isc ($ff),y
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.byte $f4,$ff
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sbc $ff,x
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inc $ff,x
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isc $ff,x
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sed
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sbc $feff,y
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.byte $fa
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isc $feff,y
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.byte $fc,$ff,$fe
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sbc $feff,x
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inc $feff,x
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isc $feff,x
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