mirror of
https://github.com/fadden/6502bench.git
synced 2024-06-30 06:29:32 +00:00
39b7b20144
This is the first step toward changing the address region map from a linear list to a hierarchy. See issue #107 for the plan. The AddressMap class has been rewritten to support the new approach. The rest of the project has been updated to conform to the new API, but feature-wise is unchanged. While the map class supports nested regions with explicit lengths, the rest of the application still assumes a series of non-overlapping regions with "floating" lengths. The Set Address dialog is currently non-functional. All of the output for cc65 changed because generation of segment comments has been removed. Some of the output for ACME changed as well, because we no longer follow "* = addr" with a redundant pseudopc statement. ACME and 65tass have similar approaches to placing things in memory, and so now have similar implementations.
288 lines
5.8 KiB
ArmAsm
288 lines
5.8 KiB
ArmAsm
.setcpu "65816"
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.org $1000
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.a8
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.i8
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sec
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xce
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jsr L101F
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jsr L10AB
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jsr L10F2
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jsr L1106
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jsr L1109
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jsr L112C
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jsr L11F9
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jsr L11FC
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nop
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nop
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nop
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brk
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.byte $ff
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L101F: ora ($ff,x)
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cop $ff
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ora $ff,S
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tsb $ff
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ora $ff
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asl $ff
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ora [$ff]
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php
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ora #$ff
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asl A
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phd
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tsb $feff
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ora $feff
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asl $feff
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ora $fdfeff
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bpl @L1041
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@L1041: ora ($ff),y
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ora ($ff)
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ora ($ff,S),y
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trb $ff
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ora $ff,x
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asl $ff,x
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ora [$ff],y
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clc
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ora $feff,y
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inc A
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tcs
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trb $feff
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ora $feff,x
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asl $feff,x
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ora $fdfeff,x
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jsr $feff
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and ($ff,x)
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jsl $fdfeff
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and $ff,S
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bit $ff
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and $ff
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rol $ff
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and [$ff]
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plp
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and #$ff
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rol A
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pld
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bit $feff
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and $feff
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rol $feff
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and $fdfeff
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bmi @L1089
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@L1089: and ($ff),y
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and ($ff)
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and ($ff,S),y
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bit $ff,x
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and $ff,x
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rol $ff,x
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and [$ff],y
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sec
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and $feff,y
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dec A
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tsc
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bit $feff,x
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and $feff,x
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rol $feff,x
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and $fdfeff,x
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rti
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L10AB: eor ($ff,x)
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wdm $ff
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eor $ff,S
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mvp #$fe,#$ff
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eor $ff
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lsr $ff
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eor [$ff]
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pha
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eor #$ff
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lsr A
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phk
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jmp @L10C2
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@L10C2: eor $feff
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lsr $feff
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eor $fdfeff
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bvc @L10CE
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@L10CE: eor ($ff),y
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eor ($ff)
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eor ($ff,S),y
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mvn #$fe,#$ff
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eor $ff,x
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lsr $ff,x
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eor [$ff],y
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cli
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eor $feff,y
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phy
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tcd
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jml @L10E7
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@L10E7: eor $feff,x
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lsr $feff,x
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eor $fdfeff,x
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rts
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L10F2: adc ($ff,x)
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per $0ff6
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adc $ff,S
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stz $ff
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adc $ff
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ror $ff
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adc [$ff]
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pla
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adc #$ff
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ror A
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rtl
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L1106: jmp ($feff)
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L1109: adc $feff
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ror $feff
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adc $fdfeff
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bvs @L1115
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@L1115: adc ($ff),y
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adc ($ff)
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adc ($ff,S),y
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stz $ff,x
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adc $ff,x
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ror $ff,x
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adc [$ff],y
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sei
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adc $feff,y
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ply
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tdc
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jmp ($feff,x)
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L112C: adc $feff,x
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ror $feff,x
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adc $fdfeff,x
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bra @L1138
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@L1138: sta ($ff,x)
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brl @L113D
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@L113D: sta $ff,S
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sty $ff
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sta $ff
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stx $ff
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sta [$ff]
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dey
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bit #$ff
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txa
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phb
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sty $feff
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sta $feff
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stx $feff
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sta $fdfeff
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bcc @L115B
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@L115B: sta ($ff),y
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sta ($ff)
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sta ($ff,S),y
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sty $ff,x
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sta $ff,x
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stx $ff,y
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sta [$ff],y
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tya
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sta $feff,y
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txs
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txy
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stz $feff
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sta $feff,x
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stz $feff,x
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sta $fdfeff,x
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ldy #$ff
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lda ($ff,x)
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ldx #$ff
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lda $ff,S
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ldy $ff
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lda $ff
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ldx $ff
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lda [$ff]
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tay
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lda #$ff
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tax
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plb
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ldy $feff
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lda $feff
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ldx $feff
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lda $fdfeff
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bcs @L11A0
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@L11A0: lda ($ff),y
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lda ($ff)
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lda ($ff,S),y
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ldy $ff,x
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lda $ff,x
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ldx $ff,y
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lda [$ff],y
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clv
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lda $feff,y
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tsx
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tyx
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ldy $feff,x
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lda $feff,x
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ldx $feff,y
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lda $fdfeff,x
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cpy #$ff
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cmp ($ff,x)
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rep #$00
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cmp $ff,S
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cpy $ff
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cmp $ff
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dec $ff
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cmp [$ff]
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iny
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cmp #$ff
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dex
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wai
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cpy $feff
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cmp $feff
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dec $feff
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cmp $fdfeff
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bne @L11E5
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@L11E5: cmp ($ff),y
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cmp ($ff)
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cmp ($ff,S),y
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pei ($ff)
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cmp $ff,x
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dec $ff,x
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cmp [$ff],y
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cld
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cmp $feff,y
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phx
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stp
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L11F9: jml [$feff]
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L11FC: cmp $feff,x
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dec $feff,x
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cmp $fdfeff,x
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cpx #$ff
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sbc ($ff,x)
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sep #$00
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sbc $ff,S
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cpx $ff
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sbc $ff
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inc $ff
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sbc [$ff]
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inx
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sbc #$ff
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nop
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xba
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cpx $feff
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sbc $feff
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inc $feff
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sbc $fdfeff
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beq @L122A
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@L122A: sbc ($ff),y
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sbc ($ff)
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sbc ($ff,S),y
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pea $feff
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sbc $ff,x
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inc $ff,x
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sbc [$ff],y
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sed
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sbc $feff,y
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plx
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xce
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jsr ($feff,x)
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sbc $feff,x
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inc $feff,x
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sbc $fdfeff,x
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