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18e6951f17
On the 65816, 16-bit data access instructions (e.g. LDA abs) are expanded to 24 bits by merging in the Data Bank Register (B). The value of the register is difficult to determine via static analysis, so we need a way to annotate the disassembly with the correct value. Without this, the mapping of address to file offset will sometimes be incorrect. This change adds the basic data structures and "fixup" function, a functional but incomplete editor, and source for a new test case.
107 lines
2.0 KiB
ArmAsm
107 lines
2.0 KiB
ArmAsm
; Copyright 2020 faddenSoft. All Rights Reserved.
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; See the LICENSE.txt file for distribution terms (Apache 2.0).
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;
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; Assembler: Merlin 32
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org $1000
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start
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clc
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xce
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sep #$30
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mx %11
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lda start
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lda bank2
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phk
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plb
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lda start
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lda bank2
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lda #$02
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pha
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plb ;EDIT: set DBR=$02
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lda start
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lda bank2
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lda #$08
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pha
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plb ;EDIT: set DBR=$08
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jsl bank2
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lda #$02
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pha
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plb ;EDIT: set DBR=$02
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jsl bank3
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phk
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plb
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bit start
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jml alldone
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code2bz
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dw snippet ;EDIT: format as 16-bit address
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snippet rts
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code2zero
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adr code2b ;EDIT: format as 24-bit address
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org $022000
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bank2
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ldal bank2 ;EDIT: set DBR=$08
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ldx #$00
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jsr code2a
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jsr :call2bz
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jsr :call2zero
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nop
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lda #$03
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pha
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plb ;EDIT: set DBR=$03
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lda bank3dat
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rtl
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:call2bz
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jmp (code2bz) ;source/target in bank 0
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:call2zero
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jmp [code2zero] ;source in bank 0
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code2a
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jmp (bank2addr,x) ;both addresses formed with K
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code2b
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nop
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rts
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bank2addr
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dw code2b
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org $033000
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bank3
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ldal bank3 ;EDIT: set DBR=$02
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jsr :post_plb
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beq :skip_mayhem
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; Test PHK/PLB with an address shift in the middle. Not really something
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; that should ever happen, but we need to handle everything.
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phk
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org $033020 ;EDIT: set address
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:post_plb
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plb
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:self nop
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bra :skip_mayhem
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:skip_mayhem
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lda bank2addr
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rtl
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bank3dat
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dw bank3dat
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alldone rts
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