mirror of
https://github.com/fadden/6502bench.git
synced 2024-11-05 06:04:36 +00:00
85 lines
4.2 KiB
Plaintext
85 lines
4.2 KiB
Plaintext
; Copyright 2018 faddenSoft. All Rights Reserved.
|
|
; See the LICENSE.txt file for distribution terms (Apache 2.0).
|
|
;
|
|
; Adapted from various online references. Comments are most directly from
|
|
; http://www.classic-games.com/atari2600/specs.html
|
|
|
|
*SYNOPSIS Atari 2600 (VCS) registers and constants
|
|
|
|
; TIA write registers
|
|
VSYNC @ $00 ;W 0000 00x0 Vertical Sync Set-Clear
|
|
VBLANK @ $01 ;W xx00 00x0 Vertical Blank Set-Clear
|
|
WSYNC @ $02 ;W ---- ---- Wait for Horizontal Blank
|
|
RSYNC @ $03 ;W ---- ---- Reset Horizontal Sync Counter
|
|
NUSIZ0 @ $04 ;W 00xx 0xxx Number-Size player/missle 0
|
|
NUSIZ1 @ $05 ;W 00xx 0xxx Number-Size player/missle 1
|
|
COLUP0 @ $06 ;W xxxx xxx0 Color-Luminance Player 0
|
|
COLUP1 @ $07 ;W xxxx xxx0 Color-Luminance Player 1
|
|
COLUPF @ $08 ;W xxxx xxx0 Color-Luminance Playfield
|
|
COLUBK @ $09 ;W xxxx xxx0 Color-Luminance Background
|
|
CTRLPF @ $0a ;W 00xx 0xxx Control Playfield, Ball, Collisions
|
|
REFP0 @ $0b ;W 0000 x000 Reflection Player 0
|
|
REFP1 @ $0c ;W 0000 x000 Reflection Player 1
|
|
PF0 @ $0d ;W xxxx 0000 Playfield Register Byte 0
|
|
PF1 @ $0e ;W xxxx xxxx Playfield Register Byte 1
|
|
PF2 @ $0f ;W xxxx xxxx Playfield Register Byte 2
|
|
RESP0 @ $10 ;W ---- ---- Reset Player 0
|
|
RESP1 @ $11 ;W ---- ---- Reset Player 1
|
|
RESM0 @ $12 ;W ---- ---- Reset Missle 0
|
|
RESM1 @ $13 ;W ---- ---- Reset Missle 1
|
|
RESBL @ $14 ;W ---- ---- Reset Ball
|
|
AUDC0 @ $15 ;W 0000 xxxx Audio Control 0
|
|
AUDC1 @ $16 ;W 0000 xxxx Audio Control 1
|
|
AUDF0 @ $17 ;W 000x xxxx Audio Frequency 0
|
|
AUDF1 @ $18 ;W 000x xxxx Audio Frequency 1
|
|
AUDV0 @ $19 ;W 0000 xxxx Audio Volume 0
|
|
AUDV1 @ $1a ;W 0000 xxxx Audio Volume 1
|
|
GRP0 @ $1b ;W xxxx xxxx Graphics Register Player 0
|
|
GRP1 @ $1c ;W xxxx xxxx Graphics Register Player 1
|
|
ENAM0 @ $1d ;W 0000 00x0 Graphics Enable Missle 0
|
|
ENAM1 @ $1e ;W 0000 00x0 Graphics Enable Missle 1
|
|
ENABL @ $1f ;W 0000 00x0 Graphics Enable Ball
|
|
HMP0 @ $20 ;W xxxx 0000 Horizontal Motion Player 0
|
|
HMP1 @ $21 ;W xxxx 0000 Horizontal Motion Player 1
|
|
HMM0 @ $22 ;W xxxx 0000 Horizontal Motion Missle 0
|
|
HMM1 @ $23 ;W xxxx 0000 Horizontal Motion Missle 1
|
|
HMBL @ $24 ;W xxxx 0000 Horizontal Motion Ball
|
|
VDELP0 @ $25 ;W 0000 000x Vertical Delay Player 0
|
|
VDELP1 @ $26 ;W 0000 000x Vertical Delay Player 1
|
|
VDELBL @ $27 ;W 0000 000x Vertical Delay Ball
|
|
RESMP0 @ $28 ;W 0000 00x0 Reset Missle 0 to Player 0
|
|
RESMP1 @ $29 ;W 0000 00x0 Reset Missle 1 to Player 1
|
|
HMOVE @ $2a ;W ---- ---- Apply Horizontal Motion
|
|
HMCLR @ $2b ;W ---- ---- Clear Horizontal Move Registers
|
|
CXCLR @ $2c ;W ---- ---- Clear Collision Latches
|
|
|
|
; TIA read registers. The actual values are $0-d, but only 4 bits of the
|
|
; address are used on the hardware. I'm using $3x because that's what
|
|
; Adventure did, but it might be necessary to fiddle with this.
|
|
CXM0P @ $30 ;R xx00 0000 Read Collision M0-P1 M0-P0
|
|
CXM1P @ $31 ;R xx00 0000 Read Collision M1-P0 M1-P1
|
|
CXP0FB @ $32 ;R xx00 0000 Read Collision P0-PF P0-BL
|
|
CXP1FB @ $33 ;R xx00 0000 Read Collision P1-PF P1-BL
|
|
CXM0FB @ $34 ;R xx00 0000 Read Collision M0-PF M0-BL
|
|
CXM1FB @ $35 ;R xx00 0000 Read Collision M1-PF M1-BL
|
|
CXBLPF @ $36 ;R x000 0000 Read Collision BL-PF -----
|
|
CXPPMM @ $37 ;R xx00 0000 Read Collision P0-P1 M0-M1
|
|
INPT0 @ $38 ;R x000 0000 Read Pot Port 0
|
|
INPT1 @ $39 ;R x000 0000 Read Pot Port 1
|
|
INPT2 @ $3a ;R x000 0000 Read Pot Port 2
|
|
INPT3 @ $3b ;R x000 0000 Read Pot Port 3
|
|
INPT4 @ $3c ;R x000 0000 Read Input (Trigger) 0
|
|
INPT5 @ $3d ;R x000 0000 Read Input (Trigger) 1
|
|
|
|
; PIA/RIOT (6532) registers
|
|
SWCHA @ $280 ;Port A data register (joysticks...)
|
|
SWACNT @ $281 ;Port A data direction register (DDR)
|
|
SWCHB @ $282 ;Port B data (console switches)
|
|
SWBCNT @ $283 ;Port B DDR
|
|
INTIM @ $284 ;Timer output
|
|
|
|
TIM1T @ $294 ;set 1 clock interval
|
|
TIM8T @ $295 ;set 8 clock interval
|
|
TIM64T @ $296 ;set 64 clock interval
|
|
T1024T @ $297 ;set 1024 clock interval
|