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6502bench/SourceGen/SGTestData/Expected/20250-nested-regions_64tass.S
Andy McFadden e8608770b9 ORG rework, part 7
Implemented "is relative" flag.  This only affects source code
generation, replacing ".arstart <addr>" with ".arstart *+<value>".
Only output by 64tass and ACME generators.

Added a bold-text summary to radio buttons in address region edit
dialog.  This makes it much easier to see what you're doing.  Added
a warning to the label edit dialog when a label is being placed in
a non-addressable region.

Modified double-click behavior for .arstart/.arend to jump to the
other end when the opcode is clicked on.  This matches the behavior
of instructions with address operands.

Reordered Actions menu, putting "edit operand" at the top.

Fixed AddressMap entry collision testing.
Fixed PRG issue with multiple address regions at offset +000002.

Added regression tests.  Most of the complicated stuff with regions
is tested by unit tests inside AddressMap, but we still need to
exercise nested region code generation.
2021-10-02 15:43:41 -07:00

98 lines
1.6 KiB
ArmAsm

.cpu "6502"
* = $0000
.word $3000 ;load address
.logical $1000
.logical *+$1000
.logical *+$1000
L3000 bit L3000
_L3003 lda _L3003
and _LD003
jmp _L200C
.here
_L200C bit _L200C
jmp _L1012
.here
_L1012 bit _L1012
jsr _L4000
.logical $0000
.byte $00
.null "Null-term PETSCII string"
.byte $80
.word _L3003
.word _LD003
.byte $80
.here
.logical $4000
_L4000 bit _L4000
bit _L5000
bit _L500F
bit _L500F
nop
jmp _L4020
.logical $5000
_L5000 bit _L5000
bit _L4000
nop
nop
_L5008 bit _L5008
bit _L5017
nop
_L500F rts
.here
_L4020 bit _L4020
bit _L500F
nop
nop
nop
nop
nop
nop
nop
jmp _L4040
.logical $5008
_L5008_0 bit _L5008_0
bit _L5000
nop
_L500F_0 bit _L500F_0
nop
nop
nop
nop
nop
_L5017 rts
.here
_L4040 bit _L4040
bit _L5017
nop
jmp _LD000
.here
.logical *+$bf7e
_LD000 bit _L200C
_LD003 nop
jmp _LE000
.logical $e000
_LE000 bit _LE000
jmp _LF000
.logical $f000
_LF000 bit _LF000
lda _L3003
and _LD003
nop
rts
.here
.here
.here
.here