mirror of
https://github.com/fadden/6502bench.git
synced 2024-07-04 01:29:34 +00:00
3ff0fbae34
The regression tests were written with the assumption that all cross assemblers would support 6502, 65C02, and 65816 code. There are a few that support 65816 partially (e.g. ACME) or not at all. To best support these, we need to split some of the tests into pieces, so that important 6502 tests aren't skipped simply because parts of the test also exercise 65816 code. The first step is to change the regression test naming scheme. The old system used 1xxx for tests without project files, and 2xxx for tests with project files. The new system uses 1xxxN / 2xxxN, where N indicates the CPU type: 0 for 6502, 1 for 65C02, and 2 for 65816. For the 1xxxN tests the new value determines which CPU is used, which allows us to move the "allops" 6502/65C02 tests into the no-project category. For 2xxxN it just allows the 6502 and 65816 versions to have the same base name and number. This change updates the first batch of tests. It involves minor changes to the test harness and a whole bunch of renaming.
296 lines
5.8 KiB
ArmAsm
296 lines
5.8 KiB
ArmAsm
org $1000
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jsr L1035
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jsr L1038
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jsr L1059
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jsr L107D
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jsr L109E
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jsr L10BD
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jsr L10C0
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jsr L10E1
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jsr L1100
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jsr L1103
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jsr L1116
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jsr L1124
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jsr L1169
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jsr L11AE
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jsr L11F3
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jsr L1238
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nop
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nop
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nop
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brk
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dfb $00
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L1035 ora ($00,x)
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dfb $02
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L1038 dfb $03,$00
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dfb $04,$00
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ora $00
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asl $00
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dfb $07,$00
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php
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ora #$00
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asl A
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dfb $0b,$00
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dfb $0c,$00,$00
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ora: $0000
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asl: $0000
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dfb $0f,$00,$00
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bpl :L1056
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:L1056 ora ($00),y
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dfb $12
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L1059 dfb $13,$00
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dfb $14,$00
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ora $00,x
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asl $00,x
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dfb $17,$00
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clc
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ora $0000,y
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dfb $1a
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dfb $1b,$00,$00
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dfb $1c,$00,$00
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ora: $0000,x
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asl: $0000,x
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dfb $1f,$00,$00
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jsr $0000
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and ($00,x)
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dfb $22
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L107D dfb $23,$00
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bit $00
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and $00
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rol $00
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dfb $27,$00
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plp
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and #$00
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rol A
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dfb $2b,$00
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bit: $0000
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and: $0000
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rol: $0000
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dfb $2f,$00,$00
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bmi :L109B
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:L109B and ($00),y
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dfb $32
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L109E dfb $33,$00
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dfb $34,$00
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and $00,x
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rol $00,x
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dfb $37,$00
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sec
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and $0000,y
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dfb $3a
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dfb $3b,$00,$00
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dfb $3c,$00,$00
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and: $0000,x
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rol: $0000,x
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dfb $3f,$00,$00
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rti
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L10BD eor ($00,x)
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dfb $42
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L10C0 dfb $43,$00
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dfb $44,$00
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eor $00
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lsr $00
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dfb $47,$00
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pha
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eor #$00
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lsr A
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dfb $4b,$00
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jmp :L10D3
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:L10D3 eor: $0000
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lsr: $0000
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dfb $4f,$00,$00
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bvc :L10DE
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:L10DE eor ($00),y
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dfb $52
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L10E1 dfb $53,$00
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dfb $54,$00
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eor $00,x
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lsr $00,x
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dfb $57,$00
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cli
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eor $0000,y
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dfb $5a
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dfb $5b,$00,$00
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dfb $5c,$00,$00
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eor: $0000,x
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lsr: $0000,x
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dfb $5f,$00,$00
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rts
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L1100 adc ($00,x)
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dfb $62
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L1103 dfb $63,$00
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dfb $64,$00
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adc $00
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ror $00
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dfb $67,$00
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pla
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adc #$00
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ror A
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dfb $6b,$00
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jmp ($0000)
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L1116 adc: $0000
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ror: $0000
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dfb $6f,$00,$00
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bvs :L1121
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:L1121 adc ($00),y
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dfb $72
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L1124 dfb $73,$00
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dfb $74,$00
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adc $00,x
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ror $00,x
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dfb $77,$00
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sei
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adc $0000,y
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dfb $7a
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dfb $7b,$00,$00
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dfb $7c,$00,$00
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adc: $0000,x
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ror: $0000,x
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dfb $7f,$00,$00
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dfb $80,$00
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sta ($00,x)
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dfb $82,$00
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dfb $83,$00
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sty $00
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sta $00
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stx $00
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dfb $87,$00
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dey
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dfb $89,$00
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txa
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dfb $8b,$00
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sty: $0000
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sta: $0000
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stx: $0000
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dfb $8f,$00,$00
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bcc :L1166
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:L1166 sta ($00),y
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dfb $92
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L1169 dfb $93,$00
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sty $00,x
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sta $00,x
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stx $00,y
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dfb $97,$00
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tya
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sta $0000,y
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txs
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dfb $9b,$00,$00
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dfb $9c,$00,$00
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sta: $0000,x
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dfb $9e,$00,$00
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dfb $9f,$00,$00
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ldy #$00
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lda ($00,x)
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ldx #$00
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dfb $a3,$00
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ldy $00
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lda $00
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ldx $00
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dfb $a7,$00
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tay
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lda #$00
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tax
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dfb $ab,$00
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ldy: $0000
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lda: $0000
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ldx: $0000
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dfb $af,$00,$00
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bcs :L11AB
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:L11AB lda ($00),y
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dfb $b2
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L11AE dfb $b3,$00
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ldy $00,x
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lda $00,x
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ldx $00,y
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dfb $b7,$00
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clv
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lda $0000,y
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tsx
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dfb $bb,$00,$00
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ldy: $0000,x
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lda: $0000,x
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ldx: $0000,y
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dfb $bf,$00,$00
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cpy #$00
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cmp ($00,x)
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dfb $c2,$00
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dfb $c3,$00
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cpy $00
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cmp $00
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dec $00
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dfb $c7,$00
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iny
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cmp #$00
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dex
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dfb $cb,$00
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cpy: $0000
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cmp: $0000
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dec: $0000
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dfb $cf,$00,$00
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bne :L11F0
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:L11F0 cmp ($00),y
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dfb $d2
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L11F3 dfb $d3,$00
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dfb $d4,$00
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cmp $00,x
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dec $00,x
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dfb $d7,$00
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cld
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cmp $0000,y
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dfb $da
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dfb $db,$00,$00
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dfb $dc,$00,$00
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cmp: $0000,x
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dec: $0000,x
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dfb $df,$00,$00
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cpx #$00
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sbc ($00,x)
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dfb $e2,$00
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dfb $e3,$00
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cpx $00
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sbc $00
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inc $00
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dfb $e7,$00
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inx
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sbc #$00
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nop
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dfb $eb,$00
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cpx: $0000
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sbc: $0000
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inc: $0000
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dfb $ef,$00,$00
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beq :L1235
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:L1235 sbc ($00),y
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dfb $f2
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L1238 dfb $f3,$00
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dfb $f4,$00
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sbc $00,x
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inc $00,x
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dfb $f7,$00
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sed
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sbc $0000,y
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dfb $fa
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dfb $fb,$00,$00
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dfb $fc,$00,$00
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sbc: $0000,x
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inc: $0000,x
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dfb $ff,$00,$00
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