mirror of
https://github.com/fadden/6502bench.git
synced 2024-07-04 01:29:34 +00:00
3ff0fbae34
The regression tests were written with the assumption that all cross assemblers would support 6502, 65C02, and 65816 code. There are a few that support 65816 partially (e.g. ACME) or not at all. To best support these, we need to split some of the tests into pieces, so that important 6502 tests aren't skipped simply because parts of the test also exercise 65816 code. The first step is to change the regression test naming scheme. The old system used 1xxx for tests without project files, and 2xxx for tests with project files. The new system uses 1xxxN / 2xxxN, where N indicates the CPU type: 0 for 6502, 1 for 65C02, and 2 for 65816. For the 1xxxN tests the new value determines which CPU is used, which allows us to move the "allops" 6502/65C02 tests into the no-project category. For 2xxxN it just allows the 6502 and 65816 versions to have the same base name and number. This change updates the first batch of tests. It involves minor changes to the test harness and a whole bunch of renaming.
275 lines
5.1 KiB
ArmAsm
275 lines
5.1 KiB
ArmAsm
org $1000
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jsr L1014
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jsr L108A
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jsr L10C4
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jsr L10D8
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jsr L10F6
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nop
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nop
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nop
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brk
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dfb $00
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L1014 ora ($00,x)
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dfb $02,$00
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dfb $03
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tsb $00
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ora $00
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asl $00
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dfb $07
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php
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ora #$00
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asl A
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dfb $0b
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tsb: $0000
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ora: $0000
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asl: $0000
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dfb $0f
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bpl :L1031
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:L1031 ora ($00),y
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ora ($00)
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dfb $13
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trb $00
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ora $00,x
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asl $00,x
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dfb $17
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clc
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ora $0000,y
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inc A
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dfb $1b
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trb: $0000
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ora: $0000,x
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asl: $0000,x
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dfb $1f
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jsr $0000
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and ($00,x)
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dfb $22,$00
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dfb $23
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bit $00
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and $00
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rol $00
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dfb $27
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plp
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and #$00
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rol A
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dfb $2b
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bit: $0000
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and: $0000
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rol: $0000
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dfb $2f
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bmi :L106D
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:L106D and ($00),y
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and ($00)
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dfb $33
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bit $00,x
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and $00,x
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rol $00,x
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dfb $37
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sec
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and $0000,y
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dec A
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dfb $3b
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bit: $0000,x
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and: $0000,x
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rol: $0000,x
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dfb $3f
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rti
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L108A eor ($00,x)
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dfb $42,$00
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dfb $43
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dfb $44,$00
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eor $00
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lsr $00
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dfb $47
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pha
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eor #$00
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lsr A
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dfb $4b
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jmp :L109E
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:L109E eor: $0000
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lsr: $0000
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dfb $4f
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bvc :L10A7
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:L10A7 eor ($00),y
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eor ($00)
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dfb $53
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dfb $54,$00
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eor $00,x
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lsr $00,x
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dfb $57
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cli
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eor $0000,y
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phy
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dfb $5b
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dfb $5c,$00,$00
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eor: $0000,x
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lsr: $0000,x
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dfb $5f
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rts
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L10C4 adc ($00,x)
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dfb $62,$00
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dfb $63
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stz $00
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adc $00
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ror $00
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dfb $67
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pla
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adc #$00
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ror A
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dfb $6b
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jmp ($0000)
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L10D8 adc: $0000
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ror: $0000
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dfb $6f
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bvs :L10E1
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:L10E1 adc ($00),y
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adc ($00)
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dfb $73
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stz $00,x
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adc $00,x
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ror $00,x
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dfb $77
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sei
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adc $0000,y
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ply
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dfb $7b
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jmp ($0000,x)
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L10F6 adc: $0000,x
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ror: $0000,x
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dfb $7f
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bra :L10FF
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:L10FF sta ($00,x)
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dfb $82,$00
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dfb $83
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sty $00
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sta $00
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stx $00
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dfb $87
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dey
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bit #$00
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txa
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dfb $8b
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sty: $0000
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sta: $0000
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stx: $0000
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dfb $8f
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bcc :L111C
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:L111C sta ($00),y
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sta ($00)
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dfb $93
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sty $00,x
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sta $00,x
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stx $00,y
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dfb $97
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tya
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sta $0000,y
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txs
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dfb $9b
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stz: $0000
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sta: $0000,x
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stz: $0000,x
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dfb $9f
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ldy #$00
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lda ($00,x)
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ldx #$00
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dfb $a3
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ldy $00
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lda $00
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ldx $00
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dfb $a7
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tay
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lda #$00
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tax
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dfb $ab
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ldy: $0000
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lda: $0000
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ldx: $0000
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dfb $af
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bcs :L1157
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:L1157 lda ($00),y
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lda ($00)
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dfb $b3
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ldy $00,x
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lda $00,x
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ldx $00,y
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dfb $b7
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clv
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lda $0000,y
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tsx
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dfb $bb
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ldy: $0000,x
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lda: $0000,x
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ldx: $0000,y
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dfb $bf
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cpy #$00
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cmp ($00,x)
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dfb $c2,$00
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dfb $c3
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cpy $00
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cmp $00
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dec $00
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dfb $c7
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iny
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cmp #$00
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dex
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dfb $cb
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cpy: $0000
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cmp: $0000
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dec: $0000
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dfb $cf
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bne :L1192
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:L1192 cmp ($00),y
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cmp ($00)
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dfb $d3
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dfb $d4,$00
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cmp $00,x
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dec $00,x
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dfb $d7
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cld
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cmp $0000,y
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phx
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dfb $db
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dfb $dc,$00,$00
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cmp: $0000,x
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dec: $0000,x
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dfb $df
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cpx #$00
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sbc ($00,x)
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dfb $e2,$00
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dfb $e3
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cpx $00
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sbc $00
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inc $00
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dfb $e7
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inx
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sbc #$00
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nop
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dfb $eb
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cpx: $0000
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sbc: $0000
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inc: $0000
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dfb $ef
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beq :L11CD
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:L11CD sbc ($00),y
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sbc ($00)
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dfb $f3
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dfb $f4,$00
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sbc $00,x
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inc $00,x
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dfb $f7
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sed
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sbc $0000,y
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plx
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dfb $fb
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dfb $fc,$00,$00
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sbc: $0000,x
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inc: $0000,x
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dfb $ff
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