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64tass wants to place its output into a 64KB region of memory, starting at the address "*" is set to, and continuing without wrapping around the end of the bank. Some files aren't meant to be handled that way, so we need to generate the output differently. If the file's output fits nicely, it's considered "loadable", and is generated in the usual way. If it doesn't, it's treated as "streamable", and the initial "* = addr" directive is omitted (leaving "*" at zero), and we go straight to ".logical" directives. 65816 code with an initial address outside bank 0 is treated as "streamable" whether or not the contents fit nicely in the designated 64K area. This caused a minor change to a few of the 65816 tests. A new test, 20240-large-overlay, exercises "streamable" by creating a file with eight overlapping 8KB segments that load at $8000. While the file as a whole fits in 64KB, it wouldn't if loaded at the desired start address. Also, updated the regression test harness to report assembler failure independently of overall test failure. This makes it easier to confirm that (say) ACME v0.96.4 still works with the code we generate, even though it doesn't match the expected output (which was generated for v0.97). (problem was raised in issue #98)
125 lines
2.5 KiB
ArmAsm
125 lines
2.5 KiB
ArmAsm
.cpu "65816"
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.logical $021000
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.as
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.xs
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clc
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xce
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sep #$ff
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jsr L21100
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jsr L21107
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jmp L22000
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.here
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.logical $021100
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L21100 bit L21100 & $ffff
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L21103 lda #$11
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ldx #$11
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L21107 ldy #$11
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per L21103
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bra L21103
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.here
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.logical $021100
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_L21100_0 bit _L21100_0 & $ffff
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lda #$22
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_L21105 ldx #$22
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ldy #$22
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per _L21105
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jmp _L21105
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.here
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.logical $021100
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_L21100_1 bit _L21100_1 & $ffff
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lda #$33
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ldx #$33
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_L21107_0 ldy #$33
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per _L21107_0
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bra _L21107_0
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.here
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.logical $022000
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L22000 bit L22000 & $ffff
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beq $022018
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bra _L22020
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.here
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.logical $022020
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_L22020 bit _L22020 & $ffff
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beq $022029
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brl _L22080
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_offend nop
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.here
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.logical $022080
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_L22080 bit _L22080 & $ffff
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lda _offend & $ffff
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jsr _offend
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lda $2029
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jsr $022029
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lda 0+(_L22080 & $ffff)-1
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jsr _L22080-1
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lda _L22080 & $ffff
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jsr _L22080
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lda $00
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beq _L22100
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.byte $ad
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.here
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.logical $022100
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_L22100 nop
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nop
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jmp _L23000
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.here
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.logical $022800
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.byte $00
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.byte $28
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.fill 14,$00
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.here
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.logical $022820
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.fill 18,$00
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.here
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.logical $023000
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_L23000 bit _L23000 & $ffff
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lda #$44
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ldx #$44
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ldy #$44
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brl _fwd
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_ulabel .byte $00
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.byte $01
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.here
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.logical $023100
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.byte $02
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_fwd bit _fwd & $ffff
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lda _ulabel & $ffff
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lda 0+(_ulabel & $ffff)+1
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lda $300e
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lda $300f
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lda 0+(_fwd & $ffff)-1
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beq _L23182
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.byte $ea
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.byte $ea
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.here
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.logical $023180
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.byte $00
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.byte $01
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_L23182 bit _L23182 & $ffff
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lda _label1 & $ffff
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lda 0+(_label1 & $ffff)+1
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lda 0+(_label1 & $ffff)+112
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bra _L23200
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_label1 .byte $ea
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.byte $ea
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.here
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.logical $023200
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_L23200 bit _L23200 & $ffff
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.byte $00
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.byte $01
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.here
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