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https://github.com/fadden/6502bench.git
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e8608770b9
Implemented "is relative" flag. This only affects source code generation, replacing ".arstart <addr>" with ".arstart *+<value>". Only output by 64tass and ACME generators. Added a bold-text summary to radio buttons in address region edit dialog. This makes it much easier to see what you're doing. Added a warning to the label edit dialog when a label is being placed in a non-addressable region. Modified double-click behavior for .arstart/.arend to jump to the other end when the opcode is clicked on. This matches the behavior of instructions with address operands. Reordered Actions menu, putting "edit operand" at the top. Fixed AddressMap entry collision testing. Fixed PRG issue with multiple address regions at offset +000002. Added regression tests. Most of the complicated stuff with regions is tested by unit tests inside AddressMap, but we still need to exercise nested region code generation.
138 lines
3.1 KiB
ArmAsm
138 lines
3.1 KiB
ArmAsm
; Copyright 2021 faddenSoft. All Rights Reserved.
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; See the LICENSE.txt file for distribution terms (Apache 2.0).
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;
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; Test nested address regions.
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;
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; Assembler: 64tass
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; % tass64 --ascii --case-sensitive --nostart 20250-nested-regions.S
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.cpu "6502"
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* = $1000
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START
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.word $3000
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; NOTE: leave PRG header as a 2-byte hole with no explicit region
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; Start with 3 nested regions that share a starting address.
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; EDIT: create region starting at $1000, ending at REGION_END
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; EDIT: make all 3 of these relative (especially the first one, which follows non-addr)
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; EDIT: create these as fixed-end regions; first one spans full file
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.logical $1000
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.logical $2000
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.logical $3000
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part3k bit part3k
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early lda early
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and late
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jmp part2k
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.here ;$3000; now $20xx
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part2k bit part2k
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jmp part1k
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.here ;$2000; now $10xx
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part1k bit part1k
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jsr overhole ;let execution try to fall into non-addr
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REGION1_END
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; EDIT: next chunk is a *floating* non-addr region
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brk
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.null "Null-term PETSCII string"
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.byte $80
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.word early
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.word late
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.byte $80
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; 4000-40xx, with two overlapping regions in the $5000 area. Tests order
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; of resolution and descent into children. (This is mostly tested internally
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; by the AddressMap unit tests, so we don't need to go crazy here.)
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.logical $4000
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overhole
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a4000 bit a4000
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bit b5000
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bit b500f ;CHECK: resolves to b500f
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bit c500f ;CHECK: also resolves to b500f
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nop
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jmp a4020
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; EDIT: set region, add code start tag
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.logical $5000
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b5000 bit b5000
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b5003 bit a4000
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nop
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nop
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b5008 bit b5008 ;CHECK: resolves locally
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bit c5017 ;CHECK: resolves to other segment
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nop
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b500f rts
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.here ;$5000, now at $4010
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a4020 bit a4020
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bit c500f
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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jmp a4040
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; EDIT: set region, add code start tag
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.logical $5008
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c5008 bit c5008 ;CHECK: resolves locally
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bit b5000 ;CHECK: resolves to other segment
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nop
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c500f bit c500f
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nop
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nop
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nop
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nop
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nop
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c5017 rts
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.here ;$5008
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a4040 bit a4040
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bit c5017
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nop
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jmp tailend
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.here ;$4000
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; EDIT: create region starting at $d000, ending at REGION2_END; relative
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.logical $d000
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tailend
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partdk bit part2k
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late nop
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jmp partek
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; EDIT: create
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.logical $e000
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partek bit partek
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jmp partfk
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; EDIT: create, make it floating
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.logical $f000
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partfk bit partfk
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lda early
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and late
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end
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nop
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rts
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REGION2_END
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.here ;$f000
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.here ;$e000
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.here ;$d000
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.here ;$1000
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