mirror of
https://github.com/sehugg/8bitworkshop.git
synced 2024-11-16 05:05:11 +00:00
64 lines
1.1 KiB
Plaintext
64 lines
1.1 KiB
Plaintext
|
|
||
|
|
.inesprg 1 ; 1x 16KB PRG code
|
||
|
|
.ineschr 1 ; 1x 8KB CHR data
|
||
|
|
.inesmap 0 ; mapper 0 = NROM, no bank swapping
|
||
|
|
.inesmir 1 ; background mirroring
|
||
|
|
|
||
|
|
;;;;;;;;;;;;;;;
|
||
|
|
|
||
|
|
.bank 0
|
||
|
|
.org $C000
|
||
|
|
RESET:
|
||
|
|
SEI ; disable IRQs
|
||
|
|
CLD ; disable decimal mode
|
||
|
|
LDX #$40
|
||
|
|
STX $4017 ; disable APU frame IRQ
|
||
|
|
LDX #$FF
|
||
|
|
TXS ; Set up stack
|
||
|
|
INX ; now X = 0
|
||
|
|
STX $2000 ; disable NMI
|
||
|
|
STX $2001 ; disable rendering
|
||
|
|
STX $4010 ; disable DMC IRQs
|
||
|
|
|
||
|
|
vblankwait1: ; First wait for vblank to make sure PPU is ready
|
||
|
|
BIT $2002
|
||
|
|
BPL vblankwait1
|
||
|
|
|
||
|
|
clrmem:
|
||
|
|
LDA #$00
|
||
|
|
STA $0000, x
|
||
|
|
STA $0100, x
|
||
|
|
STA $0400, x
|
||
|
|
STA $0500, x
|
||
|
|
STA $0600, x
|
||
|
|
STA $0700, x
|
||
|
|
LDA #$FE
|
||
|
|
STA $0300, x
|
||
|
|
INX
|
||
|
|
BNE clrmem
|
||
|
|
|
||
|
|
vblankwait2: ; Second wait for vblank, PPU is ready after this
|
||
|
|
BIT $2002
|
||
|
|
BPL vblankwait2
|
||
|
|
|
||
|
|
Foreverloop:
|
||
|
|
JMP Foreverloop ;jump back to Forever, infinite loop
|
||
|
|
|
||
|
|
IRQ:
|
||
|
|
NMI:
|
||
|
|
RTI
|
||
|
|
|
||
|
|
;;;;;;;;;;;;;;
|
||
|
|
|
||
|
|
.bank 1
|
||
|
|
.org $FFFA
|
||
|
|
.dw NMI
|
||
|
|
.dw RESET
|
||
|
|
.dw IRQ
|
||
|
|
|
||
|
|
;;;;;;;;;;;;;;
|
||
|
|
|
||
|
|
.bank 2
|
||
|
|
.org $0000
|
||
|
|
.incbin "jroatch.chr" ;include CHR ROM
|