8bitworkshop/gen/atari8-2AH7DNWQ.js.map

{
  "version": 3,
  "sources": ["../src/machine/chips/antic.ts", "../src/machine/chips/gtia.ts", "../src/machine/chips/pokey.ts", "../src/machine/atari8.ts", "../src/platform/atari8.ts"],
  "sourcesContent": ["import { dumpRAM } from \"../../common/emu\";\nimport { hex, lpad, safe_extend } from \"../../common/util\";\n\n// ANTIC\n// https://www.atarimax.com/jindroush.atari.org/atanttim.html\n// http://www.virtualdub.org/blog/pivot/entry.php?id=243\n// http://www.beipmu.com/Antic_Timings.txt\n// https://user.xmission.com/~trevin/atari/antic_regs.html\n// https://user.xmission.com/~trevin/atari/antic_insns.html\n// http://www.atarimuseum.com/videogames/consoles/5200/conv_to_5200.html\n// https://www.virtualdub.org/downloads/Altirra%20Hardware%20Reference%20Manual.pdf\n\nconst PF_LEFT = [0, 25, 17, 9];\nconst PF_RIGHT = [0, 25 + 64, 17 + 80, 9 + 96];\n\nconst DMACTL = 0;\nconst CHACTL = 1;\nconst DLISTL = 2;\nconst DLISTH = 3;\nconst HSCROL = 4;\nconst VSCROL = 5;\nconst PMBASE = 7;\nconst CHBASE = 9;\nconst WSYNC = 10;\nconst VCOUNT = 11;\nconst PENH = 12;\nconst PENV = 13;\nconst NMIEN = 14;\nconst NMIRES = 15;\nconst NMIST = 15;\n\nconst PFNONE = 0;\nconst PFNARROW = 1;\nconst PFNORMAL = 2;\nconst PFWIDE = 3;\n\nconst NMIST_CYCLE = 12;\nconst NMI_CYCLE = 24;\nconst WSYNC_CYCLE = 212;\n\nconst ANTIC_LEFT = 17 - 4; // gtia 34, 4 cycle delay\nconst ANTIC_RIGHT = 110 - 4; // gtia 221, 4 cycle delay\nconst LAST_DMA_H = 105; // last DMA cycle\n\nconst MODE_LINES = [0, 0, 8, 10, 8, 16, 8, 16, 8, 4, 4, 2, 1, 2, 1, 1];\n// how many bits before DMA clock repeats?\nconst MODE_PERIOD = [0, 0, 2, 2, 2, 2, 4, 4, 8, 4, 4, 4, 4, 2, 2, 2];\nconst MODE_YPERIOD = [0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 2, 1, 0, 0, 0, 0];\n//const MODE_BPP = [0, 0, 1, 1, 2, 2, 1, 1, 2, 1, 2, 1, 1, 2, 2, 1];\n// how many color clocks / pixel * 2\nexport const MODE_SHIFT = [0, 0, 1, 1, 2, 2, 2, 2, 8, 4, 4, 2, 2, 2, 2, 1];\n\nexport class ANTIC {\n    read: (address: number) => number;\t// bus read function\n    nmi: () => void; // generate NMI\n\n    regs = new Uint8Array(0x10);\t\t\t\t// registers\n\n    left: number;\n    right: number;\t\t\t\t\t// left/right clocks for mode\n\n    dma_enabled: boolean = false;\n    dliop: number = 0;    // dli operation\n    mode: number = 0;\t\t\t// current mode\n    jmp = false; // TODO\n    lms = false; // TODO\n    dlarg_lo: number = 0;\n    dlarg_hi: number = 0;\n    period: number = 0;\t\t// current mode period bitmask\n    scanaddr: number = 0;  // Scan Address (via LMS)\n    startaddr: number = 0;\t// Start of line Address\n    pfbyte: number = 0;\t\t// playfield byte fetched\n    ch: number = 0;\t\t\t\t// char read\n    linesleft: number = 0; // # of lines left in mode\n    yofs: number = 0;\t\t\t// yofs fine\n    isfirstline: boolean = false;\n    v: number = 0;\t\t\t\t\t// vertical scanline #\n    h: number = 0;\t\t\t\t\t// horizontal color clock\n\n    linebuf = new Uint8Array(48);\n    dmaclock: number = 0;\n    dmaidx: number = 0;\n    output: number = 0;\n    dramrefresh = false;\n    in_vscroll = 0;\n\n    constructor(readfn, nmifn) {\n        this.read = readfn; // bus read function\n        this.nmi = nmifn; // NMI function\n    }\n    reset() {\n        this.regs.fill(0);\n        this.regs[NMIEN] = 0x00;\n        this.regs[NMIST] = 0x7f;\n        this.regs[PENH] = 0x00;\n        this.regs[PENV] = 0xff;\n        this.setReg(DMACTL, 0x0);\n        this.h = this.v = 0;\n        this.startaddr = this.scanaddr = 0;\n        this.dmaclock = 0;\n    }\n    saveState() {\n        return safe_extend(0, {}, this);\n    }\n    loadState(s) {\n        safe_extend(0, this, s);\n        this.setReg(DMACTL, s.regs[DMACTL]);\n    }\n    static stateToLongString(state): string {\n        let s = \"\";\n        s += \"H: \" + lpad(state.h, 3) + \"  V: \" + lpad(state.v, 3) + \"\\n\";\n        s += \"DLIOp: \" + hex(state.dliop, 2) + \"  Lines: \" + state.yofs + \"/\" + state.linesleft;\n        s += \"   DMA \" + (state.dma_enabled ? \"ON \" : \"off\")\n        if (state.dma_enabled) s += \" idx \" + state.dmaidx + \" clk \" + hex(state.dmaclock) \n        s += \"\\n\"\n        s += \"Addr: \" + hex(state.scanaddr, 4) + \"\\n\";\n        s += dumpRAM(state.regs, 0, 16).replace('$00', 'Regs');\n        return s;\n
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