From 45729f86fe790dd4a4f69052867f0214c052135b Mon Sep 17 00:00:00 2001 From: sehugg Date: Tue, 16 Jan 2024 21:41:48 +0000 Subject: [PATCH] =?UTF-8?q?Deploying=20to=20gh-pages=20from=20@=20sehugg/8?= =?UTF-8?q?bitworkshop@d733a2cd273cf6e0d33c2f780e1e17e1da0c17e9=20?= =?UTF-8?q?=F0=9F=9A=80?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- README.md | 19 +- css/ui.css | 11 +- ...{apple2-2LVORDRQ.js => apple2-EBLV7QZ6.js} | 4 +- ...2LVORDRQ.js.map => apple2-EBLV7QZ6.js.map} | 0 gen/arm32-IVL2WI33.js | 9 + gen/arm32-IVL2WI33.js.map | 7 + gen/arm32-R5NJVEXG.js | 7 - gen/arm32-R5NJVEXG.js.map | 7 - ...cade-Q5URXEDG.js => astrocade-B6S7IURT.js} | 4 +- ...RXEDG.js.map => astrocade-B6S7IURT.js.map} | 0 ...7800-NF4HMROI.js => atari7800-QWAA5553.js} | 4 +- ...HMROI.js.map => atari7800-QWAA5553.js.map} | 0 ...{atari8-7FKUDPVY.js => atari8-N4PRCBAP.js} | 4 +- ...7FKUDPVY.js.map => atari8-N4PRCBAP.js.map} | 0 gen/{basic-PW5NXC77.js => basic-O4Z2JMQ2.js} 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presets/arm32/serialout.c | 7 + presets/arm32/sieve.c | 35 + presets/arm32/skeleton.armtcc | 11 + presets/arm32/vidfill.c | 25 + src/common/baseplatform.ts | 20 +- src/common/binutils.ts | 1257 ++++++++++++++++ src/common/cpu/ARM.ts | 518 ++++++- src/common/devices.ts | 21 +- src/common/emu.ts | 4 +- src/common/wasi/wasishim.ts | 38 +- src/ide/project.ts | 3 +- src/ide/ui.ts | 11 +- src/ide/views/debugviews.ts | 12 +- src/machine/arm32.ts | 136 +- src/platform/arm32.ts | 65 +- src/test/testelfparser.ts | 63 + src/worker/fs/arm32-fs.zip | Bin 0 -> 84762 bytes src/worker/lib/arm32/crt0.c | 27 + src/worker/lib/arm32/libc.a | Bin 0 -> 568472 bytes src/worker/platforms.ts | 28 + src/worker/tools/arm.ts | 214 ++- src/worker/wasm/arm-tcc.js | 21 + src/worker/wasm/arm-tcc.wasm | Bin 0 -> 417707 bytes src/worker/workertools.ts | 2 + 152 files changed, 6118 insertions(+), 365 deletions(-) rename gen/{apple2-2LVORDRQ.js => apple2-EBLV7QZ6.js} (98%) rename gen/{apple2-2LVORDRQ.js.map => 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(94%) rename gen/{sms-RPCJL2TJ.js.map => sms-6QH6TDVI.js.map} (100%) rename gen/{sound_konami-L7Z5IUJJ.js => sound_konami-RWGOIUSP.js} (86%) rename gen/{sound_konami-L7Z5IUJJ.js.map => sound_konami-RWGOIUSP.js.map} (100%) rename gen/{sound_williams-GXIR44ZF.js => sound_williams-XXEIJ7OI.js} (88%) rename gen/{sound_williams-GXIR44ZF.js.map => sound_williams-XXEIJ7OI.js.map} (100%) create mode 100644 gen/test/testelfparser.js create mode 100644 gen/test/testelfparser.js.map rename gen/{vcs-JT6WK4IT.js => vcs-M62THH5P.js} (96%) rename gen/{vcs-JT6WK4IT.js.map => vcs-M62THH5P.js.map} (100%) rename gen/{vector-6PAX7NWQ.js => vector-RBM54KD5.js} (98%) rename gen/{vector-6PAX7NWQ.js.map => vector-RBM54KD5.js.map} (100%) rename gen/{vectrex-ZT6XLARM.js => vectrex-6D5CVJQM.js} (98%) rename gen/{vectrex-ZT6XLARM.js.map => vectrex-6D5CVJQM.js.map} (100%) rename gen/{verilog-B4C5BRZ3.js => verilog-4TFY7N6R.js} (99%) rename gen/{verilog-B4C5BRZ3.js.map => verilog-4TFY7N6R.js.map} (100%) rename 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src/test/testelfparser.ts create mode 100644 src/worker/fs/arm32-fs.zip create mode 100644 src/worker/lib/arm32/crt0.c create mode 100644 src/worker/lib/arm32/libc.a create mode 100644 src/worker/wasm/arm-tcc.js create mode 100755 src/worker/wasm/arm-tcc.wasm diff --git a/README.md b/README.md index b8c2d3b6..be5a5505 100644 --- a/README.md +++ b/README.md @@ -45,20 +45,22 @@ Note: Github tests may fail due to lack of API key. ## License -Copyright © 2016-2022 [Steven Hugg](https://github.com/sehugg). +Copyright © 2016-2024 [Steven E. Hugg](https://github.com/sehugg). -This project is [GPL-3.0](https://github.com/sehugg/8bitworkshop/blob/master/LICENSE) licensed. -Dependencies retain their original licenses. +This project, unless specifically noted, is multi-licensed. +You may choose to adhere to the terms of either the [GPL-3.0](https://github.com/sehugg/8bitworkshop/blob/master/LICENSE) License for the entire project or respect the individual licenses of its dependencies and included code samples, as applicable. -All included code samples (all files under the presets/ directory) are licensed under +This project includes various dependencies, modules, and components that retain their original licenses. +For detailed licensing information for each dependency, please refer to the respective files and documentation. + +All included code samples located in the presets/ directory are licensed under [CC0](https://creativecommons.org/publicdomain/zero/1.0/) -unless otherwise licensed. +unless a different license is explicitly stated within the specific code sample. + ## Dependencies -The IDE uses custom forks for many of these, found at https://github.com/sehugg?tab=repositories - ### Emulators * https://javatari.org/ @@ -84,6 +86,7 @@ The IDE uses custom forks for many of these, found at https://github.com/sehugg? * https://github.com/wiz-lang/wiz * https://github.com/sylefeb/Silice * https://github.com/steux/cc7800 +* https://bellard.org/tcc/ ### Assemblers/Linkers @@ -112,6 +115,8 @@ The IDE uses custom forks for many of these, found at https://github.com/sehugg? * https://github.com/sehugg/8bitworkshop-compilers * https://github.com/sehugg/8bit-tools * https://github.com/sehugg/awesome-8bitgamedev +* https://github.com/sehugg?tab=repositories + ## Tool Server (experimental) diff --git a/css/ui.css b/css/ui.css index 3bf92020..bcefb407 100644 --- a/css/ui.css +++ b/css/ui.css @@ -127,13 +127,15 @@ div.mem_info { bottom: 10px; background-color: #333; color: #66ff66; - white-space: pre; - padding: 20px; z-index: 12; font-family: "Andale Mono", "Menlo", "Lucida Console", monospace; font-size: 12pt; box-shadow: 0px 0px 8px rgba(0,0,0,.5); - max-height: 90vh; +} +div.mem_info_msg { + white-space: pre; + padding: 20px; + max-height: 80vh; overflow-y: auto; } div.mem_info a { @@ -148,6 +150,9 @@ div.mem_info a:hover { div.mem_info a.selected { color: #ffffff; } +div.mem_info button { + color: #fff; +} .mem_info_links { text-align:right; } diff --git a/gen/apple2-2LVORDRQ.js b/gen/apple2-EBLV7QZ6.js similarity index 98% rename from gen/apple2-2LVORDRQ.js rename to gen/apple2-EBLV7QZ6.js index 8abd495e..5535c0d7 100644 --- a/gen/apple2-2LVORDRQ.js +++ b/gen/apple2-EBLV7QZ6.js @@ -1,4 +1,4 @@ -import{a as t0}from"./chunk-ZYQJTLXH.js";import{B as a0,I as e0,q as $,t as x0,y as U}from"./chunk-42IVW2OL.js";import{J as O,O as b,g as q,i as j,l as W,m as X,s as V,u as l}from"./chunk-S4FPTY4A.js";import"./chunk-RQFURXHW.js";var z=class extends ${constructor(){super();this.cpuFrequency=1022727;this.sampleRate=this.cpuFrequency;this.cpuCyclesPerLine=65;this.cpuCyclesPerFrame=this.cpuCyclesPerLine*262;this.canvasWidth=280;this.numVisibleScanlines=192;this.numTotalScanlines=262;this.defaultROMSize=77824;this.LOAD_BASE=0;this.HDR_SIZE=0;this.ram=new Uint8Array(77824);this.cpu=new x0;this.grdirty=new Array(49152>>7);this.grparams={dirty:this.grdirty,grswitch:F,mem:this.ram};this.kbdlatch=0;this.soundstate=0;this.auxRAMselected=!1;this.auxRAMbank=1;this.writeinhibit=!0;this.bank2rdoffset=0;this.bank2wroffset=0;this.slots=new Array(8);this.fakeDrive={readROM:x=>{var a=this.cpu.getPC();if(a>=50688&&a<50944)switch(x){case 0:return 0;case 1:return this.LOAD_BASE&255;case 2:return this.LOAD_BASE>>8&255;default:return 0}else switch(x){case 0:return this.rom&&this.loadRAMWithProgram(),76;case 1:return 32;case 3:return 0;case 5:return 3;case 7:return 60;default:return 0}},readConst:x=>0,read:x=>this.floatbus(),write:(x,a)=>{}};this.loadBIOS(new W().decode(X(atob(u0)))),this.connectCPUMemoryBus(this),this.bios[54170-(65536-this.bios.length)]=96}saveState(){return{c:this.cpu.saveState(),ram:this.ram.slice(),kbdlatch:this.kbdlatch,soundstate:this.soundstate,grswitch:this.grparams.grswitch,auxRAMselected:this.auxRAMselected,auxRAMbank:this.auxRAMbank,writeinhibit:this.writeinhibit,slots:this.slots.map(x=>x&&x.saveState&&x.saveState()),inputs:null}}loadState(x){this.cpu.loadState(x.c),this.ram.set(x.ram),this.kbdlatch=x.kbdlatch,this.soundstate=x.soundstate,this.grparams.grswitch=x.grswitch,this.auxRAMselected=x.auxRAMselected,this.auxRAMbank=x.auxRAMbank,this.writeinhibit=x.writeinhibit,this.setupLanguageCardConstants();for(var a=0;a>8!=198);x++);for(var x=0;x<2e6&&(this.cpu.advanceClock(),!(this.cpu.getPC()>>8<198));x++);}readConst(x){if(x<49152)return this.ram[x];if(x>=53248)return this.auxRAMselected?x>=57344?this.ram[x]:this.ram[x+this.bank2rdoffset]:this.bios[x-(65536-this.bios.length)];if(x>=49408&&x<51200){var a=x>>8&7;return(this.slots[a]&&this.slots[a].readConst(x&255))|0}else return 0}read(x){if(x&=65535,x<49152||x>=53248)return this.readConst(x);if(x<49408){this.probe.logIORead(x,0);var a=x>>4&15;switch(a){case 0:return this.kbdlatch;case 1:this.kbdlatch&=127;break;case 3:this.soundstate=this.soundstate^1;break;case 5:(x&15)<8&&((x&1)!=0?this.grparams.grswitch|=1<<(x>>1&7):this.grparams.grswitch&=~(1<<(x>>1&7)));break;case 6:switch(x&7){case 1:case 2:case 3:return this.floatbus()&127;case 4:case 5:return this.floatbus()|128;default:return this.floatbus()}case 7:if(x==49264)return this.floatbus()|128;case 8:return this.doLanguageCardIO(x);case 9:case 10:case 11:case 12:case 13:case 14:case 15:return(this.slots[a-8]&&this.slots[a-8].read(x&15))|0}}else if(x>=49408&&x<51200){var a=x>>8&7;return(this.slots[a]&&this.slots[a].readROM(x&255))|0}return this.floatbus()}write(x,a){if(x&=65535,a&=255,x<49152)this.ram[x]=a,this.grdirty[x>>7]=1;else if(x<49280)this.read(x);else if(x<49408){var e=x>>4&15;this.slots[e-8]&&this.slots[e-8].write(x&15,a),this.probe.logIOWrite(x,a)}else x>=53248&&!this.writeinhibit&&(x>=57344?this.ram[x]=a:this.ram[x+this.bank2wroffset]=a)}floatbus(){var x=this.frameCycles,a=Math.floor(x/65),e=Math.floor(x%65),m=this.ap2disp.getAddressForScanline(a);return this.readConst(m+e)}connectVideo(x){super.connectVideo(x),this.ap2disp=this.pixels&&new A0(this.pixels,this.grparams)}startScanline(){}drawScanline(){}advanceFrame(x){var a=super.advanceFrame(x);return this.ap2disp&&this.ap2disp.updateScreen(),a}advanceCPU(){return this.audio.feedSample(this.soundstate,1),super.advanceCPU()}setKeyInput(x,a,e){if(e&b.KeyDown){switch(a=0,x){case 16:case 17:case 18:break;case 8:if(a=8,e&b.Shift){this.cpu.reset();return}break;case 13:a=13;break;case 27:a=27;break;case 37:a=8;break;case 39:a=21;break;case 38:a=11;break;case 40:a=10;break;case 48:e&b.Shift&&(a=41);break;case 49:e&b.Shift&&(a=33);break;case 50:e&b.Shift&&(a=64);break;case 51:e&b.Shift&&(a=35);break;case 52:e&b.Shift&&(a=36);break;case 53:e&b.Shift&&(a=37);break;case 54:e&b.Shift&&(a=94);break;case 55:e&b.Shift&&(a=38);break;case 56:e&b.Shift&&(a=42);break;case 57:e&b.Shift&&(a=40);break;case 61:a=e&b.Shift?43:61;break;case 173:a=e&b.Shift?95:45;break;case 59:a=e&b.Shift?58:59;break;case 188:a=e&b.Shift?60:44;break;case 190:a=e&b.Shift?62:46;break;case 191:a=e&b.Shift?63:47;break;case 222:a=e&b.Shift?34:39;break;default:a=x,a>=97&&a<=122&&(a-=32),a>=65&&a<65+26&&e&b.Ctrl&&(a-=64)}a&&(this.kbdlatch=(a|128)&255)}}doLanguageCardIO(x){switch(x&15){case 0:case 4:this.auxRAMselected=!0,this.auxRAMbank=2,this.writeinhibit=!0;break;case 1:case 5:this.auxRAMselected=!1,this.auxRAMbank=2,this.writeinhibit=!1;break;case 2:case 6:case 10:case 14:this.auxRAMselected=!1,this.writeinhibit=!0;break;case 3:case 7:this.auxRAMselected=!0,this.auxRAMbank=2,this.writeinhibit=!1;break;case 8:case 12:this.auxRAMselected=!0,this.auxRAMbank=1,this.writeinhibit=!0;break;case 9:case 13:this.auxRAMselected=!1,this.auxRAMbank=1,this.writeinhibit=!1;break;case 11:case 15:this.auxRAMselected=!0,this.auxRAMbank=1,this.writeinhibit=!1;break}return this.setupLanguageCardConstants(),this.floatbus()}setupLanguageCardConstants(){this.auxRAMbank==2?this.bank2rdoffset=-4096:this.bank2rdoffset=12288,this.auxRAMbank==2?this.bank2wroffset=-4096:this.bank2wroffset=12288}getDebugCategories(){return["CPU","Stack","I/O","Disk"]}getDebugInfo(x,a){switch(x){case"I/O":return"AUX RAM Bank: "+a.auxRAMbank+` +import{a as t0}from"./chunk-ZE6LZV4I.js";import{B as a0,I as e0,q as $,t as x0,y as U}from"./chunk-ULPRULB6.js";import{J as O,O as b,g as q,i as j,l as W,m as X,s as V,u as l}from"./chunk-RXF2JDJ3.js";import"./chunk-WAARL7ET.js";var z=class extends ${constructor(){super();this.cpuFrequency=1022727;this.sampleRate=this.cpuFrequency;this.cpuCyclesPerLine=65;this.cpuCyclesPerFrame=this.cpuCyclesPerLine*262;this.canvasWidth=280;this.numVisibleScanlines=192;this.numTotalScanlines=262;this.defaultROMSize=77824;this.LOAD_BASE=0;this.HDR_SIZE=0;this.ram=new Uint8Array(77824);this.cpu=new x0;this.grdirty=new Array(49152>>7);this.grparams={dirty:this.grdirty,grswitch:F,mem:this.ram};this.kbdlatch=0;this.soundstate=0;this.auxRAMselected=!1;this.auxRAMbank=1;this.writeinhibit=!0;this.bank2rdoffset=0;this.bank2wroffset=0;this.slots=new Array(8);this.fakeDrive={readROM:x=>{var a=this.cpu.getPC();if(a>=50688&&a<50944)switch(x){case 0:return 0;case 1:return this.LOAD_BASE&255;case 2:return this.LOAD_BASE>>8&255;default:return 0}else switch(x){case 0:return this.rom&&this.loadRAMWithProgram(),76;case 1:return 32;case 3:return 0;case 5:return 3;case 7:return 60;default:return 0}},readConst:x=>0,read:x=>this.floatbus(),write:(x,a)=>{}};this.loadBIOS(new W().decode(X(atob(u0)))),this.connectCPUMemoryBus(this),this.bios[54170-(65536-this.bios.length)]=96}saveState(){return{c:this.cpu.saveState(),ram:this.ram.slice(),kbdlatch:this.kbdlatch,soundstate:this.soundstate,grswitch:this.grparams.grswitch,auxRAMselected:this.auxRAMselected,auxRAMbank:this.auxRAMbank,writeinhibit:this.writeinhibit,slots:this.slots.map(x=>x&&x.saveState&&x.saveState()),inputs:null}}loadState(x){this.cpu.loadState(x.c),this.ram.set(x.ram),this.kbdlatch=x.kbdlatch,this.soundstate=x.soundstate,this.grparams.grswitch=x.grswitch,this.auxRAMselected=x.auxRAMselected,this.auxRAMbank=x.auxRAMbank,this.writeinhibit=x.writeinhibit,this.setupLanguageCardConstants();for(var a=0;a>8!=198);x++);for(var x=0;x<2e6&&(this.cpu.advanceClock(),!(this.cpu.getPC()>>8<198));x++);}readConst(x){if(x<49152)return this.ram[x];if(x>=53248)return this.auxRAMselected?x>=57344?this.ram[x]:this.ram[x+this.bank2rdoffset]:this.bios[x-(65536-this.bios.length)];if(x>=49408&&x<51200){var a=x>>8&7;return(this.slots[a]&&this.slots[a].readConst(x&255))|0}else return 0}read(x){if(x&=65535,x<49152||x>=53248)return this.readConst(x);if(x<49408){this.probe.logIORead(x,0);var a=x>>4&15;switch(a){case 0:return this.kbdlatch;case 1:this.kbdlatch&=127;break;case 3:this.soundstate=this.soundstate^1;break;case 5:(x&15)<8&&((x&1)!=0?this.grparams.grswitch|=1<<(x>>1&7):this.grparams.grswitch&=~(1<<(x>>1&7)));break;case 6:switch(x&7){case 1:case 2:case 3:return this.floatbus()&127;case 4:case 5:return this.floatbus()|128;default:return this.floatbus()}case 7:if(x==49264)return this.floatbus()|128;case 8:return this.doLanguageCardIO(x);case 9:case 10:case 11:case 12:case 13:case 14:case 15:return(this.slots[a-8]&&this.slots[a-8].read(x&15))|0}}else if(x>=49408&&x<51200){var a=x>>8&7;return(this.slots[a]&&this.slots[a].readROM(x&255))|0}return this.floatbus()}write(x,a){if(x&=65535,a&=255,x<49152)this.ram[x]=a,this.grdirty[x>>7]=1;else if(x<49280)this.read(x);else if(x<49408){var e=x>>4&15;this.slots[e-8]&&this.slots[e-8].write(x&15,a),this.probe.logIOWrite(x,a)}else x>=53248&&!this.writeinhibit&&(x>=57344?this.ram[x]=a:this.ram[x+this.bank2wroffset]=a)}floatbus(){var x=this.frameCycles,a=Math.floor(x/65),e=Math.floor(x%65),m=this.ap2disp.getAddressForScanline(a);return this.readConst(m+e)}connectVideo(x){super.connectVideo(x),this.ap2disp=this.pixels&&new A0(this.pixels,this.grparams)}startScanline(){}drawScanline(){}advanceFrame(x){var a=super.advanceFrame(x);return this.ap2disp&&this.ap2disp.updateScreen(),a}advanceCPU(){return this.audio.feedSample(this.soundstate,1),super.advanceCPU()}setKeyInput(x,a,e){if(e&b.KeyDown){switch(a=0,x){case 16:case 17:case 18:break;case 8:if(a=8,e&b.Shift){this.cpu.reset();return}break;case 13:a=13;break;case 27:a=27;break;case 37:a=8;break;case 39:a=21;break;case 38:a=11;break;case 40:a=10;break;case 48:e&b.Shift&&(a=41);break;case 49:e&b.Shift&&(a=33);break;case 50:e&b.Shift&&(a=64);break;case 51:e&b.Shift&&(a=35);break;case 52:e&b.Shift&&(a=36);break;case 53:e&b.Shift&&(a=37);break;case 54:e&b.Shift&&(a=94);break;case 55:e&b.Shift&&(a=38);break;case 56:e&b.Shift&&(a=42);break;case 57:e&b.Shift&&(a=40);break;case 61:a=e&b.Shift?43:61;break;case 173:a=e&b.Shift?95:45;break;case 59:a=e&b.Shift?58:59;break;case 188:a=e&b.Shift?60:44;break;case 190:a=e&b.Shift?62:46;break;case 191:a=e&b.Shift?63:47;break;case 222:a=e&b.Shift?34:39;break;default:a=x,a>=97&&a<=122&&(a-=32),a>=65&&a<65+26&&e&b.Ctrl&&(a-=64)}a&&(this.kbdlatch=(a|128)&255)}}doLanguageCardIO(x){switch(x&15){case 0:case 4:this.auxRAMselected=!0,this.auxRAMbank=2,this.writeinhibit=!0;break;case 1:case 5:this.auxRAMselected=!1,this.auxRAMbank=2,this.writeinhibit=!1;break;case 2:case 6:case 10:case 14:this.auxRAMselected=!1,this.writeinhibit=!0;break;case 3:case 7:this.auxRAMselected=!0,this.auxRAMbank=2,this.writeinhibit=!1;break;case 8:case 12:this.auxRAMselected=!0,this.auxRAMbank=1,this.writeinhibit=!0;break;case 9:case 13:this.auxRAMselected=!1,this.auxRAMbank=1,this.writeinhibit=!1;break;case 11:case 15:this.auxRAMselected=!0,this.auxRAMbank=1,this.writeinhibit=!1;break}return this.setupLanguageCardConstants(),this.floatbus()}setupLanguageCardConstants(){this.auxRAMbank==2?this.bank2rdoffset=-4096:this.bank2rdoffset=12288,this.auxRAMbank==2?this.bank2wroffset=-4096:this.bank2wroffset=12288}getDebugCategories(){return["CPU","Stack","I/O","Disk"]}getDebugInfo(x,a){switch(x){case"I/O":return"AUX RAM Bank: "+a.auxRAMbank+` AUX RAM Select: `+a.auxRAMselected+` AUX RAM Write: `+!a.writeinhibit+` @@ -10,4 +10,4 @@ Mode: `+(this.read_mode?"READ":"WRITE")+` Motor: `+this.motor+` Data: `+(this.track_data?q(this.track_data[this.track_index]):"-")+` `}read_latch(){return this.track_index=(this.track_index+1)%_,this.track_data?this.track_data[this.track_index]&255:this.emu.floatbus()|128}write_latch(x){this.track_index=(this.track_index+1)%_,this.track_data!=null&&(this.track_data[this.track_index]=x)}readROM(x){return r0[x]}readConst(x){return r0[x]}read(x){return this.doIO(x,0)}write(x,a){this.doIO(x,a)}doIO(x,a){switch(x&15){case 1:case 3:case 5:case 7:var e,m,t;t=this.track,e=x>>1&3,e==(t-1&3)?t>0&&t--:e==(t+1&3)&&t>1],console.log("track",t/2)):this.track_data=null,this.track=t;break;case 8:this.motor=!1;break;case 9:this.motor=!0;break;case 10:break;case 11:break;case 15:this.read_mode=!1;case 12:if(this.read_mode)return this.read_latch();break;case 14:this.read_mode=!0;case 13:return a>=0&&!this.read_mode&&!this.write_protect&&this.write_latch(a),this.write_protect?128:0}return this.emu.floatbus()}},N=[150,151,154,155,157,158,159,166,167,171,172,173,174,175,178,179,180,181,182,183,185,186,187,188,189,190,191,203,205,206,207,211,214,215,217,218,219,220,221,222,223,229,230,231,233,234,235,236,237,238,239,242,243,244,245,246,247,249,250,251,252,253,254,255],g0=[0,7,14,6,13,5,12,4,11,3,10,2,9,1,8,15];function k0(s,x,a,e,m,t,n){var c,D,C,u,g=new Uint8Array(258);for(u=0,c=0;c<14;c++)t[n++]=255;for(t[n++]=213,t[n++]=170,t[n++]=150,t[n++]=s>>1|170,t[n++]=s|170,D=s,t[n++]=x>>1|170,t[n++]=x|170,D^=x,t[n++]=a>>1|170,t[n++]=a|170,D^=a,t[n++]=D>>1|170,t[n++]=D|170,t[n++]=222,t[n++]=170,t[n++]=235,c=0;c<6;c++)t[n++]=255;for(t[n++]=213,t[n++]=170,t[n++]=173,c=0;c<256;c++)g[c]=e[c+m]&255;for(g[256]=0,g[257]=0,C=0,c=0;c<86;c++)u=(g[c]&1)<<1,u|=(g[c]&2)>>1,u|=(g[c+86]&1)<<3,u|=(g[c+86]&2)<<1,u|=(g[c+172]&1)<<5,u|=(g[c+172]&2)<<3,t[n++]=N[u^C],C=u;for(c=0;c<256;c++)u=g[c]>>2,t[n++]=N[u^C],C=u;t[n++]=N[u],t[n++]=222,t[n++]=170,t[n++]=235}function S0(s,x,a){for(var e=new Uint8Array(_),m=0,t=0;t<16;t++)k0(s,x,t,a,g0[t]<<8,e,m),m+=d0;for(;m<_;)e[m++]=255;return e}var c0=[{id:"sieve.c",name:"Sieve",category:"C"},{id:"keyboardtest.c",name:"Keyboard Test"},{id:"mandel.c",name:"Mandelbrot"},{id:"tgidemo.c",name:"TGI Graphics Demo"},{id:"Eliza.c",name:"Eliza"},{id:"siegegame.c",name:"Siege Game"},{id:"cosmic.c",name:"Cosmic Impalas"},{id:"farmhouse.c",name:"Farmhouse Adventure"},{id:"yum.c",name:"Yum Dice Game"},{id:"lz4test.c",name:"LZ4 Decompressor"},{id:"hgrtest.a",name:"HGR Test",category:"Assembly Language"},{id:"conway.a",name:"Conway's Game of Life"},{id:"lz4fh.a",name:"LZ4FH Decompressor"},{id:"deltamod.dasm",name:"Delta Modulation Audio"}],n0=class extends t0{constructor(){super(...arguments);this.getOpcodeMetadata=a0;this.getToolForFilename=U}start(){this.startModule(this.mainElement,{jsfile:"mame8bitpc.js",biosfile:["apple2e.zip"],driver:"apple2e",width:280*2,height:192*2,preInit:function(x){}})}getDefaultExtension(){return".c"}getPresets(){return c0}loadROM(x,a){this.loadROMFile(a)}},f0=class extends e0{constructor(){super(...arguments);this.getMemoryMap=function(){return{main:[{name:"Zero Page RAM",start:0,size:256,type:"ram"},{name:"Line Input RAM",start:512,size:256,type:"ram"},{name:"RAM",start:768,size:192,type:"ram"},{name:"DOS Vectors",start:960,size:64,type:"ram"},{name:"Text/Lores Page 1",start:1024,size:1024,type:"ram"},{name:"RAM",start:2048,size:6144,type:"ram"},{name:"Hires Page 1",start:8192,size:8192,type:"ram"},{name:"Hires Page 2",start:16384,size:8192,type:"ram"},{name:"RAM",start:24576,size:24576,type:"ram"},{name:"I/O",start:49152,size:4096,type:"io"},{name:"ROM",start:53248,size:12288,type:"rom"}]}};this.getToolForFilename=x=>x.endsWith(".lnk")?"merlin32":U(x)}newMachine(){return new z}getPresets(){return c0}getDefaultExtension(){return".c"}readAddress(x){return this.machine.readConst(x)}getROMExtension(x){return x&&x.length==35*16*256?".dsk":".bin"}};O["apple2.mame"]=n0;O.apple2=f0; -//# sourceMappingURL=apple2-2LVORDRQ.js.map +//# sourceMappingURL=apple2-EBLV7QZ6.js.map diff --git a/gen/apple2-2LVORDRQ.js.map b/gen/apple2-EBLV7QZ6.js.map similarity index 100% rename from gen/apple2-2LVORDRQ.js.map rename to gen/apple2-EBLV7QZ6.js.map diff --git a/gen/arm32-IVL2WI33.js b/gen/arm32-IVL2WI33.js new file mode 100644 index 00000000..56258c26 --- /dev/null +++ b/gen/arm32-IVL2WI33.js @@ -0,0 +1,9 @@ +import{H as lr,q as Cr}from"./chunk-ULPRULB6.js";import{E as Fr,J as hr,T as Z,W as I,X as fr,Z as mr,a as z,aa as tr,g as _}from"./chunk-RXF2JDJ3.js";import{a as nr,b as or}from"./chunk-WAARL7ET.js";var d;(function(o){o[o.MODE_ARM=0]="MODE_ARM",o[o.MODE_THUMB=1]="MODE_THUMB",o[o.MODE_USER=16]="MODE_USER",o[o.MODE_FIQ=17]="MODE_FIQ",o[o.MODE_IRQ=18]="MODE_IRQ",o[o.MODE_SUPERVISOR=19]="MODE_SUPERVISOR",o[o.MODE_ABORT=23]="MODE_ABORT",o[o.MODE_UNDEFINED=27]="MODE_UNDEFINED",o[o.MODE_SYSTEM=31]="MODE_SYSTEM"})(d||(d={}));var u;(function(s){s[s.SP=13]="SP",s[s.LR=14]="LR",s[s.PC=15]="PC"})(u||(u={}));var k;(function(x){x[x.BANK_NONE=0]="BANK_NONE",x[x.BANK_FIQ=1]="BANK_FIQ",x[x.BANK_IRQ=2]="BANK_IRQ",x[x.BANK_SUPERVISOR=3]="BANK_SUPERVISOR",x[x.BANK_ABORT=4]="BANK_ABORT",x[x.BANK_UNDEFINED=5]="BANK_UNDEFINED",x[x.WORD_SIZE_ARM=4]="WORD_SIZE_ARM",x[x.WORD_SIZE_THUMB=2]="WORD_SIZE_THUMB",x[x.BASE_RESET=0]="BASE_RESET",x[x.BASE_UNDEF=4]="BASE_UNDEF",x[x.BASE_SWI=8]="BASE_SWI",x[x.BASE_PABT=12]="BASE_PABT",x[x.BASE_DABT=16]="BASE_DABT",x[x.BASE_IRQ=24]="BASE_IRQ",x[x.BASE_FIQ=28]="BASE_FIQ"})(k||(k={}));var vr=4026531840,xr=223,Er=32;function F(t){this.cpu=t,this.addressingMode23Immediate=[function(r,i,s){var e=t.gprs,a=function(){var c=e[r];return(!s||s())&&(e[r]-=i),c};return a.writesPC=r==15,a},null,null,null,function(r,i,s){var e=t.gprs,a=function(){var c=e[r];return(!s||s())&&(e[r]+=i),c};return a.writesPC=r==15,a},null,null,null,function(r,i,s){var e=t.gprs,a=function(){return e[r]-i};return a.writesPC=!1,a},function(r,i,s){var e=t.gprs,a=function(){var c=e[r]-i;return(!s||s())&&(e[r]=c),c};return a.writesPC=r==15,a},null,null,function(r,i,s){var e=t.gprs,a=function(){return e[r]+i};return a.writesPC=!1,a},function(r,i,s){var e=t.gprs,a=function(){var c=e[r]+i;return(!s||s())&&(e[r]=c),c};return a.writesPC=r==15,a},null,null],this.addressingMode23Register=[function(r,i,s){var e=t.gprs,a=function(){var c=e[r];return(!s||s())&&(e[r]-=e[i]),c};return a.writesPC=r==15,a},null,null,null,function(r,i,s){var e=t.gprs,a=function(){var c=e[r];return(!s||s())&&(e[r]+=e[i]),c};return a.writesPC=r==15,a},null,null,null,function(r,i,s){var e=t.gprs,a=function(){return e[r]-e[i]};return a.writesPC=!1,a},function(r,i,s){var e=t.gprs,a=function(){var c=e[r]-e[i];return(!s||s())&&(e[r]=c),c};return a.writesPC=r==15,a},null,null,function(r,i,s){var e=t.gprs,a=function(){var c=e[r]+e[i];return c};return a.writesPC=!1,a},function(r,i,s){var e=t.gprs,a=function(){var c=e[r]+e[i];return(!s||s())&&(e[r]=c),c};return a.writesPC=r==15,a},null,null],this.addressingMode2RegisterShifted=[function(r,i,s){var e=t.gprs,a=function(){var c=e[r];return(!s||s())&&(i(),e[r]-=t.shifterOperand),c};return a.writesPC=r==15,a},null,null,null,function(r,i,s){var e=t.gprs,a=function(){var c=e[r];return(!s||s())&&(i(),e[r]+=t.shifterOperand),c};return a.writesPC=r==15,a},null,null,null,function(r,i,s){var e=t.gprs,a=function(){return i(),e[r]-t.shifterOperand};return a.writesPC=!1,a},function(r,i,s){var e=t.gprs,a=function(){i();var c=e[r]-t.shifterOperand;return(!s||s())&&(e[r]=c),c};return a.writesPC=r==15,a},null,null,function(r,i,s){var e=t.gprs,a=function(){return i(),e[r]+t.shifterOperand};return a.writesPC=!1,a},function(r,i,s){var e=t.gprs,a=function(){i();var c=e[r]+t.shifterOperand;return(!s||s())&&(e[r]=c),c};return a.writesPC=r==15,a},null,null]}F.prototype.constructAddressingMode1ASR=function(t,r){var i=this.cpu,s=i.gprs;return function(){++i.cycles;var e=s[t];t==15&&(e+=4),e&=255;var a=s[r];r==15&&(a+=4),e==0?(i.shifterOperand=a,i.shifterCarryOut=i.cpsrC):e<32?(i.shifterOperand=a>>e,i.shifterCarryOut=a&1<>31?(i.shifterOperand=4294967295,i.shifterCarryOut=2147483648):(i.shifterOperand=0,i.shifterCarryOut=0)}};F.prototype.constructAddressingMode1Immediate=function(t){var r=this.cpu;return function(){r.shifterOperand=t,r.shifterCarryOut=r.cpsrC}};F.prototype.constructAddressingMode1ImmediateRotate=function(t,r){var i=this.cpu;return function(){i.shifterOperand=t>>>r|t<<32-r,i.shifterCarryOut=i.shifterOperand>>31}};F.prototype.constructAddressingMode1LSL=function(t,r){var i=this.cpu,s=i.gprs;return function(){++i.cycles;var e=s[t];t==15&&(e+=4),e&=255;var a=s[r];r==15&&(a+=4),e==0?(i.shifterOperand=a,i.shifterCarryOut=i.cpsrC):e<32?(i.shifterOperand=a<>>e,i.shifterCarryOut=a&1<>31):(i.shifterOperand=0,i.shifterCarryOut=0)}};F.prototype.constructAddressingMode1ROR=function(t,r){var i=this.cpu,s=i.gprs;return function(){++i.cycles;var e=s[t];t==15&&(e+=4),e&=255;var a=s[r];r==15&&(a+=4);var c=e&31;e==0?(i.shifterOperand=a,i.shifterCarryOut=i.cpsrC):c?(i.shifterOperand=s[r]>>>c|s[r]<<32-c,i.shifterCarryOut=a&1<>31)}};F.prototype.constructAddressingMode23Immediate=function(t,r,i){var s=(t&983040)>>16;return this.addressingMode23Immediate[(t&27262976)>>21](s,r,i)};F.prototype.constructAddressingMode23Register=function(t,r,i){var s=(t&983040)>>16;return this.addressingMode23Register[(t&27262976)>>21](s,r,i)};F.prototype.constructAddressingMode2RegisterShifted=function(t,r,i){var s=(t&983040)>>16;return this.addressingMode2RegisterShifted[(t&27262976)>>21](s,r,i)};F.prototype.constructAddressingMode4=function(t,r){var i=this.cpu,s=i.gprs;return function(){var e=s[r]+t;return e}};F.prototype.constructAddressingMode4Writeback=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(c){var p=a[i]+t;return c&&s&&e.mmu.store32(a[i]+t-4,a[i]),a[i]+=r,p}};F.prototype.constructNOP=function(){return this.writesPC=!1,function(){}};F.prototype.constructADC=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=(e.shifterOperand>>>0)+(e.cpsrC?1:0);a[t]=(a[r]>>>0)+c}}};F.prototype.constructADCS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=(e.shifterOperand>>>0)+(e.cpsrC?1:0),p=(a[r]>>>0)+c;t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=p>>31,e.cpsrZ=!(p&4294967295),e.cpsrC=p>4294967295,e.cpsrV=a[r]>>31==c>>31&&a[r]>>31!=p>>31&&c>>31!=p>>31),a[t]=p}}};F.prototype.constructADD=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=(a[r]>>>0)+(e.shifterOperand>>>0))}};F.prototype.constructADDS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=(a[r]>>>0)+(e.shifterOperand>>>0);t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=c>>31,e.cpsrZ=!(c&4294967295),e.cpsrC=c>4294967295,e.cpsrV=a[r]>>31==e.shifterOperand>>31&&a[r]>>31!=c>>31&&e.shifterOperand>>31!=c>>31),a[t]=c}}};F.prototype.constructAND=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=a[r]&e.shifterOperand)}};F.prototype.constructANDS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=a[r]&e.shifterOperand,t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=a[t]>>31,e.cpsrZ=!(a[t]&4294967295),e.cpsrC=e.shifterCarryOut))}};F.prototype.constructB=function(t,r){var i=this.cpu,s=i.gprs;return function(){if(r&&!r()){i.mmu.waitPrefetch32(s[15]);return}i.mmu.waitPrefetch32(s[15]),s[15]+=t}};F.prototype.constructBIC=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=a[r]&~e.shifterOperand)}};F.prototype.constructBICS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=a[r]&~e.shifterOperand,t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=a[t]>>31,e.cpsrZ=!(a[t]&4294967295),e.cpsrC=e.shifterCarryOut))}};F.prototype.constructBL=function(t,r){var i=this.cpu,s=i.gprs;return function(){if(r&&!r()){i.mmu.waitPrefetch32(s[15]);return}i.mmu.waitPrefetch32(s[15]),s[14]=s[15]-4,s[15]+=t}};F.prototype.constructBX=function(t,r){var i=this.cpu,s=i.gprs;return function(){if(r&&!r()){i.mmu.waitPrefetch32(s[15]);return}i.mmu.waitPrefetch32(s[15]),i.switchExecMode(s[t]&1),s[15]=s[t]&4294967294}};F.prototype.constructCMN=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=(a[r]>>>0)+(e.shifterOperand>>>0);e.cpsrN=c>>31,e.cpsrZ=!(c&4294967295),e.cpsrC=c>4294967295,e.cpsrV=a[r]>>31==e.shifterOperand>>31&&a[r]>>31!=c>>31&&e.shifterOperand>>31!=c>>31}}};F.prototype.constructCMP=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=a[r]-e.shifterOperand;e.cpsrN=c>>31,e.cpsrZ=!(c&4294967295),e.cpsrC=a[r]>>>0>=e.shifterOperand>>>0,e.cpsrV=a[r]>>31!=e.shifterOperand>>31&&a[r]>>31!=c>>31}}};F.prototype.constructEOR=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=a[r]^e.shifterOperand)}};F.prototype.constructEORS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=a[r]^e.shifterOperand,t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=a[t]>>31,e.cpsrZ=!(a[t]&4294967295),e.cpsrC=e.shifterCarryOut))}};F.prototype.constructLDM=function(t,r,i){var s=this.cpu,e=s.gprs,a=s.mmu;return function(){if(a.waitPrefetch32(e[15]),!(i&&!i())){var c=r(!1),p=0,n,o;for(n=t,o=0;n;n>>=1,++o)n&1&&(e[o]=a.load32(c&4294967292),c+=4,++p);a.waitMulti32(c,p),++s.cycles}}};F.prototype.constructLDMS=function(t,r,i){var s=this.cpu,e=s.gprs,a=s.mmu;return function(){if(a.waitPrefetch32(e[15]),!(i&&!i())){var c=r(!1),p=0,n=s.mode;s.switchMode(31);var o,l;for(o=t,l=0;o;o>>=1,++l)o&1&&(e[l]=a.load32(c&4294967292),c+=4,++p);s.switchMode(n),a.waitMulti32(c,p),++s.cycles}}};F.prototype.constructLDR=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){if(s.mmu.waitPrefetch32(e[15]),!(i&&!i())){var a=r();e[t]=s.mmu.load32(a),s.mmu.wait32(a),++s.cycles}}};F.prototype.constructLDRB=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){if(s.mmu.waitPrefetch32(e[15]),!(i&&!i())){var a=r();e[t]=s.mmu.loadU8(a),s.mmu.wait(a),++s.cycles}}};F.prototype.constructLDRH=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){if(s.mmu.waitPrefetch32(e[15]),!(i&&!i())){var a=r();e[t]=s.mmu.loadU16(a),s.mmu.wait(a),++s.cycles}}};F.prototype.constructLDRSB=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){if(s.mmu.waitPrefetch32(e[15]),!(i&&!i())){var a=r();e[t]=s.mmu.load8(a),s.mmu.wait(a),++s.cycles}}};F.prototype.constructLDRSH=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){if(s.mmu.waitPrefetch32(e[15]),!(i&&!i())){var a=r();e[t]=s.mmu.load16(a),s.mmu.wait(a),++s.cycles}}};F.prototype.constructMLA=function(t,r,i,s,e){var a=this.cpu,c=a.gprs;return function(){if(a.mmu.waitPrefetch32(c[15]),!(e&&!e()))if(++a.cycles,a.mmu.waitMul(i),c[s]&4294901760&&c[i]&4294901760){var p=(c[s]&4294901760)*c[i]&4294967295,n=(c[s]&65535)*c[i]&4294967295;c[t]=p+n+c[r]&4294967295}else c[t]=c[s]*c[i]+c[r]}};F.prototype.constructMLAS=function(t,r,i,s,e){var a=this.cpu,c=a.gprs;return function(){if(a.mmu.waitPrefetch32(c[15]),!(e&&!e())){if(++a.cycles,a.mmu.waitMul(i),c[s]&4294901760&&c[i]&4294901760){var p=(c[s]&4294901760)*c[i]&4294967295,n=(c[s]&65535)*c[i]&4294967295;c[t]=p+n+c[r]&4294967295}else c[t]=c[s]*c[i]+c[r];a.cpsrN=c[t]>>31,a.cpsrZ=!(c[t]&4294967295)}}};F.prototype.constructMOV=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=e.shifterOperand)}};F.prototype.constructMOVS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=e.shifterOperand,t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=a[t]>>31,e.cpsrZ=!(a[t]&4294967295),e.cpsrC=e.shifterCarryOut))}};F.prototype.constructMRS=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){s.mmu.waitPrefetch32(e[15]),!(i&&!i())&&(r?e[t]=s.spsr:e[t]=s.packCPSR())}};F.prototype.constructMSR=function(t,r,i,s,e){var a=this.cpu,c=a.gprs,p=i&65536,n=i&524288;return function(){if(a.mmu.waitPrefetch32(c[15]),!(e&&!e())){var o;i&33554432?o=s:o=c[t];var l=(p?255:0)|(n?4278190080:0);r?(l&=vr|xr|Er,a.spsr=a.spsr&~l|o&l):(l&vr&&(a.cpsrN=o>>31,a.cpsrZ=o&1073741824,a.cpsrC=o&536870912,a.cpsrV=o&268435456),a.mode!=16&&l&xr&&(a.switchMode(o&15|16),a.cpsrI=o&128,a.cpsrF=o&64))}}};F.prototype.constructMUL=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s()))if(e.mmu.waitMul(a[r]),a[i]&4294901760&&a[r]&4294901760){var c=(a[i]&4294901760)*a[r]|0,p=(a[i]&65535)*a[r]|0;a[t]=c+p}else a[t]=a[i]*a[r]}};F.prototype.constructMULS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){if(e.mmu.waitMul(a[r]),a[i]&4294901760&&a[r]&4294901760){var c=(a[i]&4294901760)*a[r]|0,p=(a[i]&65535)*a[r]|0;a[t]=c+p}else a[t]=a[i]*a[r];e.cpsrN=a[t]>>31,e.cpsrZ=!(a[t]&4294967295)}}};F.prototype.constructMVN=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=~e.shifterOperand)}};F.prototype.constructMVNS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=~e.shifterOperand,t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=a[t]>>31,e.cpsrZ=!(a[t]&4294967295),e.cpsrC=e.shifterCarryOut))}};F.prototype.constructORR=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=a[r]|e.shifterOperand)}};F.prototype.constructORRS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=a[r]|e.shifterOperand,t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=a[t]>>31,e.cpsrZ=!(a[t]&4294967295),e.cpsrC=e.shifterCarryOut))}};F.prototype.constructRSB=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=e.shifterOperand-a[r])}};F.prototype.constructRSBS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=e.shifterOperand-a[r];t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=c>>31,e.cpsrZ=!(c&4294967295),e.cpsrC=e.shifterOperand>>>0>=a[r]>>>0,e.cpsrV=e.shifterOperand>>31!=a[r]>>31&&e.shifterOperand>>31!=c>>31),a[t]=c}}};F.prototype.constructRSC=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=(a[r]>>>0)+(e.cpsrC?0:1);a[t]=(e.shifterOperand>>>0)-c}}};F.prototype.constructRSCS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=(a[r]>>>0)+(e.cpsrC?0:1),p=(e.shifterOperand>>>0)-c;t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=p>>31,e.cpsrZ=!(p&4294967295),e.cpsrC=e.shifterOperand>>>0>=p>>>0,e.cpsrV=e.shifterOperand>>31!=c>>31&&e.shifterOperand>>31!=p>>31),a[t]=p}}};F.prototype.constructSBC=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=(e.shifterOperand>>>0)+(e.cpsrC?0:1);a[t]=(a[r]>>>0)-c}}};F.prototype.constructSBCS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=(e.shifterOperand>>>0)+(e.cpsrC?0:1),p=(a[r]>>>0)-c;t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=p>>31,e.cpsrZ=!(p&4294967295),e.cpsrC=a[r]>>>0>=p>>>0,e.cpsrV=a[r]>>31!=c>>31&&a[r]>>31!=p>>31),a[t]=p}}};F.prototype.constructSMLAL=function(t,r,i,s,e){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(e&&!e())){a.cycles+=2,a.mmu.waitMul(i);var n=(p[s]&4294901760)*p[i],o=(p[s]&65535)*p[i],l=(p[r]>>>0)+n+o;p[r]=l,p[t]+=Math.floor(l*c)}}};F.prototype.constructSMLALS=function(t,r,i,s,e){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(e&&!e())){a.cycles+=2,a.mmu.waitMul(i);var n=(p[s]&4294901760)*p[i],o=(p[s]&65535)*p[i],l=(p[r]>>>0)+n+o;p[r]=l,p[t]+=Math.floor(l*c),a.cpsrN=p[t]>>31,a.cpsrZ=!(p[t]&4294967295||p[r]&4294967295)}}};F.prototype.constructSMULL=function(t,r,i,s,e){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(e&&!e())){++a.cycles,a.mmu.waitMul(p[i]);var n=((p[s]&4294901760)>>0)*(p[i]>>0),o=((p[s]&65535)>>0)*(p[i]>>0);p[r]=(n&4294967295)+(o&4294967295)&4294967295,p[t]=Math.floor(n*c+o*c)}}};F.prototype.constructSMULLS=function(t,r,i,s,e){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(e&&!e())){++a.cycles,a.mmu.waitMul(p[i]);var n=((p[s]&4294901760)>>0)*(p[i]>>0),o=((p[s]&65535)>>0)*(p[i]>>0);p[r]=(n&4294967295)+(o&4294967295)&4294967295,p[t]=Math.floor(n*c+o*c),a.cpsrN=p[t]>>31,a.cpsrZ=!(p[t]&4294967295||p[r]&4294967295)}}};F.prototype.constructSTM=function(t,r,i){var s=this.cpu,e=s.gprs,a=s.mmu;return function(){if(i&&!i()){a.waitPrefetch32(e[15]);return}a.wait32(e[15]);var c=r(!0),p=0,n,o;for(n=t,o=0;n;n>>=1,++o)n&1&&(a.store32(c,e[o]),c+=4,++p);a.waitMulti32(c,p)}};F.prototype.constructSTMS=function(t,r,i){var s=this.cpu,e=s.gprs,a=s.mmu;return function(){if(i&&!i()){a.waitPrefetch32(e[15]);return}a.wait32(e[15]);var c=s.mode,p=r(!0),n=0,o,l;for(s.switchMode(31),o=t,l=0;o;o>>=1,++l)o&1&&(a.store32(p,e[l]),p+=4,++n);s.switchMode(c),a.waitMulti32(p,n)}};F.prototype.constructSTR=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){if(i&&!i()){s.mmu.waitPrefetch32(e[15]);return}var a=r();s.mmu.store32(a,e[t]),s.mmu.wait32(a),s.mmu.wait32(e[15])}};F.prototype.constructSTRB=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){if(i&&!i()){s.mmu.waitPrefetch32(e[15]);return}var a=r();s.mmu.store8(a,e[t]),s.mmu.wait(a),s.mmu.wait32(e[15])}};F.prototype.constructSTRH=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){if(i&&!i()){s.mmu.waitPrefetch32(e[15]);return}var a=r();s.mmu.store16(a,e[t]),s.mmu.wait(a),s.mmu.wait32(e[15])}};F.prototype.constructSUB=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){e.mmu.waitPrefetch32(a[15]),!(s&&!s())&&(i(),a[t]=a[r]-e.shifterOperand)}};F.prototype.constructSUBS=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=a[r]-e.shifterOperand;t==15&&e.hasSPSR()?e.unpackCPSR(e.spsr):(e.cpsrN=c>>31,e.cpsrZ=!(c&4294967295),e.cpsrC=a[r]>>>0>=e.shifterOperand>>>0,e.cpsrV=a[r]>>31!=e.shifterOperand>>31&&a[r]>>31!=c>>31),a[t]=c}}};F.prototype.constructSWI=function(t,r){var i=this.cpu,s=i.gprs;return function(){if(r&&!r()){i.mmu.waitPrefetch32(s[15]);return}i.irq.swi32(t),i.mmu.waitPrefetch32(s[15])}};F.prototype.constructSWP=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){e.mmu.wait32(a[r]),e.mmu.wait32(a[r]);var c=e.mmu.load32(a[r]);e.mmu.store32(a[r],a[i]),a[t]=c,++e.cycles}}};F.prototype.constructSWPB=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){e.mmu.wait(a[r]),e.mmu.wait(a[r]);var c=e.mmu.loadU8(a[r]);e.mmu.store8(a[r],a[i]),a[t]=c,++e.cycles}}};F.prototype.constructTEQ=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=a[r]^e.shifterOperand;e.cpsrN=c>>31,e.cpsrZ=!(c&4294967295),e.cpsrC=e.shifterCarryOut}}};F.prototype.constructTST=function(t,r,i,s){var e=this.cpu,a=e.gprs;return function(){if(e.mmu.waitPrefetch32(a[15]),!(s&&!s())){i();var c=a[r]&e.shifterOperand;e.cpsrN=c>>31,e.cpsrZ=!(c&4294967295),e.cpsrC=e.shifterCarryOut}}};F.prototype.constructUMLAL=function(t,r,i,s,e){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(e&&!e())){a.cycles+=2,a.mmu.waitMul(i);var n=((p[s]&4294901760)>>>0)*(p[i]>>>0),o=(p[s]&65535)*(p[i]>>>0),l=(p[r]>>>0)+n+o;p[r]=l,p[t]+=l*c}}};F.prototype.constructUMLALS=function(t,r,i,s,e){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(e&&!e())){a.cycles+=2,a.mmu.waitMul(i);var n=((p[s]&4294901760)>>>0)*(p[i]>>>0),o=(p[s]&65535)*(p[i]>>>0),l=(p[r]>>>0)+n+o;p[r]=l,p[t]+=l*c,a.cpsrN=p[t]>>31,a.cpsrZ=!(p[t]&4294967295||p[r]&4294967295)}}};F.prototype.constructUMULL=function(t,r,i,s,e){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(e&&!e())){++a.cycles,a.mmu.waitMul(p[i]);var n=((p[s]&4294901760)>>>0)*(p[i]>>>0),o=((p[s]&65535)>>>0)*(p[i]>>>0);p[r]=(n&4294967295)+(o&4294967295)&4294967295,p[t]=n*c+o*c>>>0}}};F.prototype.constructUMULLS=function(t,r,i,s,e){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(e&&!e())){++a.cycles,a.mmu.waitMul(p[i]);var n=((p[s]&4294901760)>>>0)*(p[i]>>>0),o=((p[s]&65535)>>>0)*(p[i]>>>0);p[r]=(n&4294967295)+(o&4294967295)&4294967295,p[t]=n*c+o*c>>>0,a.cpsrN=p[t]>>31,a.cpsrZ=!(p[t]&4294967295||p[r]&4294967295)}}};F.prototype.constructVFP3Register=function(t,r,i,s,e,a,c){var p=this.cpu,n=e?p.dfprs:p.sfprs;return function(){if(p.mmu.waitPrefetch32(p.gprs[15]),!(t&&!t())){switch(r){case 2:switch(a){case 0:n[s]=n[i]*n[c];return}break;case 3:switch(a){case 0:n[s]=n[i]+n[c];return;case 2:n[s]=n[i]-n[c];return}break;case 8:switch(a){case 0:n[s]=n[i]/n[c];return}break}console.log("Unsupported instruction: "+_(r)+" "+_(a))}}};F.prototype.constructVCVT=function(t,r,i,s,e,a,c,p){var n=this.cpu,o=n.sfprs,l=n.dfprs,m=n.ifprs;return function(){if(n.mmu.waitPrefetch32(n.gprs[15]),!(t&&!t())){var A,h;s&&e?A=l[i]:s?A=o[i]:A=m[i],s?h=c?Math.floor(A):Math.round(A):h=A,s?m[r]=h:e?l[r]=h:o[r]=h}}};F.prototype.constructVCVTF=function(t,r,i,s){var e=this.cpu,a=e.sfprs,c=e.dfprs;return function(){if(e.mmu.waitPrefetch32(e.gprs[15]),!(t&&!t())){var p=s?c[i]:a[i];s?a[r]=p:c[r]=p}}};F.prototype.constructVLDR=function(t,r,i,s){var e=this.cpu,a=e.ifprs;return function(){if(e.mmu.waitPrefetch32(e.gprs[15]),t&&!t())return;let c=i();s?a[r]=e.mmu.load32(c):(a[r]=e.mmu.load32(c),a[r+1]=e.mmu.load32(c+4)),e.mmu.wait32(c),e.mmu.wait32(e.gprs[15])}};F.prototype.constructVSTR=function(t,r,i,s){var e=this.cpu,a=e.ifprs;return function(){if(e.mmu.waitPrefetch32(e.gprs[15]),t&&!t())return;let c=i();s?e.mmu.store32(c,a[r]):(e.mmu.store32(c,a[r]),e.mmu.store32(c+4,a[r+1])),e.mmu.wait32(c),e.mmu.wait32(e.gprs[15])}};F.prototype.constructVPUSH=function(t,r,i,s){var e=this.cpu,a=e.ifprs;return function(){if(e.mmu.waitPrefetch32(e.gprs[15]),t&&!t())return;let c=e.gprs[13]-i*4;e.gprs[13]=c;for(let p=0;p>>0)+(i.cpsrC?1:0),a=s[t],c=(a>>>0)+e,p=a>>31,n=c>>31,o=e>>31;i.cpsrN=n,i.cpsrZ=!(c&4294967295),i.cpsrC=c>4294967295,i.cpsrV=p==o&&p!=n&&o!=n,s[t]=c}};f.prototype.constructADD1=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){s.mmu.waitPrefetch(e[15]);var a=(e[r]>>>0)+i;s.cpsrN=a>>31,s.cpsrZ=!(a&4294967295),s.cpsrC=a>4294967295,s.cpsrV=!(e[r]>>31)&&(e[r]>>31^a)>>31&&a>>31,e[t]=a}};f.prototype.constructADD2=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=(s[t]>>>0)+r;i.cpsrN=e>>31,i.cpsrZ=!(e&4294967295),i.cpsrC=e>4294967295,i.cpsrV=!(s[t]>>31)&&(s[t]^e)>>31&&(r^e)>>31,s[t]=e}};f.prototype.constructADD3=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){s.mmu.waitPrefetch(e[15]);var a=(e[r]>>>0)+(e[i]>>>0);s.cpsrN=a>>31,s.cpsrZ=!(a&4294967295),s.cpsrC=a>4294967295,s.cpsrV=!((e[r]^e[i])>>31)&&(e[r]^a)>>31&&(e[i]^a)>>31,e[t]=a}};f.prototype.constructADD4=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),s[t]+=s[r]}};f.prototype.constructADD5=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),s[t]=(s[15]&4294967292)+r}};f.prototype.constructADD6=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),s[t]=s[13]+r}};f.prototype.constructADD7=function(t){var r=this.cpu,i=r.gprs;return function(){r.mmu.waitPrefetch(i[15]),i[13]+=t}};f.prototype.constructAND=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),s[t]=s[t]&s[r],i.cpsrN=s[t]>>31,i.cpsrZ=!(s[t]&4294967295)}};f.prototype.constructASR1=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){s.mmu.waitPrefetch(e[15]),i==0?(s.cpsrC=e[r]>>31,s.cpsrC?e[t]=4294967295:e[t]=0):(s.cpsrC=e[r]&1<>i),s.cpsrN=e[t]>>31,s.cpsrZ=!(e[t]&4294967295)}};f.prototype.constructASR2=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=s[r]&255;e&&(e<32?(i.cpsrC=s[t]&1<>=e):(i.cpsrC=s[t]>>31,i.cpsrC?s[t]=4294967295:s[t]=0)),i.cpsrN=s[t]>>31,i.cpsrZ=!(s[t]&4294967295)}};f.prototype.constructB1=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),r()&&(s[15]+=t)}};f.prototype.constructB2=function(t){var r=this.cpu,i=r.gprs;return function(){r.mmu.waitPrefetch(i[15]),i[15]+=t}};f.prototype.constructBIC=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),s[t]=s[t]&~s[r],i.cpsrN=s[t]>>31,i.cpsrZ=!(s[t]&4294967295)}};f.prototype.constructBL1=function(t){var r=this.cpu,i=r.gprs;return function(){r.mmu.waitPrefetch(i[15]),i[14]=i[15]+t}};f.prototype.constructBL2=function(t){var r=this.cpu,i=r.gprs;return function(){r.mmu.waitPrefetch(i[15]);var s=i[15];i[15]=i[14]+(t<<1),i[14]=s-1}};f.prototype.constructBX=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),i.switchExecMode(s[r]&1);var e=0;r==15&&(e=s[r]&2),s[15]=s[r]&4294967294-e}};f.prototype.constructCMN=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=(s[t]>>>0)+(s[r]>>>0);i.cpsrN=e>>31,i.cpsrZ=!(e&4294967295),i.cpsrC=e>4294967295,i.cpsrV=s[t]>>31==s[r]>>31&&s[t]>>31!=e>>31&&s[r]>>31!=e>>31}};f.prototype.constructCMP1=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=s[t]-r;i.cpsrN=e>>31,i.cpsrZ=!(e&4294967295),i.cpsrC=s[t]>>>0>=r,i.cpsrV=s[t]>>31&&(s[t]^e)>>31}};f.prototype.constructCMP2=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=s[t],a=s[r],c=e-a,p=c>>31,n=e>>31;i.cpsrN=p,i.cpsrZ=!(c&4294967295),i.cpsrC=e>>>0>=a>>>0,i.cpsrV=n!=a>>31&&n!=p}};f.prototype.constructCMP3=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=s[t]-s[r];i.cpsrN=e>>31,i.cpsrZ=!(e&4294967295),i.cpsrC=s[t]>>>0>=s[r]>>>0,i.cpsrV=(s[t]^s[r])>>31&&(s[t]^e)>>31}};f.prototype.constructEOR=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),s[t]=s[t]^s[r],i.cpsrN=s[t]>>31,i.cpsrZ=!(s[t]&4294967295)}};f.prototype.constructLDMIA=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=s[t],a=0,c,p;for(c=1,p=0;p<8;c<<=1,++p)r&c&&(s[p]=i.mmu.load32(e),e+=4,++a);i.mmu.waitMulti32(e,a),1<>31,s.cpsrZ=!(e[t]&4294967295)}};f.prototype.constructLSL2=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=s[r]&255;e&&(e<32?(i.cpsrC=s[t]&1<<32-e,s[t]<<=e):(e>32?i.cpsrC=0:i.cpsrC=s[t]&1,s[t]=0)),i.cpsrN=s[t]>>31,i.cpsrZ=!(s[t]&4294967295)}};f.prototype.constructLSR1=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){s.mmu.waitPrefetch(e[15]),i==0?(s.cpsrC=e[r]>>31,e[t]=0):(s.cpsrC=e[r]&1<>>i),s.cpsrN=0,s.cpsrZ=!(e[t]&4294967295)}};f.prototype.constructLSR2=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=s[r]&255;e&&(e<32?(i.cpsrC=s[t]&1<>>=e):(e>32?i.cpsrC=0:i.cpsrC=s[t]>>31,s[t]=0)),i.cpsrN=s[t]>>31,i.cpsrZ=!(s[t]&4294967295)}};f.prototype.constructMOV1=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),s[t]=r,i.cpsrN=r>>31,i.cpsrZ=!(r&4294967295)}};f.prototype.constructMOV2=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){s.mmu.waitPrefetch(e[15]);var a=e[r];s.cpsrN=a>>31,s.cpsrZ=!(a&4294967295),s.cpsrC=0,s.cpsrV=0,e[t]=a}};f.prototype.constructMOV3=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),s[t]=s[r]}};f.prototype.constructMUL=function(t,r){var i=this.cpu,s=i.gprs;return function(){if(i.mmu.waitPrefetch(s[15]),i.mmu.waitMul(s[r]),s[r]&4294901760&&s[t]&4294901760){var e=(s[t]&4294901760)*s[r]&4294967295,a=(s[t]&65535)*s[r]&4294967295;s[t]=e+a&4294967295}else s[t]*=s[r];i.cpsrN=s[t]>>31,i.cpsrZ=!(s[t]&4294967295)}};f.prototype.constructMVN=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),s[t]=~s[r],i.cpsrN=s[t]>>31,i.cpsrZ=!(s[t]&4294967295)}};f.prototype.constructNEG=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=-s[r];i.cpsrN=e>>31,i.cpsrZ=!(e&4294967295),i.cpsrC=0>=e>>>0,i.cpsrV=s[r]>>31&&e>>31,s[t]=e}};f.prototype.constructORR=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),s[t]=s[t]|s[r],i.cpsrN=s[t]>>31,i.cpsrZ=!(s[t]&4294967295)}};f.prototype.constructPOP=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]),++i.cycles;var e=s[13],a=0,c,p;for(c=1,p=0;p<8;c<<=1,++p)t&c&&(i.mmu.waitSeq32(e),s[p]=i.mmu.load32(e),e+=4,++a);r&&(s[15]=i.mmu.load32(e)&4294967294,e+=4,++a),i.mmu.waitMulti32(e,a),s[13]=e}};f.prototype.constructPUSH=function(t,r){var i=this.cpu,s=i.gprs;return function(){var e=s[13]-4,a=0;i.mmu.waitPrefetch(s[15]),r&&(i.mmu.store32(e,s[14]),e-=4,++a);var c,p;for(c=128,p=7;c;c>>=1,--p)if(t&c){i.mmu.store32(e,s[p]),e-=4,++a;break}for(c>>=1,--p;c;c>>=1,--p)t&c&&(i.mmu.store32(e,s[p]),e-=4,++a);i.mmu.waitMulti32(e,a),s[13]=e+4}};f.prototype.constructROR=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=s[r]&255;if(e){var a=e&31;a>0?(i.cpsrC=s[t]&1<>>a|s[t]<<32-a):i.cpsrC=s[t]>>31}i.cpsrN=s[t]>>31,i.cpsrZ=!(s[t]&4294967295)}};f.prototype.constructSBC=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=(s[r]>>>0)+(i.cpsrC?0:1),a=(s[t]>>>0)-e;i.cpsrN=a>>31,i.cpsrZ=!(a&4294967295),i.cpsrC=s[t]>>>0>=a>>>0,i.cpsrV=(s[t]^e)>>31&&(s[t]^a)>>31,s[t]=a}};f.prototype.constructSTMIA=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.wait(s[15]);var e=s[t],a=0,c,p;for(c=1,p=0;p<8;c<<=1,++p)if(r&c){i.mmu.store32(e,s[p]),e+=4,++a;break}for(c<<=1,++p;p<8;c<<=1,++p)r&c&&(i.mmu.store32(e,s[p]),e+=4,++a);i.mmu.waitMulti32(e,a),s[t]=e}};f.prototype.constructSTR1=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){var a=e[r]+i;s.mmu.store32(a,e[t]),s.mmu.wait(e[15]),s.mmu.wait32(a)}};f.prototype.constructSTR2=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){s.mmu.store32(e[r]+e[i],e[t]),s.mmu.wait(e[15]),s.mmu.wait32(e[r]+e[i])}};f.prototype.constructSTR3=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.store32(s[13]+r,s[t]),i.mmu.wait(s[15]),i.mmu.wait32(s[13]+r)}};f.prototype.constructSTRB1=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){var a=e[r]+i;s.mmu.store8(a,e[t]),s.mmu.wait(e[15]),s.mmu.wait(a)}};f.prototype.constructSTRB2=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){s.mmu.store8(e[r]+e[i],e[t]),s.mmu.wait(e[15]),s.mmu.wait(e[r]+e[i])}};f.prototype.constructSTRH1=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){var a=e[r]+i;s.mmu.store16(a,e[t]),s.mmu.wait(e[15]),s.mmu.wait(a)}};f.prototype.constructSTRH2=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){s.mmu.store16(e[r]+e[i],e[t]),s.mmu.wait(e[15]),s.mmu.wait(e[r]+e[i])}};f.prototype.constructSUB1=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){s.mmu.waitPrefetch(e[15]);var a=e[r]-i;s.cpsrN=a>>31,s.cpsrZ=!(a&4294967295),s.cpsrC=e[r]>>>0>=i,s.cpsrV=e[r]>>31&&(e[r]^a)>>31,e[t]=a}};f.prototype.constructSUB2=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=s[t]-r;i.cpsrN=e>>31,i.cpsrZ=!(e&4294967295),i.cpsrC=s[t]>>>0>=r,i.cpsrV=s[t]>>31&&(s[t]^e)>>31,s[t]=e}};f.prototype.constructSUB3=function(t,r,i){var s=this.cpu,e=s.gprs;return function(){s.mmu.waitPrefetch(e[15]);var a=e[r]-e[i];s.cpsrN=a>>31,s.cpsrZ=!(a&4294967295),s.cpsrC=e[r]>>>0>=e[i]>>>0,s.cpsrV=e[r]>>31!=e[i]>>31&&e[r]>>31!=a>>31,e[t]=a}};f.prototype.constructSWI=function(t){var r=this.cpu,i=r.gprs;return function(){r.irq.swi(t),r.mmu.waitPrefetch(i[15])}};f.prototype.constructTST=function(t,r){var i=this.cpu,s=i.gprs;return function(){i.mmu.waitPrefetch(s[15]);var e=s[t]&s[r];i.cpsrN=e>>31,i.cpsrZ=!(e&4294967295)}};function y(){this.SP=13,this.LR=14,this.PC=15,this.MODE_ARM=0,this.MODE_THUMB=1,this.MODE_USER=16,this.MODE_FIQ=17,this.MODE_IRQ=18,this.MODE_SUPERVISOR=19,this.MODE_ABORT=23,this.MODE_UNDEFINED=27,this.MODE_SYSTEM=31,this.BANK_NONE=0,this.BANK_FIQ=1,this.BANK_IRQ=2,this.BANK_SUPERVISOR=3,this.BANK_ABORT=4,this.BANK_UNDEFINED=5,this.WORD_SIZE_ARM=4,this.WORD_SIZE_THUMB=2,this.BASE_RESET=0,this.BASE_UNDEF=4,this.BASE_SWI=8,this.BASE_PABT=12,this.BASE_DABT=16,this.BASE_IRQ=24,this.BASE_FIQ=28,this.armCompiler=new F(this),this.thumbCompiler=new f(this),this.generateConds(),this.gprs=new Int32Array(16),this.dfprs=new Float64Array(16),this.sfprs=new Float32Array(this.dfprs.buffer),this.ifprs=new Int32Array(this.dfprs.buffer)}y.prototype.resetCPU=function(t){for(var r=0;r<15;++r)this.gprs[r]=0;this.gprs[15]=t+4,this.dfprs.set(0),this.loadInstruction=this.loadInstructionArm,this.execMode=0,this.instructionWidth=4,this.mode=31,this.cpsrI=!1,this.cpsrF=!1,this.cpsrV=!1,this.cpsrC=!1,this.cpsrZ=!1,this.cpsrN=!1,this.bankedRegisters=[new Int32Array(7),new Int32Array(7),new Int32Array(2),new Int32Array(2),new Int32Array(2),new Int32Array(2)],this.spsr=0,this.bankedSPSRs=new Int32Array(6),this.cycles=0,this.shifterOperand=0,this.shifterCarryOut=0,this.page=null,this.pageId=0,this.pageRegion=-1,this.instruction=null,this.irq.clear();var i=this.gprs,s=this.mmu;this.step=function(){var e=this.instruction||(this.instruction=this.loadInstruction(i[15]-this.instructionWidth));if(i[15]+=this.instructionWidth,this.conditionPassed=!0,e(),!e.writesPC)this.instruction!=null&&((e.next==null||e.next.page.invalid)&&(e.next=this.loadInstruction(i[15]-this.instructionWidth)),this.instruction=e.next);else if(this.conditionPassed){var a=i[15]&=4294967294;this.execMode==0?(s.wait32(a),s.waitPrefetch32(a)):(s.wait(a),s.waitPrefetch(a)),i[15]+=this.instructionWidth,e.fixedJump?this.instruction!=null&&((e.next==null||e.next.page.invalid)&&(e.next=this.loadInstruction(i[15]-this.instructionWidth)),this.instruction=e.next):this.instruction=null}else this.instruction=null;this.irq.updateTimers()}};y.prototype.freeze=function(){return{PC:this.gprs[15]-this.instructionWidth,SP:this.gprs[13],gprs:[this.gprs[0],this.gprs[1],this.gprs[2],this.gprs[3],this.gprs[4],this.gprs[5],this.gprs[6],this.gprs[7],this.gprs[8],this.gprs[9],this.gprs[10],this.gprs[11],this.gprs[12],this.gprs[13],this.gprs[14],this.gprs[15]],sfprs:this.sfprs.slice(),dfprs:this.dfprs.slice(),ifprs:this.ifprs.slice(),mode:this.mode,cpsrI:this.cpsrI,cpsrF:this.cpsrF,cpsrV:this.cpsrV,cpsrC:this.cpsrC,cpsrZ:this.cpsrZ,cpsrN:this.cpsrN,bankedRegisters:[[this.bankedRegisters[0][0],this.bankedRegisters[0][1],this.bankedRegisters[0][2],this.bankedRegisters[0][3],this.bankedRegisters[0][4],this.bankedRegisters[0][5],this.bankedRegisters[0][6]],[this.bankedRegisters[1][0],this.bankedRegisters[1][1],this.bankedRegisters[1][2],this.bankedRegisters[1][3],this.bankedRegisters[1][4],this.bankedRegisters[1][5],this.bankedRegisters[1][6]],[this.bankedRegisters[2][0],this.bankedRegisters[2][1]],[this.bankedRegisters[3][0],this.bankedRegisters[3][1]],[this.bankedRegisters[4][0],this.bankedRegisters[4][1]],[this.bankedRegisters[5][0],this.bankedRegisters[5][1]]],spsr:this.spsr,bankedSPSRs:[this.bankedSPSRs[0],this.bankedSPSRs[1],this.bankedSPSRs[2],this.bankedSPSRs[3],this.bankedSPSRs[4],this.bankedSPSRs[5]],cycles:this.cycles,instructionWidth:this.instructionWidth}};y.prototype.defrost=function(t){this.instruction=null,this.page=null,this.pageId=0,this.pageRegion=-1,this.gprs[0]=t.gprs[0],this.gprs[1]=t.gprs[1],this.gprs[2]=t.gprs[2],this.gprs[3]=t.gprs[3],this.gprs[4]=t.gprs[4],this.gprs[5]=t.gprs[5],this.gprs[6]=t.gprs[6],this.gprs[7]=t.gprs[7],this.gprs[8]=t.gprs[8],this.gprs[9]=t.gprs[9],this.gprs[10]=t.gprs[10],this.gprs[11]=t.gprs[11],this.gprs[12]=t.gprs[12],this.gprs[13]=t.gprs[13],this.gprs[14]=t.gprs[14],this.gprs[15]=t.gprs[15],this.ifprs.set(t.ifprs),this.mode=t.mode,this.cpsrI=t.cpsrI,this.cpsrF=t.cpsrF,this.cpsrV=t.cpsrV,this.cpsrC=t.cpsrC,this.cpsrZ=t.cpsrZ,this.cpsrN=t.cpsrN,this.bankedRegisters[0][0]=t.bankedRegisters[0][0],this.bankedRegisters[0][1]=t.bankedRegisters[0][1],this.bankedRegisters[0][2]=t.bankedRegisters[0][2],this.bankedRegisters[0][3]=t.bankedRegisters[0][3],this.bankedRegisters[0][4]=t.bankedRegisters[0][4],this.bankedRegisters[0][5]=t.bankedRegisters[0][5],this.bankedRegisters[0][6]=t.bankedRegisters[0][6],this.bankedRegisters[1][0]=t.bankedRegisters[1][0],this.bankedRegisters[1][1]=t.bankedRegisters[1][1],this.bankedRegisters[1][2]=t.bankedRegisters[1][2],this.bankedRegisters[1][3]=t.bankedRegisters[1][3],this.bankedRegisters[1][4]=t.bankedRegisters[1][4],this.bankedRegisters[1][5]=t.bankedRegisters[1][5],this.bankedRegisters[1][6]=t.bankedRegisters[1][6],this.bankedRegisters[2][0]=t.bankedRegisters[2][0],this.bankedRegisters[2][1]=t.bankedRegisters[2][1],this.bankedRegisters[3][0]=t.bankedRegisters[3][0],this.bankedRegisters[3][1]=t.bankedRegisters[3][1],this.bankedRegisters[4][0]=t.bankedRegisters[4][0],this.bankedRegisters[4][1]=t.bankedRegisters[4][1],this.bankedRegisters[5][0]=t.bankedRegisters[5][0],this.bankedRegisters[5][1]=t.bankedRegisters[5][1],this.spsr=t.spsr,this.bankedSPSRs[0]=t.bankedSPSRs[0],this.bankedSPSRs[1]=t.bankedSPSRs[1],this.bankedSPSRs[2]=t.bankedSPSRs[2],this.bankedSPSRs[3]=t.bankedSPSRs[3],this.bankedSPSRs[4]=t.bankedSPSRs[4],this.bankedSPSRs[5]=t.bankedSPSRs[5],this.cycles=t.cycles,this.instructionWidth=t.instructionWidth,this.loadInstruction=t.instructionWidth==2?this.loadInstructionThumb:this.loadInstructionArm,this.execMode=t.instructionWidth==2?1:0};y.prototype.fetchPage=function(t){var r=this.mmu,i=t>>>r.BASE_OFFSET,s=r.addressToPage(i,t&r.OFFSET_MASK);if(i==this.pageRegion){if(s==this.pageId&&!this.page.invalid)return;this.pageId=s}else this.pageMask=r.memory[i].PAGE_MASK,this.pageRegion=i,this.pageId=s;this.page=r.accessPage(i,s)};y.prototype.loadInstructionArm=function(t){var r=null;this.fetchPage(t);var i=(t&this.pageMask)>>2;if(r=this.page.arm[i],r)return r;var s=this.mmu.load32(t)>>>0;return r=this.compileArm(s),r.next=null,r.page=this.page,r.address=t,r.opcode=s,this.page.arm[i]=r,r};y.prototype.loadInstructionThumb=function(t){var r=null;this.fetchPage(t);var i=(t&this.pageMask)>>1;if(r=this.page.thumb[i],r)return r;var s=this.mmu.load16(t);return r=this.compileThumb(s),r.next=null,r.page=this.page,r.address=t,r.opcode=s,this.page.thumb[i]=r,r};y.prototype.selectBank=function(t){switch(t){case 16:case 31:return 0;case 17:return 1;case 18:return 2;case 19:return 3;case 23:return 4;case 27:return 5;default:throw new Z("Invalid user mode "+t+" passed to selectBank")}};y.prototype.switchExecMode=function(t){this.execMode!=t&&(this.execMode=t,t==0?(this.instructionWidth=4,this.loadInstruction=this.loadInstructionArm):(this.instructionWidth=2,this.loadInstruction=this.loadInstructionThumb))};y.prototype.switchMode=function(t){if(t!=this.mode){if(t!=16||t!=31){var r=this.selectBank(t),i=this.selectBank(this.mode);if(r!=i){if(t==17||this.mode==17){var s=i==1?1:0,e=r==1?1:0;this.bankedRegisters[s][2]=this.gprs[8],this.bankedRegisters[s][3]=this.gprs[9],this.bankedRegisters[s][4]=this.gprs[10],this.bankedRegisters[s][5]=this.gprs[11],this.bankedRegisters[s][6]=this.gprs[12],this.gprs[8]=this.bankedRegisters[e][2],this.gprs[9]=this.bankedRegisters[e][3],this.gprs[10]=this.bankedRegisters[e][4],this.gprs[11]=this.bankedRegisters[e][5],this.gprs[12]=this.bankedRegisters[e][6]}this.bankedRegisters[i][0]=this.gprs[13],this.bankedRegisters[i][1]=this.gprs[14],this.gprs[13]=this.bankedRegisters[r][0],this.gprs[14]=this.bankedRegisters[r][1],this.bankedSPSRs[i]=this.spsr,this.spsr=this.bankedSPSRs[r]}}this.mode=t}};y.prototype.packCPSR=function(){return this.mode|this.execMode<<5|this.cpsrF<<6|this.cpsrI<<7|this.cpsrN<<31|this.cpsrZ<<30|this.cpsrC<<29|this.cpsrV<<28};y.prototype.unpackCPSR=function(t){this.switchMode(t&31),this.switchExecMode(!!(t&32)),this.cpsrF=t&64,this.cpsrI=t&128,this.cpsrN=t&2147483648,this.cpsrZ=t&1073741824,this.cpsrC=t&536870912,this.cpsrV=t&268435456,this.irq.testIRQ()};y.prototype.hasSPSR=function(){return this.mode!=31&&this.mode!=16};y.prototype.raiseIRQ=function(){if(!this.cpsrI){var t=this.packCPSR(),r=this.instructionWidth;this.switchMode(18),this.spsr=t,this.gprs[14]=this.gprs[15]-r+4,this.gprs[15]=this.BASE_IRQ+4,this.instruction=null,this.switchExecMode(0),this.cpsrI=!0}};y.prototype.raiseTrap=function(){var t=this.packCPSR(),r=this.instructionWidth;this.switchMode(19),this.spsr=t,this.gprs[14]=this.gprs[15]-r,this.gprs[15]=this.BASE_SWI+4,this.instruction=null,this.switchExecMode(0),this.cpsrI=!0};y.prototype.badOp=function(t){var r=function(){throw new Z("Illegal instruction: 0x"+t.toString(16))};return r.writesPC=!0,r.fixedJump=!1,r};y.prototype.generateConds=function(){var t=this;this.conds=[function(){return t.conditionPassed=t.cpsrZ},function(){return t.conditionPassed=!t.cpsrZ},function(){return t.conditionPassed=t.cpsrC},function(){return t.conditionPassed=!t.cpsrC},function(){return t.conditionPassed=t.cpsrN},function(){return t.conditionPassed=!t.cpsrN},function(){return t.conditionPassed=t.cpsrV},function(){return t.conditionPassed=!t.cpsrV},function(){return t.conditionPassed=t.cpsrC&&!t.cpsrZ},function(){return t.conditionPassed=!t.cpsrC||t.cpsrZ},function(){return t.conditionPassed=!t.cpsrN==!t.cpsrV},function(){return t.conditionPassed=!t.cpsrN!=!t.cpsrV},function(){return t.conditionPassed=!t.cpsrZ&&!t.cpsrN==!t.cpsrV},function(){return t.conditionPassed=t.cpsrZ||!t.cpsrN!=!t.cpsrV},null,null]};y.prototype.barrelShiftImmediate=function(t,r,i){var s=this,e=this.gprs,a=this.badOp;switch(t){case 0:r?a=function(){s.shifterOperand=e[i]<>>r,s.shifterCarryOut=e[i]&1<>r,s.shifterCarryOut=e[i]&1<>>r|e[i]<<32-r,s.shifterCarryOut=e[i]&1<>>1,s.shifterCarryOut=e[i]&1};break}return a};y.prototype.compileArm=function(t){var r=this.badOp(t),i=t&234881024,s=this,e=this.gprs,a=this.conds[(t&4026531840)>>>28];if((t&268435440)==19922704){var c=t&15;r=this.armCompiler.constructBX(c,a),r.writesPC=!0,r.fixedJump=!1}else if(!(t&201326592)&&(i==33554432||(t&144)!=144)){var p=t&31457280,n=t&1048576,o=!1;if((p&25165824)==16777216&&!n){var l=t&4194304;if((t&11595776)==2158592){var c=t&15,m=t&255,A=(t&3840)>>7;m=m>>>A|m<<32-A,r=this.armCompiler.constructMSR(c,l,t,m,a),r.writesPC=!1}else if((t&12517376)==983040){var h=(t&61440)>>12;r=this.armCompiler.constructMRS(h,l,a),r.writesPC=h==15}}else{var C=(t&983040)>>16,h=(t&61440)>>12,x=t&96,c=t&15,v=function(){throw new Z("BUG: invalid barrel shifter")};if(t&33554432){var m=t&255,ar=(t&3840)>>7;ar?v=this.armCompiler.constructAddressingMode1ImmediateRotate(m,ar):v=this.armCompiler.constructAddressingMode1Immediate(m)}else if(t&16){var P=(t&3840)>>8;switch(o=!0,x){case 0:v=this.armCompiler.constructAddressingMode1LSL(P,c);break;case 32:v=this.armCompiler.constructAddressingMode1LSR(P,c);break;case 64:v=this.armCompiler.constructAddressingMode1ASR(P,c);break;case 96:v=this.armCompiler.constructAddressingMode1ROR(P,c);break}}else{var m=(t&3968)>>7;v=this.barrelShiftImmediate(x,m,c)}switch(p){case 0:n?r=this.armCompiler.constructANDS(h,C,v,a):r=this.armCompiler.constructAND(h,C,v,a);break;case 2097152:n?r=this.armCompiler.constructEORS(h,C,v,a):r=this.armCompiler.constructEOR(h,C,v,a);break;case 4194304:n?r=this.armCompiler.constructSUBS(h,C,v,a):r=this.armCompiler.constructSUB(h,C,v,a);break;case 6291456:n?r=this.armCompiler.constructRSBS(h,C,v,a):r=this.armCompiler.constructRSB(h,C,v,a);break;case 8388608:n?r=this.armCompiler.constructADDS(h,C,v,a):r=this.armCompiler.constructADD(h,C,v,a);break;case 10485760:n?r=this.armCompiler.constructADCS(h,C,v,a):r=this.armCompiler.constructADC(h,C,v,a);break;case 12582912:n?r=this.armCompiler.constructSBCS(h,C,v,a):r=this.armCompiler.constructSBC(h,C,v,a);break;case 14680064:n?r=this.armCompiler.constructRSCS(h,C,v,a):r=this.armCompiler.constructRSC(h,C,v,a);break;case 16777216:r=this.armCompiler.constructTST(h,C,v,a);break;case 18874368:r=this.armCompiler.constructTEQ(h,C,v,a);break;case 20971520:r=this.armCompiler.constructCMP(h,C,v,a);break;case 23068672:r=this.armCompiler.constructCMN(h,C,v,a);break;case 25165824:n?r=this.armCompiler.constructORRS(h,C,v,a):r=this.armCompiler.constructORR(h,C,v,a);break;case 27262976:n?r=this.armCompiler.constructMOVS(h,C,v,a):r=this.armCompiler.constructMOV(h,C,v,a);break;case 29360128:n?r=this.armCompiler.constructBICS(h,C,v,a):r=this.armCompiler.constructBIC(h,C,v,a);break;case 31457280:n?r=this.armCompiler.constructMVNS(h,C,v,a):r=this.armCompiler.constructMVN(h,C,v,a);break}r.writesPC=h==15}}else if((t&263196656)==16777360){var c=t&15,h=t>>12&15,C=t>>16&15;t&4194304?r=this.armCompiler.constructSWPB(h,C,c,a):r=this.armCompiler.constructSWP(h,C,c,a),r.writesPC=h==15}else switch(i){case 0:if((t&16777456)==144){var h=(t&983040)>>16,C=(t&61440)>>12,P=(t&3840)>>8,c=t&15;switch(t&15728640){case 0:r=this.armCompiler.constructMUL(h,P,c,a);break;case 1048576:r=this.armCompiler.constructMULS(h,P,c,a);break;case 2097152:r=this.armCompiler.constructMLA(h,C,P,c,a);break;case 3145728:r=this.armCompiler.constructMLAS(h,C,P,c,a);break;case 8388608:r=this.armCompiler.constructUMULL(h,C,P,c,a);break;case 9437184:r=this.armCompiler.constructUMULLS(h,C,P,c,a);break;case 10485760:r=this.armCompiler.constructUMLAL(h,C,P,c,a);break;case 11534336:r=this.armCompiler.constructUMLALS(h,C,P,c,a);break;case 12582912:r=this.armCompiler.constructSMULL(h,C,P,c,a);break;case 13631488:r=this.armCompiler.constructSMULLS(h,C,P,c,a);break;case 14680064:r=this.armCompiler.constructSMLAL(h,C,P,c,a);break;case 15728640:r=this.armCompiler.constructSMLALS(h,C,P,c,a);break}r.writesPC=h==15}else{var L=t&1048576,h=(t&61440)>>12,Sr=(t&3840)>>4,Mr=c=t&15,cr=t&32,n=t&64,W=t&2097152,i=t&4194304,g;if(i){var m=Mr|Sr;g=this.armCompiler.constructAddressingMode23Immediate(t,m,a)}else g=this.armCompiler.constructAddressingMode23Register(t,c,a);g.writesPC=!!W&&C==15,(t&144)==144&&(L?cr?n?r=this.armCompiler.constructLDRSH(h,g,a):r=this.armCompiler.constructLDRH(h,g,a):n&&(r=this.armCompiler.constructLDRSB(h,g,a)):!n&&cr&&(r=this.armCompiler.constructSTRH(h,g,a))),r.writesPC=h==15||g.writesPC}break;case 67108864:case 100663296:var h=(t&61440)>>12,L=t&1048576,ur=t&4194304,i=t&33554432;if((t&4293918960)==(3891265776|0)){var m=t&15;throw new Z("Program exited ("+m+")")}var g=function(){throw new Z("Unimplemented memory access: 0x"+t.toString(16))};if(~t&16777216&&(t&=4292870143),i){var c=t&15,x=t&96,pr=(t&3968)>>7;x||pr?(v=this.barrelShiftImmediate(x,pr,c),g=this.armCompiler.constructAddressingMode2RegisterShifted(t,v,a)):g=this.armCompiler.constructAddressingMode23Register(t,c,a)}else{var U=t&4095;g=this.armCompiler.constructAddressingMode23Immediate(t,U,a)}L?ur?r=this.armCompiler.constructLDRB(h,g,a):r=this.armCompiler.constructLDR(h,g,a):ur?r=this.armCompiler.constructSTRB(h,g,a):r=this.armCompiler.constructSTR(h,g,a),r.writesPC=L&&(h==15||g.writesPC);break;case 134217728:var L=t&1048576,W=t&2097152,V=t&4194304,q=t&8388608,$=t&16777216,P=t&65535,C=(t&983040)>>16,g,m=0,U=0,Q=!1;if(q){$&&(m=4);for(var K=1,i=0;i<16;K<<=1,++i)P&K&&(W&&i==C&&!U&&(P&=~K,m+=4,Q=!0),U+=4)}else{$||(m=4);for(var K=1,i=0;i<16;K<<=1,++i)P&K&&(W&&i==C&&!U&&(P&=~K,m+=4,Q=!0),m-=4,U-=4)}W?g=this.armCompiler.constructAddressingMode4Writeback(m,U,C,Q):g=this.armCompiler.constructAddressingMode4(m,C),L?(V?r=this.armCompiler.constructLDMS(P,g,a):r=this.armCompiler.constructLDM(P,g,a),r.writesPC=!!(P&1<<15)):(V?r=this.armCompiler.constructSTMS(P,g,a):r=this.armCompiler.constructSTM(P,g,a),r.writesPC=!1);break;case 167772160:var m=t&16777215;m&8388608&&(m|=4278190080),m<<=2;var Ar=t&16777216;Ar?r=this.armCompiler.constructBL(m,a):r=this.armCompiler.constructB(m,a),r.writesPC=!0,r.fixedJump=!0;break;case 201326592:var L=t&1048576,W=t&2097152,V=t&4194304,q=t&8388608,$=t&16777216,C=(t&983040)>>16,G=(t&61440)>>12,Br=(t&3840)>>8,m=t&255,wr=t>>28&15,a=this.conds[wr];if((t&264179456)==221055488)r=this.armCompiler.constructVPUSH(a,G<<1|(V?1:0),m,!0);else if((t&264179456)==221055744)r=this.armCompiler.constructVPUSH(a,((V?16:0)|G)*2,m,!1);else if((t&264179456)==213715456)r=this.armCompiler.constructVPOP(a,G<<1|(V?1:0),m,!0);else if((t&264179456)==213715712)r=this.armCompiler.constructVPOP(a,((V?16:0)|G)*2,m,!1);else if((t&253759232)==218106368){m*=4,q||(m=-m);var Q=!1,J=G<<1|(V?1:0),g;W?g=this.armCompiler.constructAddressingMode4Writeback(m,U,C,Q):g=this.armCompiler.constructAddressingMode4(m,C),L?r=this.armCompiler.constructVLDR(a,J,g,!0):r=this.armCompiler.constructVSTR(a,J,g,!0)}else if((t&253759232)==218106624){m*=4,q||(m=-m);var Q=!1,J=((V?16:0)|G)*2,g;W?g=this.armCompiler.constructAddressingMode4Writeback(m,U,C,Q):g=this.armCompiler.constructAddressingMode4(m,C),L?r=this.armCompiler.constructVLDR(a,J,g,!1):r=this.armCompiler.constructVSTR(a,J,g,!1)}break;case 234881024:if((t&251658240)==251658240){var m=t&16777215;r=this.armCompiler.constructSWI(m,a),r.writesPC=!1}else if((t&263720528)==246942272){let O=t>>28&15,S=t>>22&1,b=t>>16&7,R=t>>12&15,M=t>>8&1,T=t>>7&1,w=t>>5&1,E=t&15,D=b&4,H=M!=0,Y=D?b&1:0,rr=T!=0,er=!1,Tr=M?(S?16:0)|R:R<<1|(S?1:0),kr=M?(w?16:0)|E:E<<1|(w?1:0);r=this.armCompiler.constructVCVT(a,Tr,kr,D,H,Y,rr,er),r.writesPC=!1}else if((t&264179408)==246876864){let O=t>>28&15,S=t>>22&1,b=t>>12&15,R=t>>8&1,M=t>>5&1,T=t&15,w=R!=0,E=R?(S?16:0)|b:b<<1|(S?1:0),D=R?(M?16:0)|T:T<<1|(M?1:0);r=this.armCompiler.constructVCVTF(a,E,D,w),r.writesPC=!1}else if((t&262147600)==236980736){let O=t>>28&15,S=t>>22&1,b=t>>7&1,R=t>>5&1,M=(t&15728640)>>20,T=(t&983040)>>16,w=(t&61440)>>12,E=(t&224)>>5,D=t&15,H=t>>8&1,Y=H?(S?16:0)|w:w<<1|(S?1:0),rr=H?(R?16:0)|D:D<<1|(R?1:0),er=H?(b?16:0)|T:T<<1|(b?1:0);var a=this.conds[O];r=this.armCompiler.constructVFP3Register(a,M,er,Y,H,E,rr),r.writesPC=!1}else if((t&263195728)==243271680){let O=t>>28&15,S=t>>22&1,b=t>>16&15,R=t>>12&15,M=t>>8&3,T=t>>7&1,w=t>>5&1,E=t&15,D=M==3?(S?16:0)|R:R<<1|(S?1:0),H=M==3?(w?16:0)|E:E<<1|(w?1:0),Y=M==3?(T?16:0)|b:b<<1|(T?1:0);r=this.armCompiler.constructVFP3Register(a,8,Y,D,M==3,0,H),r.writesPC=!1}else if((t&264179280)==246680128){let O=t>>28&15,S=t>>22&1,b=t>>12&15,R=t>>8&1,M=t>>7&1,T=t>>5&1,w=t&15,E=R?(S?16:0)|b:b<<1|(S?1:0),D=R?(T?16:0)|w:w<<1|(T?1:0);var a=this.conds[O];r=this.armCompiler.constructVCMP(a,E,b,R,M,D,w),r.writesPC=!1}else if((t&264179455)==246745664){let O=t>>28&15,S=t>>22&1,b=t>>12&15,R=t>>8&1,M=t>>7&1,T=t>>5&1,w=t&15,E=R?(S?16:0)|b:b<<1|(S?1:0),D=R?(T?16:0)|w:w<<1|(T?1:0);var a=this.conds[O];r=this.armCompiler.constructVCMP0(a,E,b,R,M,D,w),r.writesPC=!1}else if(t==4008835600)r=this.armCompiler.constructNOP();else if((t&266342160)==234883600){let O=t>>28&15,S=t>>20&1,b=t>>16&15,R=t>>12&15,M=t>>7&1;var a=this.conds[O];r=this.armCompiler.constructVMOV(a,S,b<<1|(M?1:0),R)}else t==3992980240?r=this.armCompiler.constructVMOV(a,!1,0,0):t==3995081488&&(r=this.armCompiler.constructVMOV(a,!1,1,1));break;default:throw new Z("Bad opcode: 0x"+t.toString(16))}return r.execMode=0,r.fixedJump=r.fixedJump||!1,r};y.prototype.compileThumb=function(t){var r=this.badOp(t&65535),i=this,s=this.gprs;if((t&64512)==16384){var e=(t&56)>>3,a=t&7;switch(t&960){case 0:r=this.thumbCompiler.constructAND(a,e);break;case 64:r=this.thumbCompiler.constructEOR(a,e);break;case 128:r=this.thumbCompiler.constructLSL2(a,e);break;case 192:r=this.thumbCompiler.constructLSR2(a,e);break;case 256:r=this.thumbCompiler.constructASR2(a,e);break;case 320:r=this.thumbCompiler.constructADC(a,e);break;case 384:r=this.thumbCompiler.constructSBC(a,e);break;case 448:r=this.thumbCompiler.constructROR(a,e);break;case 512:r=this.thumbCompiler.constructTST(a,e);break;case 576:r=this.thumbCompiler.constructNEG(a,e);break;case 640:r=this.thumbCompiler.constructCMP2(a,e);break;case 704:r=this.thumbCompiler.constructCMN(a,e);break;case 768:r=this.thumbCompiler.constructORR(a,e);break;case 832:r=this.thumbCompiler.constructMUL(a,e);break;case 896:r=this.thumbCompiler.constructBIC(a,e);break;case 960:r=this.thumbCompiler.constructMVN(a,e);break}r.writesPC=!1}else if((t&64512)==17408){var e=(t&120)>>3,c=t&7,p=t&128,a=c|p>>4;switch(t&768){case 0:r=this.thumbCompiler.constructADD4(a,e),r.writesPC=a==15;break;case 256:r=this.thumbCompiler.constructCMP3(a,e),r.writesPC=!1;break;case 512:r=this.thumbCompiler.constructMOV3(a,e),r.writesPC=a==15;break;case 768:r=this.thumbCompiler.constructBX(a,e),r.writesPC=!0,r.fixedJump=!1;break}}else if((t&63488)==6144){var e=(t&448)>>6,c=(t&56)>>3,a=t&7;switch(t&1536){case 0:r=this.thumbCompiler.constructADD3(a,c,e);break;case 512:r=this.thumbCompiler.constructSUB3(a,c,e);break;case 1024:var n=(t&448)>>6;n?r=this.thumbCompiler.constructADD1(a,c,n):r=this.thumbCompiler.constructMOV2(a,c,e);break;case 1536:var n=(t&448)>>6;r=this.thumbCompiler.constructSUB1(a,c,n);break}r.writesPC=!1}else if(t&57344)if((t&57344)==8192){var n=t&255,c=(t&1792)>>8;switch(t&6144){case 0:r=this.thumbCompiler.constructMOV1(c,n);break;case 2048:r=this.thumbCompiler.constructCMP1(c,n);break;case 4096:r=this.thumbCompiler.constructADD2(c,n);break;case 6144:r=this.thumbCompiler.constructSUB2(c,n);break}r.writesPC=!1}else if((t&63488)==18432){var a=(t&1792)>>8,n=(t&255)<<2;r=this.thumbCompiler.constructLDR3(a,n),r.writesPC=!1}else if((t&61440)==20480){var a=t&7,c=(t&56)>>3,e=(t&448)>>6,o=t&3584;switch(o){case 0:r=this.thumbCompiler.constructSTR2(a,c,e);break;case 512:r=this.thumbCompiler.constructSTRH2(a,c,e);break;case 1024:r=this.thumbCompiler.constructSTRB2(a,c,e);break;case 1536:r=this.thumbCompiler.constructLDRSB(a,c,e);break;case 2048:r=this.thumbCompiler.constructLDR2(a,c,e);break;case 2560:r=this.thumbCompiler.constructLDRH2(a,c,e);break;case 3072:r=this.thumbCompiler.constructLDRB2(a,c,e);break;case 3584:r=this.thumbCompiler.constructLDRSH(a,c,e);break}r.writesPC=!1}else if((t&57344)==24576){var a=t&7,c=(t&56)>>3,n=(t&1984)>>4,l=t&4096;l&&(n>>=2);var m=t&2048;m?l?r=this.thumbCompiler.constructLDRB1(a,c,n):r=this.thumbCompiler.constructLDR1(a,c,n):l?r=this.thumbCompiler.constructSTRB1(a,c,n):r=this.thumbCompiler.constructSTR1(a,c,n),r.writesPC=!1}else if((t&62976)==46080){var A=!!(t&256),h=t&255;t&2048?(r=this.thumbCompiler.constructPOP(h,A),r.writesPC=A,r.fixedJump=!1):(r=this.thumbCompiler.constructPUSH(h,A),r.writesPC=!1)}else if(t&32768)switch(t&28672){case 0:var a=t&7,c=(t&56)>>3,n=(t&1984)>>5;t&2048?r=this.thumbCompiler.constructLDRH1(a,c,n):r=this.thumbCompiler.constructSTRH1(a,c,n),r.writesPC=!1;break;case 4096:var a=(t&1792)>>8,n=(t&255)<<2,m=t&2048;m?r=this.thumbCompiler.constructLDR4(a,n):r=this.thumbCompiler.constructSTR3(a,n),r.writesPC=!1;break;case 8192:var a=(t&1792)>>8,n=(t&255)<<2;t&2048?r=this.thumbCompiler.constructADD6(a,n):r=this.thumbCompiler.constructADD5(a,n),r.writesPC=!1;break;case 12288:if(!(t&3840)){var l=t&128,n=(t&127)<<2;l&&(n=-n),r=this.thumbCompiler.constructADD7(n),r.writesPC=!1}break;case 16384:var c=(t&1792)>>8,h=t&255;t&2048?r=this.thumbCompiler.constructLDMIA(c,h):r=this.thumbCompiler.constructSTMIA(c,h),r.writesPC=!1;break;case 20480:var C=(t&3840)>>8,n=t&255;if(C==15)r=this.thumbCompiler.constructSWI(n),r.writesPC=!1;else{t&128&&(n|=4294967040),n<<=1;var x=this.conds[C];r=this.thumbCompiler.constructB1(n,x),r.writesPC=!0,r.fixedJump=!0}break;case 24576:case 28672:var n=t&2047,v=t&6144;switch(v){case 0:n&1024&&(n|=4294965248),n<<=1,r=this.thumbCompiler.constructB2(n),r.writesPC=!0,r.fixedJump=!0;break;case 2048:break;case 4096:n&1024&&(n|=4294966272),n<<=12,r=this.thumbCompiler.constructBL1(n),r.writesPC=!1;break;case 6144:r=this.thumbCompiler.constructBL2(n),r.writesPC=!0,r.fixedJump=!1;break}break;default:throw new Z("Undefined instruction: 0x"+t.toString(16))}else throw new Z("Bad opcode: 0x"+t.toString(16));else{var a=t&7,e=(t&56)>>3,n=(t&1984)>>6;switch(t&6144){case 0:r=this.thumbCompiler.constructLSL1(a,e,n);break;case 2048:r=this.thumbCompiler.constructLSR1(a,e,n);break;case 4096:r=this.thumbCompiler.constructASR1(a,e,n);break;case 6144:break}r.writesPC=!1}return r.execMode=1,r.fixedJump=r.fixedJump||!1,r};var sr=class{constructor(){this.f64arr=new Float64Array(1);this.f32arr=new Float32Array(this.f64arr.buffer);this.i32arr=new Int32Array(this.f64arr.buffer);this.BASE_OFFSET=24;this.OFFSET_MASK=16777215;this.core=new y,this.core.irq=this,this.core.mmu=this,this.resetMemory()}resetMemory(){this.memory=[];for(var r=0;r<256;r++){let i=10;this.memory[r]={PAGE_MASK:(2<0?r:1}getPC(){return this.core.gprs[15]-this.core.instructionWidth}getSP(){return this.core.gprs[13]}isStable(){return!0}connectMemoryBus(r){this.bus=r}reset(){this.resetMemory();let r=this.load32(0);this.core.resetCPU(r)}saveState(){return this.core.freeze()}loadState(r){this.core.defrost(r)}load8(r){return this.bus.read(r)<<24>>24}loadU8(r){return this.bus.read(r)&255}load16(r){return this.loadU16(r)<<16>>16}loadU16(r){return this.bus.read(r)|this.bus.read(r+1)<<8}load32(r){var i=this.bus.read32(r);return i}store8(r,i){this.bus.write(r,i&255)}store16(r,i){this.bus.write(r,i&255),this.bus.write(r+1,i>>8&255)}store32(r,i){this.bus.write32(r,i)}wait(r){++this.core.cycles}wait32(r){++this.core.cycles}waitSeq32(r){++this.core.cycles}waitMul(r){(r&4294967040)==4294967040||!(r&4294967040)?this.core.cycles+=1:(r&4294901760)==4294901760||!(r&4294901760)?this.core.cycles+=2:(r&4278190080)==4278190080||!(r&4278190080)?this.core.cycles+=3:this.core.cycles+=4}waitMulti32(r,i){this.core.cycles+=2}waitPrefetch(r){++this.core.cycles}waitPrefetch32(r){++this.core.cycles}addressToPage(r,i){return i>>this.memory[r].ICACHE_PAGE_BITS}accessPage(r,i){var s=this.memory[r],e=s.icache[i];return(!e||e.invalid)&&(e={thumb:new Array(1<>16)}clear(){}updateTimers(){}testIRQ(){}isThumb(){return this.core.instructionWidth==2}getDebugTree(){return{state:this.saveState(),mmu:this.core.mmu}}};var Dr=mr([[I.A,0,1],[I.B,0,2],[I.GP_A,0,1],[I.GP_B,0,2],[I.SELECT,0,4],[I.START,0,8],[I.RIGHT,0,16],[I.LEFT,0,32],[I.UP,0,64],[I.DOWN,0,128]]),B=0,N=1048576,dr=0,j=67108864,X=256,Ir=1e6,Pr=4e6,Rr=3991793133,ir=class extends Cr{constructor(){super();this.cpuFrequency=Pr;this.canvasWidth=160;this.numTotalScanlines=256;this.numVisibleScanlines=128;this.cpuCyclesPerLine=Math.floor(Pr/(256*60));this.defaultROMSize=N-dr;this.sampleRate=1;this.cpu=new sr;this.ram=new Uint8Array(N);this.ram16=new Uint16Array(this.ram.buffer);this.ram32=new Uint32Array(this.ram.buffer);this.rombase=dr;this.brightness=255;this.ioregs=new Uint8Array(X);this.ioregs32=new Uint32Array(this.ioregs.buffer);this.read=tr([[B,B+N-1,N-1,r=>this.ram[r]],[j,j+X-1,X-1,(r,i)=>this.readIO(r)]],{defaultval:Rr&255});this.write=tr([[B,B+N-1,N-1,(r,i)=>{this.ram[r]=i}],[j,j+X-1,X-1,(r,i)=>{this.writeIO(r,i)}]]);this.read32=r=>r>=B&&r>2]:this.read(r)|this.read(r+1)<<8|this.read(r+2)<<16|this.read(r+3)<<24;this.write32=(r,i)=>{r>=B&&r>2]=i:(this.write(r,i&255),this.write(r+1,i>>8&255),this.write(r+2,i>>16&255),this.write(r+3,i>>24&255))};this.connectCPUMemoryBus(this),this.handler=fr(this.inputs,Dr)}connectVideo(r){super.connectVideo(r),this.pixels32=r,this.pixels8=new Uint8Array(r.buffer)}connectSerialIO(r){this.serial=r}loadROM(r){super.loadROM(r)}reset(){this.ram.fill(0),this.rom&&this.ram.set(this.rom,this.rombase),super.reset(),this.serialOut=[],this.serialIn=[]}readAddress(r){return r>=B&&r>8;case 36:return this.getRasterX();case 37:return this.getRasterX()>>8;case 64:return(this.serial.byteAvailable()?128:0)|(this.serial.clearToSend()?64:0);case 68:let i=this.serialIn.shift();return i!=null?(this.serialOut.push(i),i.value):0;default:return 0}}writeIO(r,i){switch(this.ioregs[r]=i,r){case 72:this.serialOut.length>2]>>1&1048575,e=this.brightness<<24,a=0;a>5&31)<<11|(c>>10&31)<<19}}getDebugCategories(){return["CPU","Stack","FPU"]}getDebugInfo(r,i){switch(r){case"Stack":for(var s="",e=i.c,a=e.gprs[13],c=e.gprs[11],p=0;p<16&&(s+=_(a,8)+" "+_(this.ram32[a-B>>2],8),a==c&&(s+=" FP"),s+=` +`,a+=4,!(a>=B+N));p++);return s;case"CPU":var s="",e=i.c;let n={2:"Thumb",4:"ARM"},o={15:"PC",14:"LR",13:"SP",12:"IP",11:"FP",9:"SB"};for(var p=0;p<8;p++){let m=p+8;s+=z("r"+p,5)+" "+_(e.gprs[p],8)+" ",s+=z("r"+m,5)+" "+_(e.gprs[m],8)+z(o[m]||"",3)+` +`}return s+="Flags ",s+=e.cpsrN?" N":" -",s+=e.cpsrV?" V":" -",s+=e.cpsrF?" F":" -",s+=e.cpsrZ?" Z":" -",s+=e.cpsrC?" C":" -",s+=e.cpsrI?" I":" -",s+=` +`,s+="MODE "+n[e.instructionWidth]+" "+Or[e.mode]+` +`,s+="SPSR "+_(e.spsr,8)+` +`,s+="cycl "+e.cycles+` +`,s;case"FPU":for(var s="",e=i.c,p=0;p<16;p++)s+=z("s"+p,5)+" "+_(e.ifprs[p],8)+" "+e.sfprs[p].toPrecision(6),p&1&&(s+=z("d"+(p>>1),5)+" "+e.dfprs[p>>1].toPrecision(12)),s+=` +`;return s}}saveState(){var r=super.saveState();return r.serial={sin:this.serialIn.slice(0),sout:this.serialOut.slice(0)},r}loadState(r){super.loadState(r),this.serialIn=r.serial.sin,this.serialOut=r.serial.sout}},Or={16:"USER",17:"FIQ",18:"IRQ",19:"SUPERVISOR",23:"ABORT",27:"UNDEFINED",31:"SYSTEM"};var _r=[{id:"vidfill.c",name:"Video Memory Fill"}],br=class extends lr{getToolForFilename(r){return r=r.toLowerCase(),r.endsWith(".vasm")?"vasmarm":r.endsWith(".armips")?"armips":(r.endsWith(".c")||r.endsWith(".s"),"armtcc")}getPresets(){return _r}getDefaultExtension(){return".c"}},yr=class extends br{constructor(){super(...arguments);this.getMemoryMap=function(){return{main:[{name:"ROM",start:0,size:1048576,type:"ram"},{name:"I/O",start:67108864,size:256,type:"io"}]}}}async start(){super.start(),console.log("Loading Capstone"),await Fr("./lib/capstone-arm.min.js"),this.capstone_arm=new cs.Capstone(cs.ARCH_ARM,cs.MODE_ARM),this.capstone_thumb=new cs.Capstone(cs.ARCH_ARM,cs.MODE_THUMB)}newMachine(){return new ir}readAddress(r){return this.machine.read(r)}getPlatformName(){return"ARM7"}getDebugTree(){return or(nr({},this.machine.cpu.getDebugTree()),{dwarf:this.debugSymbols.debuginfo})}disassemble(r,i){for(var s=this.machine.cpu.isThumb(),e=s?this.capstone_thumb:this.capstone_arm,a=[],c=0;c<4;c++)a[c]=i(r+c);var p=e.disasm(a,r,4),n=p&&p[0];return n?{nbytes:n.size,line:n.mnemonic+" "+n.op_str,isaddr:n.address>0}:{nbytes:4,line:"???",isaddr:!1}}};hr.arm32=yr;export{br as BaseARMMachinePlatform}; +//# sourceMappingURL=arm32-IVL2WI33.js.map diff --git a/gen/arm32-IVL2WI33.js.map b/gen/arm32-IVL2WI33.js.map new file mode 100644 index 00000000..03b20e3d --- /dev/null +++ b/gen/arm32-IVL2WI33.js.map @@ -0,0 +1,7 @@ +{ + "version": 3, + "sources": ["../src/common/cpu/ARM.ts", "../src/machine/arm32.ts", "../src/platform/arm32.ts"], + "sourcesContent": ["/*\nFrom: https://github.com/endrift/gbajs\n\nCopyright \u00A9 2012 \u2013 2013, Jeffrey Pfau\nAll rights reserved.\n\nRedistribution and use in source and binary forms, with or without\nmodification, are permitted provided that the following conditions are met:\n\n* Redistributions of source code must retain the above copyright notice, this\n list of conditions and the following disclaimer.\n\n* Redistributions in binary form must reproduce the above copyright notice,\n this list of conditions and the following disclaimer in the documentation\n and/or other materials provided with the distribution.\n\nTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\nAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\nIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\nARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE\nLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\nCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\nSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\nINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\nCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\nARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\nPOSSIBILITY OF SUCH DAMAGE.\n*/\n\nimport { Bus, Bus32, CPU, InstructionBased, SavesState } from \"../devices\";\nimport { EmuHalt } from \"../emu\";\nimport { hex } from \"../util\";\n\ninterface AddressFunction extends Function {\n writesPC? : boolean;\n fixedJump? : boolean;\n}\n\ninterface ARMIRQInterface {\n\tclear() : void;\n\tswi(opcode : number) : void;\n\tswi32(opcode : number) : void;\n\tupdateTimers() : void;\n\ttestIRQ() : void;\n}\n\ninterface ARMMemoryRegion {\n\tPAGE_MASK : number;\n\tICACHE_PAGE_BITS : number;\n\ticache : ARMMemoryPage[];\n}\n\ninterface ARMOperation {\n\tnext : ARMOperation;\n\tpage : ARMMemoryPage;\n\taddress : number;\n\topcode : number;\n}\n\ninterface ARMMemoryPage {\n\tarm : ARMOperation[];\n\tthumb : ARMOperation[];\n\tinvalid : boolean;\n}\n\ninterface ARMMMUInterface {\n\tmemory : ARMMemoryRegion[];\n\tBASE_OFFSET : number;\n\tOFFSET_MASK : number;\n\n\tload8(a: number) : number;\n\tloadU8(a: number) : number;\n\tload16(a: number) : number;\n\tloadU16(a: number) : number;\n\tload32(a: number) : number;\n\tstore8(a: number, v: number) : void;\n\tstore16(a: number, v: number) : void;\n\tstore32(a: number, v: number) : void;\n\n\twait(a: number) : void;\n\twait32(a: number) : void;\n\twaitSeq32(a: number) : void;\n\twaitMul(a: number) : void;\n\twaitMulti32(a: number, total: number) : void;\n\twaitPrefetch(a: number) : void;\n\twaitPrefetch32(a: number) : void;\n\n\taddressToPage(region: number, address: number) : number;\n\taccessPage(region: number, pageId: number) : ARMMemoryPage;\n}\n\nexport interface ARMCoreState {\n\tPC: number,\n\tSP: number,\n\tgprs: number[],\n\tmode: number,\n\tcpsrI: boolean,\n\tcpsrF: boolean,\n\tcpsrV: boolean,\n\tcpsrC: boolean,\n\tcpsrZ: boolean,\n\tcpsrN: boolean,\n\tbankedRegisters: number[][],\n\tspsr: number,\n\tbankedSPSRs: number[],\n\tsfprs: number[],\n\tdfprs: number[],\n\tifprs: number[],\n\tcycles: number,\n\tinstructionWidth: 2 | 4\n}\n\ninterface ARMCoreType {\n\tgprs: Int32Array;\n\tsfprs: Float32Array;\n\tdfprs: Float64Array;\n\tifprs: Int32Array;\n\tPC: number;\n\tSP: number;\n\tLR: number;\n\tcycles: number;\n\tmode: number;\n\tshifterOperand: number;\n\tshifterCarryOut: number|boolean;\n\tcpsrN: number|boolean;\n\tcpsrC: number|boolean;\n\tcpsrZ: number|boolean;\n\tcpsrV: number|boolean;\n\tcpsrI: number|boolean;\n\tcpsrF: number|boolean;\n\tspsr: number;\n\tmmu: ARMMMUInterface;\n\tirq : ARMIRQInterface;\n\tinstructionWidth: 2 | 4;\n\n\thasSPSR() : boolean;\n\tunpackCPSR(v : number) : void;\n\tswitchMode(mode : number) : void;\n\tswitchExecMode(mode : number) : void;\n\tpackCPSR() : number;\n\n\tstep() : void;\n\tresetCPU(startOffset : number) : void;\n\tfreeze() : ARMCoreState;\n\tdefrost(state: ARMCoreState) : void;\n\n\traiseIRQ() : void;\n\traiseTrap(irqType? : number) : void;\n}\n\nexport enum ARMMode {\n\tMODE_ARM = 0,\n\tMODE_THUMB = 1,\n\t\n\tMODE_USER = 0x10,\n\tMODE_FIQ = 0x11,\n\tMODE_IRQ = 0x12,\n\tMODE_SUPERVISOR = 0x13,\n\tMODE_ABORT = 0x17,\n\tMODE_UNDEFINED = 0x1B,\n\tMODE_SYSTEM = 0x1F\n}\n\nexport enum ARMRegs {\n\tSP = 13,\n\tLR = 14,\n\tPC = 15,\n}\n\nexport enum ARMConstants {\n\n\tBANK_NONE = 0,\n\tBANK_FIQ = 1,\n\tBANK_IRQ = 2,\n\tBANK_SUPERVISOR = 3,\n\tBANK_ABORT = 4,\n\tBANK_UNDEFINED = 5,\n\n\tWORD_SIZE_ARM = 4,\n\tWORD_SIZE_THUMB = 2,\n\n\tBASE_RESET = 0x00000000,\n\tBASE_UNDEF = 0x00000004,\n\tBASE_SWI = 0x00000008,\n\tBASE_PABT = 0x0000000C,\n\tBASE_DABT = 0x00000010,\n\tBASE_IRQ = 0x00000018,\n\tBASE_FIQ = 0x0000001C,\n}\n\nconst UNALLOC_MASK = 0x0FFFFF00;\nconst USER_MASK = 0xF0000000;\nconst PRIV_MASK = 0x000000DF; // This is out of spec? (SEH)\nconst STATE_MASK = 0x00000020;\n\n\n///////////////////////////////////////////////////////////////////////////\n\nfunction ARMCoreArm(cpu: ARMCoreType) {\n\tthis.cpu = cpu;\n\n\tthis.addressingMode23Immediate = [\n\t\t// 000x0\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] -= offset;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\t// 000xW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// 00Ux0\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] += offset;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\t// 00UxW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// 0P0x0\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\treturn /* addr = */ gprs[rn] - offset;\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// 0P0xW\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn] - offset;\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull,\n\n\t\t// 0PUx0\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\treturn /* addr = */ gprs[rn] + offset;\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// 0PUxW\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn] + offset;\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull,\n\t];\n\n\tthis.addressingMode23Register = [\n\t\t// I00x0\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] -= gprs[rm];\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\t// I00xW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// I0Ux0\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] += gprs[rm];\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\t// I0UxW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// IP0x0\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\treturn gprs[rn] - gprs[rm];\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// IP0xW\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn] - gprs[rm];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull,\n\n\t\t// IPUx0\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn] + gprs[rm];\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// IPUxW\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn] + gprs[rm];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull\n\t];\n\n\tthis.addressingMode2RegisterShifted = [\n\t\t// I00x0\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tshiftOp();\n\t\t\t\t\tgprs[rn] -= cpu.shifterOperand;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\t// I00xW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// I0Ux0\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tshiftOp();\n\t\t\t\t\tgprs[rn] += cpu.shifterOperand;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\t\t// I0UxW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// IP0x0\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tshiftOp();\n\t\t\t\treturn gprs[rn] - cpu.shifterOperand;\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// IP0xW\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tshiftOp();\n\t\t\t\tvar addr = gprs[rn] - cpu.shifterOperand;\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull,\n\n\t\t// IPUx0\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tshiftOp();\n\t\t\t\treturn gprs[rn] + cpu.shifterOperand;\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// IPUxW\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tshiftOp();\n\t\t\t\tvar addr = gprs[rn] + cpu.shifterOperand;\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull,\n\t];\n}\n\nARMCoreArm.prototype.constructAddressingMode1ASR = function(rs, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\t++cpu.cycles;\n\t\tvar shift = gprs[rs];\n\t\tif (rs == ARMRegs.PC) {\n\t\t\tshift += 4;\n\t\t}\n\t\tshift &= 0xFF;\n\t\tvar shiftVal = gprs[rm];\n\t\tif (rm == ARMRegs.PC) {\n\t\t\tshiftVal += 4;\n\t\t}\n\t\tif (shift == 0) {\n\t\t\tcpu.shifterOperand = shiftVal;\n\t\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t\t} else if (shift < 32) {\n\t\t\tcpu.shifterOperand = shiftVal >> shift;\n\t\t\tcpu.shifterCarryOut = shiftVal & (1 << (shift - 1));\n\t\t} else if (gprs[rm] >> 31) {\n\t\t\tcpu.shifterOperand = 0xFFFFFFFF;\n\t\t\tcpu.shifterCarryOut = 0x80000000;\n\t\t} else {\n\t\t\tcpu.shifterOperand = 0;\n\t\t\tcpu.shifterCarryOut = 0;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructAddressingMode1Immediate = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\treturn function() {\n\t\tcpu.shifterOperand = immediate;\n\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t};\n};\n\nARMCoreArm.prototype.constructAddressingMode1ImmediateRotate = function(immediate, rotate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\treturn function() {\n\t\tcpu.shifterOperand = (immediate >>> rotate) | (immediate << (32 - rotate));\n\t\tcpu.shifterCarryOut = cpu.shifterOperand >> 31;\n\t}\n};\n\nARMCoreArm.prototype.constructAddressingMode1LSL = function(rs, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\t++cpu.cycles;\n\t\tvar shift = gprs[rs];\n\t\tif (rs == ARMRegs.PC) {\n\t\t\tshift += 4;\n\t\t}\n\t\tshift &= 0xFF;\n\t\tvar shiftVal = gprs[rm];\n\t\tif (rm == ARMRegs.PC) {\n\t\t\tshiftVal += 4;\n\t\t}\n\t\tif (shift == 0) {\n\t\t\tcpu.shifterOperand = shiftVal;\n\t\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t\t} else if (shift < 32) {\n\t\t\tcpu.shifterOperand = shiftVal << shift;\n\t\t\tcpu.shifterCarryOut = shiftVal & (1 << (32 - shift));\n\t\t} else if (shift == 32) {\n\t\t\tcpu.shifterOperand = 0;\n\t\t\tcpu.shifterCarryOut = shiftVal & 1;\n\t\t} else {\n\t\t\tcpu.shifterOperand = 0;\n\t\t\tcpu.shifterCarryOut = 0;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructAddressingMode1LSR = function(rs, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\t++cpu.cycles;\n\t\tvar shift = gprs[rs];\n\t\tif (rs == ARMRegs.PC) {\n\t\t\tshift += 4;\n\t\t}\n\t\tshift &= 0xFF;\n\t\tvar shiftVal = gprs[rm];\n\t\tif (rm == ARMRegs.PC) {\n\t\t\tshiftVal += 4;\n\t\t}\n\t\tif (shift == 0) {\n\t\t\tcpu.shifterOperand = shiftVal;\n\t\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t\t} else if (shift < 32) {\n\t\t\tcpu.shifterOperand = shiftVal >>> shift;\n\t\t\tcpu.shifterCarryOut = shiftVal & (1 << (shift - 1));\n\t\t} else if (shift == 32) {\n\t\t\tcpu.shifterOperand = 0;\n\t\t\tcpu.shifterCarryOut = shiftVal >> 31;\n\t\t} else {\n\t\t\tcpu.shifterOperand = 0;\n\t\t\tcpu.shifterCarryOut = 0;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructAddressingMode1ROR = function(rs, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\t++cpu.cycles;\n\t\tvar shift = gprs[rs];\n\t\tif (rs == ARMRegs.PC) {\n\t\t\tshift += 4;\n\t\t}\n\t\tshift &= 0xFF;\n\t\tvar shiftVal = gprs[rm];\n\t\tif (rm == ARMRegs.PC) {\n\t\t\tshiftVal += 4;\n\t\t}\n\t\tvar rotate = shift & 0x1F;\n\t\tif (shift == 0) {\n\t\t\tcpu.shifterOperand = shiftVal;\n\t\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t\t} else if (rotate) {\n\t\t\tcpu.shifterOperand = (gprs[rm] >>> rotate) | (gprs[rm] << (32 - rotate));\n\t\t\tcpu.shifterCarryOut = shiftVal & (1 << (rotate - 1));\n\t\t} else {\n\t\t\tcpu.shifterOperand = shiftVal;\n\t\t\tcpu.shifterCarryOut = shiftVal >> 31;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructAddressingMode23Immediate = function(instruction, immediate, condOp) {\n\tvar rn = (instruction & 0x000F0000) >> 16;\n\treturn this.addressingMode23Immediate[(instruction & 0x01A00000) >> 21](rn, immediate, condOp);\n};\n\nARMCoreArm.prototype.constructAddressingMode23Register = function(instruction, rm, condOp) {\n\tvar rn = (instruction & 0x000F0000) >> 16;\n\treturn this.addressingMode23Register[(instruction & 0x01A00000) >> 21](rn, rm, condOp);\n};\n\nARMCoreArm.prototype.constructAddressingMode2RegisterShifted = function(instruction, shiftOp, condOp) {\n\tvar rn = (instruction & 0x000F0000) >> 16;\n\treturn this.addressingMode2RegisterShifted[(instruction & 0x01A00000) >> 21](rn, shiftOp, condOp);\n};\n\nARMCoreArm.prototype.constructAddressingMode4 = function(immediate, rn) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar addr = gprs[rn] + immediate;\n\t\treturn addr;\n\t}\n};\n\nARMCoreArm.prototype.constructAddressingMode4Writeback = function(immediate, offset, rn, overlap) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function(writeInitial) {\n\t\tvar addr = gprs[rn] + immediate;\n\t\tif (writeInitial && overlap) {\n\t\t\tcpu.mmu.store32(gprs[rn] + immediate - 4, gprs[rn]);\n\t\t}\n\t\tgprs[rn] += offset;\n\t\treturn addr;\n\t}\n};\n\nARMCoreArm.prototype.constructNOP = function() {\n\tthis.writesPC = false;\n\treturn function() { };\n}\n\nARMCoreArm.prototype.constructADC = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar shifterOperand = (cpu.shifterOperand >>> 0) + (cpu.cpsrC ? 1 : 0);\n\t\tgprs[rd] = (gprs[rn] >>> 0) + shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructADCS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar shifterOperand = (cpu.shifterOperand >>> 0) + (cpu.cpsrC ? 1 : 0);\n\t\tvar d = (gprs[rn] >>> 0) + shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\t\tcpu.cpsrV = (gprs[rn] >> 31) == (shifterOperand >> 31) &&\n\t\t\t\t\t\t(gprs[rn] >> 31) != (d >> 31) &&\n\t\t\t\t\t\t(shifterOperand >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructADD = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = (gprs[rn] >>> 0) + (cpu.shifterOperand >>> 0);\n\t};\n};\n\nARMCoreArm.prototype.constructADDS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar d = (gprs[rn] >>> 0) + (cpu.shifterOperand >>> 0);\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\t\tcpu.cpsrV = (gprs[rn] >> 31) == (cpu.shifterOperand >> 31) &&\n\t\t\t\t\t\t(gprs[rn] >> 31) != (d >> 31) &&\n\t\t\t\t\t\t(cpu.shifterOperand >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructAND = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] & cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructANDS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] & cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructB = function(immediate, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tgprs[ARMRegs.PC] += immediate;\n\t};\n};\n\nARMCoreArm.prototype.constructBIC = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] & ~cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructBICS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] & ~cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructBL = function(immediate, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tgprs[ARMRegs.LR] = gprs[ARMRegs.PC] - 4;\n\t\tgprs[ARMRegs.PC] += immediate;\n\t};\n};\n\nARMCoreArm.prototype.constructBX = function(rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tcpu.switchExecMode(gprs[rm] & 0x00000001);\n\t\tgprs[ARMRegs.PC] = gprs[rm] & 0xFFFFFFFE;\n\t};\n};\n\nARMCoreArm.prototype.constructCMN = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar aluOut = (gprs[rn] >>> 0) + (cpu.shifterOperand >>> 0);\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = aluOut > 0xFFFFFFFF;\n\t\tcpu.cpsrV = (gprs[rn] >> 31) == (cpu.shifterOperand >> 31) &&\n\t\t\t\t\t(gprs[rn] >> 31) != (aluOut >> 31) &&\n\t\t\t\t\t(cpu.shifterOperand >> 31) != (aluOut >> 31);\n\t};\n};\n\nARMCoreArm.prototype.constructCMP = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar aluOut = gprs[rn] - cpu.shifterOperand;\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= (cpu.shifterOperand >>> 0);\n\t\tcpu.cpsrV = (gprs[rn] >> 31) != (cpu.shifterOperand >> 31) &&\n\t\t\t\t\t(gprs[rn] >> 31) != (aluOut >> 31);\n\t};\n};\n\nARMCoreArm.prototype.constructEOR = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] ^ cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructEORS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] ^ cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructLDM = function(rs, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\tvar mmu = cpu.mmu;\n\treturn function() {\n\t\tmmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address(false);\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tfor (m = rs, i = 0; m; m >>= 1, ++i) {\n\t\t\tif (m & 1) {\n\t\t\t\tgprs[i] = mmu.load32(addr & 0xFFFFFFFC);\n\t\t\t\taddr += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tmmu.waitMulti32(addr, total);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDMS = function(rs, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\tvar mmu = cpu.mmu;\n\treturn function() {\n\t\tmmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address(false);\n\t\tvar total = 0;\n\t\tvar mode = cpu.mode;\n\t\tcpu.switchMode(ARMMode.MODE_SYSTEM);\n\t\tvar m, i;\n\t\tfor (m = rs, i = 0; m; m >>= 1, ++i) {\n\t\t\tif (m & 1) {\n\t\t\t\tgprs[i] = mmu.load32(addr & 0xFFFFFFFC);\n\t\t\t\taddr += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tcpu.switchMode(mode);\n\t\tmmu.waitMulti32(addr, total);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDR = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tgprs[rd] = cpu.mmu.load32(addr);\n\t\tcpu.mmu.wait32(addr);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDRB = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tgprs[rd] = cpu.mmu.loadU8(addr);\n\t\tcpu.mmu.wait(addr);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDRH = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tgprs[rd] = cpu.mmu.loadU16(addr);\n\t\tcpu.mmu.wait(addr);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDRSB = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tgprs[rd] = cpu.mmu.load8(addr);\n\t\tcpu.mmu.wait(addr);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDRSH = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tgprs[rd] = cpu.mmu.load16(addr);\n\t\tcpu.mmu.wait(addr);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructMLA = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(rs);\n\t\tif ((gprs[rm] & 0xFFFF0000) && (gprs[rs] & 0xFFFF0000)) {\n\t\t\t// Our data type is a double--we'll lose bits if we do it all at once!\n\t\t\tvar hi = ((gprs[rm] & 0xFFFF0000) * gprs[rs]) & 0xFFFFFFFF;\n\t\t\tvar lo = ((gprs[rm] & 0x0000FFFF) * gprs[rs]) & 0xFFFFFFFF;\n\t\t\tgprs[rd] = (hi + lo + gprs[rn]) & 0xFFFFFFFF;\n\t\t} else {\n\t\t\tgprs[rd] = gprs[rm] * gprs[rs] + gprs[rn];\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructMLAS = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(rs);\n\t\tif ((gprs[rm] & 0xFFFF0000) && (gprs[rs] & 0xFFFF0000)) {\n\t\t\t// Our data type is a double--we'll lose bits if we do it all at once!\n\t\t\tvar hi = ((gprs[rm] & 0xFFFF0000) * gprs[rs]) & 0xFFFFFFFF;\n\t\t\tvar lo = ((gprs[rm] & 0x0000FFFF) * gprs[rs]) & 0xFFFFFFFF;\n\t\t\tgprs[rd] = (hi + lo + gprs[rn]) & 0xFFFFFFFF;\n\t\t} else {\n\t\t\tgprs[rd] = gprs[rm] * gprs[rs] + gprs[rn];\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreArm.prototype.constructMOV = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructMOVS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructMRS = function(rd, r, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tif (r) {\n\t\t\tgprs[rd] = cpu.spsr;\n\t\t} else {\n\t\t\tgprs[rd] = cpu.packCPSR();\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructMSR = function(rm, r, instruction, immediate, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\tvar c = instruction & 0x00010000;\n\t//var x = instruction & 0x00020000;\n\t//var s = instruction & 0x00040000;\n\tvar f = instruction & 0x00080000;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar operand;\n\t\tif (instruction & 0x02000000) {\n\t\t\toperand = immediate;\n\t\t} else {\n\t\t\toperand = gprs[rm];\n\t\t}\n\t\tvar mask = (c ? 0x000000FF : 0x00000000) |\n\t\t\t\t //(x ? 0x0000FF00 : 0x00000000) | // Irrelevant on ARMv4T\n\t\t\t\t //(s ? 0x00FF0000 : 0x00000000) | // Irrelevant on ARMv4T\n\t\t\t\t (f ? 0xFF000000 : 0x00000000);\n\t\tif (r) {\n\t\t\tmask &= USER_MASK | PRIV_MASK | STATE_MASK;\n\t\t\t//console.log(hex(r), hex(mask & 0x7fffffff), hex(cpu.spsr), hex(operand));\n\t\t\tcpu.spsr = (cpu.spsr & ~mask) | (operand & mask);\n\t\t} else {\n\t\t\tif (mask & USER_MASK) {\n\t\t\t\tcpu.cpsrN = operand >> 31;\n\t\t\t\tcpu.cpsrZ = operand & 0x40000000;\n\t\t\t\tcpu.cpsrC = operand & 0x20000000;\n\t\t\t\tcpu.cpsrV = operand & 0x10000000;\n\t\t\t}\n\t\t\tif (cpu.mode != ARMMode.MODE_USER && (mask & PRIV_MASK)) {\n\t\t\t\tcpu.switchMode((operand & 0x0000000F) | 0x00000010);\n\t\t\t\tcpu.cpsrI = operand & 0x00000080;\n\t\t\t\tcpu.cpsrF = operand & 0x00000040;\n\t\t\t}\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructMUL = function(rd, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tif ((gprs[rm] & 0xFFFF0000) && (gprs[rs] & 0xFFFF0000)) {\n\t\t\t// Our data type is a double--we'll lose bits if we do it all at once!\n\t\t\tvar hi = ((gprs[rm] & 0xFFFF0000) * gprs[rs]) | 0;\n\t\t\tvar lo = ((gprs[rm] & 0x0000FFFF) * gprs[rs]) | 0;\n\t\t\tgprs[rd] = hi + lo;\n\t\t} else {\n\t\t\tgprs[rd] = gprs[rm] * gprs[rs];\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructMULS = function(rd, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tif ((gprs[rm] & 0xFFFF0000) && (gprs[rs] & 0xFFFF0000)) {\n\t\t\t// Our data type is a double--we'll lose bits if we do it all at once!\n\t\t\tvar hi = ((gprs[rm] & 0xFFFF0000) * gprs[rs]) | 0;\n\t\t\tvar lo = ((gprs[rm] & 0x0000FFFF) * gprs[rs]) | 0;\n\t\t\tgprs[rd] = hi + lo;\n\t\t} else {\n\t\t\tgprs[rd] = gprs[rm] * gprs[rs];\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreArm.prototype.constructMVN = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = ~cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructMVNS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = ~cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructORR = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] | cpu.shifterOperand;\n\t}\n};\n\nARMCoreArm.prototype.constructORRS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] | cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructRSB = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = cpu.shifterOperand - gprs[rn];\n\t};\n};\n\nARMCoreArm.prototype.constructRSBS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar d = cpu.shifterOperand - gprs[rn];\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = (cpu.shifterOperand >>> 0) >= (gprs[rn] >>> 0);\n\t\t\tcpu.cpsrV = (cpu.shifterOperand >> 31) != (gprs[rn] >> 31) &&\n\t\t\t\t\t\t(cpu.shifterOperand >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructRSC = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar n = (gprs[rn] >>> 0) + (cpu.cpsrC ? 0 : 1);\n\t\tgprs[rd] = (cpu.shifterOperand >>> 0) - n;\n\t};\n};\n\nARMCoreArm.prototype.constructRSCS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar n = (gprs[rn] >>> 0) + (cpu.cpsrC ? 0 : 1);\n\t\tvar d = (cpu.shifterOperand >>> 0) - n;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = (cpu.shifterOperand >>> 0) >= (d >>> 0);\n\t\t\tcpu.cpsrV = (cpu.shifterOperand >> 31) != (n >> 31) &&\n\t\t\t\t\t\t(cpu.shifterOperand >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructSBC = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar shifterOperand = (cpu.shifterOperand >>> 0) + (cpu.cpsrC ? 0 : 1);\n\t\tgprs[rd] = (gprs[rn] >>> 0) - shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructSBCS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar shifterOperand = (cpu.shifterOperand >>> 0) + (cpu.cpsrC ? 0 : 1);\n\t\tvar d = (gprs[rn] >>> 0) - shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= (d >>> 0);\n\t\t\tcpu.cpsrV = (gprs[rn] >> 31) != (shifterOperand >> 31) &&\n\t\t\t\t\t\t(gprs[rn] >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructSMLAL = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.cycles += 2;\n\t\tcpu.mmu.waitMul(rs);\n\t\tvar hi = (gprs[rm] & 0xFFFF0000) * gprs[rs];\n\t\tvar lo = (gprs[rm] & 0x0000FFFF) * gprs[rs];\n\t\tvar carry = (gprs[rn] >>> 0) + hi + lo;\n\t\tgprs[rn] = carry;\n\t\tgprs[rd] += Math.floor(carry * SHIFT_32);\n\t};\n};\n\nARMCoreArm.prototype.constructSMLALS = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.cycles += 2;\n\t\tcpu.mmu.waitMul(rs);\n\t\tvar hi = (gprs[rm] & 0xFFFF0000) * gprs[rs];\n\t\tvar lo = (gprs[rm] & 0x0000FFFF) * gprs[rs];\n\t\tvar carry = (gprs[rn] >>> 0) + hi + lo;\n\t\tgprs[rn] = carry;\n\t\tgprs[rd] += Math.floor(carry * SHIFT_32);\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !((gprs[rd] & 0xFFFFFFFF) || (gprs[rn] & 0xFFFFFFFF));\n\t};\n};\n\nARMCoreArm.prototype.constructSMULL = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >> 0) * (gprs[rs] >> 0);\n\t\tvar lo = ((gprs[rm] & 0x0000FFFF) >> 0) * (gprs[rs] >> 0);\n\t\tgprs[rn] = ((hi & 0xFFFFFFFF) + (lo & 0xFFFFFFFF)) & 0xFFFFFFFF;\n\t\tgprs[rd] = Math.floor(hi * SHIFT_32 + lo * SHIFT_32);\n\t};\n};\n\nARMCoreArm.prototype.constructSMULLS = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >> 0) * (gprs[rs] >> 0);\n\t\tvar lo = ((gprs[rm] & 0x0000FFFF) >> 0) * (gprs[rs] >> 0);\n\t\tgprs[rn] = ((hi & 0xFFFFFFFF) + (lo & 0xFFFFFFFF)) & 0xFFFFFFFF;\n\t\tgprs[rd] = Math.floor(hi * SHIFT_32 + lo * SHIFT_32);\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !((gprs[rd] & 0xFFFFFFFF) || (gprs[rn] & 0xFFFFFFFF));\n\t};\n};\n\nARMCoreArm.prototype.constructSTM = function(rs, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\tvar mmu = cpu.mmu;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tmmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tmmu.wait32(gprs[ARMRegs.PC]);\n\t\tvar addr = address(true);\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tfor (m = rs, i = 0; m; m >>= 1, ++i) {\n\t\t\tif (m & 1) {\n\t\t\t\tmmu.store32(addr, gprs[i]);\n\t\t\t\taddr += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tmmu.waitMulti32(addr, total);\n\t};\n};\n\nARMCoreArm.prototype.constructSTMS = function(rs, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\tvar mmu = cpu.mmu;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tmmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tmmu.wait32(gprs[ARMRegs.PC]);\n\t\tvar mode = cpu.mode;\n\t\tvar addr = address(true);\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tcpu.switchMode(ARMMode.MODE_SYSTEM);\n\t\tfor (m = rs, i = 0; m; m >>= 1, ++i) {\n\t\t\tif (m & 1) {\n\t\t\t\tmmu.store32(addr, gprs[i]);\n\t\t\t\taddr += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tcpu.switchMode(mode);\n\t\tmmu.waitMulti32(addr, total);\n\t};\n};\n\nARMCoreArm.prototype.constructSTR = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tcpu.mmu.store32(addr, gprs[rd]);\n\t\tcpu.mmu.wait32(addr);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.PC]);\n\t};\n};\n\nARMCoreArm.prototype.constructSTRB = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tcpu.mmu.store8(addr, gprs[rd]);\n\t\tcpu.mmu.wait(addr);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.PC]);\n\t};\n};\n\nARMCoreArm.prototype.constructSTRH = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tcpu.mmu.store16(addr, gprs[rd]);\n\t\tcpu.mmu.wait(addr);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.PC]);\n\t};\n};\n\nARMCoreArm.prototype.constructSUB = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] - cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructSUBS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar d = gprs[rn] - cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= (cpu.shifterOperand >>> 0);\n\t\t\tcpu.cpsrV = (gprs[rn] >> 31) != (cpu.shifterOperand >> 31) &&\n\t\t\t\t\t\t(gprs[rn] >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructSWI = function(immediate, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tcpu.irq.swi32(immediate);\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t};\n};\n\nARMCoreArm.prototype.constructSWP = function(rd, rn, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.wait32(gprs[rn]);\n\t\tcpu.mmu.wait32(gprs[rn]);\n\t\tvar d = cpu.mmu.load32(gprs[rn]);\n\t\tcpu.mmu.store32(gprs[rn], gprs[rm]);\n\t\tgprs[rd] = d;\n\t\t++cpu.cycles;\n\t}\n};\n\nARMCoreArm.prototype.constructSWPB = function(rd, rn, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.wait(gprs[rn]);\n\t\tcpu.mmu.wait(gprs[rn]);\n\t\tvar d = cpu.mmu.loadU8(gprs[rn]);\n\t\tcpu.mmu.store8(gprs[rn], gprs[rm]);\n\t\tgprs[rd] = d;\n\t\t++cpu.cycles;\n\t}\n};\n\nARMCoreArm.prototype.constructTEQ = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar aluOut = gprs[rn] ^ cpu.shifterOperand;\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t};\n};\n\nARMCoreArm.prototype.constructTST = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar aluOut = gprs[rn] & cpu.shifterOperand;\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t};\n};\n\nARMCoreArm.prototype.constructUMLAL = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.cycles += 2;\n\t\tcpu.mmu.waitMul(rs);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >>> 0) * (gprs[rs] >>> 0);\n\t\tvar lo = (gprs[rm] & 0x0000FFFF) * (gprs[rs] >>> 0);\n\t\tvar carry = (gprs[rn] >>> 0) + hi + lo;\n\t\tgprs[rn] = carry;\n\t\tgprs[rd] += carry * SHIFT_32;\n\t};\n};\n\nARMCoreArm.prototype.constructUMLALS = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.cycles += 2;\n\t\tcpu.mmu.waitMul(rs);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >>> 0) * (gprs[rs] >>> 0);\n\t\tvar lo = (gprs[rm] & 0x0000FFFF) * (gprs[rs] >>> 0);\n\t\tvar carry = (gprs[rn] >>> 0) + hi + lo;\n\t\tgprs[rn] = carry;\n\t\tgprs[rd] += carry * SHIFT_32;\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !((gprs[rd] & 0xFFFFFFFF) || (gprs[rn] & 0xFFFFFFFF));\n\t};\n};\n\nARMCoreArm.prototype.constructUMULL = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >>> 0) * (gprs[rs] >>> 0);\n\t\tvar lo = ((gprs[rm] & 0x0000FFFF) >>> 0) * (gprs[rs] >>> 0);\n\t\tgprs[rn] = ((hi & 0xFFFFFFFF) + (lo & 0xFFFFFFFF)) & 0xFFFFFFFF;\n\t\tgprs[rd] = (hi * SHIFT_32 + lo * SHIFT_32) >>> 0;\n\t};\n};\n\nARMCoreArm.prototype.constructUMULLS = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >>> 0) * (gprs[rs] >>> 0);\n\t\tvar lo = ((gprs[rm] & 0x0000FFFF) >>> 0) * (gprs[rs] >>> 0);\n\t\tgprs[rn] = ((hi & 0xFFFFFFFF) + (lo & 0xFFFFFFFF)) & 0xFFFFFFFF;\n\t\tgprs[rd] = (hi * SHIFT_32 + lo * SHIFT_32) >>> 0;\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !((gprs[rd] & 0xFFFFFFFF) || (gprs[rn] & 0xFFFFFFFF));\n\t};\n};\n\nARMCoreArm.prototype.constructVFP3Register = function(condOp, opcode, nOperandReg, destReg, sz, opcode2, mOperandReg) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar fpregs = sz ? cpu.dfprs : cpu.sfprs;\n\t//console.log(\"VFP3Register: \" + hex(opcode) + \" \" + hex(nOperandReg) + \" \" + hex(destReg) + \" \" + hex(number) + \" \" + hex(opcode2) + \" \" + hex(mOperandReg));\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(cpu.gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tswitch (opcode) {\n\t\tcase 2: // VMUL\n\t\t\tswitch (opcode2) {\n\t\t\t\tcase 0:\n\t\t\t\t\tfpregs[destReg] = fpregs[nOperandReg] * fpregs[mOperandReg];\n\t\t\t\t\treturn;\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 3: // VADD/VSUB\n\t\t\tswitch (opcode2) {\n\t\t\t\tcase 0:\n\t\t\t\t\tfpregs[destReg] = fpregs[nOperandReg] + fpregs[mOperandReg];\n\t\t\t\t\treturn;\n\t\t\t\tcase 2:\n\t\t\t\t\tfpregs[destReg] = fpregs[nOperandReg] - fpregs[mOperandReg];\n\t\t\t\t\treturn;\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 8: // VDIV\n\t\t\tswitch (opcode2) {\n\t\t\t\tcase 0:\n\t\t\t\t\tfpregs[destReg] = fpregs[nOperandReg] / fpregs[mOperandReg];\n\t\t\t\t\treturn;\n\t\t\t}\n\t\t\tbreak;\n\t\t}\n\t\tconsole.log(\"Unsupported instruction: \" + hex(opcode) + \" \" + hex(opcode2));\n\t};\n};\n\n/*\nif ConditionPassed() then\n EncodingSpecificOperations(); CheckVFPEnabled(TRUE);\n if to_integer then\n if dp_operation then\n S[d] = FPToFixed(D[m], 32, 0, unsigned, round_zero, TRUE);\n else\n S[d] = FPToFixed(S[m], 32, 0, unsigned, round_zero, TRUE);\n else\n if dp_operation then\n D[d] = FixedToFP(S[m], 64, 0, unsigned, round_nearest, TRUE);\n else\n S[d] = FixedToFP(S[m], 32, 0, unsigned, round_nearest, TRUE);\n*/\nARMCoreArm.prototype.constructVCVT = function(condOp, d, m, to_integer, dp_operation, unsigned, round_zero, round_nearest) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar sregs = cpu.sfprs;\n\tvar dregs = cpu.dfprs;\n\tvar iregs = cpu.ifprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(cpu.gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar src : number;\n\t\tvar dest : number;\n\t\t// get source\n\t\tif (to_integer && dp_operation) {\n\t\t\tsrc = dregs[m];\n\t\t} else if (to_integer) {\n\t\t\tsrc = sregs[m];\n\t\t} else {\n\t\t\tsrc = iregs[m];\n\t\t}\n\t\t// convert\n\t\tif (to_integer) {\n\t\t\tdest = round_zero ? Math.floor(src) : Math.round(src);\n\t\t} else {\n\t\t\tdest = src;\n\t\t}\n\t\t// store result\n\t\tif (to_integer) {\n\t\t\tiregs[d] = dest;\n\t\t} else if (dp_operation) {\n\t\t\tdregs[d] = dest;\n\t\t} else {\n\t\t\tsregs[d] = dest;\n\t\t}\n\t};\n}\n\nARMCoreArm.prototype.constructVCVTF = function(condOp, d, m, double_to_single) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar sregs = cpu.sfprs;\n\tvar dregs = cpu.dfprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(cpu.gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar n = double_to_single ? dregs[m] : sregs[m];\n\t\t// store result\n\t\tif (double_to_single) {\n\t\t\tsregs[d] = n;\n\t\t} else {\n\t\t\tdregs[d] = n;\n\t\t}\n\t};\n\n}\n\nARMCoreArm.prototype.constructVLDR = function(condOp, destReg, address, single_reg) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar iregs = cpu.ifprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(cpu.gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tlet addr = address();\n\t\tif (single_reg) {\n\t\t\tiregs[destReg] = cpu.mmu.load32(addr);\n\t\t} else {\n\t\t\tiregs[destReg] = cpu.mmu.load32(addr);\n\t\t\tiregs[destReg+1] = cpu.mmu.load32(addr+4);\n\t\t}\n\t\tcpu.mmu.wait32(addr);\n\t\tcpu.mmu.wait32(cpu.gprs[ARMRegs.PC]);\n\t};\n};\n\nARMCoreArm.prototype.constructVSTR = function(condOp, srcReg, address, single_reg) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar iregs = cpu.ifprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(cpu.gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tlet addr = address();\n\t\tif (single_reg) {\n\t\t\tcpu.mmu.store32(addr, iregs[srcReg]);\n\t\t} else {\n\t\t\tcpu.mmu.store32(addr, iregs[srcReg]);\n\t\t\tcpu.mmu.store32(addr+4, iregs[srcReg+1]);\n\t\t}\n\t\tcpu.mmu.wait32(addr);\n\t\tcpu.mmu.wait32(cpu.gprs[ARMRegs.PC]);\n\t};\n}\n\nARMCoreArm.prototype.constructVPUSH = function(condOp, d, regs, single_regs) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar iregs = cpu.ifprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(cpu.gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tlet addr = cpu.gprs[ARMRegs.SP] - regs * 4;\n\t\tcpu.gprs[ARMRegs.SP] = addr;\n\t\tfor (let i = 0; i < regs; ++i) {\n\t\t\tcpu.mmu.store32(addr, iregs[d+i]);\n\t\t\taddr += 4;\n\t\t}\n\t};\n}\n\nARMCoreArm.prototype.constructVPOP = function(condOp, d, regs, single_regs) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar iregs = cpu.ifprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(cpu.gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tlet addr = cpu.gprs[ARMRegs.SP];\n\t\tcpu.gprs[ARMRegs.SP] += regs * 4;\n\t\tfor (let i = 0; i < regs; ++i) {\n\t\t\tiregs[d+i] = cpu.mmu.load32(addr);\n\t\t\taddr += 4;\n\t\t}\n\t};\n}\n\nfunction FPCompare(op1: number, op2: number) {\n\t/* assert N IN {32,64};\n fpscr_val = if fpscr_controlled then FPSCR else StandardFPSCRValue();\n (type1,sign1,value1) = FPUnpack(op1, fpscr_val);\n (type2,sign2,value2) = FPUnpack(op2, fpscr_val); */\n\tif (isNaN(op1) || isNaN(op2)) {\n\t\treturn 0b0011;\n\t}\n\tif (op1 == op2) return 0b0110;\n\tif (op1 < op2) return 0b1000;\n\telse return 0b0010;\n}\n\nARMCoreArm.prototype.constructVCMP = function(condOp, d, Vd, sz, E, m, Vm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar sregs = cpu.sfprs;\n\tvar dregs = cpu.dfprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(cpu.gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tlet op1, op2;\n\t\tif (sz) {\n\t\t\top1 = dregs[d];\n\t\t\top2 = dregs[m];\n\t\t} else {\n\t\t\top1 = sregs[d];\n\t\t\top2 = sregs[m];\n\t\t}\n\t\tlet result = FPCompare(op1, op2);\n\t\tcpu.cpsrN = (result & 8) != 0;\n\t\tcpu.cpsrZ = (result & 4) != 0;\n\t\tcpu.cpsrC = (result & 2) != 0;\n\t\tcpu.cpsrV = (result & 1) != 0;\n\t}\n}\n\nARMCoreArm.prototype.constructVCMP0 = function(condOp, d, Vd, sz, E) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar sregs = cpu.sfprs;\n\tvar dregs = cpu.dfprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(cpu.gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tlet op1, op2=0;\n\t\tif (sz) {\n\t\t\top1 = dregs[d];\n\t\t} else {\n\t\t\top1 = sregs[d];\n\t\t}\n\t\tlet result = FPCompare(op1, op2);\n\t\tcpu.cpsrN = (result & 8) != 0;\n\t\tcpu.cpsrZ = (result & 4) != 0;\n\t\tcpu.cpsrC = (result & 2) != 0;\n\t\tcpu.cpsrV = (result & 1) != 0;\n\t}\n}\nARMCoreArm.prototype.constructVMOV = function(condOp, to_arm_reg, n, t) {\n\tvar cpu : ARMCoreType = this.cpu;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(cpu.gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tif (to_arm_reg) {\n\t\t\tcpu.gprs[t] = cpu.ifprs[n];\n\t\t} else {\n\t\t\tcpu.ifprs[n] = cpu.gprs[t];\n\t\t}\n\t}\n}\n\n///////////////////////////////////////////////////////////////////////////\n\nfunction ARMCoreThumb(cpu) {\n\tthis.cpu = cpu;\n};\n\nARMCoreThumb.prototype.constructADC = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar m = (gprs[rm] >>> 0) + (cpu.cpsrC ? 1 : 0);\n\t\tvar oldD = gprs[rd];\n\t\tvar d = (oldD >>> 0) + m;\n\t\tvar oldDn = oldD >> 31;\n\t\tvar dn = d >> 31;\n\t\tvar mn = m >> 31;\n\t\tcpu.cpsrN = dn;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\tcpu.cpsrV = oldDn == mn && oldDn != dn && mn != dn;\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = (gprs[rn] >>> 0) + immediate;\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\tcpu.cpsrV = !(gprs[rn] >> 31) && ((gprs[rn] >> 31 ^ d) >> 31) && (d >> 31);\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD2 = function(rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = (gprs[rn] >>> 0) + immediate;\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\tcpu.cpsrV = !(gprs[rn] >> 31) && ((gprs[rn] ^ d) >> 31) && ((immediate ^ d) >> 31);\n\t\tgprs[rn] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD3 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = (gprs[rn] >>> 0) + (gprs[rm] >>> 0);\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\tcpu.cpsrV = !((gprs[rn] ^ gprs[rm]) >> 31) && ((gprs[rn] ^ d) >> 31) && ((gprs[rm] ^ d) >> 31);\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD4 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] += gprs[rm];\n\t};\n};\n\nARMCoreThumb.prototype.constructADD5 = function(rd, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = (gprs[ARMRegs.PC] & 0xFFFFFFFC) + immediate;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD6 = function(rd, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[ARMRegs.SP] + immediate;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD7 = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[ARMRegs.SP] += immediate;\n\t};\n};\n\nARMCoreThumb.prototype.constructAND = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[rd] & gprs[rm];\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructASR1 = function(rd, rm, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tif (immediate == 0) {\n\t\t\tcpu.cpsrC = gprs[rm] >> 31;\n\t\t\tif (cpu.cpsrC) {\n\t\t\t\tgprs[rd] = 0xFFFFFFFF;\n\t\t\t} else {\n\t\t\t\tgprs[rd] = 0;\n\t\t\t}\n\t\t} else {\n\t\t\tcpu.cpsrC = gprs[rm] & (1 << (immediate - 1));\n\t\t\tgprs[rd] = gprs[rm] >> immediate;\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructASR2 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar rs = gprs[rm] & 0xFF;\n\t\tif (rs) {\n\t\t\tif (rs < 32) {\n\t\t\t\tcpu.cpsrC = gprs[rd] & (1 << (rs - 1));\n\t\t\t\tgprs[rd] >>= rs;\n\t\t\t} else {\n\t\t\t\tcpu.cpsrC = gprs[rd] >> 31;\n\t\t\t\tif (cpu.cpsrC) {\n\t\t\t\t\tgprs[rd] = 0xFFFFFFFF;\n\t\t\t\t} else {\n\t\t\t\t\tgprs[rd] = 0;\n\t\t\t\t}\n\t\t\t}\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructB1 = function(immediate, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tif (condOp()) {\n\t\t\tgprs[ARMRegs.PC] += immediate;\n\t\t}\n\t};\n};\n\nARMCoreThumb.prototype.constructB2 = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[ARMRegs.PC] += immediate;\n\t};\n};\n\nARMCoreThumb.prototype.constructBIC = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[rd] & ~gprs[rm];\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructBL1 = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[ARMRegs.LR] = gprs[ARMRegs.PC] + immediate;\n\t}\n};\n\nARMCoreThumb.prototype.constructBL2 = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar pc = gprs[ARMRegs.PC];\n\t\tgprs[ARMRegs.PC] = gprs[ARMRegs.LR] + (immediate << 1);\n\t\tgprs[ARMRegs.LR] = pc - 1;\n\t}\n};\n\nARMCoreThumb.prototype.constructBX = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tcpu.switchExecMode(gprs[rm] & 0x00000001);\n\t\tvar misalign = 0;\n\t\tif (rm == 15) {\n\t\t\tmisalign = gprs[rm] & 0x00000002;\n\t\t}\n\t\tgprs[ARMRegs.PC] = gprs[rm] & 0xFFFFFFFE - misalign;\n\t};\n};\n\nARMCoreThumb.prototype.constructCMN = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar aluOut = (gprs[rd] >>> 0) + (gprs[rm] >>> 0);\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = aluOut > 0xFFFFFFFF;\n\t\tcpu.cpsrV = (gprs[rd] >> 31) == (gprs[rm] >> 31) &&\n\t\t\t\t\t(gprs[rd] >> 31) != (aluOut >> 31) &&\n\t\t\t\t\t(gprs[rm] >> 31) != (aluOut >> 31);\n\t};\n};\n\nARMCoreThumb.prototype.constructCMP1 = function(rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar aluOut = gprs[rn] - immediate;\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= immediate;\n\t\tcpu.cpsrV = (gprs[rn] >> 31) && ((gprs[rn] ^ aluOut) >> 31);\n\t};\n}\n\nARMCoreThumb.prototype.constructCMP2 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = gprs[rd];\n\t\tvar m = gprs[rm];\n\t\tvar aluOut = d - m;\n\t\tvar an = aluOut >> 31;\n\t\tvar dn = d >> 31;\n\t\tcpu.cpsrN = an;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (d >>> 0) >= (m >>> 0);\n\t\tcpu.cpsrV = dn != (m >> 31) && dn != an;\n\t};\n};\n\nARMCoreThumb.prototype.constructCMP3 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar aluOut = gprs[rd] - gprs[rm];\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rd] >>> 0) >= (gprs[rm] >>> 0);\n\t\tcpu.cpsrV = ((gprs[rd] ^ gprs[rm]) >> 31) && ((gprs[rd] ^ aluOut) >> 31);\n\t};\n};\n\nARMCoreThumb.prototype.constructEOR = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[rd] ^ gprs[rm];\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructLDMIA = function(rn, rs) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar address = gprs[rn];\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tfor (m = 0x01, i = 0; i < 8; m <<= 1, ++i) {\n\t\t\tif (rs & m) {\n\t\t\t\tgprs[i] = cpu.mmu.load32(address);\n\t\t\t\taddress += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tcpu.mmu.waitMulti32(address, total);\n\t\tif (!((1 << rn) & rs)) {\n\t\t\tgprs[rn] = address;\n\t\t}\n\t};\n};\n\nARMCoreThumb.prototype.constructLDR1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar n = gprs[rn] + immediate;\n\t\tgprs[rd] = cpu.mmu.load32(n);\n\t\tcpu.mmu.wait32(n);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDR2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.load32(gprs[rn] + gprs[rm]);\n\t\tcpu.mmu.wait32(gprs[rn] + gprs[rm]);\n\t\t++cpu.cycles;\n\t}\n};\n\nARMCoreThumb.prototype.constructLDR3 = function(rd, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.load32((gprs[ARMRegs.PC] & 0xFFFFFFFC) + immediate);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.PC]);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDR4 = function(rd, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.load32(gprs[ARMRegs.SP] + immediate);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.SP] + immediate);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRB1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar n = gprs[rn] + immediate;\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.loadU8(n);\n\t\tcpu.mmu.wait(n);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRB2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.loadU8(gprs[rn] + gprs[rm]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRH1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar n = gprs[rn] + immediate;\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.loadU16(n);\n\t\tcpu.mmu.wait(n);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRH2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.loadU16(gprs[rn] + gprs[rm]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRSB = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.load8(gprs[rn] + gprs[rm]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRSH = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.load16(gprs[rn] + gprs[rm]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLSL1 = function(rd, rm, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tif (immediate == 0) {\n\t\t\tgprs[rd] = gprs[rm];\n\t\t} else {\n\t\t\tcpu.cpsrC = gprs[rm] & (1 << (32 - immediate));\n\t\t\tgprs[rd] = gprs[rm] << immediate;\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructLSL2 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar rs = gprs[rm] & 0xFF;\n\t\tif (rs) {\n\t\t\tif (rs < 32) {\n\t\t\t\tcpu.cpsrC = gprs[rd] & (1 << (32 - rs));\n\t\t\t\tgprs[rd] <<= rs;\n\t\t\t} else {\n\t\t\t\tif (rs > 32) {\n\t\t\t\t\tcpu.cpsrC = 0;\n\t\t\t\t} else {\n\t\t\t\t\tcpu.cpsrC = gprs[rd] & 0x00000001;\n\t\t\t\t}\n\t\t\t\tgprs[rd] = 0;\n\t\t\t}\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructLSR1 = function(rd, rm, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tif (immediate == 0) {\n\t\t\tcpu.cpsrC = gprs[rm] >> 31;\n\t\t\tgprs[rd] = 0;\n\t\t} else {\n\t\t\tcpu.cpsrC = gprs[rm] & (1 << (immediate - 1));\n\t\t\tgprs[rd] = gprs[rm] >>> immediate;\n\t\t}\n\t\tcpu.cpsrN = 0;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n}\n\nARMCoreThumb.prototype.constructLSR2 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar rs = gprs[rm] & 0xFF;\n\t\tif (rs) {\n\t\t\tif (rs < 32) {\n\t\t\t\tcpu.cpsrC = gprs[rd] & (1 << (rs - 1));\n\t\t\t\tgprs[rd] >>>= rs;\n\t\t\t} else {\n\t\t\t\tif (rs > 32) {\n\t\t\t\t\tcpu.cpsrC = 0;\n\t\t\t\t} else {\n\t\t\t\t\tcpu.cpsrC = gprs[rd] >> 31;\n\t\t\t\t}\n\t\t\t\tgprs[rd] = 0;\n\t\t\t}\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructMOV1 = function(rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rn] = immediate;\n\t\tcpu.cpsrN = immediate >> 31;\n\t\tcpu.cpsrZ = !(immediate & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructMOV2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = gprs[rn];\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = 0;\n\t\tcpu.cpsrV = 0;\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructMOV3 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[rm];\n\t};\n};\n\nARMCoreThumb.prototype.constructMUL = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.waitMul(gprs[rm]);\n\t\tif ((gprs[rm] & 0xFFFF0000) && (gprs[rd] & 0xFFFF0000)) {\n\t\t\t// Our data type is a double--we'll lose bits if we do it all at once!\n\t\t\tvar hi = ((gprs[rd] & 0xFFFF0000) * gprs[rm]) & 0xFFFFFFFF;\n\t\t\tvar lo = ((gprs[rd] & 0x0000FFFF) * gprs[rm]) & 0xFFFFFFFF;\n\t\t\tgprs[rd] = (hi + lo) & 0xFFFFFFFF;\n\t\t} else {\n\t\t\tgprs[rd] *= gprs[rm];\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructMVN = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = ~gprs[rm];\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructNEG = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = -gprs[rm];\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = 0 >= (d >>> 0);\n\t\tcpu.cpsrV = (gprs[rm] >> 31) && (d >> 31);\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructORR = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[rd] | gprs[rm];\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructPOP = function(rs, r) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\t++cpu.cycles;\n\t\tvar address = gprs[ARMRegs.SP];\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tfor (m = 0x01, i = 0; i < 8; m <<= 1, ++i) {\n\t\t\tif (rs & m) {\n\t\t\t\tcpu.mmu.waitSeq32(address);\n\t\t\t\tgprs[i] = cpu.mmu.load32(address);\n\t\t\t\taddress += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tif (r) {\n\t\t\tgprs[ARMRegs.PC] = cpu.mmu.load32(address) & 0xFFFFFFFE;\n\t\t\taddress += 4;\n\t\t\t++total;\n\t\t}\n\t\tcpu.mmu.waitMulti32(address, total);\n\t\tgprs[ARMRegs.SP] = address;\n\t};\n};\n\nARMCoreThumb.prototype.constructPUSH = function(rs, r) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar address = gprs[ARMRegs.SP] - 4;\n\t\tvar total = 0;\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tif (r) {\n\t\t\tcpu.mmu.store32(address, gprs[ARMRegs.LR]);\n\t\t\taddress -= 4;\n\t\t\t++total;\n\t\t}\n\t\tvar m, i;\n\t\tfor (m = 0x80, i = 7; m; m >>= 1, --i) {\n\t\t\tif (rs & m) {\n\t\t\t\tcpu.mmu.store32(address, gprs[i]);\n\t\t\t\taddress -= 4;\n\t\t\t\t++total;\n\t\t\t\tbreak;\n\t\t\t}\n\t\t}\n\t\tfor (m >>= 1, --i; m; m >>= 1, --i) {\n\t\t\tif (rs & m) {\n\t\t\t\tcpu.mmu.store32(address, gprs[i]);\n\t\t\t\taddress -= 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tcpu.mmu.waitMulti32(address, total);\n\t\tgprs[ARMRegs.SP] = address + 4;\n\t};\n};\n\nARMCoreThumb.prototype.constructROR = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar rs = gprs[rm] & 0xFF;\n\t\tif (rs) {\n\t\t\tvar r4 = rs & 0x1F;\n\t\t\tif (r4 > 0) {\n\t\t\t\tcpu.cpsrC = gprs[rd] & (1 << (r4 - 1));\n\t\t\t\tgprs[rd] = (gprs[rd] >>> r4) | (gprs[rd] << (32 - r4));\n\t\t\t} else {\n\t\t\t\tcpu.cpsrC = gprs[rd] >> 31;\n\t\t\t}\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructSBC = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar m = (gprs[rm] >>> 0) + (cpu.cpsrC ? 0 : 1);\n\t\tvar d = (gprs[rd] >>> 0) - m;\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rd] >>> 0) >= (d >>> 0);\n\t\tcpu.cpsrV = ((gprs[rd] ^ m) >> 31) && ((gprs[rd] ^ d) >> 31);\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructSTMIA = function(rn, rs) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tvar address = gprs[rn];\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tfor (m = 0x01, i = 0; i < 8; m <<= 1, ++i) {\n\t\t\tif (rs & m) {\n\t\t\t\tcpu.mmu.store32(address, gprs[i]);\n\t\t\t\taddress += 4;\n\t\t\t\t++total;\n\t\t\t\tbreak;\n\t\t\t}\n\t\t}\n\t\tfor (m <<= 1, ++i; i < 8; m <<= 1, ++i) {\n\t\t\tif (rs & m) {\n\t\t\t\tcpu.mmu.store32(address, gprs[i]);\n\t\t\t\taddress += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tcpu.mmu.waitMulti32(address, total);\n\t\tgprs[rn] = address;\n\t};\n};\n\nARMCoreThumb.prototype.constructSTR1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar n = gprs[rn] + immediate;\n\t\tcpu.mmu.store32(n, gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait32(n);\n\t};\n};\n\nARMCoreThumb.prototype.constructSTR2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.store32(gprs[rn] + gprs[rm], gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait32(gprs[rn] + gprs[rm]);\n\t};\n};\n\nARMCoreThumb.prototype.constructSTR3 = function(rd, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.store32(gprs[ARMRegs.SP] + immediate, gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.SP] + immediate);\n\t};\n};\n\nARMCoreThumb.prototype.constructSTRB1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar n = gprs[rn] + immediate;\n\t\tcpu.mmu.store8(n, gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait(n);\n\t};\n};\n\nARMCoreThumb.prototype.constructSTRB2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.store8(gprs[rn] + gprs[rm], gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t}\n};\n\nARMCoreThumb.prototype.constructSTRH1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar n = gprs[rn] + immediate;\n\t\tcpu.mmu.store16(n, gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait(n);\n\t};\n};\n\nARMCoreThumb.prototype.constructSTRH2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.store16(gprs[rn] + gprs[rm], gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t}\n};\n\nARMCoreThumb.prototype.constructSUB1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = gprs[rn] - immediate;\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= immediate;\n\t\tcpu.cpsrV = (gprs[rn] >> 31) && ((gprs[rn] ^ d) >> 31);\n\t\tgprs[rd] = d;\n\t};\n}\n\nARMCoreThumb.prototype.constructSUB2 = function(rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = gprs[rn] - immediate;\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= immediate;\n\t\tcpu.cpsrV = (gprs[rn] >> 31) && ((gprs[rn] ^ d) >> 31);\n\t\tgprs[rn] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructSUB3 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = gprs[rn] - gprs[rm];\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= (gprs[rm] >>> 0);\n\t\tcpu.cpsrV = (gprs[rn] >> 31) != (gprs[rm] >> 31) &&\n\t\t\t\t\t(gprs[rn] >> 31) != (d >> 31);\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructSWI = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.irq.swi(immediate);\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t}\n};\n\nARMCoreThumb.prototype.constructTST = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar aluOut = gprs[rd] & gprs[rm];\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t};\n};\n\n///////////////////////////////////////////////////////////////////////////\n\nfunction ARMCore() {\n\tthis.SP = 13;\n\tthis.LR = 14;\n\tthis.PC = 15;\n\n\tthis.MODE_ARM = 0;\n\tthis.MODE_THUMB = 1;\n\n\tthis.MODE_USER = 0x10;\n\tthis.MODE_FIQ = 0x11;\n\tthis.MODE_IRQ = 0x12;\n\tthis.MODE_SUPERVISOR = 0x13;\n\tthis.MODE_ABORT = 0x17;\n\tthis.MODE_UNDEFINED = 0x1B;\n\tthis.MODE_SYSTEM = 0x1F;\n\n\tthis.BANK_NONE = 0\n\tthis.BANK_FIQ = 1;\n\tthis.BANK_IRQ = 2;\n\tthis.BANK_SUPERVISOR = 3;\n\tthis.BANK_ABORT = 4;\n\tthis.BANK_UNDEFINED = 5;\n\n\tthis.WORD_SIZE_ARM = 4;\n\tthis.WORD_SIZE_THUMB = 2;\n\n\tthis.BASE_RESET = 0x00000000;\n\tthis.BASE_UNDEF = 0x00000004;\n\tthis.BASE_SWI = 0x00000008;\n\tthis.BASE_PABT = 0x0000000C;\n\tthis.BASE_DABT = 0x00000010;\n\tthis.BASE_IRQ = 0x00000018;\n\tthis.BASE_FIQ = 0x0000001C;\n\n\tthis.armCompiler = new ARMCoreArm(this);\n\tthis.thumbCompiler = new ARMCoreThumb(this);\n\tthis.generateConds();\n\n\tthis.gprs = new Int32Array(16);\n\tthis.dfprs = new Float64Array(16);\n\tthis.sfprs = new Float32Array(this.dfprs.buffer); // regs shared with dfprs\n\tthis.ifprs = new Int32Array(this.dfprs.buffer); // regs shared with dfprs\n};\n\nARMCore.prototype.resetCPU = function(startOffset) {\n\tfor (var i = 0; i < ARMRegs.PC; ++i) {\n\t\tthis.gprs[i] = 0;\n\t}\n\tthis.gprs[ARMRegs.PC] = startOffset + ARMConstants.WORD_SIZE_ARM;\n\tthis.dfprs.set(0); // no need to zero the sfprs, since they share the same buffer\n\n\tthis.loadInstruction = this.loadInstructionArm;\n\tthis.execMode = ARMMode.MODE_ARM;\n\tthis.instructionWidth = ARMConstants.WORD_SIZE_ARM;\n\n\tthis.mode = ARMMode.MODE_SYSTEM;\n\n\tthis.cpsrI = false;\n\tthis.cpsrF = false;\n\n\tthis.cpsrV = false;\n\tthis.cpsrC = false;\n\tthis.cpsrZ = false;\n\tthis.cpsrN = false;\n\n\tthis.bankedRegisters = [\n\t\tnew Int32Array(7),\n\t\tnew Int32Array(7),\n\t\tnew Int32Array(2),\n\t\tnew Int32Array(2),\n\t\tnew Int32Array(2),\n\t\tnew Int32Array(2)\n\t];\n\tthis.spsr = 0;\n\tthis.bankedSPSRs = new Int32Array(6);\n\n\tthis.cycles = 0;\n\n\tthis.shifterOperand = 0;\n\tthis.shifterCarryOut = 0;\n\n\tthis.page = null;\n\tthis.pageId = 0;\n\tthis.pageRegion = -1;\n\n\tthis.instruction = null;\n\n\tthis.irq.clear();\n\n\tvar gprs = this.gprs;\n\tvar mmu = this.mmu as ARMMMUInterface;\n\n\tthis.step = function() {\n\t\tvar instruction = this.instruction || (this.instruction = this.loadInstruction(gprs[ARMRegs.PC] - this.instructionWidth));\n\t\tgprs[ARMRegs.PC] += this.instructionWidth;\n\t\tthis.conditionPassed = true;\n\t\tinstruction();\n\n\t\tif (!instruction.writesPC) {\n\t\t\tif (this.instruction != null) { // We might have gotten an interrupt from the instruction\n\t\t\t\tif (instruction.next == null || instruction.next.page.invalid) {\n\t\t\t\t\tinstruction.next = this.loadInstruction(gprs[ARMRegs.PC] - this.instructionWidth);\n\t\t\t\t}\n\t\t\t\tthis.instruction = instruction.next;\n\t\t\t}\n\t\t} else {\n\t\t\tif (this.conditionPassed) {\n\t\t\t\tvar pc = gprs[ARMRegs.PC] &= 0xFFFFFFFE;\n\t\t\t\tif (this.execMode == ARMMode.MODE_ARM) {\n\t\t\t\t\tmmu.wait32(pc);\n\t\t\t\t\tmmu.waitPrefetch32(pc);\n\t\t\t\t} else {\n\t\t\t\t\tmmu.wait(pc);\n\t\t\t\t\tmmu.waitPrefetch(pc);\n\t\t\t\t}\n\t\t\t\tgprs[ARMRegs.PC] += this.instructionWidth;\n\t\t\t\tif (!instruction.fixedJump) {\n\t\t\t\t\tthis.instruction = null;\n\t\t\t\t} else if (this.instruction != null) {\n\t\t\t\t\tif (instruction.next == null || instruction.next.page.invalid) {\n\t\t\t\t\t\tinstruction.next = this.loadInstruction(gprs[ARMRegs.PC] - this.instructionWidth);\n\t\t\t\t\t}\n\t\t\t\t\tthis.instruction = instruction.next;\n\t\t\t\t}\n\t\t\t} else {\n\t\t\t\tthis.instruction = null;\n\t\t\t}\n\t\t}\n\t\tthis.irq.updateTimers();\n\t};\n};\n\nARMCore.prototype.freeze = function() : ARMCoreState {\n\treturn {\n\t\tPC: this.gprs[15] - this.instructionWidth,\n\t\tSP: this.gprs[13],\n\t\t'gprs': [\n\t\t\tthis.gprs[0],\n\t\t\tthis.gprs[1],\n\t\t\tthis.gprs[2],\n\t\t\tthis.gprs[3],\n\t\t\tthis.gprs[4],\n\t\t\tthis.gprs[5],\n\t\t\tthis.gprs[6],\n\t\t\tthis.gprs[7],\n\t\t\tthis.gprs[8],\n\t\t\tthis.gprs[9],\n\t\t\tthis.gprs[10],\n\t\t\tthis.gprs[11],\n\t\t\tthis.gprs[12],\n\t\t\tthis.gprs[13],\n\t\t\tthis.gprs[14],\n\t\t\tthis.gprs[15],\n\t\t],\n\t\t'sfprs': this.sfprs.slice(),\n\t\t'dfprs': this.dfprs.slice(),\n\t\t'ifprs': this.ifprs.slice(),\n\t\t'mode': this.mode,\n\t\t'cpsrI': this.cpsrI,\n\t\t'cpsrF': this.cpsrF,\n\t\t'cpsrV': this.cpsrV,\n\t\t'cpsrC': this.cpsrC,\n\t\t'cpsrZ': this.cpsrZ,\n\t\t'cpsrN': this.cpsrN,\n\t\t'bankedRegisters': [\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[0][0],\n\t\t\t\tthis.bankedRegisters[0][1],\n\t\t\t\tthis.bankedRegisters[0][2],\n\t\t\t\tthis.bankedRegisters[0][3],\n\t\t\t\tthis.bankedRegisters[0][4],\n\t\t\t\tthis.bankedRegisters[0][5],\n\t\t\t\tthis.bankedRegisters[0][6]\n\t\t\t],\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[1][0],\n\t\t\t\tthis.bankedRegisters[1][1],\n\t\t\t\tthis.bankedRegisters[1][2],\n\t\t\t\tthis.bankedRegisters[1][3],\n\t\t\t\tthis.bankedRegisters[1][4],\n\t\t\t\tthis.bankedRegisters[1][5],\n\t\t\t\tthis.bankedRegisters[1][6]\n\t\t\t],\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[2][0],\n\t\t\t\tthis.bankedRegisters[2][1]\n\t\t\t],\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[3][0],\n\t\t\t\tthis.bankedRegisters[3][1]\n\t\t\t],\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[4][0],\n\t\t\t\tthis.bankedRegisters[4][1]\n\t\t\t],\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[5][0],\n\t\t\t\tthis.bankedRegisters[5][1]\n\t\t\t]\n\t\t],\n\t\t'spsr': this.spsr,\n\t\t'bankedSPSRs': [\n\t\t\tthis.bankedSPSRs[0],\n\t\t\tthis.bankedSPSRs[1],\n\t\t\tthis.bankedSPSRs[2],\n\t\t\tthis.bankedSPSRs[3],\n\t\t\tthis.bankedSPSRs[4],\n\t\t\tthis.bankedSPSRs[5]\n\t\t],\n\t\t'cycles': this.cycles,\n\t\t'instructionWidth': this.instructionWidth,\n\t};\n};\n\nARMCore.prototype.defrost = function(frost: ARMCoreState) {\n\tthis.instruction = null;\n\n\tthis.page = null;\n\tthis.pageId = 0;\n\tthis.pageRegion = -1;\n\n\tthis.gprs[0] = frost.gprs[0];\n\tthis.gprs[1] = frost.gprs[1];\n\tthis.gprs[2] = frost.gprs[2];\n\tthis.gprs[3] = frost.gprs[3];\n\tthis.gprs[4] = frost.gprs[4];\n\tthis.gprs[5] = frost.gprs[5];\n\tthis.gprs[6] = frost.gprs[6];\n\tthis.gprs[7] = frost.gprs[7];\n\tthis.gprs[8] = frost.gprs[8];\n\tthis.gprs[9] = frost.gprs[9];\n\tthis.gprs[10] = frost.gprs[10];\n\tthis.gprs[11] = frost.gprs[11];\n\tthis.gprs[12] = frost.gprs[12];\n\tthis.gprs[13] = frost.gprs[13];\n\tthis.gprs[14] = frost.gprs[14];\n\tthis.gprs[15] = frost.gprs[15];\n\n\tthis.ifprs.set(frost.ifprs); // regs shared with sfprs\n\n\tthis.mode = frost.mode;\n\tthis.cpsrI = frost.cpsrI;\n\tthis.cpsrF = frost.cpsrF;\n\tthis.cpsrV = frost.cpsrV;\n\tthis.cpsrC = frost.cpsrC;\n\tthis.cpsrZ = frost.cpsrZ;\n\tthis.cpsrN = frost.cpsrN;\n\n\tthis.bankedRegisters[0][0] = frost.bankedRegisters[0][0];\n\tthis.bankedRegisters[0][1] = frost.bankedRegisters[0][1];\n\tthis.bankedRegisters[0][2] = frost.bankedRegisters[0][2];\n\tthis.bankedRegisters[0][3] = frost.bankedRegisters[0][3];\n\tthis.bankedRegisters[0][4] = frost.bankedRegisters[0][4];\n\tthis.bankedRegisters[0][5] = frost.bankedRegisters[0][5];\n\tthis.bankedRegisters[0][6] = frost.bankedRegisters[0][6];\n\n\tthis.bankedRegisters[1][0] = frost.bankedRegisters[1][0];\n\tthis.bankedRegisters[1][1] = frost.bankedRegisters[1][1];\n\tthis.bankedRegisters[1][2] = frost.bankedRegisters[1][2];\n\tthis.bankedRegisters[1][3] = frost.bankedRegisters[1][3];\n\tthis.bankedRegisters[1][4] = frost.bankedRegisters[1][4];\n\tthis.bankedRegisters[1][5] = frost.bankedRegisters[1][5];\n\tthis.bankedRegisters[1][6] = frost.bankedRegisters[1][6];\n\n\tthis.bankedRegisters[2][0] = frost.bankedRegisters[2][0];\n\tthis.bankedRegisters[2][1] = frost.bankedRegisters[2][1];\n\n\tthis.bankedRegisters[3][0] = frost.bankedRegisters[3][0];\n\tthis.bankedRegisters[3][1] = frost.bankedRegisters[3][1];\n\n\tthis.bankedRegisters[4][0] = frost.bankedRegisters[4][0];\n\tthis.bankedRegisters[4][1] = frost.bankedRegisters[4][1];\n\n\tthis.bankedRegisters[5][0] = frost.bankedRegisters[5][0];\n\tthis.bankedRegisters[5][1] = frost.bankedRegisters[5][1];\n\n\tthis.spsr = frost.spsr;\n\tthis.bankedSPSRs[0] = frost.bankedSPSRs[0];\n\tthis.bankedSPSRs[1] = frost.bankedSPSRs[1];\n\tthis.bankedSPSRs[2] = frost.bankedSPSRs[2];\n\tthis.bankedSPSRs[3] = frost.bankedSPSRs[3];\n\tthis.bankedSPSRs[4] = frost.bankedSPSRs[4];\n\tthis.bankedSPSRs[5] = frost.bankedSPSRs[5];\n\n\tthis.cycles = frost.cycles;\n\n\tthis.instructionWidth = frost.instructionWidth;\n\tthis.loadInstruction = frost.instructionWidth == 2 ? this.loadInstructionThumb : this.loadInstructionArm;\n\tthis.execMode = frost.instructionWidth == 2 ? ARMMode.MODE_THUMB : ARMMode.MODE_ARM;\n};\n\nARMCore.prototype.fetchPage = function(address : number) {\n\tvar mmu = this.mmu;\n\tvar region = address >>> mmu.BASE_OFFSET;\n\tvar pageId = mmu.addressToPage(region, address & mmu.OFFSET_MASK);\n\tif (region == this.pageRegion) {\n\t\tif (pageId == this.pageId && !(this.page as ARMMemoryPage).invalid) {\n\t\t\treturn;\n\t\t}\n\t\tthis.pageId = pageId;\n\t} else {\n\t\tthis.pageMask = mmu.memory[region].PAGE_MASK;\n\t\tthis.pageRegion = region;\n\t\tthis.pageId = pageId;\n\t}\n\n\tthis.page = mmu.accessPage(region, pageId);\n};\n\nARMCore.prototype.loadInstructionArm = function(address : number) {\n\tvar next : ARMOperation = null;\n\tthis.fetchPage(address);\n\tvar offset = (address & this.pageMask) >> 2;\n\tnext = (this.page as ARMMemoryPage).arm[offset];\n\tif (next) {\n\t\treturn next;\n\t}\n\tvar instruction = this.mmu.load32(address) >>> 0;\n\tnext = this.compileArm(instruction);\n\tnext.next = null;\n\tnext.page = this.page;\n\tnext.address = address;\n\tnext.opcode = instruction;\n\t(this.page as ARMMemoryPage).arm[offset] = next;\n\treturn next;\n};\n\nARMCore.prototype.loadInstructionThumb = function(address : number) {\n\tvar next : ARMOperation = null;\n\tthis.fetchPage(address);\n\tvar offset = (address & this.pageMask) >> 1;\n\tnext = (this.page as ARMMemoryPage).thumb[offset];\n\tif (next) {\n\t\treturn next;\n\t}\n\tvar instruction = this.mmu.load16(address);\n\tnext = this.compileThumb(instruction);\n\tnext.next = null;\n\tnext.page = this.page;\n\tnext.address = address;\n\tnext.opcode = instruction;\n\t(this.page as ARMMemoryPage).thumb[offset] = next;\n\treturn next;\n};\n\nARMCore.prototype.selectBank = function(mode : ARMMode) {\n\tswitch (mode) {\n\tcase ARMMode.MODE_USER:\n\tcase ARMMode.MODE_SYSTEM:\n\t\t// No banked registers\n\t\treturn ARMConstants.BANK_NONE;\n\tcase ARMMode.MODE_FIQ:\n\t\treturn ARMConstants.BANK_FIQ;\n\tcase ARMMode.MODE_IRQ:\n\t\treturn ARMConstants.BANK_IRQ;\n\tcase ARMMode.MODE_SUPERVISOR:\n\t\treturn ARMConstants.BANK_SUPERVISOR;\n\tcase ARMMode.MODE_ABORT:\n\t\treturn ARMConstants.BANK_ABORT;\n\tcase ARMMode.MODE_UNDEFINED:\n\t\treturn ARMConstants.BANK_UNDEFINED;\n\tdefault:\n\t\tthrow new EmuHalt(\"Invalid user mode \" + mode + \" passed to selectBank\");\n\t}\n};\n\nARMCore.prototype.switchExecMode = function(newMode) {\n\tif (this.execMode != newMode) {\n\t\tthis.execMode = newMode;\n\t\tif (newMode == ARMMode.MODE_ARM) {\n\t\t\tthis.instructionWidth = ARMConstants.WORD_SIZE_ARM;\n\t\t\tthis.loadInstruction = this.loadInstructionArm;\n\t\t} else {\n\t\t\tthis.instructionWidth = ARMConstants.WORD_SIZE_THUMB;\n\t\t\tthis.loadInstruction = this.loadInstructionThumb;\n\t\t}\n\t}\n\t\n};\n\nARMCore.prototype.switchMode = function(newMode) {\n\tif (newMode == this.mode) {\n\t\t// Not switching modes after all\n\t\treturn;\n\t}\n\tif (newMode != ARMMode.MODE_USER || newMode != ARMMode.MODE_SYSTEM) {\n\t\t// Switch banked registers\n\t\tvar newBank = this.selectBank(newMode);\n\t\tvar oldBank = this.selectBank(this.mode);\n\t\tif (newBank != oldBank) {\n\t\t\t// TODO: support FIQ\n\t\t\tif (newMode == ARMMode.MODE_FIQ || this.mode == ARMMode.MODE_FIQ) {\n\t\t\t\tvar oldFiqBank = (oldBank == ARMConstants.BANK_FIQ) ? 1 : 0;\n\t\t\t\tvar newFiqBank = (newBank == ARMConstants.BANK_FIQ) ? 1 : 0;\n\t\t\t\tthis.bankedRegisters[oldFiqBank][2] = this.gprs[8];\n\t\t\t\tthis.bankedRegisters[oldFiqBank][3] = this.gprs[9];\n\t\t\t\tthis.bankedRegisters[oldFiqBank][4] = this.gprs[10];\n\t\t\t\tthis.bankedRegisters[oldFiqBank][5] = this.gprs[11];\n\t\t\t\tthis.bankedRegisters[oldFiqBank][6] = this.gprs[12];\n\t\t\t\tthis.gprs[8] = this.bankedRegisters[newFiqBank][2];\n\t\t\t\tthis.gprs[9] = this.bankedRegisters[newFiqBank][3];\n\t\t\t\tthis.gprs[10] = this.bankedRegisters[newFiqBank][4];\n\t\t\t\tthis.gprs[11] = this.bankedRegisters[newFiqBank][5];\n\t\t\t\tthis.gprs[12] = this.bankedRegisters[newFiqBank][6];\n\t\t\t}\n\t\t\tthis.bankedRegisters[oldBank][0] = this.gprs[ARMRegs.SP];\n\t\t\tthis.bankedRegisters[oldBank][1] = this.gprs[ARMRegs.LR];\n\t\t\tthis.gprs[ARMRegs.SP] = this.bankedRegisters[newBank][0];\n\t\t\tthis.gprs[ARMRegs.LR] = this.bankedRegisters[newBank][1];\n\n\t\t\tthis.bankedSPSRs[oldBank] = this.spsr;\n\t\t\tthis.spsr = this.bankedSPSRs[newBank];\n\t\t}\n\t}\n\tthis.mode = newMode;\n};\n\nARMCore.prototype.packCPSR = function() {\n\treturn this.mode | (this.execMode << 5) | (this.cpsrF << 6) | (this.cpsrI << 7) |\n\t (this.cpsrN << 31) | (this.cpsrZ << 30) | (this.cpsrC << 29) | (this.cpsrV << 28);\n};\n\nARMCore.prototype.unpackCPSR = function(spsr) {\n\tthis.switchMode(spsr & 0x0000001F);\n\tthis.switchExecMode(!!(spsr & 0x00000020));\n\tthis.cpsrF = spsr & 0x00000040;\n\tthis.cpsrI = spsr & 0x00000080;\n\tthis.cpsrN = spsr & 0x80000000;\n\tthis.cpsrZ = spsr & 0x40000000;\n\tthis.cpsrC = spsr & 0x20000000;\n\tthis.cpsrV = spsr & 0x10000000;\n\n\tthis.irq.testIRQ();\n};\n\nARMCore.prototype.hasSPSR = function() {\n\treturn this.mode != ARMMode.MODE_SYSTEM && this.mode != ARMMode.MODE_USER;\n};\n\nARMCore.prototype.raiseIRQ = function() {\n\tif (this.cpsrI) {\n\t\treturn;\n\t}\n\tvar cpsr = this.packCPSR();\n\tvar instructionWidth = this.instructionWidth;\n\tthis.switchMode(ARMMode.MODE_IRQ);\n\tthis.spsr = cpsr;\n\tthis.gprs[ARMRegs.LR] = this.gprs[ARMRegs.PC] - instructionWidth + 4;\n\tthis.gprs[ARMRegs.PC] = this.BASE_IRQ + ARMConstants.WORD_SIZE_ARM;\n\tthis.instruction = null;\n\tthis.switchExecMode(ARMMode.MODE_ARM);\n\tthis.cpsrI = true;\n};\n\nARMCore.prototype.raiseTrap = function() {\n\tvar cpsr = this.packCPSR();\n\tvar instructionWidth = this.instructionWidth;\n\tthis.switchMode(ARMMode.MODE_SUPERVISOR);\n\tthis.spsr = cpsr;\n\tthis.gprs[ARMRegs.LR] = this.gprs[ARMRegs.PC] - instructionWidth;\n\tthis.gprs[ARMRegs.PC] = this.BASE_SWI + ARMConstants.WORD_SIZE_ARM;\n\tthis.instruction = null;\n\tthis.switchExecMode(ARMMode.MODE_ARM);\n\tthis.cpsrI = true;\n};\n\nARMCore.prototype.badOp = function(instruction) {\n\tvar func : AddressFunction = function() {\n\t\tthrow new EmuHalt(\"Illegal instruction: 0x\" + instruction.toString(16));\n\t};\n\tfunc.writesPC = true;\n\tfunc.fixedJump = false;\n\treturn func;\n};\n\nARMCore.prototype.generateConds = function() {\n\tvar cpu = this;\n\tthis.conds = [\n\t\t// EQ\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrZ;\n\t\t},\n\t\t// NE\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrZ;\n\t\t},\n\t\t// CS\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrC;\n\t\t},\n\t\t// CC\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrC;\n\t\t},\n\t\t// MI\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrN;\n\t\t},\n\t\t// PL\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrN;\n\t\t},\n\t\t// VS\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrV;\n\t\t},\n\t\t// VC\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrV;\n\t\t},\n\t\t// HI\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrC && !cpu.cpsrZ;\n\t\t},\n\t\t// LS\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrC || cpu.cpsrZ;\n\t\t},\n\t\t// GE\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrN == !cpu.cpsrV;\n\t\t},\n\t\t// LT\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrN != !cpu.cpsrV;\n\t\t},\n\t\t// GT\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrZ && !cpu.cpsrN == !cpu.cpsrV;\n\t\t},\n\t\t// LE\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrZ || !cpu.cpsrN != !cpu.cpsrV;\n\t\t},\n\t\t// AL\n\t\tnull,\n\t\tnull\n\t]\n}\n\nARMCore.prototype.barrelShiftImmediate = function(shiftType, immediate, rm) {\n\tvar cpu = this;\n\tvar gprs = this.gprs;\n\tvar shiftOp = this.badOp;\n\tswitch (shiftType) {\n\tcase 0x00000000:\n\t\t// LSL\n\t\tif (immediate) {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = gprs[rm] << immediate;\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & (1 << (32 - immediate));\n\t\t\t};\n\t\t} else {\n\t\t\t// This boils down to no shift\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = gprs[rm];\n\t\t\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t\t\t};\n\t\t}\n\t\tbreak;\n\tcase 0x00000020:\n\t\t// LSR\n\t\tif (immediate) {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = gprs[rm] >>> immediate;\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & (1 << (immediate - 1));\n\t\t\t};\n\t\t} else {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = 0;\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & 0x80000000;\n\t\t\t};\n\t\t}\n\t\tbreak;\n\tcase 0x00000040:\n\t\t// ASR\n\t\tif (immediate) {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = gprs[rm] >> immediate;\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & (1 << (immediate - 1));\n\t\t\t};\n\t\t} else {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & 0x80000000;\n\t\t\t\tif (cpu.shifterCarryOut) {\n\t\t\t\t\tcpu.shifterOperand = 0xFFFFFFFF;\n\t\t\t\t} else {\n\t\t\t\t\tcpu.shifterOperand = 0;\n\t\t\t\t}\n\t\t\t};\n\t\t}\n\t\tbreak;\n\tcase 0x00000060:\n\t\t// ROR\n\t\tif (immediate) {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = (gprs[rm] >>> immediate) | (gprs[rm] << (32 - immediate));\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & (1 << (immediate - 1));\n\t\t\t};\n\t\t} else {\n\t\t\t// RRX\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = ((cpu.cpsrC ? 1 : 0) << 31) | (gprs[rm] >>> 1);\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & 0x00000001;\n\t\t\t};\n\t\t}\n\t\tbreak;\n\t}\n\treturn shiftOp;\n}\n\nARMCore.prototype.compileArm = function(instruction) {\n\tvar op = this.badOp(instruction);\n\tvar i = instruction & 0x0E000000;\n\tvar cpu = this;\n\tvar gprs = this.gprs;\n\n\tvar condOp = this.conds[(instruction & 0xF0000000) >>> 28];\n\tif ((instruction & 0x0FFFFFF0) == 0x012FFF10) {\n\t\t// BX\n\t\tvar rm = instruction & 0xF;\n\t\top = this.armCompiler.constructBX(rm, condOp);\n\t\top.writesPC = true;\n\t\top.fixedJump = false;\n\t} else if (!(instruction & 0x0C000000) && (i == 0x02000000 || (instruction & 0x00000090) != 0x00000090)) {\n\t\tvar opcode = instruction & 0x01E00000;\n\t\tvar s = instruction & 0x00100000;\n\t\tvar shiftsRs = false;\n\t\tif ((opcode & 0x01800000) == 0x01000000 && !s) {\n\t\t\tvar r = instruction & 0x00400000;\n\t\t\tif ((instruction & 0x00B0F000) == 0x0020F000) {\n\t\t\t\t// MSR\n\t\t\t\tvar rm = instruction & 0x0000000F;\n\t\t\t\tvar immediate = instruction & 0x000000FF;\n\t\t\t\tvar rotateImm = (instruction & 0x00000F00) >> 7;\n\t\t\t\timmediate = (immediate >>> rotateImm) | (immediate << (32 - rotateImm));\n\t\t\t\top = this.armCompiler.constructMSR(rm, r, instruction, immediate, condOp);\n\t\t\t\top.writesPC = false;\n\t\t\t} else if ((instruction & 0x00BF0000) == 0x000F0000) {\n\t\t\t\t// MRS\n\t\t\t\tvar rd = (instruction & 0x0000F000) >> 12;\n\t\t\t\top = this.armCompiler.constructMRS(rd, r, condOp);\n\t\t\t\top.writesPC = rd == ARMRegs.PC;\n\t\t\t}\n\t\t} else {\n\t\t\t// Data processing/FSR transfer\n\t\t\tvar rn = (instruction & 0x000F0000) >> 16;\n\t\t\tvar rd = (instruction & 0x0000F000) >> 12;\n\n\t\t\t// Parse shifter operand\n\t\t\tvar shiftType = instruction & 0x00000060;\n\t\t\tvar rm = instruction & 0x0000000F;\n\t\t\tvar shiftOp = function() {\n\t\t\t\tthrow new EmuHalt('BUG: invalid barrel shifter');\n\t\t\t};\n\t\t\tif (instruction & 0x02000000) {\n\t\t\t\tvar immediate = instruction & 0x000000FF;\n\t\t\t\tvar rotate = (instruction & 0x00000F00) >> 7;\n\t\t\t\tif (!rotate) {\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1Immediate(immediate);\n\t\t\t\t} else {\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1ImmediateRotate(immediate, rotate);\n\t\t\t\t}\n\t\t\t} else if (instruction & 0x00000010) {\n\t\t\t\tvar rs = (instruction & 0x00000F00) >> 8;\n\t\t\t\tshiftsRs = true;\n\t\t\t\tswitch (shiftType) {\n\t\t\t\tcase 0x00000000:\n\t\t\t\t\t// LSL\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1LSL(rs, rm);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00000020:\n\t\t\t\t\t// LSR\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1LSR(rs, rm);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00000040:\n\t\t\t\t\t// ASR\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1ASR(rs, rm);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00000060:\n\t\t\t\t\t// ROR\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1ROR(rs, rm);\n\t\t\t\t\tbreak;\n\t\t\t\t}\n\t\t\t} else {\n\t\t\t\tvar immediate = (instruction & 0x00000F80) >> 7;\n\t\t\t\tshiftOp = this.barrelShiftImmediate(shiftType, immediate, rm);\n\t\t\t}\n\n\t\t\tswitch (opcode) {\n\t\t\tcase 0x00000000:\n\t\t\t\t// AND\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructANDS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructAND(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00200000:\n\t\t\t\t// EOR\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructEORS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructEOR(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00400000:\n\t\t\t\t// SUB\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructSUBS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructSUB(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00600000:\n\t\t\t\t// RSB\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructRSBS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructRSB(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00800000:\n\t\t\t\t// ADD\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructADDS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructADD(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00A00000:\n\t\t\t\t// ADC\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructADCS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructADC(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00C00000:\n\t\t\t\t// SBC\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructSBCS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructSBC(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00E00000:\n\t\t\t\t// RSC\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructRSCS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructRSC(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x01000000:\n\t\t\t\t// TST\n\t\t\t\top = this.armCompiler.constructTST(rd, rn, shiftOp, condOp);\n\t\t\t\tbreak;\n\t\t\tcase 0x01200000:\n\t\t\t\t// TEQ\n\t\t\t\top = this.armCompiler.constructTEQ(rd, rn, shiftOp, condOp);\n\t\t\t\tbreak;\n\t\t\tcase 0x01400000:\n\t\t\t\t// CMP\n\t\t\t\top = this.armCompiler.constructCMP(rd, rn, shiftOp, condOp);\n\t\t\t\tbreak;\n\t\t\tcase 0x01600000:\n\t\t\t\t// CMN\n\t\t\t\top = this.armCompiler.constructCMN(rd, rn, shiftOp, condOp);\n\t\t\t\tbreak;\n\t\t\tcase 0x01800000:\n\t\t\t\t// ORR\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructORRS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructORR(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x01A00000:\n\t\t\t\t// MOV\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructMOVS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructMOV(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x01C00000:\n\t\t\t\t// BIC\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructBICS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructBIC(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x01E00000:\n\t\t\t\t// MVN\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructMVNS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructMVN(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\t}\n\t\t\top.writesPC = rd == ARMRegs.PC;\n\t\t}\n\t} else if ((instruction & 0x0FB00FF0) == 0x01000090) {\n\t\t// Single data swap\n\t\tvar rm = instruction & 0x0000000F;\n\t\tvar rd = (instruction >> 12) & 0x0000000F;\n\t\tvar rn = (instruction >> 16) & 0x0000000F;\n\t\tif (instruction & 0x00400000) {\n\t\t\top = this.armCompiler.constructSWPB(rd, rn, rm, condOp);\n\t\t} else {\n\t\t\top = this.armCompiler.constructSWP(rd, rn, rm, condOp);\n\t\t}\n\t\top.writesPC = rd == ARMRegs.PC;\n\t} else {\n\t\tswitch (i) {\n\t\tcase 0x00000000:\n\t\t\tif ((instruction & 0x010000F0) == 0x00000090) {\n\t\t\t\t// Multiplies\n\t\t\t\tvar rd = (instruction & 0x000F0000) >> 16;\n\t\t\t\tvar rn = (instruction & 0x0000F000) >> 12;\n\t\t\t\tvar rs = (instruction & 0x00000F00) >> 8;\n\t\t\t\tvar rm = instruction & 0x0000000F;\n\t\t\t\tswitch (instruction & 0x00F00000) {\n\t\t\t\tcase 0x00000000:\n\t\t\t\t\t// MUL\n\t\t\t\t\top = this.armCompiler.constructMUL(rd, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00100000:\n\t\t\t\t\t// MULS\n\t\t\t\t\top = this.armCompiler.constructMULS(rd, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00200000:\n\t\t\t\t\t// MLA\n\t\t\t\t\top = this.armCompiler.constructMLA(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak\n\t\t\t\tcase 0x00300000:\n\t\t\t\t\t// MLAS\n\t\t\t\t\top = this.armCompiler.constructMLAS(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00800000:\n\t\t\t\t\t// UMULL\n\t\t\t\t\top = this.armCompiler.constructUMULL(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00900000:\n\t\t\t\t\t// UMULLS\n\t\t\t\t\top = this.armCompiler.constructUMULLS(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00A00000:\n\t\t\t\t\t// UMLAL\n\t\t\t\t\top = this.armCompiler.constructUMLAL(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00B00000:\n\t\t\t\t\t// UMLALS\n\t\t\t\t\top = this.armCompiler.constructUMLALS(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00C00000:\n\t\t\t\t\t// SMULL\n\t\t\t\t\top = this.armCompiler.constructSMULL(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00D00000:\n\t\t\t\t\t// SMULLS\n\t\t\t\t\top = this.armCompiler.constructSMULLS(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00E00000:\n\t\t\t\t\t// SMLAL\n\t\t\t\t\top = this.armCompiler.constructSMLAL(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00F00000:\n\t\t\t\t\t// SMLALS\n\t\t\t\t\top = this.armCompiler.constructSMLALS(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\t}\n\t\t\t\top.writesPC = rd == ARMRegs.PC;\n\t\t\t} else {\n\t\t\t\t// Halfword and signed byte data transfer\n\t\t\t\tvar load = instruction & 0x00100000;\n\t\t\t\tvar rd = (instruction & 0x0000F000) >> 12;\n\t\t\t\tvar hiOffset = (instruction & 0x00000F00) >> 4;\n\t\t\t\tvar loOffset = rm = instruction & 0x0000000F;\n\t\t\t\tvar h = instruction & 0x00000020;\n\t\t\t\tvar s = instruction & 0x00000040;\n\t\t\t\tvar w = instruction & 0x00200000;\n\t\t\t\tvar i = instruction & 0x00400000;\n\n\t\t\t\tvar address : AddressFunction;\n\t\t\t\tif (i) {\n\t\t\t\t\tvar immediate = loOffset | hiOffset;\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode23Immediate(instruction, immediate, condOp);\n\t\t\t\t} else {\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode23Register(instruction, rm, condOp);\n\t\t\t\t}\n\t\t\t\taddress.writesPC = !!w && rn == ARMRegs.PC;\n\n\t\t\t\tif ((instruction & 0x00000090) == 0x00000090) {\n\t\t\t\t\tif (load) {\n\t\t\t\t\t\t// Load [signed] halfword/byte\n\t\t\t\t\t\tif (h) {\n\t\t\t\t\t\t\tif (s) {\n\t\t\t\t\t\t\t\t// LDRSH\n\t\t\t\t\t\t\t\top = this.armCompiler.constructLDRSH(rd, address, condOp);\n\t\t\t\t\t\t\t} else {\n\t\t\t\t\t\t\t\t// LDRH\n\t\t\t\t\t\t\t\top = this.armCompiler.constructLDRH(rd, address, condOp);\n\t\t\t\t\t\t\t}\n\t\t\t\t\t\t} else {\n\t\t\t\t\t\t\tif (s) {\n\t\t\t\t\t\t\t\t// LDRSB\n\t\t\t\t\t\t\t\top = this.armCompiler.constructLDRSB(rd, address, condOp);\n\t\t\t\t\t\t\t}\n\t\t\t\t\t\t}\n\t\t\t\t\t} else if (!s && h) {\n\t\t\t\t\t\t// STRH\n\t\t\t\t\t\top = this.armCompiler.constructSTRH(rd, address, condOp);\n\t\t\t\t\t}\n\t\t\t\t}\n\t\t\t\top.writesPC = rd == ARMRegs.PC || address.writesPC;\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 0x04000000:\n\t\tcase 0x06000000:\n\t\t\t// LDR/STR\n\t\t\tvar rd = (instruction & 0x0000F000) >> 12;\n\t\t\tvar load = instruction & 0x00100000;\n\t\t\tvar b = instruction & 0x00400000;\n\t\t\tvar i = instruction & 0x02000000;\n\t\t\t// test for UDF instruction\n\t\t\tif ((instruction & 0xfff000f0) == (0xe7f000f0|0)) {\n\t\t\t\tvar immediate = instruction & 0x0000000f; // TODO: full range\n\t\t\t\tthrow new EmuHalt(\"Program exited (\" + immediate + \")\");\n\t\t\t}\n\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tthrow new EmuHalt(\"Unimplemented memory access: 0x\" + instruction.toString(16));\n\t\t\t};\n\t\t\tif (~instruction & 0x01000000) {\n\t\t\t\t// Clear the W bit if the P bit is clear--we don't support memory translation, so these turn into regular accesses\n\t\t\t\tinstruction &= 0xFFDFFFFF;\n\t\t\t}\n\t\t\tif (i) {\n\t\t\t\t// Register offset\n\t\t\t\tvar rm = instruction & 0x0000000F;\n\t\t\t\tvar shiftType = instruction & 0x00000060;\n\t\t\t\tvar shiftImmediate = (instruction & 0x00000F80) >> 7;\n\t\t\t\t\n\t\t\t\tif (shiftType || shiftImmediate) {\n\t\t\t\t\tshiftOp = this.barrelShiftImmediate(shiftType, shiftImmediate, rm);\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode2RegisterShifted(instruction, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode23Register(instruction, rm, condOp);\n\t\t\t\t}\n\t\t\t} else {\n\t\t\t\t// Immediate\n\t\t\t\tvar offset = instruction & 0x00000FFF;\n\t\t\t\taddress = this.armCompiler.constructAddressingMode23Immediate(instruction, offset, condOp);\n\t\t\t}\n\t\t\tif (load) {\n\t\t\t\tif (b) {\n\t\t\t\t\t// LDRB\n\t\t\t\t\top = this.armCompiler.constructLDRB(rd, address, condOp);\n\t\t\t\t} else {\n\t\t\t\t\t// LDR\n\t\t\t\t\top = this.armCompiler.constructLDR(rd, address, condOp);\n\t\t\t\t}\n\t\t\t} else {\n\t\t\t\tif (b) {\n\t\t\t\t\t// STRB\n\t\t\t\t\top = this.armCompiler.constructSTRB(rd, address, condOp);\n\t\t\t\t} else {\n\t\t\t\t\t// STR\n\t\t\t\t\top = this.armCompiler.constructSTR(rd, address, condOp);\n\t\t\t\t}\n\t\t\t}\n\t\t\top.writesPC = load && (rd == ARMRegs.PC || address.writesPC); // SEH\n\t\t\tbreak;\n\t\tcase 0x08000000:\n\t\t\t// Block data transfer\n\t\t\tvar load = instruction & 0x00100000;\n\t\t\tvar w = instruction & 0x00200000;\n\t\t\tvar user = instruction & 0x00400000;\n\t\t\tvar u = instruction & 0x00800000;\n\t\t\tvar p = instruction & 0x01000000;\n\t\t\tvar rs = instruction & 0x0000FFFF;\n\t\t\tvar rn = (instruction & 0x000F0000) >> 16;\n\n\t\t\tvar address : AddressFunction;\n\t\t\tvar immediate = 0;\n\t\t\tvar offset = 0;\n\t\t\tvar overlap = false;\n\t\t\tif (u) {\n\t\t\t\tif (p) {\n\t\t\t\t\timmediate = 4;\n\t\t\t\t}\n\t\t\t\tfor (var m = 0x01, i = 0; i < 16; m <<= 1, ++i) {\n\t\t\t\t\tif (rs & m) {\n\t\t\t\t\t\tif (w && i == rn && !offset) {\n\t\t\t\t\t\t\trs &= ~m;\n\t\t\t\t\t\t\timmediate += 4;\n\t\t\t\t\t\t\toverlap = true;\n\t\t\t\t\t\t}\n\t\t\t\t\t\toffset += 4;\n\t\t\t\t\t}\n\t\t\t\t}\n\t\t\t} else {\n\t\t\t\tif (!p) {\n\t\t\t\t\timmediate = 4;\n\t\t\t\t}\n\t\t\t\tfor (var m = 0x01, i = 0; i < 16; m <<= 1, ++i) {\n\t\t\t\t\tif (rs & m) {\n\t\t\t\t\t\tif (w && i == rn && !offset) {\n\t\t\t\t\t\t\trs &= ~m;\n\t\t\t\t\t\t\timmediate += 4;\n\t\t\t\t\t\t\toverlap = true;\n\t\t\t\t\t\t}\n\t\t\t\t\t\timmediate -= 4;\n\t\t\t\t\t\toffset -= 4;\n\t\t\t\t\t}\n\t\t\t\t}\n\t\t\t}\n\t\t\tif (w) {\n\t\t\t\taddress = this.armCompiler.constructAddressingMode4Writeback(immediate, offset, rn, overlap);\n\t\t\t} else {\n\t\t\t\taddress = this.armCompiler.constructAddressingMode4(immediate, rn);\n\t\t\t}\n\t\t\tif (load) {\n\t\t\t\t// LDM\n\t\t\t\tif (user) {\n\t\t\t\t\top = this.armCompiler.constructLDMS(rs, address, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructLDM(rs, address, condOp);\n\t\t\t\t}\n\t\t\t\top.writesPC = !!(rs & (1 << 15));\n\t\t\t} else {\n\t\t\t\t// STM\n\t\t\t\tif (user) {\n\t\t\t\t\top = this.armCompiler.constructSTMS(rs, address, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructSTM(rs, address, condOp);\n\t\t\t\t}\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 0x0A000000:\n\t\t\t// Branch\n\t\t\tvar immediate = instruction & 0x00FFFFFF;\n\t\t\tif (immediate & 0x00800000) {\n\t\t\t\timmediate |= 0xFF000000;\n\t\t\t}\n\t\t\timmediate <<= 2;\n\t\t\tvar link = instruction & 0x01000000;\n\t\t\tif (link) {\n\t\t\t\top = this.armCompiler.constructBL(immediate, condOp);\n\t\t\t} else {\n\t\t\t\top = this.armCompiler.constructB(immediate, condOp);\n\t\t\t}\n\t\t\top.writesPC = true;\n\t\t\top.fixedJump = true;\n\t\t\tbreak;\n\t\tcase 0x0C000000:\n\t\t\t// Coprocessor data transfer\n\t\t\tvar load = instruction & 0x00100000;\n\t\t\tvar w = instruction & 0x00200000;\n\t\t\tvar user = instruction & 0x00400000;\n\t\t\tvar u = instruction & 0x00800000;\n\t\t\tvar p = instruction & 0x01000000;\n\t\t\tvar rn = (instruction & 0x000F0000) >> 16;\n\t\t\tvar crd = (instruction & 0x0000F000) >> 12;\n\t\t\tvar cpnum = (instruction & 0x00000F00) >> 8;\n\t\t\tvar immediate = instruction & 0x000000FF;\n\t\t\tvar cond = (instruction >> 28) & 0xf;\n\t\t\tvar condOp = this.conds[cond];\n\n\t\t\t// VPUSH, VPOP\n\t\t\tif ((instruction & 0x0fbf0f00) == 0x0d2d0a00) {\n\t\t\t\top = this.armCompiler.constructVPUSH(condOp, (crd<<1)|(user?1:0), immediate, true);\n\t\t\t}\n\t\t\telse if ((instruction & 0x0fbf0f00) == 0x0d2d0b00) {\n\t\t\t\top = this.armCompiler.constructVPUSH(condOp, ((user?16:0)|crd)*2, immediate, false);\n\t\t\t}\n\t\t\telse if ((instruction & 0x0fbf0f00) == 0x0cbd0a00) {\n\t\t\t\top = this.armCompiler.constructVPOP(condOp, (crd<<1)|(user?1:0), immediate, true);\n\t\t\t}\n\t\t\telse if ((instruction & 0x0fbf0f00) == 0x0cbd0b00) {\n\t\t\t\top = this.armCompiler.constructVPOP(condOp, ((user?16:0)|crd)*2, immediate, false);\n\t\t\t}\n\t\t\t// VLDR, VSTR\n\t\t\t// https://developer.arm.com/documentation/ddi0406/c/Application-Level-Architecture/Instruction-Details/Alphabetical-list-of-instructions/VSTR?lang=en\n\t\t\telse if ((instruction & 0x0f200f00) == 0x0d000a00) {\n\t\t\t\timmediate *= 4;\n\t\t\t\tif (!u) immediate = -immediate;\n\t\t\t\tvar overlap = false;\n\t\t\t\tvar d = (crd<<1)|(user?1:0);\n\t\n\t\t\t\tvar address : AddressFunction;\n\t\t\t\tif (w) {\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode4Writeback(immediate, offset, rn, overlap);\n\t\t\t\t} else {\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode4(immediate, rn);\n\t\t\t\t}\n\t\t\t\tif (load) {\n\t\t\t\t\top = this.armCompiler.constructVLDR(condOp, d, address, true);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructVSTR(condOp, d, address, true);\n\t\t\t\t}\n\t\t\t} else if ((instruction & 0x0f200f00) == 0x0d000b00) {\n\t\t\t\timmediate *= 4;\n\t\t\t\tif (!u) immediate = -immediate;\n\t\t\t\tvar overlap = false;\n\t\t\t\tvar d = ((user?16:0)|crd)*2;\n\t\n\t\t\t\tvar address : AddressFunction;\n\t\t\t\tif (w) {\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode4Writeback(immediate, offset, rn, overlap);\n\t\t\t\t} else {\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode4(immediate, rn);\n\t\t\t\t}\n\t\t\t\tif (load) {\n\t\t\t\t\top = this.armCompiler.constructVLDR(condOp, d, address, false);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructVSTR(condOp, d, address, false);\n\t\t\t\t}\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 0x0E000000:\n\t\t\t// Coprocessor data operation/SWI\n\t\t\tif ((instruction & 0x0F000000) == 0x0F000000) {\n\t\t\t\t// SWI\n\t\t\t\tvar immediate = (instruction & 0x00FFFFFF);\n\t\t\t\top = this.armCompiler.constructSWI(immediate, condOp);\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\t// VCVT, VCVTR, VCVT\n\t\t\t// https://developer.arm.com/documentation/ddi0406/c/Application-Level-Architecture/Instruction-Details/Alphabetical-list-of-instructions/VCVT--VCVTR--between-floating-point-and-integer--Floating-point-\n\t\t\t/*\n\t\t\tif opc2 != '000' && !(opc2 IN \"10x\") then SEE \"Related encodings\";\n\t\t\tto_integer = (opc2<2> == '1'); dp_operation = (sz == 1);\n\t\t\tif to_integer then\n\t\t\t\tunsigned = (opc2<0> == '0'); round_zero = (op == '1');\n\t\t\t\td = UInt(Vd:D); m = if dp_operation then UInt(M:Vm) else UInt(Vm:M);\n\t\t\telse\n\t\t\t\tunsigned = (op == '0'); round_nearest = FALSE; // FALSE selects FPSCR rounding\n\t\t\t\tm = UInt(Vm:M); d = if dp_operation then UInt(D:Vd) else UInt(Vd:D);\n\t\t\t*/\n\t\t\telse if ((instruction & 0x0FB80E50) == 0x0EB80A40) {\n\t\t\t\tconst cond = (instruction >> 28) & 0xf;\n\t\t\t\tconst D = (instruction >> 22) & 0x1;\n\t\t\t\tconst opc2 = (instruction >> 16) & 0x7;\n\t\t\t\tconst Vd = (instruction >> 12) & 0xf;\n\t\t\t\tconst sz = (instruction >> 8) & 0x1;\n\t\t\t\tconst op0 = (instruction >> 7) & 0x1;\n\t\t\t\tconst M = (instruction >> 5) & 0x1;\n\t\t\t\tconst Vm = instruction & 0xf;\n\t\t\t\tconst to_integer = opc2 & 0x4;\n\t\t\t\tconst dp_operation = sz != 0;\n\t\t\t\tconst unsigned = to_integer ? opc2 & 0x1 : 0;\n\t\t\t\tconst round_zero = op0 != 0;\n\t\t\t\tconst round_nearest = false;\n\t\t\t\tconst d = sz ? (D?16:0)|Vd : (Vd<<1)|(D?1:0);\n\t\t\t\tconst m = sz ? (M?16:0)|Vm : (Vm<<1)|(M?1:0);\n\t\t\t\t//console.log(\"VCVT\", d, m, opc2, to_integer, dp_operation, unsigned, round_zero, round_nearest);\n\t\t\t\top = this.armCompiler.constructVCVT(condOp, d, m, to_integer, dp_operation, unsigned, round_zero, round_nearest);\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\t// VCVT f64/f32\n\t\t\telse if ((instruction & 0x0FBF0ED0) == 0x0EB70AC0) {\n\t\t\t\tconst cond = (instruction >> 28) & 0xf;\n\t\t\t\tconst D = (instruction >> 22) & 0x1;\n\t\t\t\tconst Vd = (instruction >> 12) & 0xf;\n\t\t\t\tconst sz = (instruction >> 8) & 0x1;\n\t\t\t\tconst M = (instruction >> 5) & 0x1;\n\t\t\t\tconst Vm = instruction & 0xf;\n\t\t\t\tconst double_to_single = sz != 0;\n\t\t\t\tconst d = sz ? (D?16:0)|Vd : (Vd<<1)|(D?1:0);\n\t\t\t\tconst m = sz ? (M?16:0)|Vm : (Vm<<1)|(M?1:0);\n\t\t\t\top = this.armCompiler.constructVCVTF(condOp, d, m, double_to_single);\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\t// 3-op floating point vector instructions (VADD, etc)\n\t\t\telse if ((instruction & 0x0FA00E10) == 0x0E200A00) {\n\t\t\t\tconst cond = (instruction >> 28) & 0xf;\n\t\t\t\tconst D = (instruction >> 22) & 0x1;\n\t\t\t\tconst N = (instruction >> 7) & 0x1;\n\t\t\t\tconst M = (instruction >> 5) & 0x1;\n\t\t\t\tconst opcode = (instruction & 0x0F00000) >> 20;\n\t\t\t\tconst Vn = (instruction & 0x000F0000) >> 16;\n\t\t\t\tconst Vd = (instruction & 0x0000F000) >> 12;\n\t\t\t\tconst opcode2 = (instruction & 0b11100000) >> 5;\n\t\t\t\tconst Vm = instruction & 0x0000000F;\n\t\t\t\tconst sz = (instruction >> 8) & 0x1;\n\t\t\t\tconst d = sz ? (D?16:0)|Vd : (Vd<<1)|(D?1:0);\n\t\t\t\tconst m = sz ? (M?16:0)|Vm : (Vm<<1)|(M?1:0);\n\t\t\t\tconst n = sz ? (N?16:0)|Vn : (Vn<<1)|(N?1:0);\n\n\t\t\t\tvar condOp = this.conds[cond];\n\t\t\t\top = this.armCompiler.constructVFP3Register(condOp, opcode, n, d, sz, opcode2, m);\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\t// VDIV - https://developer.arm.com/documentation/ddi0597/2023-12/SIMD-FP-Instructions/VDIV--Divide-?lang=en\n\t\t\telse if ((instruction & 0x0FB00C50) == 0x0E800800) {\n\t\t\t\tconst cond = (instruction >> 28) & 0xf;\n\t\t\t\tconst D = (instruction >> 22) & 0x1;\n\t\t\t\tconst Vn = (instruction >> 16) & 0xf;\n\t\t\t\tconst Vd = (instruction >> 12) & 0xf;\n\t\t\t\tconst size = (instruction >> 8) & 0x3;\n\t\t\t\tconst N = (instruction >> 7) & 0x1;\n\t\t\t\tconst M = (instruction >> 5) & 0x1;\n\t\t\t\tconst Vm = instruction & 0xf;\n\t\t\t\t/*\n\t\t\t\tcase size of\n\t\t\t\twhen '01' esize = 16; d = UInt(Vd:D); n = UInt(Vn:N); m = UInt(Vm:M);\n\t\t\t\twhen '10' esize = 32; d = UInt(Vd:D); n = UInt(Vn:N); m = UInt(Vm:M);\n\t\t\t\twhen '11' esize = 64; d = UInt(D:Vd); n = UInt(N:Vn); m = UInt(M:Vm);\n\t\t\t\t*/\n\t\t\t\tconst d = size==3 ? (D?16:0)|Vd : (Vd<<1)|(D?1:0);\n\t\t\t\tconst m = size==3 ? (M?16:0)|Vm : (Vm<<1)|(M?1:0);\n\t\t\t\tconst n = size==3 ? (N?16:0)|Vn : (Vn<<1)|(N?1:0);\n\t\t\t\top = this.armCompiler.constructVFP3Register(condOp, 8, n, d, size==3, 0, m);\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\t// 2-op floating point vector instructions (VCMP, etc)\n\t\t\telse if ((instruction & 0x0FBF0E50) == 0x0EB40A40) {\n\t\t\t\tconst cond = (instruction >> 28) & 0xf;\n\t\t\t\tconst D = (instruction >> 22) & 0x1;\n\t\t\t\tconst Vd = (instruction >> 12) & 0xf;\n\t\t\t\tconst sz = (instruction >> 8) & 0x1;\n\t\t\t\tconst E = (instruction >> 7) & 0x1;\n\t\t\t\tconst M = (instruction >> 5) & 0x1;\n\t\t\t\tconst Vm = instruction & 0x0000000F;\n\t\t\t\tconst d = sz ? (D?16:0)|Vd : (Vd<<1)|(D?1:0);\n\t\t\t\tconst m = sz ? (M?16:0)|Vm : (Vm<<1)|(M?1:0);\n\t\t\t\t\n\t\t\t\tvar condOp = this.conds[cond];\n\t\t\t\top = this.armCompiler.constructVCMP(condOp, d, Vd, sz, E, m, Vm);\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\t// VCMP #0\n\t\t\telse if ((instruction & 0x0FBF0EFF) == 0x0EB50A40) {\n\t\t\t\tconst cond = (instruction >> 28) & 0xf;\n\t\t\t\tconst D = (instruction >> 22) & 0x1;\n\t\t\t\tconst Vd = (instruction >> 12) & 0xf;\n\t\t\t\tconst sz = (instruction >> 8) & 0x1;\n\t\t\t\tconst E = (instruction >> 7) & 0x1;\n\t\t\t\tconst M = (instruction >> 5) & 0x1;\n\t\t\t\tconst Vm = instruction & 0x0000000F;\n\t\t\t\tconst d = sz ? (D?16:0)|Vd : (Vd<<1)|(D?1:0);\n\t\t\t\tconst m = sz ? (M?16:0)|Vm : (Vm<<1)|(M?1:0);\n\t\t\t\t\n\t\t\t\tvar condOp = this.conds[cond];\n\t\t\t\top = this.armCompiler.constructVCMP0(condOp, d, Vd, sz, E, m, Vm);\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\t// vmrs apsr_nzcv, fpscr (ignore, we always call this after CMP)\n\t\t\telse if (instruction == 0xeef1fa10) {\n\t\t\t\top = this.armCompiler.constructNOP();\n\t\t\t}\n\t\t\t// VMOV - https://developer.arm.com/documentation/ddi0406/c/Application-Level-Architecture/Instruction-Details/Alphabetical-list-of-instructions/VMOV--between-ARM-core-register-and-single-precision-register-\n\t\t\telse if ((instruction & 0x0FE00F10) == 0x0E000A10) {\n\t\t\t\tconst cond = (instruction >> 28) & 0xf;\n\t\t\t\tconst opc1 = (instruction >> 20) & 0x1;\n\t\t\t\tconst Vn = (instruction >> 16) & 0xf;\n\t\t\t\tconst Rt = (instruction >> 12) & 0xf;\n\t\t\t\tconst N = (instruction >> 7) & 0x1;\n\t\t\t\tvar condOp = this.conds[cond];\n\t\t\t\t//console.log(\"VMOV\", instruction.toString(16), opc1, Vn, Rt, N);\n\t\t\t\top = this.armCompiler.constructVMOV(condOp, opc1, (Vn<<1)|(N?1:0), Rt);\n\t\t\t}\n\t\t\t// vmov.32 dn[i], rn\n\t\t\telse if (instruction == 0xee000b10) {\n\t\t\t\top = this.armCompiler.constructVMOV(condOp, false, 0, 0);\n\t\t\t}\n\t\t\telse if (instruction == 0xee201b10) {\n\t\t\t\top = this.armCompiler.constructVMOV(condOp, false, 1, 1);\n\t\t\t}\n\t\t\tbreak;\n\t\tdefault:\n\t\t\tthrow new EmuHalt('Bad opcode: 0x' + instruction.toString(16));\n\t\t}\n\t}\n\n\top.execMode = ARMMode.MODE_ARM;\n\top.fixedJump = op.fixedJump || false;\n\treturn op;\n};\n\nARMCore.prototype.compileThumb = function(instruction) {\n\tvar op = this.badOp(instruction & 0xFFFF);\n\tvar cpu = this;\n\tvar gprs = this.gprs;\n\tif ((instruction & 0xFC00) == 0x4000) {\n\t\t// Data-processing register\n\t\tvar rm = (instruction & 0x0038) >> 3;\n\t\tvar rd = instruction & 0x0007;\n\t\tswitch (instruction & 0x03C0) {\n\t\tcase 0x0000:\n\t\t\t// AND\n\t\t\top = this.thumbCompiler.constructAND(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0040:\n\t\t\t// EOR\n\t\t\top = this.thumbCompiler.constructEOR(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0080:\n\t\t\t// LSL(2)\n\t\t\top = this.thumbCompiler.constructLSL2(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x00C0:\n\t\t\t// LSR(2)\n\t\t\top = this.thumbCompiler.constructLSR2(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0100:\n\t\t\t// ASR(2)\n\t\t\top = this.thumbCompiler.constructASR2(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0140:\n\t\t\t// ADC\n\t\t\top = this.thumbCompiler.constructADC(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0180:\n\t\t\t// SBC\n\t\t\top = this.thumbCompiler.constructSBC(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x01C0:\n\t\t\t// ROR\n\t\t\top = this.thumbCompiler.constructROR(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0200:\n\t\t\t// TST\n\t\t\top = this.thumbCompiler.constructTST(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0240:\n\t\t\t// NEG\n\t\t\top = this.thumbCompiler.constructNEG(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0280:\n\t\t\t// CMP(2)\n\t\t\top = this.thumbCompiler.constructCMP2(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x02C0:\n\t\t\t// CMN\n\t\t\top = this.thumbCompiler.constructCMN(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0300:\n\t\t\t// ORR\n\t\t\top = this.thumbCompiler.constructORR(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0340:\n\t\t\t// MUL\n\t\t\top = this.thumbCompiler.constructMUL(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0380:\n\t\t\t// BIC\n\t\t\top = this.thumbCompiler.constructBIC(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x03C0:\n\t\t\t// MVN\n\t\t\top = this.thumbCompiler.constructMVN(rd, rm);\n\t\t\tbreak;\n\t\t}\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xFC00) == 0x4400) {\n\t\t// Special data processing / branch/exchange instruction set\n\t\tvar rm = (instruction & 0x0078) >> 3;\n\t\tvar rn = instruction & 0x0007;\n\t\tvar h1 = instruction & 0x0080;\n\t\tvar rd = rn | (h1 >> 4);\n\t\tswitch (instruction & 0x0300) {\n\t\tcase 0x0000:\n\t\t\t// ADD(4)\n\t\t\top = this.thumbCompiler.constructADD4(rd, rm)\n\t\t\top.writesPC = rd == ARMRegs.PC;\n\t\t\tbreak;\n\t\tcase 0x0100:\n\t\t\t// CMP(3)\n\t\t\top = this.thumbCompiler.constructCMP3(rd, rm);\n\t\t\top.writesPC = false;\n\t\t\tbreak;\n\t\tcase 0x0200:\n\t\t\t// MOV(3)\n\t\t\top = this.thumbCompiler.constructMOV3(rd, rm);\n\t\t\top.writesPC = rd == ARMRegs.PC;\n\t\t\tbreak;\n\t\tcase 0x0300:\n\t\t\t// BX\n\t\t\top = this.thumbCompiler.constructBX(rd, rm);\n\t\t\top.writesPC = true;\n\t\t\top.fixedJump = false;\n\t\t\tbreak;\n\t\t}\n\t} else if ((instruction & 0xF800) == 0x1800) {\n\t\t// Add/subtract\n\t\tvar rm = (instruction & 0x01C0) >> 6;\n\t\tvar rn = (instruction & 0x0038) >> 3;\n\t\tvar rd = instruction & 0x0007;\n\t\tswitch (instruction & 0x0600) {\n\t\tcase 0x0000:\n\t\t\t// ADD(3)\n\t\t\top = this.thumbCompiler.constructADD3(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0200:\n\t\t\t// SUB(3)\n\t\t\top = this.thumbCompiler.constructSUB3(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0400:\n\t\t\tvar immediate = (instruction & 0x01C0) >> 6;\n\t\t\tif (immediate) {\n\t\t\t\t// ADD(1)\n\t\t\t\top = this.thumbCompiler.constructADD1(rd, rn, immediate);\n\t\t\t} else {\n\t\t\t\t// MOV(2)\n\t\t\t\top = this.thumbCompiler.constructMOV2(rd, rn, rm);\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 0x0600:\n\t\t\t// SUB(1)\n\t\t\tvar immediate = (instruction & 0x01C0) >> 6;\n\t\t\top = this.thumbCompiler.constructSUB1(rd, rn, immediate);\n\t\t\tbreak;\n\t\t}\n\t\top.writesPC = false;\n\t} else if (!(instruction & 0xE000)) {\n\t\t// Shift by immediate\n\t\tvar rd = instruction & 0x0007;\n\t\tvar rm = (instruction & 0x0038) >> 3;\n\t\tvar immediate = (instruction & 0x07C0) >> 6;\n\t\tswitch (instruction & 0x1800) {\n\t\tcase 0x0000:\n\t\t\t// LSL(1)\n\t\t\top = this.thumbCompiler.constructLSL1(rd, rm, immediate);\n\t\t\tbreak;\n\t\tcase 0x0800:\n\t\t\t// LSR(1)\n\t\t\top = this.thumbCompiler.constructLSR1(rd, rm, immediate);\n\t\t\tbreak;\n\t\tcase 0x1000:\n\t\t\t// ASR(1)\n\t\t\top = this.thumbCompiler.constructASR1(rd, rm, immediate);\n\t\t\tbreak;\n\t\tcase 0x1800:\n\t\t\tbreak;\n\t\t}\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xE000) == 0x2000) {\n\t\t// Add/subtract/compare/move immediate\n\t\tvar immediate = instruction & 0x00FF;\n\t\tvar rn = (instruction & 0x0700) >> 8;\n\t\tswitch (instruction & 0x1800) {\n\t\tcase 0x0000:\n\t\t\t// MOV(1)\n\t\t\top = this.thumbCompiler.constructMOV1(rn, immediate);\n\t\t\tbreak;\n\t\tcase 0x0800:\n\t\t\t// CMP(1)\n\t\t\top = this.thumbCompiler.constructCMP1(rn, immediate);\n\t\t\tbreak;\n\t\tcase 0x1000:\n\t\t\t// ADD(2)\n\t\t\top = this.thumbCompiler.constructADD2(rn, immediate);\n\t\t\tbreak;\n\t\tcase 0x1800:\n\t\t\t// SUB(2)\n\t\t\top = this.thumbCompiler.constructSUB2(rn, immediate);\n\t\t\tbreak;\n\t\t}\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xF800) == 0x4800) {\n\t\t// LDR(3)\n\t\tvar rd = (instruction & 0x0700) >> 8;\n\t\tvar immediate = (instruction & 0x00FF) << 2;\n\t\top = this.thumbCompiler.constructLDR3(rd, immediate);\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xF000) == 0x5000) {\n\t\t// Load and store with relative offset\n\t\tvar rd = instruction & 0x0007;\n\t\tvar rn = (instruction & 0x0038) >> 3;\n\t\tvar rm = (instruction & 0x01C0) >> 6;\n\t\tvar opcode = instruction & 0x0E00;\n\t\tswitch (opcode) {\n\t\tcase 0x0000:\n\t\t\t// STR(2)\n\t\t\top = this.thumbCompiler.constructSTR2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0200:\n\t\t\t// STRH(2)\n\t\t\top = this.thumbCompiler.constructSTRH2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0400:\n\t\t\t// STRB(2)\n\t\t\top = this.thumbCompiler.constructSTRB2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0600:\n\t\t\t// LDRSB\n\t\t\top = this.thumbCompiler.constructLDRSB(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0800:\n\t\t\t// LDR(2)\n\t\t\top = this.thumbCompiler.constructLDR2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0A00:\n\t\t\t// LDRH(2)\n\t\t\top = this.thumbCompiler.constructLDRH2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0C00:\n\t\t\t// LDRB(2)\n\t\t\top = this.thumbCompiler.constructLDRB2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0E00:\n\t\t\t// LDRSH\n\t\t\top = this.thumbCompiler.constructLDRSH(rd, rn, rm);\n\t\t\tbreak;\n\t\t}\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xE000) == 0x6000) {\n\t\t// Load and store with immediate offset\n\t\tvar rd = instruction & 0x0007;\n\t\tvar rn = (instruction & 0x0038) >> 3;\n\t\tvar immediate = (instruction & 0x07C0) >> 4;\n\t\tvar b = instruction & 0x1000;\n\t\tif (b) {\n\t\t\timmediate >>= 2;\n\t\t}\n\t\tvar load = instruction & 0x0800;\n\t\tif (load) {\n\t\t\tif (b) {\n\t\t\t\t// LDRB(1)\n\t\t\t\top = this.thumbCompiler.constructLDRB1(rd, rn, immediate);\n\t\t\t} else {\n\t\t\t\t// LDR(1)\n\t\t\t\top = this.thumbCompiler.constructLDR1(rd, rn, immediate);\n\t\t\t}\n\t\t} else {\n\t\t\tif (b) {\n\t\t\t\t// STRB(1)\n\t\t\t\top = this.thumbCompiler.constructSTRB1(rd, rn, immediate);\n\t\t\t} else {\n\t\t\t\t// STR(1)\n\t\t\t\top = this.thumbCompiler.constructSTR1(rd, rn, immediate);\n\t\t\t}\n\t\t}\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xF600) == 0xB400) {\n\t\t// Push and pop registers\n\t\tvar r = !!(instruction & 0x0100);\n\t\tvar rs = instruction & 0x00FF;\n\t\tif (instruction & 0x0800) {\n\t\t\t// POP\n\t\t\top = this.thumbCompiler.constructPOP(rs, r);\n\t\t\top.writesPC = r;\n\t\t\top.fixedJump = false;\n\t\t} else {\n\t\t\t// PUSH\n\t\t\top = this.thumbCompiler.constructPUSH(rs, r);\n\t\t\top.writesPC = false;\n\t\t}\n\t} else if (instruction & 0x8000) {\n\t\tswitch (instruction & 0x7000) {\n\t\tcase 0x0000:\n\t\t\t// Load and store halfword\n\t\t\tvar rd = instruction & 0x0007;\n\t\t\tvar rn = (instruction & 0x0038) >> 3;\n\t\t\tvar immediate = (instruction & 0x07C0) >> 5;\n\t\t\tif (instruction & 0x0800) {\n\t\t\t\t// LDRH(1)\n\t\t\t\top = this.thumbCompiler.constructLDRH1(rd, rn, immediate);\n\t\t\t} else {\n\t\t\t\t// STRH(1)\n\t\t\t\top = this.thumbCompiler.constructSTRH1(rd, rn, immediate);\n\t\t\t}\n\t\t\top.writesPC = false;\n\t\t\tbreak;\n\t\tcase 0x1000:\n\t\t\t// SP-relative load and store\n\t\t\tvar rd = (instruction & 0x0700) >> 8;\n\t\t\tvar immediate = (instruction & 0x00FF) << 2;\n\t\t\tvar load = instruction & 0x0800;\n\t\t\tif (load) {\n\t\t\t\t// LDR(4)\n\t\t\t\top = this.thumbCompiler.constructLDR4(rd, immediate);\n\t\t\t} else {\n\t\t\t\t// STR(3)\n\t\t\t\top = this.thumbCompiler.constructSTR3(rd, immediate);\n\t\t\t}\n\t\t\top.writesPC = false;\n\t\t\tbreak;\n\t\tcase 0x2000:\n\t\t\t// Load address\n\t\t\tvar rd = (instruction & 0x0700) >> 8;\n\t\t\tvar immediate = (instruction & 0x00FF) << 2;\n\t\t\tif (instruction & 0x0800) {\n\t\t\t\t// ADD(6)\n\t\t\t\top = this.thumbCompiler.constructADD6(rd, immediate);\n\t\t\t} else {\n\t\t\t\t// ADD(5)\n\t\t\t\top = this.thumbCompiler.constructADD5(rd, immediate);\n\t\t\t}\n\t\t\top.writesPC = false;\n\t\t\tbreak;\n\t\tcase 0x3000:\n\t\t\t// Miscellaneous\n\t\t\tif (!(instruction & 0x0F00)) {\n\t\t\t\t// Adjust stack pointer\n\t\t\t\t// ADD(7)/SUB(4)\n\t\t\t\tvar b = instruction & 0x0080;\n\t\t\t\tvar immediate = (instruction & 0x7F) << 2;\n\t\t\t\tif (b) {\n\t\t\t\t\timmediate = -immediate;\n\t\t\t\t}\n\t\t\t\top = this.thumbCompiler.constructADD7(immediate)\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 0x4000:\n\t\t\t// Multiple load and store\n\t\t\tvar rn = (instruction & 0x0700) >> 8;\n\t\t\tvar rs = instruction & 0x00FF;\n\t\t\tif (instruction & 0x0800) {\n\t\t\t\t// LDMIA\n\t\t\t\top = this.thumbCompiler.constructLDMIA(rn, rs);\n\t\t\t} else {\n\t\t\t\t// STMIA\n\t\t\t\top = this.thumbCompiler.constructSTMIA(rn, rs);\n\t\t\t}\n\t\t\top.writesPC = false;\n\t\t\tbreak;\n\t\tcase 0x5000:\n\t\t\t// Conditional branch\n\t\t\tvar cond = (instruction & 0x0F00) >> 8;\n\t\t\tvar immediate = (instruction & 0x00FF);\n\t\t\tif (cond == 0xF) {\n\t\t\t\t// SWI\n\t\t\t\top = this.thumbCompiler.constructSWI(immediate);\n\t\t\t\top.writesPC = false;\n\t\t\t} else {\n\t\t\t\t// B(1)\n\t\t\t\tif (instruction & 0x0080) {\n\t\t\t\t\timmediate |= 0xFFFFFF00;\n\t\t\t\t}\n\t\t\t\timmediate <<= 1;\n\t\t\t\tvar condOp = this.conds[cond];\n\t\t\t\top = this.thumbCompiler.constructB1(immediate, condOp);\n\t\t\t\top.writesPC = true;\n\t\t\t\top.fixedJump = true;\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 0x6000:\n\t\tcase 0x7000:\n\t\t\t// BL(X)\n\t\t\tvar immediate = instruction & 0x07FF;\n\t\t\tvar h = instruction & 0x1800;\n\t\t\tswitch (h) {\n\t\t\tcase 0x0000:\n\t\t\t\t// B(2)\n\t\t\t\tif (immediate & 0x0400) {\n\t\t\t\t\timmediate |= 0xFFFFF800;\n\t\t\t\t}\n\t\t\t\timmediate <<= 1;\n\t\t\t\top = this.thumbCompiler.constructB2(immediate);\n\t\t\t\top.writesPC = true;\n\t\t\t\top.fixedJump = true;\n\t\t\t\tbreak;\n\t\t\tcase 0x0800:\n\t\t\t\t// BLX (ARMv5T)\n\t\t\t\t/*op = function() {\n\t\t\t\t\tvar pc = gprs[ARMRegs.PC];\n\t\t\t\t\tgprs[ARMRegs.PC] = (gprs[ARMRegs.LR] + (immediate << 1)) & 0xFFFFFFFC;\n\t\t\t\t\tgprs[ARMRegs.LR] = pc - 1;\n\t\t\t\t\tcpu.switchExecMode(cpu.MODE_ARM);\n\t\t\t\t}*/\n\t\t\t\tbreak;\n\t\t\tcase 0x1000:\n\t\t\t\t// BL(1)\n\t\t\t\tif (immediate & 0x0400) {\n\t\t\t\t\timmediate |= 0xFFFFFC00;\n\t\t\t\t}\n\t\t\t\timmediate <<= 12;\n\t\t\t\top = this.thumbCompiler.constructBL1(immediate);\n\t\t\t\top.writesPC = false;\n\t\t\t\tbreak;\n\t\t\tcase 0x1800:\n\t\t\t\t// BL(2)\n\t\t\t\top = this.thumbCompiler.constructBL2(immediate);\n\t\t\t\top.writesPC = true;\n\t\t\t\top.fixedJump = false;\n\t\t\t\tbreak;\n\t\t\t}\n\t\t\tbreak;\n\t\tdefault:\n\t\t\tthrow new EmuHalt(\"Undefined instruction: 0x\" + instruction.toString(16));\n\t\t}\n\t} else {\n\t\tthrow new EmuHalt('Bad opcode: 0x' + instruction.toString(16));\n\t}\n\n\top.execMode = ARMMode.MODE_THUMB;\n\top.fixedJump = op.fixedJump || false;\n\t//console.log(hex(instruction), op);\n\treturn op;\n};\n\n///////////////////////////////////////////////////////////////////////////\n\ntype ARMBus = Bus & Bus32;\n\nexport class ARM32CPU implements CPU, InstructionBased, ARMMMUInterface, ARMIRQInterface, SavesState {\n\n\tcore : ARMCoreType;\n\tbus : ARMBus;\n\tmemory : ARMMemoryRegion[];\n\tf64arr = new Float64Array(1);\n\tf32arr = new Float32Array(this.f64arr.buffer);\n\ti32arr = new Int32Array(this.f64arr.buffer);\n\n\tBASE_OFFSET = 24;\n\tOFFSET_MASK = 0x00FFFFFF;\n\n\tconstructor() {\n\t\tthis.core = new ARMCore();\n\t\tthis.core.irq = this;\n\t\tthis.core.mmu = this;\n\t\tthis.resetMemory();\n\t}\n\tresetMemory() {\n\t\tthis.memory = []; // TODO\n\t\tfor (var i=0; i<256; i++) {\n\t\t\t// TODO: constant\n\t\t\tconst bits = 10;\n\t\t\tthis.memory[i] = {\n\t\t\t\tPAGE_MASK: (2 << bits) - 1,\n\t\t\t\tICACHE_PAGE_BITS: bits,\n\t\t\t\ticache: new Array() // size >> (bits + 1))\n\t\t\t }; // TODO?\n\t\t}\n\t}\n\tadvanceInsn() : number {\n\t\tvar n = this.core.cycles;\n\t\tthis.core.step();\n\t\tn -= this.core.cycles;\n\t\treturn n > 0 ? n : 1;\n\t}\n\tgetPC(): number {\n\t\treturn this.core.gprs[15] - this.core.instructionWidth;\n\t}\n\tgetSP(): number {\n\t\treturn this.core.gprs[13];\n\t}\n\tisStable(): boolean {\n\t\treturn true; // TODO?\n\t}\n\tconnectMemoryBus(bus: ARMBus): void {\n\t\tthis.bus = bus;\n\t}\n\treset(): void {\n\t\tthis.resetMemory();\n\t\tconst resetVector = this.load32(0);\n\t\tthis.core.resetCPU(resetVector);\n\t}\n\tsaveState() : ARMCoreState {\n\t\treturn this.core.freeze();\n\t}\n\tloadState(state: ARMCoreState): void {\n\t\tthis.core.defrost(state);\n\t}\n\n\tload8(a: number): number {\n\t\treturn (this.bus.read(a) << 24) >> 24;\n\t}\n\tloadU8(a: number): number {\n\t\treturn this.bus.read(a) & 0xff;\n\t}\n\tload16(a: number): number {\n\t\treturn (this.loadU16(a) << 16) >> 16;\n\t}\n\tloadU16(a: number): number {\n\t\treturn this.bus.read(a) | (this.bus.read(a+1) << 8);\n\t}\n\tload32(a: number): number {\n\t\tvar v = this.bus.read32(a);\n\t\treturn v;\n\t}\n\t// TODO: memory.invalidatePage(maskedOffset);\n\tstore8(a: number, v: number): void {\n\t\tthis.bus.write(a, v & 0xff);\n\t}\n\tstore16(a: number, v: number): void {\n\t\tthis.bus.write(a, v & 0xff);\n\t\tthis.bus.write(a+1, (v >> 8) & 0xff);\n\t}\n\tstore32(a: number, v: number): void {\n\t\tthis.bus.write32(a, v);\n\t}\n\t// TODO\n\twait(a: number): void {\n\t\t++this.core.cycles;\n\t}\n\twait32(a: number): void {\n\t\t++this.core.cycles;\n\t}\n\twaitSeq32(a: number): void {\n\t\t++this.core.cycles;\n\t}\n\twaitMul(rs: number): void {\n if (((rs & 0xFFFFFF00) == 0xFFFFFF00) || !(rs & 0xFFFFFF00)) {\n\t\t\tthis.core.cycles += 1;\n\t\t} else if (((rs & 0xFFFF0000) == 0xFFFF0000) || !(rs & 0xFFFF0000)) {\n\t\t\t\tthis.core.cycles += 2;\n\t\t} else if (((rs & 0xFF000000) == 0xFF000000) || !(rs & 0xFF000000)) {\n\t\t\t\tthis.core.cycles += 3;\n\t\t} else {\n\t\t\t\tthis.core.cycles += 4;\n\t\t}\n\t}\n\twaitMulti32(a: number, total: number): void {\n\t\tthis.core.cycles += 2;\n\t}\n\twaitPrefetch(a: number): void {\n\t\t++this.core.cycles;\n\t}\n\twaitPrefetch32(a: number): void {\n\t\t++this.core.cycles;\n\t}\n\taddressToPage(region: number, address: number) : number {\n return address >> this.memory[region].ICACHE_PAGE_BITS;\n\t}\n\taccessPage(region: number, pageId: number): ARMMemoryPage {\n\t\tvar memory = this.memory[region];\n\t\tvar page = memory.icache[pageId];\n\t\tif (!page || page.invalid) {\n\t\t\t\tpage = {\n\t\t\t\t\t\tthumb: new Array(1 << (memory.ICACHE_PAGE_BITS)),\n\t\t\t\t\t\tarm: new Array(1 << memory.ICACHE_PAGE_BITS - 1),\n\t\t\t\t\t\tinvalid: false\n\t\t\t\t}\n\t\t\t\tmemory.icache[pageId] = page;\n\t\t}\n\t\treturn page;\n\t}\n\n\tswi(opcode: number): void {\n\t\tthis.core.raiseTrap();\n\t}\n\tswi32(opcode: number): void {\n this.swi(opcode >> 16);\n\t}\n\tclear() : void {\n\t}\n\tupdateTimers() : void {\n\t}\n\ttestIRQ() : void {\n\t}\n\n\tisThumb() : boolean {\n\t\treturn this.core.instructionWidth == 2;\n\t}\n\tgetDebugTree() {\n\t\treturn {\n\t\t\tstate: this.saveState(),\n\t\t\tmmu: this.core.mmu\n\t\t};\n\t}\n}\n", "/*\n * Copyright (c) 2024 Steven E. Hugg\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy\n * of this software and associated documentation files (the \"Software\"), to deal\n * in the Software without restriction, including without limitation the rights\n * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell\n * copies of the Software, and to permit persons to whom the Software is\n * furnished to do so, subject to the following conditions:\n * \n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\n * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE\n * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\n * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\n * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\n * SOFTWARE.\n */\n\nimport { ARM32CPU, ARMCoreState } from \"../common/cpu/ARM\";\nimport { BasicScanlineMachine, Bus32, HasSerialIO, SerialEvent, SerialIOInterface } from \"../common/devices\";\nimport { newAddressDecoder, Keys, makeKeycodeMap, newKeyboardHandler, EmuHalt } from \"../common/emu\";\nimport { Debuggable, EmuState } from \"../common/baseplatform\";\nimport { hex, lpad } from \"../common/util\";\n\nvar GBA_KEYCODE_MAP = makeKeycodeMap([\n [Keys.A, 0, 0x1],\n [Keys.B, 0, 0x2],\n [Keys.GP_A, 0, 0x1],\n [Keys.GP_B, 0, 0x2],\n [Keys.SELECT,0, 0x4],\n [Keys.START ,0, 0x8],\n [Keys.RIGHT, 0, 0x10],\n [Keys.LEFT, 0, 0x20],\n [Keys.UP, 0, 0x40],\n [Keys.DOWN, 0, 0x80],\n]);\n\nconst RAM_START = 0x0;\nconst RAM_SIZE = 0x100000;\nconst ROM_BASE = 0x0;\nconst IO_START = 0x4000000;\nconst IO_SIZE = 0x100;\nconst MAX_SERIAL_CHARS = 1000000;\n\nconst CPU_FREQ = 4000000; // 4 MHz\n\nconst ILLEGAL_OPCODE = 0xedededed;\n\nexport class ARM32Machine extends BasicScanlineMachine\n implements Debuggable, HasSerialIO, Bus32 {\n\n cpuFrequency = CPU_FREQ; // MHz\n canvasWidth = 160;\n numTotalScanlines = 256;\n numVisibleScanlines = 128;\n cpuCyclesPerLine = Math.floor(CPU_FREQ / (256*60));\n defaultROMSize = RAM_SIZE - ROM_BASE;\n sampleRate = 1;\n \n cpu: ARM32CPU = new ARM32CPU();\n ram = new Uint8Array(RAM_SIZE);\n ram16 = new Uint16Array(this.ram.buffer);\n ram32 = new Uint32Array(this.ram.buffer);\n pixels32 : Uint32Array;\n pixels8 : Uint8Array;\n rombase : number = ROM_BASE;\n brightness : number = 255;\n serial : SerialIOInterface;\n serialOut : SerialEvent[];\n serialIn : SerialEvent[];\n ioregs = new Uint8Array(IO_SIZE);\n ioregs32 = new Uint32Array(this.ioregs.buffer);\n\n constructor() {\n super();\n this.connectCPUMemoryBus(this);\n this.handler = newKeyboardHandler(this.inputs, GBA_KEYCODE_MAP);\n }\n\n connectVideo(pixels:Uint32Array) : void {\n super.connectVideo(pixels);\n this.pixels32 = pixels;\n this.pixels8 = new Uint8Array(pixels.buffer);\n }\n\n connectSerialIO(serial: SerialIOInterface) {\n this.serial = serial;\n }\n\n loadROM(rom: Uint8Array) {\n super.loadROM(rom);\n }\n\n reset() {\n this.ram.fill(0);\n if (this.rom) {\n this.ram.set(this.rom, this.rombase);\n }\n super.reset();\n this.serialOut = [];\n this.serialIn = [];\n }\n\n // TODO: 32-bit bus?\n\n read = newAddressDecoder([\n [RAM_START, RAM_START+RAM_SIZE-1, RAM_SIZE-1, (a) => {\n return this.ram[a];\n }],\n [IO_START, IO_START+IO_SIZE-1, IO_SIZE-1, (a, v) => {\n return this.readIO(a);\n }],\n ], {defaultval: ILLEGAL_OPCODE & 0xff});\n\n write = newAddressDecoder([\n [RAM_START, RAM_START+RAM_SIZE-1, RAM_SIZE-1, (a, v) => {\n this.ram[a] = v;\n }],\n [IO_START, IO_START+IO_SIZE-1, IO_SIZE-1, (a, v) => {\n this.writeIO(a, v);\n }],\n ]);\n\n read32 = (a) => {\n if (a >= RAM_START && a < RAM_SIZE && (a & 3) == 0) {\n return this.ram32[a >> 2];\n } else {\n return this.read(a) | (this.read(a+1)<<8) | (this.read(a+2)<<16) | (this.read(a+3)<<24);\n }\n };\n\n write32 = (a, v) => {\n if (a >= RAM_START && a < RAM_SIZE && (a & 3) == 0) {\n this.ram32[a >> 2] = v;\n } else {\n this.write(a, v & 0xff);\n this.write(a+1, (v>>8) & 0xff);\n this.write(a+2, (v>>16) & 0xff);\n this.write(a+3, (v>>24) & 0xff);\n }\n }\n\n readAddress(a : number) : number {\n if (a >= RAM_START && a < RAM_START+RAM_SIZE) return this.read(a);\n else return ILLEGAL_OPCODE;\n }\n\n readIO(a : number) : number {\n switch (a) {\n case 0x0:\n return this.inputs[0];\n case 0x20:\n return this.getRasterY() & 0xff;\n case 0x21:\n return this.getRasterY() >> 8;\n case 0x24:\n return this.getRasterX();\n case 0x25:\n return this.getRasterX() >> 8;\n case 0x40:\n return (this.serial.byteAvailable() ? 0x80 : 0) | (this.serial.clearToSend() ? 0x40 : 0);\n case 0x44:\n let evin = this.serialIn.shift();\n if (evin != null) {\n this.serialOut.push(evin);\n return evin.value;\n } else\n return 0;\n default:\n return 0;\n }\n }\n\n writeIO(a : number, v : number) : void {\n this.ioregs[a] = v;\n switch (a) {\n case 0x48:\n if (this.serialOut.length < MAX_SERIAL_CHARS) {\n this.serialOut.push({op:'write', value:v, nbits:8});\n }\n break;\n }\n }\n\n startScanline() {\n }\n\n drawScanline() {\n }\n \n postFrame() {\n var p32 = this.pixels32;\n const vidbase = this.ioregs32[0x80 >> 2];\n var vbase = (vidbase >> 1) & 0xfffff;\n var mask = this.brightness << 24;\n for (var i=0; i\n // 000rrrrr000ggggg000bbbbb00011111111\n p32[i] = mask | ((col&31)<<3) | (((col>>5)&31)<<11) | (((col>>10)&31)<<19);\n }\n }\n\n getDebugCategories() {\n return ['CPU', 'Stack', 'FPU'];\n }\n\n getDebugInfo?(category: string, state: EmuState) : string {\n switch (category) {\n case 'Stack':\n var s = '';\n var c = state.c as ARMCoreState;\n var sp = c.gprs[13];\n var fp = c.gprs[11];\n // dump stack using ram32\n for (var i=0; i<16; i++) {\n s += hex(sp,8) + ' ' + hex(this.ram32[(sp-RAM_START)>>2],8);\n if (sp == fp) s += ' FP';\n s += '\\n';\n sp += 4;\n if (sp >= RAM_START+RAM_SIZE) break;\n }\n return s;\n case 'CPU':\n var s = '';\n var c = state.c as ARMCoreState;\n const EXEC_MODE = {2:'Thumb',4:'ARM'};\n const REGNAMES = {15:'PC',14:'LR',13:'SP',12:'IP',11:'FP',9:'SB'};\n for (var i=0; i<8; i++) {\n let j = i+8;\n s += lpad('r'+i, 5) + ' ' + hex(c.gprs[i],8) + ' ';\n s += lpad('r'+j, 5) + ' ' + hex(c.gprs[j],8) + lpad(REGNAMES[j]||'',3) + '\\n';\n }\n s += 'Flags ';\n s += c.cpsrN ? \" N\" : \" -\";\n s += c.cpsrV ? \" V\" : \" -\";\n s += c.cpsrF ? \" F\" : \" -\";\n s += c.cpsrZ ? \" Z\" : \" -\";\n s += c.cpsrC ? \" C\" : \" -\";\n s += c.cpsrI ? \" I\" : \" -\";\n s += '\\n';\n s += 'MODE ' + EXEC_MODE[c.instructionWidth] + ' ' + MODE_NAMES[c.mode] + '\\n';\n s += 'SPSR ' + hex(c.spsr,8) + '\\n';\n s += 'cycl ' + c.cycles + '\\n';\n return s;\n case 'FPU':\n var s = '';\n var c = state.c as ARMCoreState;\n for (var i=0; i<16; i++) {\n //let j = i+16;\n s += lpad('s'+i, 5) + ' ' + hex(c.ifprs[i],8) + ' ' + c.sfprs[i].toPrecision(6);\n if (i & 1) {\n s += lpad('d'+(i>>1), 5) + ' ' + c.dfprs[i>>1].toPrecision(12);\n }\n s += '\\n';\n //s += lpad('s'+j, 5) + ' ' + lpad(c.sfprs[j]+'',8) + '\\n';\n }\n return s;\n }\n }\n\n saveState() {\n var state = super.saveState() as any;\n state.serial = {\n sin: this.serialIn.slice(0),\n sout : this.serialOut.slice(0)\n }\n return state;\n }\n loadState(state) {\n super.loadState(state);\n this.serialIn = state.serial.sin;\n this.serialOut = state.serial.sout;\n }\n}\n\nconst MODE_NAMES = {\n\t0x10: \"USER\",\n 0x11: \"FIQ\",\n 0x12: \"IRQ\",\n 0x13: \"SUPERVISOR\",\n 0x17: \"ABORT\",\n 0x1b: \"UNDEFINED\",\n 0x1f: \"SYSTEM\",\n};\n", "/*\n * Copyright (c) 2024 Steven E. Hugg\n *\n * Permission is hereby granted, free of charge, to any person obtaining a copy\n * of this software and associated documentation files (the \"Software\"), to deal\n * in the Software without restriction, including without limitation the rights\n * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell\n * copies of the Software, and to permit persons to whom the Software is\n * furnished to do so, subject to the following conditions:\n * \n * The above copyright notice and this permission notice shall be included in all\n * copies or substantial portions of the Software.\n *\n * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\n * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE\n * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\n * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\n * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\n * SOFTWARE.\n */\n\nimport { Platform, DisasmLine, Machine, BaseMachinePlatform } from \"../common/baseplatform\";\nimport { PLATFORMS } from \"../common/emu\";\nimport { loadScript } from \"../common/util\";\nimport { ARM32Machine } from \"../machine/arm32\";\n\ndeclare var cs : any; // Unicorn module\n\nconst ARM32_PRESETS = [\n { id: 'vidfill.c', name: 'Video Memory Fill' },\n];\n\nexport abstract class BaseARMMachinePlatform extends BaseMachinePlatform {\n\n //getOpcodeMetadata = getOpcodeMetadata_z80;\n getToolForFilename(fn: string) {\n fn = fn.toLowerCase();\n if (fn.endsWith('.vasm')) return \"vasmarm\";\n if (fn.endsWith('.armips')) return \"armips\";\n if (fn.endsWith('.c')) return \"armtcc\";\n if (fn.endsWith('.s')) return \"armtcc\";\n return \"armtcc\";\n }\n getPresets() { return ARM32_PRESETS; }\n getDefaultExtension() { return \".c\"; };\n }\n \nclass ARM32Platform extends BaseARMMachinePlatform implements Platform {\n\n capstone_arm : any;\n capstone_thumb : any;\n\n async start() {\n super.start();\n console.log(\"Loading Capstone\");\n await loadScript('./lib/capstone-arm.min.js');\n this.capstone_arm = new cs.Capstone(cs.ARCH_ARM, cs.MODE_ARM);\n this.capstone_thumb = new cs.Capstone(cs.ARCH_ARM, cs.MODE_THUMB);\n }\n\n newMachine() { return new ARM32Machine(); }\n readAddress(a) { return this.machine.read(a); }\n getMemoryMap = function() { return { main:[\n {name:'ROM',start:0x0000000,size:0x100000,type:'ram'},\n {name:'I/O',start:0x4000000,size:0x100,type:'io'},\n ] } };\n getPlatformName() { return \"ARM7\"; }\n getDebugTree() {\n return {\n ...this.machine.cpu.getDebugTree(),\n dwarf: this.debugSymbols.debuginfo\n }\n }\n disassemble(pc:number, read:(addr:number)=>number) : DisasmLine {\n var is_thumb = this.machine.cpu.isThumb();\n var capstone = is_thumb ? this.capstone_thumb : this.capstone_arm;\n var buf = [];\n for (var i=0; i<4; i++) {\n buf[i] = read(pc+i);\n }\n var insns = capstone.disasm(buf, pc, 4);\n var i0 = insns && insns[0];\n if (i0) {\n return {\n nbytes: i0.size,\n line: i0.mnemonic + \" \" + i0.op_str,\n isaddr: i0.address > 0\n };\n } else {\n return {\n nbytes: 4,\n line: \"???\",\n isaddr: false\n };\n }\n }\n}\n\n////\n\nPLATFORMS['arm32'] = ARM32Platform;\n"], + "mappings": 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+ "names": [] +} diff --git a/gen/arm32-R5NJVEXG.js b/gen/arm32-R5NJVEXG.js deleted file mode 100644 index ff465485..00000000 --- a/gen/arm32-R5NJVEXG.js +++ /dev/null @@ -1,7 +0,0 @@ -import{H as j,q}from"./chunk-42IVW2OL.js";import{E as J,J as Y,T as y,W as S,X as z,Z as X,a as N,aa as L,g as E}from"./chunk-S4FPTY4A.js";import"./chunk-RQFURXHW.js";var g;(function(o){o[o.MODE_ARM=0]="MODE_ARM",o[o.MODE_THUMB=1]="MODE_THUMB",o[o.MODE_USER=16]="MODE_USER",o[o.MODE_FIQ=17]="MODE_FIQ",o[o.MODE_IRQ=18]="MODE_IRQ",o[o.MODE_SUPERVISOR=19]="MODE_SUPERVISOR",o[o.MODE_ABORT=23]="MODE_ABORT",o[o.MODE_UNDEFINED=27]="MODE_UNDEFINED",o[o.MODE_SYSTEM=31]="MODE_SYSTEM"})(g||(g={}));var u;(function(t){t[t.SP=13]="SP",t[t.LR=14]="LR",t[t.PC=15]="PC"})(u||(u={}));var b;(function(l){l[l.BANK_NONE=0]="BANK_NONE",l[l.BANK_FIQ=1]="BANK_FIQ",l[l.BANK_IRQ=2]="BANK_IRQ",l[l.BANK_SUPERVISOR=3]="BANK_SUPERVISOR",l[l.BANK_ABORT=4]="BANK_ABORT",l[l.BANK_UNDEFINED=5]="BANK_UNDEFINED",l[l.WORD_SIZE_ARM=4]="WORD_SIZE_ARM",l[l.WORD_SIZE_THUMB=2]="WORD_SIZE_THUMB",l[l.BASE_RESET=0]="BASE_RESET",l[l.BASE_UNDEF=4]="BASE_UNDEF",l[l.BASE_SWI=8]="BASE_SWI",l[l.BASE_PABT=12]="BASE_PABT",l[l.BASE_DABT=16]="BASE_DABT",l[l.BASE_IRQ=24]="BASE_IRQ",l[l.BASE_FIQ=28]="BASE_FIQ"})(b||(b={}));var $=4026531840,rr=223,or=32;function F(s){this.cpu=s,this.addressingMode23Immediate=[function(e,i,t){var r=s.gprs,a=function(){var c=r[e];return(!t||t())&&(r[e]-=i),c};return a.writesPC=e==15,a},null,null,null,function(e,i,t){var r=s.gprs,a=function(){var c=r[e];return(!t||t())&&(r[e]+=i),c};return a.writesPC=e==15,a},null,null,null,function(e,i,t){var r=s.gprs,a=function(){return r[e]-i};return a.writesPC=!1,a},function(e,i,t){var r=s.gprs,a=function(){var c=r[e]-i;return(!t||t())&&(r[e]=c),c};return a.writesPC=e==15,a},null,null,function(e,i,t){var r=s.gprs,a=function(){return r[e]+i};return a.writesPC=!1,a},function(e,i,t){var r=s.gprs,a=function(){var c=r[e]+i;return(!t||t())&&(r[e]=c),c};return a.writesPC=e==15,a},null,null],this.addressingMode23Register=[function(e,i,t){var r=s.gprs,a=function(){var c=r[e];return(!t||t())&&(r[e]-=r[i]),c};return a.writesPC=e==15,a},null,null,null,function(e,i,t){var r=s.gprs,a=function(){var c=r[e];return(!t||t())&&(r[e]+=r[i]),c};return a.writesPC=e==15,a},null,null,null,function(e,i,t){var r=s.gprs,a=function(){return r[e]-r[i]};return a.writesPC=!1,a},function(e,i,t){var r=s.gprs,a=function(){var c=r[e]-r[i];return(!t||t())&&(r[e]=c),c};return a.writesPC=e==15,a},null,null,function(e,i,t){var r=s.gprs,a=function(){var c=r[e]+r[i];return c};return a.writesPC=!1,a},function(e,i,t){var r=s.gprs,a=function(){var c=r[e]+r[i];return(!t||t())&&(r[e]=c),c};return a.writesPC=e==15,a},null,null],this.addressingMode2RegisterShifted=[function(e,i,t){var r=s.gprs,a=function(){var c=r[e];return(!t||t())&&(i(),r[e]-=s.shifterOperand),c};return a.writesPC=e==15,a},null,null,null,function(e,i,t){var r=s.gprs,a=function(){var c=r[e];return(!t||t())&&(i(),r[e]+=s.shifterOperand),c};return a.writesPC=e==15,a},null,null,null,function(e,i,t){var r=s.gprs,a=function(){return i(),r[e]-s.shifterOperand};return a.writesPC=!1,a},function(e,i,t){var r=s.gprs,a=function(){i();var c=r[e]-s.shifterOperand;return(!t||t())&&(r[e]=c),c};return a.writesPC=e==15,a},null,null,function(e,i,t){var r=s.gprs,a=function(){return i(),r[e]+s.shifterOperand};return a.writesPC=!1,a},function(e,i,t){var r=s.gprs,a=function(){i();var c=r[e]+s.shifterOperand;return(!t||t())&&(r[e]=c),c};return a.writesPC=e==15,a},null,null]}F.prototype.constructAddressingMode1ASR=function(s,e){var i=this.cpu,t=i.gprs;return function(){++i.cycles;var r=t[s];s==15&&(r+=4),r&=255;var a=t[e];e==15&&(a+=4),r==0?(i.shifterOperand=a,i.shifterCarryOut=i.cpsrC):r<32?(i.shifterOperand=a>>r,i.shifterCarryOut=a&1<>31?(i.shifterOperand=4294967295,i.shifterCarryOut=2147483648):(i.shifterOperand=0,i.shifterCarryOut=0)}};F.prototype.constructAddressingMode1Immediate=function(s){var e=this.cpu;return function(){e.shifterOperand=s,e.shifterCarryOut=e.cpsrC}};F.prototype.constructAddressingMode1ImmediateRotate=function(s,e){var i=this.cpu;return function(){i.shifterOperand=s>>>e|s<<32-e,i.shifterCarryOut=i.shifterOperand>>31}};F.prototype.constructAddressingMode1LSL=function(s,e){var i=this.cpu,t=i.gprs;return function(){++i.cycles;var r=t[s];s==15&&(r+=4),r&=255;var a=t[e];e==15&&(a+=4),r==0?(i.shifterOperand=a,i.shifterCarryOut=i.cpsrC):r<32?(i.shifterOperand=a<>>r,i.shifterCarryOut=a&1<>31):(i.shifterOperand=0,i.shifterCarryOut=0)}};F.prototype.constructAddressingMode1ROR=function(s,e){var i=this.cpu,t=i.gprs;return function(){++i.cycles;var r=t[s];s==15&&(r+=4),r&=255;var a=t[e];e==15&&(a+=4);var c=r&31;r==0?(i.shifterOperand=a,i.shifterCarryOut=i.cpsrC):c?(i.shifterOperand=t[e]>>>c|t[e]<<32-c,i.shifterCarryOut=a&1<>31)}};F.prototype.constructAddressingMode23Immediate=function(s,e,i){var t=(s&983040)>>16;return this.addressingMode23Immediate[(s&27262976)>>21](t,e,i)};F.prototype.constructAddressingMode23Register=function(s,e,i){var t=(s&983040)>>16;return this.addressingMode23Register[(s&27262976)>>21](t,e,i)};F.prototype.constructAddressingMode2RegisterShifted=function(s,e,i){var t=(s&983040)>>16;return this.addressingMode2RegisterShifted[(s&27262976)>>21](t,e,i)};F.prototype.constructAddressingMode4=function(s,e){var i=this.cpu,t=i.gprs;return function(){var r=t[e]+s;return r}};F.prototype.constructAddressingMode4Writeback=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(c){var p=a[i]+s;return c&&t&&r.mmu.store32(a[i]+s-4,a[i]),a[i]+=e,p}};F.prototype.constructADC=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=(r.shifterOperand>>>0)+(r.cpsrC?1:0);a[s]=(a[e]>>>0)+c}}};F.prototype.constructADCS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=(r.shifterOperand>>>0)+(r.cpsrC?1:0),p=(a[e]>>>0)+c;s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=p>>31,r.cpsrZ=!(p&4294967295),r.cpsrC=p>4294967295,r.cpsrV=a[e]>>31==c>>31&&a[e]>>31!=p>>31&&c>>31!=p>>31),a[s]=p}}};F.prototype.constructADD=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=(a[e]>>>0)+(r.shifterOperand>>>0))}};F.prototype.constructADDS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=(a[e]>>>0)+(r.shifterOperand>>>0);s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=c>>31,r.cpsrZ=!(c&4294967295),r.cpsrC=c>4294967295,r.cpsrV=a[e]>>31==r.shifterOperand>>31&&a[e]>>31!=c>>31&&r.shifterOperand>>31!=c>>31),a[s]=c}}};F.prototype.constructAND=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=a[e]&r.shifterOperand)}};F.prototype.constructANDS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=a[e]&r.shifterOperand,s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=a[s]>>31,r.cpsrZ=!(a[s]&4294967295),r.cpsrC=r.shifterCarryOut))}};F.prototype.constructB=function(s,e){var i=this.cpu,t=i.gprs;return function(){if(e&&!e()){i.mmu.waitPrefetch32(t[15]);return}i.mmu.waitPrefetch32(t[15]),t[15]+=s}};F.prototype.constructBIC=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=a[e]&~r.shifterOperand)}};F.prototype.constructBICS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=a[e]&~r.shifterOperand,s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=a[s]>>31,r.cpsrZ=!(a[s]&4294967295),r.cpsrC=r.shifterCarryOut))}};F.prototype.constructBL=function(s,e){var i=this.cpu,t=i.gprs;return function(){if(e&&!e()){i.mmu.waitPrefetch32(t[15]);return}i.mmu.waitPrefetch32(t[15]),t[14]=t[15]-4,t[15]+=s}};F.prototype.constructBX=function(s,e){var i=this.cpu,t=i.gprs;return function(){if(e&&!e()){i.mmu.waitPrefetch32(t[15]);return}i.mmu.waitPrefetch32(t[15]),i.switchExecMode(t[s]&1),t[15]=t[s]&4294967294}};F.prototype.constructCMN=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=(a[e]>>>0)+(r.shifterOperand>>>0);r.cpsrN=c>>31,r.cpsrZ=!(c&4294967295),r.cpsrC=c>4294967295,r.cpsrV=a[e]>>31==r.shifterOperand>>31&&a[e]>>31!=c>>31&&r.shifterOperand>>31!=c>>31}}};F.prototype.constructCMP=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=a[e]-r.shifterOperand;r.cpsrN=c>>31,r.cpsrZ=!(c&4294967295),r.cpsrC=a[e]>>>0>=r.shifterOperand>>>0,r.cpsrV=a[e]>>31!=r.shifterOperand>>31&&a[e]>>31!=c>>31}}};F.prototype.constructEOR=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=a[e]^r.shifterOperand)}};F.prototype.constructEORS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=a[e]^r.shifterOperand,s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=a[s]>>31,r.cpsrZ=!(a[s]&4294967295),r.cpsrC=r.shifterCarryOut))}};F.prototype.constructLDM=function(s,e,i){var t=this.cpu,r=t.gprs,a=t.mmu;return function(){if(a.waitPrefetch32(r[15]),!(i&&!i())){var c=e(!1),p=0,n,o;for(n=s,o=0;n;n>>=1,++o)n&1&&(r[o]=a.load32(c&4294967292),c+=4,++p);a.waitMulti32(c,p),++t.cycles}}};F.prototype.constructLDMS=function(s,e,i){var t=this.cpu,r=t.gprs,a=t.mmu;return function(){if(a.waitPrefetch32(r[15]),!(i&&!i())){var c=e(!1),p=0,n=t.mode;t.switchMode(31);var o,v;for(o=s,v=0;o;o>>=1,++v)o&1&&(r[v]=a.load32(c&4294967292),c+=4,++p);t.switchMode(n),a.waitMulti32(c,p),++t.cycles}}};F.prototype.constructLDR=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){if(t.mmu.waitPrefetch32(r[15]),!(i&&!i())){var a=e();r[s]=t.mmu.load32(a),t.mmu.wait32(a),++t.cycles}}};F.prototype.constructLDRB=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){if(t.mmu.waitPrefetch32(r[15]),!(i&&!i())){var a=e();r[s]=t.mmu.loadU8(a),t.mmu.wait(a),++t.cycles}}};F.prototype.constructLDRH=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){if(t.mmu.waitPrefetch32(r[15]),!(i&&!i())){var a=e();r[s]=t.mmu.loadU16(a),t.mmu.wait(a),++t.cycles}}};F.prototype.constructLDRSB=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){if(t.mmu.waitPrefetch32(r[15]),!(i&&!i())){var a=e();r[s]=t.mmu.load8(a),t.mmu.wait(a),++t.cycles}}};F.prototype.constructLDRSH=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){if(t.mmu.waitPrefetch32(r[15]),!(i&&!i())){var a=e();r[s]=t.mmu.load16(a),t.mmu.wait(a),++t.cycles}}};F.prototype.constructMLA=function(s,e,i,t,r){var a=this.cpu,c=a.gprs;return function(){if(a.mmu.waitPrefetch32(c[15]),!(r&&!r()))if(++a.cycles,a.mmu.waitMul(i),c[t]&4294901760&&c[i]&4294901760){var p=(c[t]&4294901760)*c[i]&4294967295,n=(c[t]&65535)*c[i]&4294967295;c[s]=p+n+c[e]&4294967295}else c[s]=c[t]*c[i]+c[e]}};F.prototype.constructMLAS=function(s,e,i,t,r){var a=this.cpu,c=a.gprs;return function(){if(a.mmu.waitPrefetch32(c[15]),!(r&&!r())){if(++a.cycles,a.mmu.waitMul(i),c[t]&4294901760&&c[i]&4294901760){var p=(c[t]&4294901760)*c[i]&4294967295,n=(c[t]&65535)*c[i]&4294967295;c[s]=p+n+c[e]&4294967295}else c[s]=c[t]*c[i]+c[e];a.cpsrN=c[s]>>31,a.cpsrZ=!(c[s]&4294967295)}}};F.prototype.constructMOV=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=r.shifterOperand)}};F.prototype.constructMOVS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=r.shifterOperand,s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=a[s]>>31,r.cpsrZ=!(a[s]&4294967295),r.cpsrC=r.shifterCarryOut))}};F.prototype.constructMRS=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){t.mmu.waitPrefetch32(r[15]),!(i&&!i())&&(e?r[s]=t.spsr:r[s]=t.packCPSR())}};F.prototype.constructMSR=function(s,e,i,t,r){var a=this.cpu,c=a.gprs,p=i&65536,n=i&524288;return function(){if(a.mmu.waitPrefetch32(c[15]),!(r&&!r())){var o;i&33554432?o=t:o=c[s];var v=(p?255:0)|(n?4278190080:0);e?(v&=$|rr|or,a.spsr=a.spsr&~v|o&v):(v&$&&(a.cpsrN=o>>31,a.cpsrZ=o&1073741824,a.cpsrC=o&536870912,a.cpsrV=o&268435456),a.mode!=16&&v&rr&&(a.switchMode(o&15|16),a.cpsrI=o&128,a.cpsrF=o&64))}}};F.prototype.constructMUL=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t()))if(r.mmu.waitMul(a[e]),a[i]&4294901760&&a[e]&4294901760){var c=(a[i]&4294901760)*a[e]|0,p=(a[i]&65535)*a[e]|0;a[s]=c+p}else a[s]=a[i]*a[e]}};F.prototype.constructMULS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){if(r.mmu.waitMul(a[e]),a[i]&4294901760&&a[e]&4294901760){var c=(a[i]&4294901760)*a[e]|0,p=(a[i]&65535)*a[e]|0;a[s]=c+p}else a[s]=a[i]*a[e];r.cpsrN=a[s]>>31,r.cpsrZ=!(a[s]&4294967295)}}};F.prototype.constructMVN=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=~r.shifterOperand)}};F.prototype.constructMVNS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=~r.shifterOperand,s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=a[s]>>31,r.cpsrZ=!(a[s]&4294967295),r.cpsrC=r.shifterCarryOut))}};F.prototype.constructORR=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=a[e]|r.shifterOperand)}};F.prototype.constructORRS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=a[e]|r.shifterOperand,s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=a[s]>>31,r.cpsrZ=!(a[s]&4294967295),r.cpsrC=r.shifterCarryOut))}};F.prototype.constructRSB=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=r.shifterOperand-a[e])}};F.prototype.constructRSBS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=r.shifterOperand-a[e];s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=c>>31,r.cpsrZ=!(c&4294967295),r.cpsrC=r.shifterOperand>>>0>=a[e]>>>0,r.cpsrV=r.shifterOperand>>31!=a[e]>>31&&r.shifterOperand>>31!=c>>31),a[s]=c}}};F.prototype.constructRSC=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=(a[e]>>>0)+(r.cpsrC?0:1);a[s]=(r.shifterOperand>>>0)-c}}};F.prototype.constructRSCS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=(a[e]>>>0)+(r.cpsrC?0:1),p=(r.shifterOperand>>>0)-c;s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=p>>31,r.cpsrZ=!(p&4294967295),r.cpsrC=r.shifterOperand>>>0>=p>>>0,r.cpsrV=r.shifterOperand>>31!=c>>31&&r.shifterOperand>>31!=p>>31),a[s]=p}}};F.prototype.constructSBC=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=(r.shifterOperand>>>0)+(r.cpsrC?0:1);a[s]=(a[e]>>>0)-c}}};F.prototype.constructSBCS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=(r.shifterOperand>>>0)+(r.cpsrC?0:1),p=(a[e]>>>0)-c;s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=p>>31,r.cpsrZ=!(p&4294967295),r.cpsrC=a[e]>>>0>=p>>>0,r.cpsrV=a[e]>>31!=c>>31&&a[e]>>31!=p>>31),a[s]=p}}};F.prototype.constructSMLAL=function(s,e,i,t,r){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(r&&!r())){a.cycles+=2,a.mmu.waitMul(i);var n=(p[t]&4294901760)*p[i],o=(p[t]&65535)*p[i],v=(p[e]>>>0)+n+o;p[e]=v,p[s]+=Math.floor(v*c)}}};F.prototype.constructSMLALS=function(s,e,i,t,r){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(r&&!r())){a.cycles+=2,a.mmu.waitMul(i);var n=(p[t]&4294901760)*p[i],o=(p[t]&65535)*p[i],v=(p[e]>>>0)+n+o;p[e]=v,p[s]+=Math.floor(v*c),a.cpsrN=p[s]>>31,a.cpsrZ=!(p[s]&4294967295||p[e]&4294967295)}}};F.prototype.constructSMULL=function(s,e,i,t,r){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(r&&!r())){++a.cycles,a.mmu.waitMul(p[i]);var n=((p[t]&4294901760)>>0)*(p[i]>>0),o=((p[t]&65535)>>0)*(p[i]>>0);p[e]=(n&4294967295)+(o&4294967295)&4294967295,p[s]=Math.floor(n*c+o*c)}}};F.prototype.constructSMULLS=function(s,e,i,t,r){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(r&&!r())){++a.cycles,a.mmu.waitMul(p[i]);var n=((p[t]&4294901760)>>0)*(p[i]>>0),o=((p[t]&65535)>>0)*(p[i]>>0);p[e]=(n&4294967295)+(o&4294967295)&4294967295,p[s]=Math.floor(n*c+o*c),a.cpsrN=p[s]>>31,a.cpsrZ=!(p[s]&4294967295||p[e]&4294967295)}}};F.prototype.constructSTM=function(s,e,i){var t=this.cpu,r=t.gprs,a=t.mmu;return function(){if(i&&!i()){a.waitPrefetch32(r[15]);return}a.wait32(r[15]);var c=e(!0),p=0,n,o;for(n=s,o=0;n;n>>=1,++o)n&1&&(a.store32(c,r[o]),c+=4,++p);a.waitMulti32(c,p)}};F.prototype.constructSTMS=function(s,e,i){var t=this.cpu,r=t.gprs,a=t.mmu;return function(){if(i&&!i()){a.waitPrefetch32(r[15]);return}a.wait32(r[15]);var c=t.mode,p=e(!0),n=0,o,v;for(t.switchMode(31),o=s,v=0;o;o>>=1,++v)o&1&&(a.store32(p,r[v]),p+=4,++n);t.switchMode(c),a.waitMulti32(p,n)}};F.prototype.constructSTR=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){if(i&&!i()){t.mmu.waitPrefetch32(r[15]);return}var a=e();t.mmu.store32(a,r[s]),t.mmu.wait32(a),t.mmu.wait32(r[15])}};F.prototype.constructSTRB=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){if(i&&!i()){t.mmu.waitPrefetch32(r[15]);return}var a=e();t.mmu.store8(a,r[s]),t.mmu.wait(a),t.mmu.wait32(r[15])}};F.prototype.constructSTRH=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){if(i&&!i()){t.mmu.waitPrefetch32(r[15]);return}var a=e();t.mmu.store16(a,r[s]),t.mmu.wait(a),t.mmu.wait32(r[15])}};F.prototype.constructSUB=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){r.mmu.waitPrefetch32(a[15]),!(t&&!t())&&(i(),a[s]=a[e]-r.shifterOperand)}};F.prototype.constructSUBS=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=a[e]-r.shifterOperand;s==15&&r.hasSPSR()?r.unpackCPSR(r.spsr):(r.cpsrN=c>>31,r.cpsrZ=!(c&4294967295),r.cpsrC=a[e]>>>0>=r.shifterOperand>>>0,r.cpsrV=a[e]>>31!=r.shifterOperand>>31&&a[e]>>31!=c>>31),a[s]=c}}};F.prototype.constructSWI=function(s,e){var i=this.cpu,t=i.gprs;return function(){if(e&&!e()){i.mmu.waitPrefetch32(t[15]);return}i.irq.swi32(s),i.mmu.waitPrefetch32(t[15])}};F.prototype.constructSWP=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){r.mmu.wait32(a[e]),r.mmu.wait32(a[e]);var c=r.mmu.load32(a[e]);r.mmu.store32(a[e],a[i]),a[s]=c,++r.cycles}}};F.prototype.constructSWPB=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){r.mmu.wait(a[e]),r.mmu.wait(a[e]);var c=r.mmu.loadU8(a[e]);r.mmu.store8(a[e],a[i]),a[s]=c,++r.cycles}}};F.prototype.constructTEQ=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=a[e]^r.shifterOperand;r.cpsrN=c>>31,r.cpsrZ=!(c&4294967295),r.cpsrC=r.shifterCarryOut}}};F.prototype.constructTST=function(s,e,i,t){var r=this.cpu,a=r.gprs;return function(){if(r.mmu.waitPrefetch32(a[15]),!(t&&!t())){i();var c=a[e]&r.shifterOperand;r.cpsrN=c>>31,r.cpsrZ=!(c&4294967295),r.cpsrC=r.shifterCarryOut}}};F.prototype.constructUMLAL=function(s,e,i,t,r){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(r&&!r())){a.cycles+=2,a.mmu.waitMul(i);var n=((p[t]&4294901760)>>>0)*(p[i]>>>0),o=(p[t]&65535)*(p[i]>>>0),v=(p[e]>>>0)+n+o;p[e]=v,p[s]+=v*c}}};F.prototype.constructUMLALS=function(s,e,i,t,r){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(r&&!r())){a.cycles+=2,a.mmu.waitMul(i);var n=((p[t]&4294901760)>>>0)*(p[i]>>>0),o=(p[t]&65535)*(p[i]>>>0),v=(p[e]>>>0)+n+o;p[e]=v,p[s]+=v*c,a.cpsrN=p[s]>>31,a.cpsrZ=!(p[s]&4294967295||p[e]&4294967295)}}};F.prototype.constructUMULL=function(s,e,i,t,r){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(r&&!r())){++a.cycles,a.mmu.waitMul(p[i]);var n=((p[t]&4294901760)>>>0)*(p[i]>>>0),o=((p[t]&65535)>>>0)*(p[i]>>>0);p[e]=(n&4294967295)+(o&4294967295)&4294967295,p[s]=n*c+o*c>>>0}}};F.prototype.constructUMULLS=function(s,e,i,t,r){var a=this.cpu,c=1/4294967296,p=a.gprs;return function(){if(a.mmu.waitPrefetch32(p[15]),!(r&&!r())){++a.cycles,a.mmu.waitMul(p[i]);var n=((p[t]&4294901760)>>>0)*(p[i]>>>0),o=((p[t]&65535)>>>0)*(p[i]>>>0);p[e]=(n&4294967295)+(o&4294967295)&4294967295,p[s]=n*c+o*c>>>0,a.cpsrN=p[s]>>31,a.cpsrZ=!(p[s]&4294967295||p[e]&4294967295)}}};function m(s){this.cpu=s}m.prototype.constructADC=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=(t[e]>>>0)+(i.cpsrC?1:0),a=t[s],c=(a>>>0)+r,p=a>>31,n=c>>31,o=r>>31;i.cpsrN=n,i.cpsrZ=!(c&4294967295),i.cpsrC=c>4294967295,i.cpsrV=p==o&&p!=n&&o!=n,t[s]=c}};m.prototype.constructADD1=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){t.mmu.waitPrefetch(r[15]);var a=(r[e]>>>0)+i;t.cpsrN=a>>31,t.cpsrZ=!(a&4294967295),t.cpsrC=a>4294967295,t.cpsrV=!(r[e]>>31)&&(r[e]>>31^a)>>31&&a>>31,r[s]=a}};m.prototype.constructADD2=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=(t[s]>>>0)+e;i.cpsrN=r>>31,i.cpsrZ=!(r&4294967295),i.cpsrC=r>4294967295,i.cpsrV=!(t[s]>>31)&&(t[s]^r)>>31&&(e^r)>>31,t[s]=r}};m.prototype.constructADD3=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){t.mmu.waitPrefetch(r[15]);var a=(r[e]>>>0)+(r[i]>>>0);t.cpsrN=a>>31,t.cpsrZ=!(a&4294967295),t.cpsrC=a>4294967295,t.cpsrV=!((r[e]^r[i])>>31)&&(r[e]^a)>>31&&(r[i]^a)>>31,r[s]=a}};m.prototype.constructADD4=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),t[s]+=t[e]}};m.prototype.constructADD5=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),t[s]=(t[15]&4294967292)+e}};m.prototype.constructADD6=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),t[s]=t[13]+e}};m.prototype.constructADD7=function(s){var e=this.cpu,i=e.gprs;return function(){e.mmu.waitPrefetch(i[15]),i[13]+=s}};m.prototype.constructAND=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),t[s]=t[s]&t[e],i.cpsrN=t[s]>>31,i.cpsrZ=!(t[s]&4294967295)}};m.prototype.constructASR1=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){t.mmu.waitPrefetch(r[15]),i==0?(t.cpsrC=r[e]>>31,t.cpsrC?r[s]=4294967295:r[s]=0):(t.cpsrC=r[e]&1<>i),t.cpsrN=r[s]>>31,t.cpsrZ=!(r[s]&4294967295)}};m.prototype.constructASR2=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=t[e]&255;r&&(r<32?(i.cpsrC=t[s]&1<>=r):(i.cpsrC=t[s]>>31,i.cpsrC?t[s]=4294967295:t[s]=0)),i.cpsrN=t[s]>>31,i.cpsrZ=!(t[s]&4294967295)}};m.prototype.constructB1=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),e()&&(t[15]+=s)}};m.prototype.constructB2=function(s){var e=this.cpu,i=e.gprs;return function(){e.mmu.waitPrefetch(i[15]),i[15]+=s}};m.prototype.constructBIC=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),t[s]=t[s]&~t[e],i.cpsrN=t[s]>>31,i.cpsrZ=!(t[s]&4294967295)}};m.prototype.constructBL1=function(s){var e=this.cpu,i=e.gprs;return function(){e.mmu.waitPrefetch(i[15]),i[14]=i[15]+s}};m.prototype.constructBL2=function(s){var e=this.cpu,i=e.gprs;return function(){e.mmu.waitPrefetch(i[15]);var t=i[15];i[15]=i[14]+(s<<1),i[14]=t-1}};m.prototype.constructBX=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),i.switchExecMode(t[e]&1);var r=0;e==15&&(r=t[e]&2),t[15]=t[e]&4294967294-r}};m.prototype.constructCMN=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=(t[s]>>>0)+(t[e]>>>0);i.cpsrN=r>>31,i.cpsrZ=!(r&4294967295),i.cpsrC=r>4294967295,i.cpsrV=t[s]>>31==t[e]>>31&&t[s]>>31!=r>>31&&t[e]>>31!=r>>31}};m.prototype.constructCMP1=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=t[s]-e;i.cpsrN=r>>31,i.cpsrZ=!(r&4294967295),i.cpsrC=t[s]>>>0>=e,i.cpsrV=t[s]>>31&&(t[s]^r)>>31}};m.prototype.constructCMP2=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=t[s],a=t[e],c=r-a,p=c>>31,n=r>>31;i.cpsrN=p,i.cpsrZ=!(c&4294967295),i.cpsrC=r>>>0>=a>>>0,i.cpsrV=n!=a>>31&&n!=p}};m.prototype.constructCMP3=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=t[s]-t[e];i.cpsrN=r>>31,i.cpsrZ=!(r&4294967295),i.cpsrC=t[s]>>>0>=t[e]>>>0,i.cpsrV=(t[s]^t[e])>>31&&(t[s]^r)>>31}};m.prototype.constructEOR=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),t[s]=t[s]^t[e],i.cpsrN=t[s]>>31,i.cpsrZ=!(t[s]&4294967295)}};m.prototype.constructLDMIA=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=t[s],a=0,c,p;for(c=1,p=0;p<8;c<<=1,++p)e&c&&(t[p]=i.mmu.load32(r),r+=4,++a);i.mmu.waitMulti32(r,a),1<>31,t.cpsrZ=!(r[s]&4294967295)}};m.prototype.constructLSL2=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=t[e]&255;r&&(r<32?(i.cpsrC=t[s]&1<<32-r,t[s]<<=r):(r>32?i.cpsrC=0:i.cpsrC=t[s]&1,t[s]=0)),i.cpsrN=t[s]>>31,i.cpsrZ=!(t[s]&4294967295)}};m.prototype.constructLSR1=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){t.mmu.waitPrefetch(r[15]),i==0?(t.cpsrC=r[e]>>31,r[s]=0):(t.cpsrC=r[e]&1<>>i),t.cpsrN=0,t.cpsrZ=!(r[s]&4294967295)}};m.prototype.constructLSR2=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=t[e]&255;r&&(r<32?(i.cpsrC=t[s]&1<>>=r):(r>32?i.cpsrC=0:i.cpsrC=t[s]>>31,t[s]=0)),i.cpsrN=t[s]>>31,i.cpsrZ=!(t[s]&4294967295)}};m.prototype.constructMOV1=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),t[s]=e,i.cpsrN=e>>31,i.cpsrZ=!(e&4294967295)}};m.prototype.constructMOV2=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){t.mmu.waitPrefetch(r[15]);var a=r[e];t.cpsrN=a>>31,t.cpsrZ=!(a&4294967295),t.cpsrC=0,t.cpsrV=0,r[s]=a}};m.prototype.constructMOV3=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),t[s]=t[e]}};m.prototype.constructMUL=function(s,e){var i=this.cpu,t=i.gprs;return function(){if(i.mmu.waitPrefetch(t[15]),i.mmu.waitMul(t[e]),t[e]&4294901760&&t[s]&4294901760){var r=(t[s]&4294901760)*t[e]&4294967295,a=(t[s]&65535)*t[e]&4294967295;t[s]=r+a&4294967295}else t[s]*=t[e];i.cpsrN=t[s]>>31,i.cpsrZ=!(t[s]&4294967295)}};m.prototype.constructMVN=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),t[s]=~t[e],i.cpsrN=t[s]>>31,i.cpsrZ=!(t[s]&4294967295)}};m.prototype.constructNEG=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=-t[e];i.cpsrN=r>>31,i.cpsrZ=!(r&4294967295),i.cpsrC=0>=r>>>0,i.cpsrV=t[e]>>31&&r>>31,t[s]=r}};m.prototype.constructORR=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),t[s]=t[s]|t[e],i.cpsrN=t[s]>>31,i.cpsrZ=!(t[s]&4294967295)}};m.prototype.constructPOP=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]),++i.cycles;var r=t[13],a=0,c,p;for(c=1,p=0;p<8;c<<=1,++p)s&c&&(i.mmu.waitSeq32(r),t[p]=i.mmu.load32(r),r+=4,++a);e&&(t[15]=i.mmu.load32(r)&4294967294,r+=4,++a),i.mmu.waitMulti32(r,a),t[13]=r}};m.prototype.constructPUSH=function(s,e){var i=this.cpu,t=i.gprs;return function(){var r=t[13]-4,a=0;i.mmu.waitPrefetch(t[15]),e&&(i.mmu.store32(r,t[14]),r-=4,++a);var c,p;for(c=128,p=7;c;c>>=1,--p)if(s&c){i.mmu.store32(r,t[p]),r-=4,++a;break}for(c>>=1,--p;c;c>>=1,--p)s&c&&(i.mmu.store32(r,t[p]),r-=4,++a);i.mmu.waitMulti32(r,a),t[13]=r+4}};m.prototype.constructROR=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=t[e]&255;if(r){var a=r&31;a>0?(i.cpsrC=t[s]&1<>>a|t[s]<<32-a):i.cpsrC=t[s]>>31}i.cpsrN=t[s]>>31,i.cpsrZ=!(t[s]&4294967295)}};m.prototype.constructSBC=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=(t[e]>>>0)+(i.cpsrC?0:1),a=(t[s]>>>0)-r;i.cpsrN=a>>31,i.cpsrZ=!(a&4294967295),i.cpsrC=t[s]>>>0>=a>>>0,i.cpsrV=(t[s]^r)>>31&&(t[s]^a)>>31,t[s]=a}};m.prototype.constructSTMIA=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.wait(t[15]);var r=t[s],a=0,c,p;for(c=1,p=0;p<8;c<<=1,++p)if(e&c){i.mmu.store32(r,t[p]),r+=4,++a;break}for(c<<=1,++p;p<8;c<<=1,++p)e&c&&(i.mmu.store32(r,t[p]),r+=4,++a);i.mmu.waitMulti32(r,a),t[s]=r}};m.prototype.constructSTR1=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){var a=r[e]+i;t.mmu.store32(a,r[s]),t.mmu.wait(r[15]),t.mmu.wait32(a)}};m.prototype.constructSTR2=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){t.mmu.store32(r[e]+r[i],r[s]),t.mmu.wait(r[15]),t.mmu.wait32(r[e]+r[i])}};m.prototype.constructSTR3=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.store32(t[13]+e,t[s]),i.mmu.wait(t[15]),i.mmu.wait32(t[13]+e)}};m.prototype.constructSTRB1=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){var a=r[e]+i;t.mmu.store8(a,r[s]),t.mmu.wait(r[15]),t.mmu.wait(a)}};m.prototype.constructSTRB2=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){t.mmu.store8(r[e]+r[i],r[s]),t.mmu.wait(r[15]),t.mmu.wait(r[e]+r[i])}};m.prototype.constructSTRH1=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){var a=r[e]+i;t.mmu.store16(a,r[s]),t.mmu.wait(r[15]),t.mmu.wait(a)}};m.prototype.constructSTRH2=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){t.mmu.store16(r[e]+r[i],r[s]),t.mmu.wait(r[15]),t.mmu.wait(r[e]+r[i])}};m.prototype.constructSUB1=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){t.mmu.waitPrefetch(r[15]);var a=r[e]-i;t.cpsrN=a>>31,t.cpsrZ=!(a&4294967295),t.cpsrC=r[e]>>>0>=i,t.cpsrV=r[e]>>31&&(r[e]^a)>>31,r[s]=a}};m.prototype.constructSUB2=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=t[s]-e;i.cpsrN=r>>31,i.cpsrZ=!(r&4294967295),i.cpsrC=t[s]>>>0>=e,i.cpsrV=t[s]>>31&&(t[s]^r)>>31,t[s]=r}};m.prototype.constructSUB3=function(s,e,i){var t=this.cpu,r=t.gprs;return function(){t.mmu.waitPrefetch(r[15]);var a=r[e]-r[i];t.cpsrN=a>>31,t.cpsrZ=!(a&4294967295),t.cpsrC=r[e]>>>0>=r[i]>>>0,t.cpsrV=r[e]>>31!=r[i]>>31&&r[e]>>31!=a>>31,r[s]=a}};m.prototype.constructSWI=function(s){var e=this.cpu,i=e.gprs;return function(){e.irq.swi(s),e.mmu.waitPrefetch(i[15])}};m.prototype.constructTST=function(s,e){var i=this.cpu,t=i.gprs;return function(){i.mmu.waitPrefetch(t[15]);var r=t[s]&t[e];i.cpsrN=r>>31,i.cpsrZ=!(r&4294967295)}};function R(){this.SP=13,this.LR=14,this.PC=15,this.MODE_ARM=0,this.MODE_THUMB=1,this.MODE_USER=16,this.MODE_FIQ=17,this.MODE_IRQ=18,this.MODE_SUPERVISOR=19,this.MODE_ABORT=23,this.MODE_UNDEFINED=27,this.MODE_SYSTEM=31,this.BANK_NONE=0,this.BANK_FIQ=1,this.BANK_IRQ=2,this.BANK_SUPERVISOR=3,this.BANK_ABORT=4,this.BANK_UNDEFINED=5,this.WORD_SIZE_ARM=4,this.WORD_SIZE_THUMB=2,this.BASE_RESET=0,this.BASE_UNDEF=4,this.BASE_SWI=8,this.BASE_PABT=12,this.BASE_DABT=16,this.BASE_IRQ=24,this.BASE_FIQ=28,this.armCompiler=new F(this),this.thumbCompiler=new m(this),this.generateConds(),this.gprs=new Int32Array(16)}R.prototype.resetCPU=function(s){for(var e=0;e<15;++e)this.gprs[e]=0;this.gprs[15]=s+4,this.loadInstruction=this.loadInstructionArm,this.execMode=0,this.instructionWidth=4,this.mode=31,this.cpsrI=!1,this.cpsrF=!1,this.cpsrV=!1,this.cpsrC=!1,this.cpsrZ=!1,this.cpsrN=!1,this.bankedRegisters=[new Int32Array(7),new Int32Array(7),new Int32Array(2),new Int32Array(2),new Int32Array(2),new Int32Array(2)],this.spsr=0,this.bankedSPSRs=new Int32Array(6),this.cycles=0,this.shifterOperand=0,this.shifterCarryOut=0,this.page=null,this.pageId=0,this.pageRegion=-1,this.instruction=null,this.irq.clear();var i=this.gprs,t=this.mmu;this.step=function(){var r=this.instruction||(this.instruction=this.loadInstruction(i[15]-this.instructionWidth));if(i[15]+=this.instructionWidth,this.conditionPassed=!0,r(),!r.writesPC)this.instruction!=null&&((r.next==null||r.next.page.invalid)&&(r.next=this.loadInstruction(i[15]-this.instructionWidth)),this.instruction=r.next);else if(this.conditionPassed){var a=i[15]&=4294967294;this.execMode==0?(t.wait32(a),t.waitPrefetch32(a)):(t.wait(a),t.waitPrefetch(a)),i[15]+=this.instructionWidth,r.fixedJump?this.instruction!=null&&((r.next==null||r.next.page.invalid)&&(r.next=this.loadInstruction(i[15]-this.instructionWidth)),this.instruction=r.next):this.instruction=null}else this.instruction=null;this.irq.updateTimers()}};R.prototype.freeze=function(){return{PC:this.gprs[15]-this.instructionWidth,SP:this.gprs[13],gprs:[this.gprs[0],this.gprs[1],this.gprs[2],this.gprs[3],this.gprs[4],this.gprs[5],this.gprs[6],this.gprs[7],this.gprs[8],this.gprs[9],this.gprs[10],this.gprs[11],this.gprs[12],this.gprs[13],this.gprs[14],this.gprs[15]],mode:this.mode,cpsrI:this.cpsrI,cpsrF:this.cpsrF,cpsrV:this.cpsrV,cpsrC:this.cpsrC,cpsrZ:this.cpsrZ,cpsrN:this.cpsrN,bankedRegisters:[[this.bankedRegisters[0][0],this.bankedRegisters[0][1],this.bankedRegisters[0][2],this.bankedRegisters[0][3],this.bankedRegisters[0][4],this.bankedRegisters[0][5],this.bankedRegisters[0][6]],[this.bankedRegisters[1][0],this.bankedRegisters[1][1],this.bankedRegisters[1][2],this.bankedRegisters[1][3],this.bankedRegisters[1][4],this.bankedRegisters[1][5],this.bankedRegisters[1][6]],[this.bankedRegisters[2][0],this.bankedRegisters[2][1]],[this.bankedRegisters[3][0],this.bankedRegisters[3][1]],[this.bankedRegisters[4][0],this.bankedRegisters[4][1]],[this.bankedRegisters[5][0],this.bankedRegisters[5][1]]],spsr:this.spsr,bankedSPSRs:[this.bankedSPSRs[0],this.bankedSPSRs[1],this.bankedSPSRs[2],this.bankedSPSRs[3],this.bankedSPSRs[4],this.bankedSPSRs[5]],cycles:this.cycles,instructionWidth:this.instructionWidth}};R.prototype.defrost=function(s){this.instruction=null,this.page=null,this.pageId=0,this.pageRegion=-1,this.gprs[0]=s.gprs[0],this.gprs[1]=s.gprs[1],this.gprs[2]=s.gprs[2],this.gprs[3]=s.gprs[3],this.gprs[4]=s.gprs[4],this.gprs[5]=s.gprs[5],this.gprs[6]=s.gprs[6],this.gprs[7]=s.gprs[7],this.gprs[8]=s.gprs[8],this.gprs[9]=s.gprs[9],this.gprs[10]=s.gprs[10],this.gprs[11]=s.gprs[11],this.gprs[12]=s.gprs[12],this.gprs[13]=s.gprs[13],this.gprs[14]=s.gprs[14],this.gprs[15]=s.gprs[15],this.mode=s.mode,this.cpsrI=s.cpsrI,this.cpsrF=s.cpsrF,this.cpsrV=s.cpsrV,this.cpsrC=s.cpsrC,this.cpsrZ=s.cpsrZ,this.cpsrN=s.cpsrN,this.bankedRegisters[0][0]=s.bankedRegisters[0][0],this.bankedRegisters[0][1]=s.bankedRegisters[0][1],this.bankedRegisters[0][2]=s.bankedRegisters[0][2],this.bankedRegisters[0][3]=s.bankedRegisters[0][3],this.bankedRegisters[0][4]=s.bankedRegisters[0][4],this.bankedRegisters[0][5]=s.bankedRegisters[0][5],this.bankedRegisters[0][6]=s.bankedRegisters[0][6],this.bankedRegisters[1][0]=s.bankedRegisters[1][0],this.bankedRegisters[1][1]=s.bankedRegisters[1][1],this.bankedRegisters[1][2]=s.bankedRegisters[1][2],this.bankedRegisters[1][3]=s.bankedRegisters[1][3],this.bankedRegisters[1][4]=s.bankedRegisters[1][4],this.bankedRegisters[1][5]=s.bankedRegisters[1][5],this.bankedRegisters[1][6]=s.bankedRegisters[1][6],this.bankedRegisters[2][0]=s.bankedRegisters[2][0],this.bankedRegisters[2][1]=s.bankedRegisters[2][1],this.bankedRegisters[3][0]=s.bankedRegisters[3][0],this.bankedRegisters[3][1]=s.bankedRegisters[3][1],this.bankedRegisters[4][0]=s.bankedRegisters[4][0],this.bankedRegisters[4][1]=s.bankedRegisters[4][1],this.bankedRegisters[5][0]=s.bankedRegisters[5][0],this.bankedRegisters[5][1]=s.bankedRegisters[5][1],this.spsr=s.spsr,this.bankedSPSRs[0]=s.bankedSPSRs[0],this.bankedSPSRs[1]=s.bankedSPSRs[1],this.bankedSPSRs[2]=s.bankedSPSRs[2],this.bankedSPSRs[3]=s.bankedSPSRs[3],this.bankedSPSRs[4]=s.bankedSPSRs[4],this.bankedSPSRs[5]=s.bankedSPSRs[5],this.cycles=s.cycles,this.instructionWidth=s.instructionWidth,this.loadInstruction=s.instructionWidth==2?this.loadInstructionThumb:this.loadInstructionArm,this.execMode=s.instructionWidth==2?1:0};R.prototype.fetchPage=function(s){var e=this.mmu,i=s>>>e.BASE_OFFSET,t=e.addressToPage(i,s&e.OFFSET_MASK);if(i==this.pageRegion){if(t==this.pageId&&!this.page.invalid)return;this.pageId=t}else this.pageMask=e.memory[i].PAGE_MASK,this.pageRegion=i,this.pageId=t;this.page=e.accessPage(i,t)};R.prototype.loadInstructionArm=function(s){var e=null;this.fetchPage(s);var i=(s&this.pageMask)>>2;if(e=this.page.arm[i],e)return e;var t=this.mmu.load32(s)>>>0;return e=this.compileArm(t),e.next=null,e.page=this.page,e.address=s,e.opcode=t,this.page.arm[i]=e,e};R.prototype.loadInstructionThumb=function(s){var e=null;this.fetchPage(s);var i=(s&this.pageMask)>>1;if(e=this.page.thumb[i],e)return e;var t=this.mmu.load16(s);return e=this.compileThumb(t),e.next=null,e.page=this.page,e.address=s,e.opcode=t,this.page.thumb[i]=e,e};R.prototype.selectBank=function(s){switch(s){case 16:case 31:return 0;case 17:return 1;case 18:return 2;case 19:return 3;case 23:return 4;case 27:return 5;default:throw new y("Invalid user mode "+s+" passed to selectBank")}};R.prototype.switchExecMode=function(s){this.execMode!=s&&(this.execMode=s,s==0?(this.instructionWidth=4,this.loadInstruction=this.loadInstructionArm):(this.instructionWidth=2,this.loadInstruction=this.loadInstructionThumb))};R.prototype.switchMode=function(s){if(s!=this.mode){if(s!=16||s!=31){var e=this.selectBank(s),i=this.selectBank(this.mode);if(e!=i){if(s==17||this.mode==17){var t=i==1?1:0,r=e==1?1:0;this.bankedRegisters[t][2]=this.gprs[8],this.bankedRegisters[t][3]=this.gprs[9],this.bankedRegisters[t][4]=this.gprs[10],this.bankedRegisters[t][5]=this.gprs[11],this.bankedRegisters[t][6]=this.gprs[12],this.gprs[8]=this.bankedRegisters[r][2],this.gprs[9]=this.bankedRegisters[r][3],this.gprs[10]=this.bankedRegisters[r][4],this.gprs[11]=this.bankedRegisters[r][5],this.gprs[12]=this.bankedRegisters[r][6]}this.bankedRegisters[i][0]=this.gprs[13],this.bankedRegisters[i][1]=this.gprs[14],this.gprs[13]=this.bankedRegisters[e][0],this.gprs[14]=this.bankedRegisters[e][1],this.bankedSPSRs[i]=this.spsr,this.spsr=this.bankedSPSRs[e]}}this.mode=s}};R.prototype.packCPSR=function(){return this.mode|this.execMode<<5|this.cpsrF<<6|this.cpsrI<<7|this.cpsrN<<31|this.cpsrZ<<30|this.cpsrC<<29|this.cpsrV<<28};R.prototype.unpackCPSR=function(s){this.switchMode(s&31),this.switchExecMode(!!(s&32)),this.cpsrF=s&64,this.cpsrI=s&128,this.cpsrN=s&2147483648,this.cpsrZ=s&1073741824,this.cpsrC=s&536870912,this.cpsrV=s&268435456,this.irq.testIRQ()};R.prototype.hasSPSR=function(){return this.mode!=31&&this.mode!=16};R.prototype.raiseIRQ=function(){if(!this.cpsrI){var s=this.packCPSR(),e=this.instructionWidth;this.switchMode(18),this.spsr=s,this.gprs[14]=this.gprs[15]-e+4,this.gprs[15]=this.BASE_IRQ+4,this.instruction=null,this.switchExecMode(0),this.cpsrI=!0}};R.prototype.raiseTrap=function(){var s=this.packCPSR(),e=this.instructionWidth;this.switchMode(19),this.spsr=s,this.gprs[14]=this.gprs[15]-e,this.gprs[15]=this.BASE_SWI+4,this.instruction=null,this.switchExecMode(0),this.cpsrI=!0};R.prototype.badOp=function(s){var e=function(){throw new y("Illegal instruction: 0x"+s.toString(16))};return e.writesPC=!0,e.fixedJump=!1,e};R.prototype.generateConds=function(){var s=this;this.conds=[function(){return s.conditionPassed=s.cpsrZ},function(){return s.conditionPassed=!s.cpsrZ},function(){return s.conditionPassed=s.cpsrC},function(){return s.conditionPassed=!s.cpsrC},function(){return s.conditionPassed=s.cpsrN},function(){return s.conditionPassed=!s.cpsrN},function(){return s.conditionPassed=s.cpsrV},function(){return s.conditionPassed=!s.cpsrV},function(){return s.conditionPassed=s.cpsrC&&!s.cpsrZ},function(){return s.conditionPassed=!s.cpsrC||s.cpsrZ},function(){return s.conditionPassed=!s.cpsrN==!s.cpsrV},function(){return s.conditionPassed=!s.cpsrN!=!s.cpsrV},function(){return s.conditionPassed=!s.cpsrZ&&!s.cpsrN==!s.cpsrV},function(){return s.conditionPassed=s.cpsrZ||!s.cpsrN!=!s.cpsrV},null,null]};R.prototype.barrelShiftImmediate=function(s,e,i){var t=this,r=this.gprs,a=this.badOp;switch(s){case 0:e?a=function(){t.shifterOperand=r[i]<>>e,t.shifterCarryOut=r[i]&1<>e,t.shifterCarryOut=r[i]&1<>>e|r[i]<<32-e,t.shifterCarryOut=r[i]&1<>>1,t.shifterCarryOut=r[i]&1};break}return a};R.prototype.compileArm=function(s){var e=this.badOp(s),i=s&234881024,t=this,r=this.gprs,a=this.conds[(s&4026531840)>>>28];if((s&268435440)==19922704){var c=s&15;e=this.armCompiler.constructBX(c,a),e.writesPC=!0,e.fixedJump=!1}else if(!(s&201326592)&&(i==33554432||(s&144)!=144)){var p=s&31457280,n=s&1048576,o=!1;if((p&25165824)==16777216&&!n){var v=s&4194304;if((s&11595776)==2158592){var c=s&15,x=s&255,w=(s&3840)>>7;x=x>>>w|x<<32-w,e=this.armCompiler.constructMSR(c,v,s,x,a),e.writesPC=!1}else if((s&12517376)==983040){var h=(s&61440)>>12;e=this.armCompiler.constructMRS(h,v,a),e.writesPC=h==15}}else{var f=(s&983040)>>16,h=(s&61440)>>12,l=s&96,c=s&15,C=function(){throw new y("BUG: invalid barrel shifter")};if(s&33554432){var x=s&255,V=(s&3840)>>7;V?C=this.armCompiler.constructAddressingMode1ImmediateRotate(x,V):C=this.armCompiler.constructAddressingMode1Immediate(x)}else if(s&16){var P=(s&3840)>>8;switch(o=!0,l){case 0:C=this.armCompiler.constructAddressingMode1LSL(P,c);break;case 32:C=this.armCompiler.constructAddressingMode1LSR(P,c);break;case 64:C=this.armCompiler.constructAddressingMode1ASR(P,c);break;case 96:C=this.armCompiler.constructAddressingMode1ROR(P,c);break}}else{var x=(s&3968)>>7;C=this.barrelShiftImmediate(l,x,c)}switch(p){case 0:n?e=this.armCompiler.constructANDS(h,f,C,a):e=this.armCompiler.constructAND(h,f,C,a);break;case 2097152:n?e=this.armCompiler.constructEORS(h,f,C,a):e=this.armCompiler.constructEOR(h,f,C,a);break;case 4194304:n?e=this.armCompiler.constructSUBS(h,f,C,a):e=this.armCompiler.constructSUB(h,f,C,a);break;case 6291456:n?e=this.armCompiler.constructRSBS(h,f,C,a):e=this.armCompiler.constructRSB(h,f,C,a);break;case 8388608:n?e=this.armCompiler.constructADDS(h,f,C,a):e=this.armCompiler.constructADD(h,f,C,a);break;case 10485760:n?e=this.armCompiler.constructADCS(h,f,C,a):e=this.armCompiler.constructADC(h,f,C,a);break;case 12582912:n?e=this.armCompiler.constructSBCS(h,f,C,a):e=this.armCompiler.constructSBC(h,f,C,a);break;case 14680064:n?e=this.armCompiler.constructRSCS(h,f,C,a):e=this.armCompiler.constructRSC(h,f,C,a);break;case 16777216:e=this.armCompiler.constructTST(h,f,C,a);break;case 18874368:e=this.armCompiler.constructTEQ(h,f,C,a);break;case 20971520:e=this.armCompiler.constructCMP(h,f,C,a);break;case 23068672:e=this.armCompiler.constructCMN(h,f,C,a);break;case 25165824:n?e=this.armCompiler.constructORRS(h,f,C,a):e=this.armCompiler.constructORR(h,f,C,a);break;case 27262976:n?e=this.armCompiler.constructMOVS(h,f,C,a):e=this.armCompiler.constructMOV(h,f,C,a);break;case 29360128:n?e=this.armCompiler.constructBICS(h,f,C,a):e=this.armCompiler.constructBIC(h,f,C,a);break;case 31457280:n?e=this.armCompiler.constructMVNS(h,f,C,a):e=this.armCompiler.constructMVN(h,f,C,a);break}e.writesPC=h==15}}else if((s&263196656)==16777360){var c=s&15,h=s>>12&15,f=s>>16&15;s&4194304?e=this.armCompiler.constructSWPB(h,f,c,a):e=this.armCompiler.constructSWP(h,f,c,a),e.writesPC=h==15}else switch(i){case 0:if((s&16777456)==144){var h=(s&983040)>>16,f=(s&61440)>>12,P=(s&3840)>>8,c=s&15;switch(s&15728640){case 0:e=this.armCompiler.constructMUL(h,P,c,a);break;case 1048576:e=this.armCompiler.constructMULS(h,P,c,a);break;case 2097152:e=this.armCompiler.constructMLA(h,f,P,c,a);break;case 3145728:e=this.armCompiler.constructMLAS(h,f,P,c,a);break;case 8388608:e=this.armCompiler.constructUMULL(h,f,P,c,a);break;case 9437184:e=this.armCompiler.constructUMULLS(h,f,P,c,a);break;case 10485760:e=this.armCompiler.constructUMLAL(h,f,P,c,a);break;case 11534336:e=this.armCompiler.constructUMLALS(h,f,P,c,a);break;case 12582912:e=this.armCompiler.constructSMULL(h,f,P,c,a);break;case 13631488:e=this.armCompiler.constructSMULLS(h,f,P,c,a);break;case 14680064:e=this.armCompiler.constructSMLAL(h,f,P,c,a);break;case 15728640:e=this.armCompiler.constructSMLALS(h,f,P,c,a);break}e.writesPC=h==15}else{var T=s&1048576,h=(s&61440)>>12,cr=(s&3840)>>4,ur=c=s&15,H=s&32,n=s&64,k=s&2097152,i=s&4194304,d;if(i){var x=ur|cr;d=this.armCompiler.constructAddressingMode23Immediate(s,x,a)}else d=this.armCompiler.constructAddressingMode23Register(s,c,a);d.writesPC=!!k&&f==15,(s&144)==144&&(T?H?n?e=this.armCompiler.constructLDRSH(h,d,a):e=this.armCompiler.constructLDRH(h,d,a):n&&(e=this.armCompiler.constructLDRSB(h,d,a)):!n&&H&&(e=this.armCompiler.constructSTRH(h,d,a))),e.writesPC=h==15||d.writesPC}break;case 67108864:case 100663296:var h=(s&61440)>>12,T=s&1048576,W=s&4194304,i=s&33554432,d=function(){throw new y("Unimplemented memory access: 0x"+s.toString(16))};if(~s&16777216&&(s&=4292870143),i){var c=s&15,l=s&96,K=(s&3968)>>7;l||K?(C=this.barrelShiftImmediate(l,K,c),d=this.armCompiler.constructAddressingMode2RegisterShifted(s,C,a)):d=this.armCompiler.constructAddressingMode23Register(s,c,a)}else{var M=s&4095;d=this.armCompiler.constructAddressingMode23Immediate(s,M,a)}T?W?e=this.armCompiler.constructLDRB(h,d,a):e=this.armCompiler.constructLDR(h,d,a):W?e=this.armCompiler.constructSTRB(h,d,a):e=this.armCompiler.constructSTR(h,d,a),e.writesPC=T&&(h==15||d.writesPC);break;case 134217728:var T=s&1048576,k=s&2097152,Q=s&4194304,pr=s&8388608,G=s&16777216,P=s&65535,f=(s&983040)>>16,d,x=0,M=0,B=!1;if(pr){G&&(x=4);for(var A=1,i=0;i<16;A<<=1,++i)P&A&&(k&&i==f&&!M&&(P&=~A,x+=4,B=!0),M+=4)}else{G||(x=4);for(var A=1,i=0;i<16;A<<=1,++i)P&A&&(k&&i==f&&!M&&(P&=~A,x+=4,B=!0),x-=4,M-=4)}k?d=this.armCompiler.constructAddressingMode4Writeback(x,M,f,B):d=this.armCompiler.constructAddressingMode4(x,f),T?(Q?e=this.armCompiler.constructLDMS(P,d,a):e=this.armCompiler.constructLDM(P,d,a),e.writesPC=!!(P&1<<15)):(Q?e=this.armCompiler.constructSTMS(P,d,a):e=this.armCompiler.constructSTM(P,d,a),e.writesPC=!1);break;case 167772160:var x=s&16777215;x&8388608&&(x|=4278190080),x<<=2;var nr=s&16777216;nr?e=this.armCompiler.constructBL(x,a):e=this.armCompiler.constructB(x,a),e.writesPC=!0,e.fixedJump=!0;break;case 201326592:break;case 234881024:if((s&251658240)==251658240){var x=s&16777215;e=this.armCompiler.constructSWI(x,a),e.writesPC=!1}break;default:throw new y("Bad opcode: 0x"+s.toString(16))}return e.execMode=0,e.fixedJump=e.fixedJump||!1,e};R.prototype.compileThumb=function(s){var e=this.badOp(s&65535),i=this,t=this.gprs;if((s&64512)==16384){var r=(s&56)>>3,a=s&7;switch(s&960){case 0:e=this.thumbCompiler.constructAND(a,r);break;case 64:e=this.thumbCompiler.constructEOR(a,r);break;case 128:e=this.thumbCompiler.constructLSL2(a,r);break;case 192:e=this.thumbCompiler.constructLSR2(a,r);break;case 256:e=this.thumbCompiler.constructASR2(a,r);break;case 320:e=this.thumbCompiler.constructADC(a,r);break;case 384:e=this.thumbCompiler.constructSBC(a,r);break;case 448:e=this.thumbCompiler.constructROR(a,r);break;case 512:e=this.thumbCompiler.constructTST(a,r);break;case 576:e=this.thumbCompiler.constructNEG(a,r);break;case 640:e=this.thumbCompiler.constructCMP2(a,r);break;case 704:e=this.thumbCompiler.constructCMN(a,r);break;case 768:e=this.thumbCompiler.constructORR(a,r);break;case 832:e=this.thumbCompiler.constructMUL(a,r);break;case 896:e=this.thumbCompiler.constructBIC(a,r);break;case 960:e=this.thumbCompiler.constructMVN(a,r);break}e.writesPC=!1}else if((s&64512)==17408){var r=(s&120)>>3,c=s&7,p=s&128,a=c|p>>4;switch(s&768){case 0:e=this.thumbCompiler.constructADD4(a,r),e.writesPC=a==15;break;case 256:e=this.thumbCompiler.constructCMP3(a,r),e.writesPC=!1;break;case 512:e=this.thumbCompiler.constructMOV3(a,r),e.writesPC=a==15;break;case 768:e=this.thumbCompiler.constructBX(a,r),e.writesPC=!0,e.fixedJump=!1;break}}else if((s&63488)==6144){var r=(s&448)>>6,c=(s&56)>>3,a=s&7;switch(s&1536){case 0:e=this.thumbCompiler.constructADD3(a,c,r);break;case 512:e=this.thumbCompiler.constructSUB3(a,c,r);break;case 1024:var n=(s&448)>>6;n?e=this.thumbCompiler.constructADD1(a,c,n):e=this.thumbCompiler.constructMOV2(a,c,r);break;case 1536:var n=(s&448)>>6;e=this.thumbCompiler.constructSUB1(a,c,n);break}e.writesPC=!1}else if(s&57344)if((s&57344)==8192){var n=s&255,c=(s&1792)>>8;switch(s&6144){case 0:e=this.thumbCompiler.constructMOV1(c,n);break;case 2048:e=this.thumbCompiler.constructCMP1(c,n);break;case 4096:e=this.thumbCompiler.constructADD2(c,n);break;case 6144:e=this.thumbCompiler.constructSUB2(c,n);break}e.writesPC=!1}else if((s&63488)==18432){var a=(s&1792)>>8,n=(s&255)<<2;e=this.thumbCompiler.constructLDR3(a,n),e.writesPC=!1}else if((s&61440)==20480){var a=s&7,c=(s&56)>>3,r=(s&448)>>6,o=s&3584;switch(o){case 0:e=this.thumbCompiler.constructSTR2(a,c,r);break;case 512:e=this.thumbCompiler.constructSTRH2(a,c,r);break;case 1024:e=this.thumbCompiler.constructSTRB2(a,c,r);break;case 1536:e=this.thumbCompiler.constructLDRSB(a,c,r);break;case 2048:e=this.thumbCompiler.constructLDR2(a,c,r);break;case 2560:e=this.thumbCompiler.constructLDRH2(a,c,r);break;case 3072:e=this.thumbCompiler.constructLDRB2(a,c,r);break;case 3584:e=this.thumbCompiler.constructLDRSH(a,c,r);break}e.writesPC=!1}else if((s&57344)==24576){var a=s&7,c=(s&56)>>3,n=(s&1984)>>4,v=s&4096;v&&(n>>=2);var x=s&2048;x?v?e=this.thumbCompiler.constructLDRB1(a,c,n):e=this.thumbCompiler.constructLDR1(a,c,n):v?e=this.thumbCompiler.constructSTRB1(a,c,n):e=this.thumbCompiler.constructSTR1(a,c,n),e.writesPC=!1}else if((s&62976)==46080){var w=!!(s&256),h=s&255;s&2048?(e=this.thumbCompiler.constructPOP(h,w),e.writesPC=w,e.fixedJump=!1):(e=this.thumbCompiler.constructPUSH(h,w),e.writesPC=!1)}else if(s&32768)switch(s&28672){case 0:var a=s&7,c=(s&56)>>3,n=(s&1984)>>5;s&2048?e=this.thumbCompiler.constructLDRH1(a,c,n):e=this.thumbCompiler.constructSTRH1(a,c,n),e.writesPC=!1;break;case 4096:var a=(s&1792)>>8,n=(s&255)<<2,x=s&2048;x?e=this.thumbCompiler.constructLDR4(a,n):e=this.thumbCompiler.constructSTR3(a,n),e.writesPC=!1;break;case 8192:var a=(s&1792)>>8,n=(s&255)<<2;s&2048?e=this.thumbCompiler.constructADD6(a,n):e=this.thumbCompiler.constructADD5(a,n),e.writesPC=!1;break;case 12288:if(!(s&3840)){var v=s&128,n=(s&127)<<2;v&&(n=-n),e=this.thumbCompiler.constructADD7(n),e.writesPC=!1}break;case 16384:var c=(s&1792)>>8,h=s&255;s&2048?e=this.thumbCompiler.constructLDMIA(c,h):e=this.thumbCompiler.constructSTMIA(c,h),e.writesPC=!1;break;case 20480:var f=(s&3840)>>8,n=s&255;if(f==15)e=this.thumbCompiler.constructSWI(n),e.writesPC=!1;else{s&128&&(n|=4294967040),n<<=1;var l=this.conds[f];e=this.thumbCompiler.constructB1(n,l),e.writesPC=!0,e.fixedJump=!0}break;case 24576:case 28672:var n=s&2047,C=s&6144;switch(C){case 0:n&1024&&(n|=4294965248),n<<=1,e=this.thumbCompiler.constructB2(n),e.writesPC=!0,e.fixedJump=!0;break;case 2048:break;case 4096:n&1024&&(n|=4294966272),n<<=12,e=this.thumbCompiler.constructBL1(n),e.writesPC=!1;break;case 6144:e=this.thumbCompiler.constructBL2(n),e.writesPC=!0,e.fixedJump=!1;break}break;default:throw new y("Undefined instruction: 0x"+s.toString(16))}else throw new y("Bad opcode: 0x"+s.toString(16));else{var a=s&7,r=(s&56)>>3,n=(s&1984)>>6;switch(s&6144){case 0:e=this.thumbCompiler.constructLSL1(a,r,n);break;case 2048:e=this.thumbCompiler.constructLSR1(a,r,n);break;case 4096:e=this.thumbCompiler.constructASR1(a,r,n);break;case 6144:break}e.writesPC=!1}return e.execMode=1,e.fixedJump=e.fixedJump||!1,e};var U=class{constructor(){this.BASE_OFFSET=24;this.OFFSET_MASK=16777215;this.core=new R,this.core.irq=this,this.core.mmu=this,this.resetMemory()}resetMemory(){this.memory=[];for(var e=0;e<256;e++){var i=10,t=524288;this.memory[e]={PAGE_MASK:(2<0?e:1}getPC(){return this.core.gprs[15]-this.core.instructionWidth}getSP(){return this.core.gprs[13]}isStable(){return!0}connectMemoryBus(e){this.bus=e}reset(){this.resetMemory(),this.core.resetCPU(0)}saveState(){return this.core.freeze()}loadState(e){this.core.defrost(e)}load8(e){return this.bus.read(e)<<24>>24}loadU8(e){return this.bus.read(e)&255}load16(e){return this.loadU16(e)<<16>>16}loadU16(e){return this.bus.read(e)|this.bus.read(e+1)<<8}load32(e){var i=this.bus.read(e)|this.bus.read(e+1)<<8|this.bus.read(e+2)<<16|this.bus.read(e+3)<<24;return i}store8(e,i){this.bus.write(e,i&255)}store16(e,i){this.bus.write(e,i&255),this.bus.write(e+1,i>>8&255)}store32(e,i){this.bus.write(e,i&255),this.bus.write(e+1,i>>8&255),this.bus.write(e+2,i>>16&255),this.bus.write(e+3,i>>24&255)}wait(e){++this.core.cycles}wait32(e){++this.core.cycles}waitSeq32(e){++this.core.cycles}waitMul(e){(e&4294967040)==4294967040||!(e&4294967040)?this.core.cycles+=1:(e&4294901760)==4294901760||!(e&4294901760)?this.core.cycles+=2:(e&4278190080)==4278190080||!(e&4278190080)?this.core.cycles+=3:this.core.cycles+=4}waitMulti32(e,i){this.core.cycles+=2}waitPrefetch(e){++this.core.cycles}waitPrefetch32(e){++this.core.cycles}addressToPage(e,i){return i>>this.memory[e].ICACHE_PAGE_BITS}accessPage(e,i){var t=this.memory[e],r=t.icache[i];return(!r||r.invalid)&&(r={thumb:new Array(1<>16)}clear(){}updateTimers(){}testIRQ(){}isThumb(){return this.core.instructionWidth==2}};var Fr=X([[S.A,0,1],[S.B,0,2],[S.GP_A,0,1],[S.GP_B,0,2],[S.SELECT,0,4],[S.START,0,8],[S.RIGHT,0,16],[S.LEFT,0,32],[S.UP,0,64],[S.DOWN,0,128]]),er=0,tr=524288,I=33554432,D=524288,O=67108864,_=256,hr=1e6,sr=4e6,Z=class extends q{constructor(){super();this.cpuFrequency=sr;this.canvasWidth=160;this.numTotalScanlines=256;this.numVisibleScanlines=128;this.cpuCyclesPerLine=Math.floor(sr/(256*60));this.defaultROMSize=512*1024;this.sampleRate=1;this.cpu=new U;this.ram=new Uint8Array(96*1024);this.ram16=new Uint16Array(this.ram.buffer);this.vidbase=0;this.brightness=255;this.read=L([[er,er+tr-1,tr-1,e=>this.rom?this.rom[e]:0],[I,I+D-1,D-1,e=>this.ram[e]],[O,O+_-1,_-1,(e,i)=>this.readIO(e)],[0,(1<<31)-1,0,(e,i)=>{throw new y(`Address read out of bounds: 0x${E(e)}`)}]]);this.write=L([[I,I+D-1,D-1,(e,i)=>{this.ram[e]=i}],[O,O+_-1,_-1,(e,i)=>{this.writeIO(e,i)}]]);this.connectCPUMemoryBus(this),this.handler=z(this.inputs,Fr)}connectVideo(e){super.connectVideo(e),this.pixels32=e,this.pixels8=new Uint8Array(e.buffer)}connectSerialIO(e){this.serial=e}reset(){super.reset(),this.serialOut=[],this.serialIn=[]}readIO(e){switch(e){case 0:return this.inputs[0];case 64:return(this.serial.byteAvailable()?128:0)|(this.serial.clearToSend()?64:0);case 68:let i=this.serialIn.shift();return i!=null?(this.serialOut.push(i),i.value):0;default:return 0}}writeIO(e,i){switch(e){case 0:break;case 72:this.serialOut.length>1&1048575,t=this.brightness<<24,r=0;r>5&31)<<11|(a>>10&31)<<19}}getDebugCategories(){return["CPU","Stack"]}getDebugInfo(e,i){switch(e){case"CPU":var t="",r=i.c;let c={2:"Thumb",4:"ARM"},p={15:"PC",14:"LR",13:"SP",12:"IP",11:"FP",9:"SB"};for(var a=0;a<16;a++)t+=N(p[a]||"",3)+N("r"+a,5)+" "+E(r.gprs[a],8)+` -`;return t+="Flags ",t+=r.cpsrN?" N":" -",t+=r.cpsrV?" V":" -",t+=r.cpsrF?" F":" -",t+=r.cpsrZ?" Z":" -",t+=r.cpsrC?" C":" -",t+=r.cpsrI?" I":" -",t+=` -`,t+="MODE "+c[r.instructionWidth]+" "+mr[r.mode]+` -`,t+="SPSR "+E(r.spsr,8)+` -`,t+="cycl "+r.cycles+` -`,t}}saveState(){var e=super.saveState();return e.serial={sin:this.serialIn.slice(0),sout:this.serialOut.slice(0)},e}loadState(e){super.loadState(e),this.serialIn=e.serial.sin,this.serialOut=e.serial.sout}},mr={16:"USER",17:"FIQ",18:"IRQ",19:"SUPERVISOR",23:"ABORT",27:"UNDEFINED",31:"SYSTEM"};var fr=[{id:"vidfill.vasm",name:"Video Memory Fill"}];var Wr=512*1024;var Kr=512*1024;var ir=class extends j{getToolForFilename(e){return e.endsWith(".vasm")?"vasmarm":e.endsWith(".armips")?"armips":"vasmarm"}getPresets(){return fr}getDefaultExtension(){return".vasm"}},ar=class extends ir{constructor(){super(...arguments);this.getMemoryMap=function(){return{main:[{name:"ROM",start:0,size:524288,type:"rom"},{name:"RAM",start:33554432,size:524288,type:"ram"},{name:"I/O",start:67108864,size:256,type:"io"}]}}}async start(){super.start(),console.log("Loading Capstone"),await J("./lib/capstone-arm.min.js"),this.capstone_arm=new cs.Capstone(cs.ARCH_ARM,cs.MODE_ARM),this.capstone_thumb=new cs.Capstone(cs.ARCH_ARM,cs.MODE_THUMB)}newMachine(){return new Z}readAddress(e){return this.machine.read(e)}disassemble(e,i){for(var t=this.machine.cpu.isThumb(),r=t?this.capstone_thumb:this.capstone_arm,a=[],c=0;c<4;c++)a[c]=i(e+c);var p=r.disasm(a,e,4),n=p&&p[0];return n?{nbytes:n.size,line:n.mnemonic+" "+n.op_str,isaddr:n.address>0}:{nbytes:4,line:"???",isaddr:!1}}};Y.arm32=ar;export{ir as BaseARMMachinePlatform}; -//# sourceMappingURL=arm32-R5NJVEXG.js.map diff --git a/gen/arm32-R5NJVEXG.js.map b/gen/arm32-R5NJVEXG.js.map deleted file mode 100644 index 15dce607..00000000 --- a/gen/arm32-R5NJVEXG.js.map +++ /dev/null @@ -1,7 +0,0 @@ -{ - "version": 3, - "sources": ["../src/common/cpu/ARM.ts", "../src/machine/arm32.ts", "../src/platform/arm32.ts"], - "sourcesContent": ["/*\nFrom: https://github.com/endrift/gbajs\n\nCopyright \u00A9 2012 \u2013 2013, Jeffrey Pfau\nAll rights reserved.\n\nRedistribution and use in source and binary forms, with or without\nmodification, are permitted provided that the following conditions are met:\n\n* Redistributions of source code must retain the above copyright notice, this\n list of conditions and the following disclaimer.\n\n* Redistributions in binary form must reproduce the above copyright notice,\n this list of conditions and the following disclaimer in the documentation\n and/or other materials provided with the distribution.\n\nTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\nAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\nIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE\nARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE\nLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR\nCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF\nSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS\nINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN\nCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)\nARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\nPOSSIBILITY OF SUCH DAMAGE.\n*/\n\nimport { Bus, CPU, InstructionBased, SavesState } from \"../devices\";\nimport { EmuHalt } from \"../emu\";\nimport { hex } from \"../util\";\n\ninterface AddressFunction extends Function {\n writesPC? : boolean;\n fixedJump? : boolean;\n}\n\ninterface ARMIRQInterface {\n\tclear() : void;\n\tswi(opcode : number) : void;\n\tswi32(opcode : number) : void;\n\tupdateTimers() : void;\n\ttestIRQ() : void;\n}\n\ninterface ARMMemoryRegion {\n\tPAGE_MASK : number;\n\tICACHE_PAGE_BITS : number;\n\ticache : ARMMemoryPage[];\n}\n\ninterface ARMOperation {\n\tnext : ARMOperation;\n\tpage : ARMMemoryPage;\n\taddress : number;\n\topcode : number;\n}\n\ninterface ARMMemoryPage {\n\tarm : ARMOperation[];\n\tthumb : ARMOperation[];\n\tinvalid : boolean;\n}\n\ninterface ARMMMUInterface {\n\tmemory : ARMMemoryRegion[];\n\tBASE_OFFSET : number;\n\tOFFSET_MASK : number;\n\n\tload8(a: number) : number;\n\tloadU8(a: number) : number;\n\tload16(a: number) : number;\n\tloadU16(a: number) : number;\n\tload32(a: number) : number;\n\tstore8(a: number, v: number) : void;\n\tstore16(a: number, v: number) : void;\n\tstore32(a: number, v: number) : void;\n\n\twait(a: number) : void;\n\twait32(a: number) : void;\n\twaitSeq32(a: number) : void;\n\twaitMul(a: number) : void;\n\twaitMulti32(a: number, total: number) : void;\n\twaitPrefetch(a: number) : void;\n\twaitPrefetch32(a: number) : void;\n\n\taddressToPage(region: number, address: number) : number;\n\taccessPage(region: number, pageId: number) : ARMMemoryPage;\n}\n\nexport interface ARMCoreState {\n\tPC: number,\n\tSP: number,\n\tgprs: number[],\n\tmode: number,\n\tcpsrI: boolean,\n\tcpsrF: boolean,\n\tcpsrV: boolean,\n\tcpsrC: boolean,\n\tcpsrZ: boolean,\n\tcpsrN: boolean,\n\tbankedRegisters: number[][],\n\tspsr: number,\n\tbankedSPSRs: number[],\n\tcycles: number,\n\tinstructionWidth: 2 | 4\n}\n\ninterface ARMCoreType {\n\tgprs: Int32Array;\n\tPC: number;\n\tSP: number;\n\tLR: number;\n\tcycles: number;\n\tmode: number;\n\tshifterOperand: number;\n\tshifterCarryOut: number|boolean;\n\tcpsrN: number|boolean;\n\tcpsrC: number|boolean;\n\tcpsrZ: number|boolean;\n\tcpsrV: number|boolean;\n\tcpsrI: number|boolean;\n\tcpsrF: number|boolean;\n\tspsr: number;\n\tmmu: ARMMMUInterface;\n\tirq : ARMIRQInterface;\n\tinstructionWidth: 2 | 4;\n\n\thasSPSR() : boolean;\n\tunpackCPSR(v : number) : void;\n\tswitchMode(mode : number) : void;\n\tswitchExecMode(mode : number) : void;\n\tpackCPSR() : number;\n\n\tstep() : void;\n\tresetCPU(startOffset : number) : void;\n\tfreeze() : ARMCoreState;\n\tdefrost(state: ARMCoreState) : void;\n\n\traiseIRQ() : void;\n\traiseTrap(irqType? : number) : void;\n}\n\nexport enum ARMMode {\n\tMODE_ARM = 0,\n\tMODE_THUMB = 1,\n\t\n\tMODE_USER = 0x10,\n\tMODE_FIQ = 0x11,\n\tMODE_IRQ = 0x12,\n\tMODE_SUPERVISOR = 0x13,\n\tMODE_ABORT = 0x17,\n\tMODE_UNDEFINED = 0x1B,\n\tMODE_SYSTEM = 0x1F\n}\n\nexport enum ARMRegs {\n\tSP = 13,\n\tLR = 14,\n\tPC = 15,\n}\n\nexport enum ARMConstants {\n\n\tBANK_NONE = 0,\n\tBANK_FIQ = 1,\n\tBANK_IRQ = 2,\n\tBANK_SUPERVISOR = 3,\n\tBANK_ABORT = 4,\n\tBANK_UNDEFINED = 5,\n\n\tWORD_SIZE_ARM = 4,\n\tWORD_SIZE_THUMB = 2,\n\n\tBASE_RESET = 0x00000000,\n\tBASE_UNDEF = 0x00000004,\n\tBASE_SWI = 0x00000008,\n\tBASE_PABT = 0x0000000C,\n\tBASE_DABT = 0x00000010,\n\tBASE_IRQ = 0x00000018,\n\tBASE_FIQ = 0x0000001C,\n}\n\nconst UNALLOC_MASK = 0x0FFFFF00;\nconst USER_MASK = 0xF0000000;\nconst PRIV_MASK = 0x000000DF; // This is out of spec? (SEH)\nconst STATE_MASK = 0x00000020;\n\n\n///////////////////////////////////////////////////////////////////////////\n\nfunction ARMCoreArm(cpu: ARMCoreType) {\n\tthis.cpu = cpu;\n\n\tthis.addressingMode23Immediate = [\n\t\t// 000x0\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] -= offset;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\t// 000xW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// 00Ux0\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] += offset;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\t// 00UxW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// 0P0x0\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\treturn /* addr = */ gprs[rn] - offset;\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// 0P0xW\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn] - offset;\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull,\n\n\t\t// 0PUx0\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\treturn /* addr = */ gprs[rn] + offset;\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// 0PUxW\n\t\tfunction(rn, offset, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn] + offset;\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull,\n\t];\n\n\tthis.addressingMode23Register = [\n\t\t// I00x0\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] -= gprs[rm];\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\t// I00xW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// I0Ux0\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] += gprs[rm];\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\t// I0UxW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// IP0x0\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\treturn gprs[rn] - gprs[rm];\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// IP0xW\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn] - gprs[rm];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull,\n\n\t\t// IPUx0\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn] + gprs[rm];\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// IPUxW\n\t\tfunction(rn, rm, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn] + gprs[rm];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull\n\t];\n\n\tthis.addressingMode2RegisterShifted = [\n\t\t// I00x0\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tshiftOp();\n\t\t\t\t\tgprs[rn] -= cpu.shifterOperand;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\t// I00xW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// I0Ux0\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tvar addr = gprs[rn];\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tshiftOp();\n\t\t\t\t\tgprs[rn] += cpu.shifterOperand;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\t\t// I0UxW\n\t\tnull,\n\n\t\tnull,\n\t\tnull,\n\n\t\t// IP0x0\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tshiftOp();\n\t\t\t\treturn gprs[rn] - cpu.shifterOperand;\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// IP0xW\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tshiftOp();\n\t\t\t\tvar addr = gprs[rn] - cpu.shifterOperand;\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull,\n\n\t\t// IPUx0\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tshiftOp();\n\t\t\t\treturn gprs[rn] + cpu.shifterOperand;\n\t\t\t};\n\t\t\taddress.writesPC = false;\n\t\t\treturn address;\n\t\t},\n\n\t\t// IPUxW\n\t\tfunction(rn, shiftOp, condOp) {\n\t\t\tvar gprs = cpu.gprs;\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tshiftOp();\n\t\t\t\tvar addr = gprs[rn] + cpu.shifterOperand;\n\t\t\t\tif (!condOp || condOp()) {\n\t\t\t\t\tgprs[rn] = addr;\n\t\t\t\t}\n\t\t\t\treturn addr;\n\t\t\t};\n\t\t\taddress.writesPC = rn == ARMRegs.PC;\n\t\t\treturn address;\n\t\t},\n\n\t\tnull,\n\t\tnull,\n\t];\n}\n\nARMCoreArm.prototype.constructAddressingMode1ASR = function(rs, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\t++cpu.cycles;\n\t\tvar shift = gprs[rs];\n\t\tif (rs == ARMRegs.PC) {\n\t\t\tshift += 4;\n\t\t}\n\t\tshift &= 0xFF;\n\t\tvar shiftVal = gprs[rm];\n\t\tif (rm == ARMRegs.PC) {\n\t\t\tshiftVal += 4;\n\t\t}\n\t\tif (shift == 0) {\n\t\t\tcpu.shifterOperand = shiftVal;\n\t\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t\t} else if (shift < 32) {\n\t\t\tcpu.shifterOperand = shiftVal >> shift;\n\t\t\tcpu.shifterCarryOut = shiftVal & (1 << (shift - 1));\n\t\t} else if (gprs[rm] >> 31) {\n\t\t\tcpu.shifterOperand = 0xFFFFFFFF;\n\t\t\tcpu.shifterCarryOut = 0x80000000;\n\t\t} else {\n\t\t\tcpu.shifterOperand = 0;\n\t\t\tcpu.shifterCarryOut = 0;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructAddressingMode1Immediate = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\treturn function() {\n\t\tcpu.shifterOperand = immediate;\n\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t};\n};\n\nARMCoreArm.prototype.constructAddressingMode1ImmediateRotate = function(immediate, rotate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\treturn function() {\n\t\tcpu.shifterOperand = (immediate >>> rotate) | (immediate << (32 - rotate));\n\t\tcpu.shifterCarryOut = cpu.shifterOperand >> 31;\n\t}\n};\n\nARMCoreArm.prototype.constructAddressingMode1LSL = function(rs, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\t++cpu.cycles;\n\t\tvar shift = gprs[rs];\n\t\tif (rs == ARMRegs.PC) {\n\t\t\tshift += 4;\n\t\t}\n\t\tshift &= 0xFF;\n\t\tvar shiftVal = gprs[rm];\n\t\tif (rm == ARMRegs.PC) {\n\t\t\tshiftVal += 4;\n\t\t}\n\t\tif (shift == 0) {\n\t\t\tcpu.shifterOperand = shiftVal;\n\t\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t\t} else if (shift < 32) {\n\t\t\tcpu.shifterOperand = shiftVal << shift;\n\t\t\tcpu.shifterCarryOut = shiftVal & (1 << (32 - shift));\n\t\t} else if (shift == 32) {\n\t\t\tcpu.shifterOperand = 0;\n\t\t\tcpu.shifterCarryOut = shiftVal & 1;\n\t\t} else {\n\t\t\tcpu.shifterOperand = 0;\n\t\t\tcpu.shifterCarryOut = 0;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructAddressingMode1LSR = function(rs, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\t++cpu.cycles;\n\t\tvar shift = gprs[rs];\n\t\tif (rs == ARMRegs.PC) {\n\t\t\tshift += 4;\n\t\t}\n\t\tshift &= 0xFF;\n\t\tvar shiftVal = gprs[rm];\n\t\tif (rm == ARMRegs.PC) {\n\t\t\tshiftVal += 4;\n\t\t}\n\t\tif (shift == 0) {\n\t\t\tcpu.shifterOperand = shiftVal;\n\t\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t\t} else if (shift < 32) {\n\t\t\tcpu.shifterOperand = shiftVal >>> shift;\n\t\t\tcpu.shifterCarryOut = shiftVal & (1 << (shift - 1));\n\t\t} else if (shift == 32) {\n\t\t\tcpu.shifterOperand = 0;\n\t\t\tcpu.shifterCarryOut = shiftVal >> 31;\n\t\t} else {\n\t\t\tcpu.shifterOperand = 0;\n\t\t\tcpu.shifterCarryOut = 0;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructAddressingMode1ROR = function(rs, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\t++cpu.cycles;\n\t\tvar shift = gprs[rs];\n\t\tif (rs == ARMRegs.PC) {\n\t\t\tshift += 4;\n\t\t}\n\t\tshift &= 0xFF;\n\t\tvar shiftVal = gprs[rm];\n\t\tif (rm == ARMRegs.PC) {\n\t\t\tshiftVal += 4;\n\t\t}\n\t\tvar rotate = shift & 0x1F;\n\t\tif (shift == 0) {\n\t\t\tcpu.shifterOperand = shiftVal;\n\t\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t\t} else if (rotate) {\n\t\t\tcpu.shifterOperand = (gprs[rm] >>> rotate) | (gprs[rm] << (32 - rotate));\n\t\t\tcpu.shifterCarryOut = shiftVal & (1 << (rotate - 1));\n\t\t} else {\n\t\t\tcpu.shifterOperand = shiftVal;\n\t\t\tcpu.shifterCarryOut = shiftVal >> 31;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructAddressingMode23Immediate = function(instruction, immediate, condOp) {\n\tvar rn = (instruction & 0x000F0000) >> 16;\n\treturn this.addressingMode23Immediate[(instruction & 0x01A00000) >> 21](rn, immediate, condOp);\n};\n\nARMCoreArm.prototype.constructAddressingMode23Register = function(instruction, rm, condOp) {\n\tvar rn = (instruction & 0x000F0000) >> 16;\n\treturn this.addressingMode23Register[(instruction & 0x01A00000) >> 21](rn, rm, condOp);\n};\n\nARMCoreArm.prototype.constructAddressingMode2RegisterShifted = function(instruction, shiftOp, condOp) {\n\tvar rn = (instruction & 0x000F0000) >> 16;\n\treturn this.addressingMode2RegisterShifted[(instruction & 0x01A00000) >> 21](rn, shiftOp, condOp);\n};\n\nARMCoreArm.prototype.constructAddressingMode4 = function(immediate, rn) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar addr = gprs[rn] + immediate;\n\t\treturn addr;\n\t}\n};\n\nARMCoreArm.prototype.constructAddressingMode4Writeback = function(immediate, offset, rn, overlap) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function(writeInitial) {\n\t\tvar addr = gprs[rn] + immediate;\n\t\tif (writeInitial && overlap) {\n\t\t\tcpu.mmu.store32(gprs[rn] + immediate - 4, gprs[rn]);\n\t\t}\n\t\tgprs[rn] += offset;\n\t\treturn addr;\n\t}\n};\n\nARMCoreArm.prototype.constructADC = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar shifterOperand = (cpu.shifterOperand >>> 0) + (cpu.cpsrC ? 1 : 0);\n\t\tgprs[rd] = (gprs[rn] >>> 0) + shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructADCS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar shifterOperand = (cpu.shifterOperand >>> 0) + (cpu.cpsrC ? 1 : 0);\n\t\tvar d = (gprs[rn] >>> 0) + shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\t\tcpu.cpsrV = (gprs[rn] >> 31) == (shifterOperand >> 31) &&\n\t\t\t\t\t\t(gprs[rn] >> 31) != (d >> 31) &&\n\t\t\t\t\t\t(shifterOperand >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructADD = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = (gprs[rn] >>> 0) + (cpu.shifterOperand >>> 0);\n\t};\n};\n\nARMCoreArm.prototype.constructADDS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar d = (gprs[rn] >>> 0) + (cpu.shifterOperand >>> 0);\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\t\tcpu.cpsrV = (gprs[rn] >> 31) == (cpu.shifterOperand >> 31) &&\n\t\t\t\t\t\t(gprs[rn] >> 31) != (d >> 31) &&\n\t\t\t\t\t\t(cpu.shifterOperand >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructAND = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] & cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructANDS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] & cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructB = function(immediate, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tgprs[ARMRegs.PC] += immediate;\n\t};\n};\n\nARMCoreArm.prototype.constructBIC = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] & ~cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructBICS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] & ~cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructBL = function(immediate, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tgprs[ARMRegs.LR] = gprs[ARMRegs.PC] - 4;\n\t\tgprs[ARMRegs.PC] += immediate;\n\t};\n};\n\nARMCoreArm.prototype.constructBX = function(rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tcpu.switchExecMode(gprs[rm] & 0x00000001);\n\t\tgprs[ARMRegs.PC] = gprs[rm] & 0xFFFFFFFE;\n\t};\n};\n\nARMCoreArm.prototype.constructCMN = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar aluOut = (gprs[rn] >>> 0) + (cpu.shifterOperand >>> 0);\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = aluOut > 0xFFFFFFFF;\n\t\tcpu.cpsrV = (gprs[rn] >> 31) == (cpu.shifterOperand >> 31) &&\n\t\t\t\t\t(gprs[rn] >> 31) != (aluOut >> 31) &&\n\t\t\t\t\t(cpu.shifterOperand >> 31) != (aluOut >> 31);\n\t};\n};\n\nARMCoreArm.prototype.constructCMP = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar aluOut = gprs[rn] - cpu.shifterOperand;\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= (cpu.shifterOperand >>> 0);\n\t\tcpu.cpsrV = (gprs[rn] >> 31) != (cpu.shifterOperand >> 31) &&\n\t\t\t\t\t(gprs[rn] >> 31) != (aluOut >> 31);\n\t};\n};\n\nARMCoreArm.prototype.constructEOR = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] ^ cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructEORS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] ^ cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructLDM = function(rs, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\tvar mmu = cpu.mmu;\n\treturn function() {\n\t\tmmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address(false);\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tfor (m = rs, i = 0; m; m >>= 1, ++i) {\n\t\t\tif (m & 1) {\n\t\t\t\tgprs[i] = mmu.load32(addr & 0xFFFFFFFC);\n\t\t\t\taddr += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tmmu.waitMulti32(addr, total);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDMS = function(rs, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\tvar mmu = cpu.mmu;\n\treturn function() {\n\t\tmmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address(false);\n\t\tvar total = 0;\n\t\tvar mode = cpu.mode;\n\t\tcpu.switchMode(ARMMode.MODE_SYSTEM);\n\t\tvar m, i;\n\t\tfor (m = rs, i = 0; m; m >>= 1, ++i) {\n\t\t\tif (m & 1) {\n\t\t\t\tgprs[i] = mmu.load32(addr & 0xFFFFFFFC);\n\t\t\t\taddr += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tcpu.switchMode(mode);\n\t\tmmu.waitMulti32(addr, total);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDR = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tgprs[rd] = cpu.mmu.load32(addr);\n\t\tcpu.mmu.wait32(addr);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDRB = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tgprs[rd] = cpu.mmu.loadU8(addr);\n\t\tcpu.mmu.wait(addr);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDRH = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tgprs[rd] = cpu.mmu.loadU16(addr);\n\t\tcpu.mmu.wait(addr);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDRSB = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tgprs[rd] = cpu.mmu.load8(addr);\n\t\tcpu.mmu.wait(addr);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructLDRSH = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tgprs[rd] = cpu.mmu.load16(addr);\n\t\tcpu.mmu.wait(addr);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreArm.prototype.constructMLA = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(rs);\n\t\tif ((gprs[rm] & 0xFFFF0000) && (gprs[rs] & 0xFFFF0000)) {\n\t\t\t// Our data type is a double--we'll lose bits if we do it all at once!\n\t\t\tvar hi = ((gprs[rm] & 0xFFFF0000) * gprs[rs]) & 0xFFFFFFFF;\n\t\t\tvar lo = ((gprs[rm] & 0x0000FFFF) * gprs[rs]) & 0xFFFFFFFF;\n\t\t\tgprs[rd] = (hi + lo + gprs[rn]) & 0xFFFFFFFF;\n\t\t} else {\n\t\t\tgprs[rd] = gprs[rm] * gprs[rs] + gprs[rn];\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructMLAS = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(rs);\n\t\tif ((gprs[rm] & 0xFFFF0000) && (gprs[rs] & 0xFFFF0000)) {\n\t\t\t// Our data type is a double--we'll lose bits if we do it all at once!\n\t\t\tvar hi = ((gprs[rm] & 0xFFFF0000) * gprs[rs]) & 0xFFFFFFFF;\n\t\t\tvar lo = ((gprs[rm] & 0x0000FFFF) * gprs[rs]) & 0xFFFFFFFF;\n\t\t\tgprs[rd] = (hi + lo + gprs[rn]) & 0xFFFFFFFF;\n\t\t} else {\n\t\t\tgprs[rd] = gprs[rm] * gprs[rs] + gprs[rn];\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreArm.prototype.constructMOV = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructMOVS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructMRS = function(rd, r, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tif (r) {\n\t\t\tgprs[rd] = cpu.spsr;\n\t\t} else {\n\t\t\tgprs[rd] = cpu.packCPSR();\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructMSR = function(rm, r, instruction, immediate, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\tvar c = instruction & 0x00010000;\n\t//var x = instruction & 0x00020000;\n\t//var s = instruction & 0x00040000;\n\tvar f = instruction & 0x00080000;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tvar operand;\n\t\tif (instruction & 0x02000000) {\n\t\t\toperand = immediate;\n\t\t} else {\n\t\t\toperand = gprs[rm];\n\t\t}\n\t\tvar mask = (c ? 0x000000FF : 0x00000000) |\n\t\t\t\t //(x ? 0x0000FF00 : 0x00000000) | // Irrelevant on ARMv4T\n\t\t\t\t //(s ? 0x00FF0000 : 0x00000000) | // Irrelevant on ARMv4T\n\t\t\t\t (f ? 0xFF000000 : 0x00000000);\n\t\tif (r) {\n\t\t\tmask &= USER_MASK | PRIV_MASK | STATE_MASK;\n\t\t\t//console.log(hex(r), hex(mask & 0x7fffffff), hex(cpu.spsr), hex(operand));\n\t\t\tcpu.spsr = (cpu.spsr & ~mask) | (operand & mask);\n\t\t} else {\n\t\t\tif (mask & USER_MASK) {\n\t\t\t\tcpu.cpsrN = operand >> 31;\n\t\t\t\tcpu.cpsrZ = operand & 0x40000000;\n\t\t\t\tcpu.cpsrC = operand & 0x20000000;\n\t\t\t\tcpu.cpsrV = operand & 0x10000000;\n\t\t\t}\n\t\t\tif (cpu.mode != ARMMode.MODE_USER && (mask & PRIV_MASK)) {\n\t\t\t\tcpu.switchMode((operand & 0x0000000F) | 0x00000010);\n\t\t\t\tcpu.cpsrI = operand & 0x00000080;\n\t\t\t\tcpu.cpsrF = operand & 0x00000040;\n\t\t\t}\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructMUL = function(rd, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tif ((gprs[rm] & 0xFFFF0000) && (gprs[rs] & 0xFFFF0000)) {\n\t\t\t// Our data type is a double--we'll lose bits if we do it all at once!\n\t\t\tvar hi = ((gprs[rm] & 0xFFFF0000) * gprs[rs]) | 0;\n\t\t\tvar lo = ((gprs[rm] & 0x0000FFFF) * gprs[rs]) | 0;\n\t\t\tgprs[rd] = hi + lo;\n\t\t} else {\n\t\t\tgprs[rd] = gprs[rm] * gprs[rs];\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructMULS = function(rd, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tif ((gprs[rm] & 0xFFFF0000) && (gprs[rs] & 0xFFFF0000)) {\n\t\t\t// Our data type is a double--we'll lose bits if we do it all at once!\n\t\t\tvar hi = ((gprs[rm] & 0xFFFF0000) * gprs[rs]) | 0;\n\t\t\tvar lo = ((gprs[rm] & 0x0000FFFF) * gprs[rs]) | 0;\n\t\t\tgprs[rd] = hi + lo;\n\t\t} else {\n\t\t\tgprs[rd] = gprs[rm] * gprs[rs];\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreArm.prototype.constructMVN = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = ~cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructMVNS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = ~cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructORR = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] | cpu.shifterOperand;\n\t}\n};\n\nARMCoreArm.prototype.constructORRS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] | cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t\t}\n\t};\n};\n\nARMCoreArm.prototype.constructRSB = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = cpu.shifterOperand - gprs[rn];\n\t};\n};\n\nARMCoreArm.prototype.constructRSBS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar d = cpu.shifterOperand - gprs[rn];\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = (cpu.shifterOperand >>> 0) >= (gprs[rn] >>> 0);\n\t\t\tcpu.cpsrV = (cpu.shifterOperand >> 31) != (gprs[rn] >> 31) &&\n\t\t\t\t\t\t(cpu.shifterOperand >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructRSC = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar n = (gprs[rn] >>> 0) + (cpu.cpsrC ? 0 : 1);\n\t\tgprs[rd] = (cpu.shifterOperand >>> 0) - n;\n\t};\n};\n\nARMCoreArm.prototype.constructRSCS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar n = (gprs[rn] >>> 0) + (cpu.cpsrC ? 0 : 1);\n\t\tvar d = (cpu.shifterOperand >>> 0) - n;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = (cpu.shifterOperand >>> 0) >= (d >>> 0);\n\t\t\tcpu.cpsrV = (cpu.shifterOperand >> 31) != (n >> 31) &&\n\t\t\t\t\t\t(cpu.shifterOperand >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructSBC = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar shifterOperand = (cpu.shifterOperand >>> 0) + (cpu.cpsrC ? 0 : 1);\n\t\tgprs[rd] = (gprs[rn] >>> 0) - shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructSBCS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar shifterOperand = (cpu.shifterOperand >>> 0) + (cpu.cpsrC ? 0 : 1);\n\t\tvar d = (gprs[rn] >>> 0) - shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= (d >>> 0);\n\t\t\tcpu.cpsrV = (gprs[rn] >> 31) != (shifterOperand >> 31) &&\n\t\t\t\t\t\t(gprs[rn] >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructSMLAL = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.cycles += 2;\n\t\tcpu.mmu.waitMul(rs);\n\t\tvar hi = (gprs[rm] & 0xFFFF0000) * gprs[rs];\n\t\tvar lo = (gprs[rm] & 0x0000FFFF) * gprs[rs];\n\t\tvar carry = (gprs[rn] >>> 0) + hi + lo;\n\t\tgprs[rn] = carry;\n\t\tgprs[rd] += Math.floor(carry * SHIFT_32);\n\t};\n};\n\nARMCoreArm.prototype.constructSMLALS = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.cycles += 2;\n\t\tcpu.mmu.waitMul(rs);\n\t\tvar hi = (gprs[rm] & 0xFFFF0000) * gprs[rs];\n\t\tvar lo = (gprs[rm] & 0x0000FFFF) * gprs[rs];\n\t\tvar carry = (gprs[rn] >>> 0) + hi + lo;\n\t\tgprs[rn] = carry;\n\t\tgprs[rd] += Math.floor(carry * SHIFT_32);\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !((gprs[rd] & 0xFFFFFFFF) || (gprs[rn] & 0xFFFFFFFF));\n\t};\n};\n\nARMCoreArm.prototype.constructSMULL = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >> 0) * (gprs[rs] >> 0);\n\t\tvar lo = ((gprs[rm] & 0x0000FFFF) >> 0) * (gprs[rs] >> 0);\n\t\tgprs[rn] = ((hi & 0xFFFFFFFF) + (lo & 0xFFFFFFFF)) & 0xFFFFFFFF;\n\t\tgprs[rd] = Math.floor(hi * SHIFT_32 + lo * SHIFT_32);\n\t};\n};\n\nARMCoreArm.prototype.constructSMULLS = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >> 0) * (gprs[rs] >> 0);\n\t\tvar lo = ((gprs[rm] & 0x0000FFFF) >> 0) * (gprs[rs] >> 0);\n\t\tgprs[rn] = ((hi & 0xFFFFFFFF) + (lo & 0xFFFFFFFF)) & 0xFFFFFFFF;\n\t\tgprs[rd] = Math.floor(hi * SHIFT_32 + lo * SHIFT_32);\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !((gprs[rd] & 0xFFFFFFFF) || (gprs[rn] & 0xFFFFFFFF));\n\t};\n};\n\nARMCoreArm.prototype.constructSTM = function(rs, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\tvar mmu = cpu.mmu;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tmmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tmmu.wait32(gprs[ARMRegs.PC]);\n\t\tvar addr = address(true);\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tfor (m = rs, i = 0; m; m >>= 1, ++i) {\n\t\t\tif (m & 1) {\n\t\t\t\tmmu.store32(addr, gprs[i]);\n\t\t\t\taddr += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tmmu.waitMulti32(addr, total);\n\t};\n};\n\nARMCoreArm.prototype.constructSTMS = function(rs, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\tvar mmu = cpu.mmu;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tmmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tmmu.wait32(gprs[ARMRegs.PC]);\n\t\tvar mode = cpu.mode;\n\t\tvar addr = address(true);\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tcpu.switchMode(ARMMode.MODE_SYSTEM);\n\t\tfor (m = rs, i = 0; m; m >>= 1, ++i) {\n\t\t\tif (m & 1) {\n\t\t\t\tmmu.store32(addr, gprs[i]);\n\t\t\t\taddr += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tcpu.switchMode(mode);\n\t\tmmu.waitMulti32(addr, total);\n\t};\n};\n\nARMCoreArm.prototype.constructSTR = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tcpu.mmu.store32(addr, gprs[rd]);\n\t\tcpu.mmu.wait32(addr);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.PC]);\n\t};\n};\n\nARMCoreArm.prototype.constructSTRB = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tcpu.mmu.store8(addr, gprs[rd]);\n\t\tcpu.mmu.wait(addr);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.PC]);\n\t};\n};\n\nARMCoreArm.prototype.constructSTRH = function(rd, address, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tvar addr = address();\n\t\tcpu.mmu.store16(addr, gprs[rd]);\n\t\tcpu.mmu.wait(addr);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.PC]);\n\t};\n};\n\nARMCoreArm.prototype.constructSUB = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tgprs[rd] = gprs[rn] - cpu.shifterOperand;\n\t};\n};\n\nARMCoreArm.prototype.constructSUBS = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar d = gprs[rn] - cpu.shifterOperand;\n\t\tif (rd == ARMRegs.PC && cpu.hasSPSR()) {\n\t\t\tcpu.unpackCPSR(cpu.spsr);\n\t\t} else {\n\t\t\tcpu.cpsrN = d >> 31;\n\t\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= (cpu.shifterOperand >>> 0);\n\t\t\tcpu.cpsrV = (gprs[rn] >> 31) != (cpu.shifterOperand >> 31) &&\n\t\t\t\t\t\t(gprs[rn] >> 31) != (d >> 31);\n\t\t}\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreArm.prototype.constructSWI = function(immediate, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tif (condOp && !condOp()) {\n\t\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\t\treturn;\n\t\t}\n\t\tcpu.irq.swi32(immediate);\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t};\n};\n\nARMCoreArm.prototype.constructSWP = function(rd, rn, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.wait32(gprs[rn]);\n\t\tcpu.mmu.wait32(gprs[rn]);\n\t\tvar d = cpu.mmu.load32(gprs[rn]);\n\t\tcpu.mmu.store32(gprs[rn], gprs[rm]);\n\t\tgprs[rd] = d;\n\t\t++cpu.cycles;\n\t}\n};\n\nARMCoreArm.prototype.constructSWPB = function(rd, rn, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.mmu.wait(gprs[rn]);\n\t\tcpu.mmu.wait(gprs[rn]);\n\t\tvar d = cpu.mmu.loadU8(gprs[rn]);\n\t\tcpu.mmu.store8(gprs[rn], gprs[rm]);\n\t\tgprs[rd] = d;\n\t\t++cpu.cycles;\n\t}\n};\n\nARMCoreArm.prototype.constructTEQ = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar aluOut = gprs[rn] ^ cpu.shifterOperand;\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t};\n};\n\nARMCoreArm.prototype.constructTST = function(rd, rn, shiftOp, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tshiftOp();\n\t\tvar aluOut = gprs[rn] & cpu.shifterOperand;\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = cpu.shifterCarryOut;\n\t};\n};\n\nARMCoreArm.prototype.constructUMLAL = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.cycles += 2;\n\t\tcpu.mmu.waitMul(rs);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >>> 0) * (gprs[rs] >>> 0);\n\t\tvar lo = (gprs[rm] & 0x0000FFFF) * (gprs[rs] >>> 0);\n\t\tvar carry = (gprs[rn] >>> 0) + hi + lo;\n\t\tgprs[rn] = carry;\n\t\tgprs[rd] += carry * SHIFT_32;\n\t};\n};\n\nARMCoreArm.prototype.constructUMLALS = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\tcpu.cycles += 2;\n\t\tcpu.mmu.waitMul(rs);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >>> 0) * (gprs[rs] >>> 0);\n\t\tvar lo = (gprs[rm] & 0x0000FFFF) * (gprs[rs] >>> 0);\n\t\tvar carry = (gprs[rn] >>> 0) + hi + lo;\n\t\tgprs[rn] = carry;\n\t\tgprs[rd] += carry * SHIFT_32;\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !((gprs[rd] & 0xFFFFFFFF) || (gprs[rn] & 0xFFFFFFFF));\n\t};\n};\n\nARMCoreArm.prototype.constructUMULL = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >>> 0) * (gprs[rs] >>> 0);\n\t\tvar lo = ((gprs[rm] & 0x0000FFFF) >>> 0) * (gprs[rs] >>> 0);\n\t\tgprs[rn] = ((hi & 0xFFFFFFFF) + (lo & 0xFFFFFFFF)) & 0xFFFFFFFF;\n\t\tgprs[rd] = (hi * SHIFT_32 + lo * SHIFT_32) >>> 0;\n\t};\n};\n\nARMCoreArm.prototype.constructUMULLS = function(rd, rn, rs, rm, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar SHIFT_32 = 1/0x100000000;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch32(gprs[ARMRegs.PC]);\n\t\tif (condOp && !condOp()) {\n\t\t\treturn;\n\t\t}\n\t\t++cpu.cycles;\n\t\tcpu.mmu.waitMul(gprs[rs]);\n\t\tvar hi = ((gprs[rm] & 0xFFFF0000) >>> 0) * (gprs[rs] >>> 0);\n\t\tvar lo = ((gprs[rm] & 0x0000FFFF) >>> 0) * (gprs[rs] >>> 0);\n\t\tgprs[rn] = ((hi & 0xFFFFFFFF) + (lo & 0xFFFFFFFF)) & 0xFFFFFFFF;\n\t\tgprs[rd] = (hi * SHIFT_32 + lo * SHIFT_32) >>> 0;\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !((gprs[rd] & 0xFFFFFFFF) || (gprs[rn] & 0xFFFFFFFF));\n\t};\n};\n\n///////////////////////////////////////////////////////////////////////////\n\nfunction ARMCoreThumb(cpu) {\n\tthis.cpu = cpu;\n};\n\nARMCoreThumb.prototype.constructADC = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar m = (gprs[rm] >>> 0) + (cpu.cpsrC ? 1 : 0);\n\t\tvar oldD = gprs[rd];\n\t\tvar d = (oldD >>> 0) + m;\n\t\tvar oldDn = oldD >> 31;\n\t\tvar dn = d >> 31;\n\t\tvar mn = m >> 31;\n\t\tcpu.cpsrN = dn;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\tcpu.cpsrV = oldDn == mn && oldDn != dn && mn != dn;\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = (gprs[rn] >>> 0) + immediate;\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\tcpu.cpsrV = !(gprs[rn] >> 31) && ((gprs[rn] >> 31 ^ d) >> 31) && (d >> 31);\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD2 = function(rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = (gprs[rn] >>> 0) + immediate;\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\tcpu.cpsrV = !(gprs[rn] >> 31) && ((gprs[rn] ^ d) >> 31) && ((immediate ^ d) >> 31);\n\t\tgprs[rn] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD3 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = (gprs[rn] >>> 0) + (gprs[rm] >>> 0);\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = d > 0xFFFFFFFF;\n\t\tcpu.cpsrV = !((gprs[rn] ^ gprs[rm]) >> 31) && ((gprs[rn] ^ d) >> 31) && ((gprs[rm] ^ d) >> 31);\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD4 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] += gprs[rm];\n\t};\n};\n\nARMCoreThumb.prototype.constructADD5 = function(rd, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = (gprs[ARMRegs.PC] & 0xFFFFFFFC) + immediate;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD6 = function(rd, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[ARMRegs.SP] + immediate;\n\t};\n};\n\nARMCoreThumb.prototype.constructADD7 = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[ARMRegs.SP] += immediate;\n\t};\n};\n\nARMCoreThumb.prototype.constructAND = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[rd] & gprs[rm];\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructASR1 = function(rd, rm, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tif (immediate == 0) {\n\t\t\tcpu.cpsrC = gprs[rm] >> 31;\n\t\t\tif (cpu.cpsrC) {\n\t\t\t\tgprs[rd] = 0xFFFFFFFF;\n\t\t\t} else {\n\t\t\t\tgprs[rd] = 0;\n\t\t\t}\n\t\t} else {\n\t\t\tcpu.cpsrC = gprs[rm] & (1 << (immediate - 1));\n\t\t\tgprs[rd] = gprs[rm] >> immediate;\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructASR2 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar rs = gprs[rm] & 0xFF;\n\t\tif (rs) {\n\t\t\tif (rs < 32) {\n\t\t\t\tcpu.cpsrC = gprs[rd] & (1 << (rs - 1));\n\t\t\t\tgprs[rd] >>= rs;\n\t\t\t} else {\n\t\t\t\tcpu.cpsrC = gprs[rd] >> 31;\n\t\t\t\tif (cpu.cpsrC) {\n\t\t\t\t\tgprs[rd] = 0xFFFFFFFF;\n\t\t\t\t} else {\n\t\t\t\t\tgprs[rd] = 0;\n\t\t\t\t}\n\t\t\t}\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructB1 = function(immediate, condOp) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tif (condOp()) {\n\t\t\tgprs[ARMRegs.PC] += immediate;\n\t\t}\n\t};\n};\n\nARMCoreThumb.prototype.constructB2 = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[ARMRegs.PC] += immediate;\n\t};\n};\n\nARMCoreThumb.prototype.constructBIC = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[rd] & ~gprs[rm];\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructBL1 = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[ARMRegs.LR] = gprs[ARMRegs.PC] + immediate;\n\t}\n};\n\nARMCoreThumb.prototype.constructBL2 = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar pc = gprs[ARMRegs.PC];\n\t\tgprs[ARMRegs.PC] = gprs[ARMRegs.LR] + (immediate << 1);\n\t\tgprs[ARMRegs.LR] = pc - 1;\n\t}\n};\n\nARMCoreThumb.prototype.constructBX = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tcpu.switchExecMode(gprs[rm] & 0x00000001);\n\t\tvar misalign = 0;\n\t\tif (rm == 15) {\n\t\t\tmisalign = gprs[rm] & 0x00000002;\n\t\t}\n\t\tgprs[ARMRegs.PC] = gprs[rm] & 0xFFFFFFFE - misalign;\n\t};\n};\n\nARMCoreThumb.prototype.constructCMN = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar aluOut = (gprs[rd] >>> 0) + (gprs[rm] >>> 0);\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = aluOut > 0xFFFFFFFF;\n\t\tcpu.cpsrV = (gprs[rd] >> 31) == (gprs[rm] >> 31) &&\n\t\t\t\t\t(gprs[rd] >> 31) != (aluOut >> 31) &&\n\t\t\t\t\t(gprs[rm] >> 31) != (aluOut >> 31);\n\t};\n};\n\nARMCoreThumb.prototype.constructCMP1 = function(rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar aluOut = gprs[rn] - immediate;\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= immediate;\n\t\tcpu.cpsrV = (gprs[rn] >> 31) && ((gprs[rn] ^ aluOut) >> 31);\n\t};\n}\n\nARMCoreThumb.prototype.constructCMP2 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = gprs[rd];\n\t\tvar m = gprs[rm];\n\t\tvar aluOut = d - m;\n\t\tvar an = aluOut >> 31;\n\t\tvar dn = d >> 31;\n\t\tcpu.cpsrN = an;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (d >>> 0) >= (m >>> 0);\n\t\tcpu.cpsrV = dn != (m >> 31) && dn != an;\n\t};\n};\n\nARMCoreThumb.prototype.constructCMP3 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar aluOut = gprs[rd] - gprs[rm];\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rd] >>> 0) >= (gprs[rm] >>> 0);\n\t\tcpu.cpsrV = ((gprs[rd] ^ gprs[rm]) >> 31) && ((gprs[rd] ^ aluOut) >> 31);\n\t};\n};\n\nARMCoreThumb.prototype.constructEOR = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[rd] ^ gprs[rm];\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructLDMIA = function(rn, rs) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar address = gprs[rn];\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tfor (m = 0x01, i = 0; i < 8; m <<= 1, ++i) {\n\t\t\tif (rs & m) {\n\t\t\t\tgprs[i] = cpu.mmu.load32(address);\n\t\t\t\taddress += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tcpu.mmu.waitMulti32(address, total);\n\t\tif (!((1 << rn) & rs)) {\n\t\t\tgprs[rn] = address;\n\t\t}\n\t};\n};\n\nARMCoreThumb.prototype.constructLDR1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar n = gprs[rn] + immediate;\n\t\tgprs[rd] = cpu.mmu.load32(n);\n\t\tcpu.mmu.wait32(n);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDR2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.load32(gprs[rn] + gprs[rm]);\n\t\tcpu.mmu.wait32(gprs[rn] + gprs[rm]);\n\t\t++cpu.cycles;\n\t}\n};\n\nARMCoreThumb.prototype.constructLDR3 = function(rd, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.load32((gprs[ARMRegs.PC] & 0xFFFFFFFC) + immediate);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.PC]);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDR4 = function(rd, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.load32(gprs[ARMRegs.SP] + immediate);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.SP] + immediate);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRB1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar n = gprs[rn] + immediate;\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.loadU8(n);\n\t\tcpu.mmu.wait(n);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRB2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.loadU8(gprs[rn] + gprs[rm]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRH1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar n = gprs[rn] + immediate;\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.loadU16(n);\n\t\tcpu.mmu.wait(n);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRH2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.loadU16(gprs[rn] + gprs[rm]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRSB = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.load8(gprs[rn] + gprs[rm]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLDRSH = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = cpu.mmu.load16(gprs[rn] + gprs[rm]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t\t++cpu.cycles;\n\t};\n};\n\nARMCoreThumb.prototype.constructLSL1 = function(rd, rm, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tif (immediate == 0) {\n\t\t\tgprs[rd] = gprs[rm];\n\t\t} else {\n\t\t\tcpu.cpsrC = gprs[rm] & (1 << (32 - immediate));\n\t\t\tgprs[rd] = gprs[rm] << immediate;\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructLSL2 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar rs = gprs[rm] & 0xFF;\n\t\tif (rs) {\n\t\t\tif (rs < 32) {\n\t\t\t\tcpu.cpsrC = gprs[rd] & (1 << (32 - rs));\n\t\t\t\tgprs[rd] <<= rs;\n\t\t\t} else {\n\t\t\t\tif (rs > 32) {\n\t\t\t\t\tcpu.cpsrC = 0;\n\t\t\t\t} else {\n\t\t\t\t\tcpu.cpsrC = gprs[rd] & 0x00000001;\n\t\t\t\t}\n\t\t\t\tgprs[rd] = 0;\n\t\t\t}\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructLSR1 = function(rd, rm, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tif (immediate == 0) {\n\t\t\tcpu.cpsrC = gprs[rm] >> 31;\n\t\t\tgprs[rd] = 0;\n\t\t} else {\n\t\t\tcpu.cpsrC = gprs[rm] & (1 << (immediate - 1));\n\t\t\tgprs[rd] = gprs[rm] >>> immediate;\n\t\t}\n\t\tcpu.cpsrN = 0;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n}\n\nARMCoreThumb.prototype.constructLSR2 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar rs = gprs[rm] & 0xFF;\n\t\tif (rs) {\n\t\t\tif (rs < 32) {\n\t\t\t\tcpu.cpsrC = gprs[rd] & (1 << (rs - 1));\n\t\t\t\tgprs[rd] >>>= rs;\n\t\t\t} else {\n\t\t\t\tif (rs > 32) {\n\t\t\t\t\tcpu.cpsrC = 0;\n\t\t\t\t} else {\n\t\t\t\t\tcpu.cpsrC = gprs[rd] >> 31;\n\t\t\t\t}\n\t\t\t\tgprs[rd] = 0;\n\t\t\t}\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructMOV1 = function(rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rn] = immediate;\n\t\tcpu.cpsrN = immediate >> 31;\n\t\tcpu.cpsrZ = !(immediate & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructMOV2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = gprs[rn];\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = 0;\n\t\tcpu.cpsrV = 0;\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructMOV3 = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[rm];\n\t};\n};\n\nARMCoreThumb.prototype.constructMUL = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.waitMul(gprs[rm]);\n\t\tif ((gprs[rm] & 0xFFFF0000) && (gprs[rd] & 0xFFFF0000)) {\n\t\t\t// Our data type is a double--we'll lose bits if we do it all at once!\n\t\t\tvar hi = ((gprs[rd] & 0xFFFF0000) * gprs[rm]) & 0xFFFFFFFF;\n\t\t\tvar lo = ((gprs[rd] & 0x0000FFFF) * gprs[rm]) & 0xFFFFFFFF;\n\t\t\tgprs[rd] = (hi + lo) & 0xFFFFFFFF;\n\t\t} else {\n\t\t\tgprs[rd] *= gprs[rm];\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructMVN = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = ~gprs[rm];\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructNEG = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = -gprs[rm];\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = 0 >= (d >>> 0);\n\t\tcpu.cpsrV = (gprs[rm] >> 31) && (d >> 31);\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructORR = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tgprs[rd] = gprs[rd] | gprs[rm];\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructPOP = function(rs, r) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\t++cpu.cycles;\n\t\tvar address = gprs[ARMRegs.SP];\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tfor (m = 0x01, i = 0; i < 8; m <<= 1, ++i) {\n\t\t\tif (rs & m) {\n\t\t\t\tcpu.mmu.waitSeq32(address);\n\t\t\t\tgprs[i] = cpu.mmu.load32(address);\n\t\t\t\taddress += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tif (r) {\n\t\t\tgprs[ARMRegs.PC] = cpu.mmu.load32(address) & 0xFFFFFFFE;\n\t\t\taddress += 4;\n\t\t\t++total;\n\t\t}\n\t\tcpu.mmu.waitMulti32(address, total);\n\t\tgprs[ARMRegs.SP] = address;\n\t};\n};\n\nARMCoreThumb.prototype.constructPUSH = function(rs, r) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar address = gprs[ARMRegs.SP] - 4;\n\t\tvar total = 0;\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tif (r) {\n\t\t\tcpu.mmu.store32(address, gprs[ARMRegs.LR]);\n\t\t\taddress -= 4;\n\t\t\t++total;\n\t\t}\n\t\tvar m, i;\n\t\tfor (m = 0x80, i = 7; m; m >>= 1, --i) {\n\t\t\tif (rs & m) {\n\t\t\t\tcpu.mmu.store32(address, gprs[i]);\n\t\t\t\taddress -= 4;\n\t\t\t\t++total;\n\t\t\t\tbreak;\n\t\t\t}\n\t\t}\n\t\tfor (m >>= 1, --i; m; m >>= 1, --i) {\n\t\t\tif (rs & m) {\n\t\t\t\tcpu.mmu.store32(address, gprs[i]);\n\t\t\t\taddress -= 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tcpu.mmu.waitMulti32(address, total);\n\t\tgprs[ARMRegs.SP] = address + 4;\n\t};\n};\n\nARMCoreThumb.prototype.constructROR = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar rs = gprs[rm] & 0xFF;\n\t\tif (rs) {\n\t\t\tvar r4 = rs & 0x1F;\n\t\t\tif (r4 > 0) {\n\t\t\t\tcpu.cpsrC = gprs[rd] & (1 << (r4 - 1));\n\t\t\t\tgprs[rd] = (gprs[rd] >>> r4) | (gprs[rd] << (32 - r4));\n\t\t\t} else {\n\t\t\t\tcpu.cpsrC = gprs[rd] >> 31;\n\t\t\t}\n\t\t}\n\t\tcpu.cpsrN = gprs[rd] >> 31;\n\t\tcpu.cpsrZ = !(gprs[rd] & 0xFFFFFFFF);\n\t};\n};\n\nARMCoreThumb.prototype.constructSBC = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar m = (gprs[rm] >>> 0) + (cpu.cpsrC ? 0 : 1);\n\t\tvar d = (gprs[rd] >>> 0) - m;\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rd] >>> 0) >= (d >>> 0);\n\t\tcpu.cpsrV = ((gprs[rd] ^ m) >> 31) && ((gprs[rd] ^ d) >> 31);\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructSTMIA = function(rn, rs) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tvar address = gprs[rn];\n\t\tvar total = 0;\n\t\tvar m, i;\n\t\tfor (m = 0x01, i = 0; i < 8; m <<= 1, ++i) {\n\t\t\tif (rs & m) {\n\t\t\t\tcpu.mmu.store32(address, gprs[i]);\n\t\t\t\taddress += 4;\n\t\t\t\t++total;\n\t\t\t\tbreak;\n\t\t\t}\n\t\t}\n\t\tfor (m <<= 1, ++i; i < 8; m <<= 1, ++i) {\n\t\t\tif (rs & m) {\n\t\t\t\tcpu.mmu.store32(address, gprs[i]);\n\t\t\t\taddress += 4;\n\t\t\t\t++total;\n\t\t\t}\n\t\t}\n\t\tcpu.mmu.waitMulti32(address, total);\n\t\tgprs[rn] = address;\n\t};\n};\n\nARMCoreThumb.prototype.constructSTR1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar n = gprs[rn] + immediate;\n\t\tcpu.mmu.store32(n, gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait32(n);\n\t};\n};\n\nARMCoreThumb.prototype.constructSTR2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.store32(gprs[rn] + gprs[rm], gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait32(gprs[rn] + gprs[rm]);\n\t};\n};\n\nARMCoreThumb.prototype.constructSTR3 = function(rd, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.store32(gprs[ARMRegs.SP] + immediate, gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait32(gprs[ARMRegs.SP] + immediate);\n\t};\n};\n\nARMCoreThumb.prototype.constructSTRB1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar n = gprs[rn] + immediate;\n\t\tcpu.mmu.store8(n, gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait(n);\n\t};\n};\n\nARMCoreThumb.prototype.constructSTRB2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.store8(gprs[rn] + gprs[rm], gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t}\n};\n\nARMCoreThumb.prototype.constructSTRH1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tvar n = gprs[rn] + immediate;\n\t\tcpu.mmu.store16(n, gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait(n);\n\t};\n};\n\nARMCoreThumb.prototype.constructSTRH2 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.store16(gprs[rn] + gprs[rm], gprs[rd]);\n\t\tcpu.mmu.wait(gprs[ARMRegs.PC]);\n\t\tcpu.mmu.wait(gprs[rn] + gprs[rm]);\n\t}\n};\n\nARMCoreThumb.prototype.constructSUB1 = function(rd, rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = gprs[rn] - immediate;\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= immediate;\n\t\tcpu.cpsrV = (gprs[rn] >> 31) && ((gprs[rn] ^ d) >> 31);\n\t\tgprs[rd] = d;\n\t};\n}\n\nARMCoreThumb.prototype.constructSUB2 = function(rn, immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = gprs[rn] - immediate;\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= immediate;\n\t\tcpu.cpsrV = (gprs[rn] >> 31) && ((gprs[rn] ^ d) >> 31);\n\t\tgprs[rn] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructSUB3 = function(rd, rn, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar d = gprs[rn] - gprs[rm];\n\t\tcpu.cpsrN = d >> 31;\n\t\tcpu.cpsrZ = !(d & 0xFFFFFFFF);\n\t\tcpu.cpsrC = (gprs[rn] >>> 0) >= (gprs[rm] >>> 0);\n\t\tcpu.cpsrV = (gprs[rn] >> 31) != (gprs[rm] >> 31) &&\n\t\t\t\t\t(gprs[rn] >> 31) != (d >> 31);\n\t\tgprs[rd] = d;\n\t};\n};\n\nARMCoreThumb.prototype.constructSWI = function(immediate) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.irq.swi(immediate);\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t}\n};\n\nARMCoreThumb.prototype.constructTST = function(rd, rm) {\n\tvar cpu : ARMCoreType = this.cpu;\n\tvar gprs = cpu.gprs;\n\treturn function() {\n\t\tcpu.mmu.waitPrefetch(gprs[ARMRegs.PC]);\n\t\tvar aluOut = gprs[rd] & gprs[rm];\n\t\tcpu.cpsrN = aluOut >> 31;\n\t\tcpu.cpsrZ = !(aluOut & 0xFFFFFFFF);\n\t};\n};\n\n///////////////////////////////////////////////////////////////////////////\n\nfunction ARMCore() {\n\tthis.SP = 13;\n\tthis.LR = 14;\n\tthis.PC = 15;\n\n\tthis.MODE_ARM = 0;\n\tthis.MODE_THUMB = 1;\n\n\tthis.MODE_USER = 0x10;\n\tthis.MODE_FIQ = 0x11;\n\tthis.MODE_IRQ = 0x12;\n\tthis.MODE_SUPERVISOR = 0x13;\n\tthis.MODE_ABORT = 0x17;\n\tthis.MODE_UNDEFINED = 0x1B;\n\tthis.MODE_SYSTEM = 0x1F;\n\n\tthis.BANK_NONE = 0\n\tthis.BANK_FIQ = 1;\n\tthis.BANK_IRQ = 2;\n\tthis.BANK_SUPERVISOR = 3;\n\tthis.BANK_ABORT = 4;\n\tthis.BANK_UNDEFINED = 5;\n\n\tthis.WORD_SIZE_ARM = 4;\n\tthis.WORD_SIZE_THUMB = 2;\n\n\tthis.BASE_RESET = 0x00000000;\n\tthis.BASE_UNDEF = 0x00000004;\n\tthis.BASE_SWI = 0x00000008;\n\tthis.BASE_PABT = 0x0000000C;\n\tthis.BASE_DABT = 0x00000010;\n\tthis.BASE_IRQ = 0x00000018;\n\tthis.BASE_FIQ = 0x0000001C;\n\n\tthis.armCompiler = new ARMCoreArm(this);\n\tthis.thumbCompiler = new ARMCoreThumb(this);\n\tthis.generateConds();\n\n\tthis.gprs = new Int32Array(16);\n};\n\nARMCore.prototype.resetCPU = function(startOffset) {\n\tfor (var i = 0; i < ARMRegs.PC; ++i) {\n\t\tthis.gprs[i] = 0;\n\t}\n\tthis.gprs[ARMRegs.PC] = startOffset + ARMConstants.WORD_SIZE_ARM;\n\n\tthis.loadInstruction = this.loadInstructionArm;\n\tthis.execMode = ARMMode.MODE_ARM;\n\tthis.instructionWidth = ARMConstants.WORD_SIZE_ARM;\n\n\tthis.mode = ARMMode.MODE_SYSTEM;\n\n\tthis.cpsrI = false;\n\tthis.cpsrF = false;\n\n\tthis.cpsrV = false;\n\tthis.cpsrC = false;\n\tthis.cpsrZ = false;\n\tthis.cpsrN = false;\n\n\tthis.bankedRegisters = [\n\t\tnew Int32Array(7),\n\t\tnew Int32Array(7),\n\t\tnew Int32Array(2),\n\t\tnew Int32Array(2),\n\t\tnew Int32Array(2),\n\t\tnew Int32Array(2)\n\t];\n\tthis.spsr = 0;\n\tthis.bankedSPSRs = new Int32Array(6);\n\n\tthis.cycles = 0;\n\n\tthis.shifterOperand = 0;\n\tthis.shifterCarryOut = 0;\n\n\tthis.page = null;\n\tthis.pageId = 0;\n\tthis.pageRegion = -1;\n\n\tthis.instruction = null;\n\n\tthis.irq.clear();\n\n\tvar gprs = this.gprs;\n\tvar mmu = this.mmu as ARMMMUInterface;\n\n\tthis.step = function() {\n\t\tvar instruction = this.instruction || (this.instruction = this.loadInstruction(gprs[ARMRegs.PC] - this.instructionWidth));\n\t\tgprs[ARMRegs.PC] += this.instructionWidth;\n\t\tthis.conditionPassed = true;\n\t\tinstruction();\n\n\t\tif (!instruction.writesPC) {\n\t\t\tif (this.instruction != null) { // We might have gotten an interrupt from the instruction\n\t\t\t\tif (instruction.next == null || instruction.next.page.invalid) {\n\t\t\t\t\tinstruction.next = this.loadInstruction(gprs[ARMRegs.PC] - this.instructionWidth);\n\t\t\t\t}\n\t\t\t\tthis.instruction = instruction.next;\n\t\t\t}\n\t\t} else {\n\t\t\tif (this.conditionPassed) {\n\t\t\t\tvar pc = gprs[ARMRegs.PC] &= 0xFFFFFFFE;\n\t\t\t\tif (this.execMode == ARMMode.MODE_ARM) {\n\t\t\t\t\tmmu.wait32(pc);\n\t\t\t\t\tmmu.waitPrefetch32(pc);\n\t\t\t\t} else {\n\t\t\t\t\tmmu.wait(pc);\n\t\t\t\t\tmmu.waitPrefetch(pc);\n\t\t\t\t}\n\t\t\t\tgprs[ARMRegs.PC] += this.instructionWidth;\n\t\t\t\tif (!instruction.fixedJump) {\n\t\t\t\t\tthis.instruction = null;\n\t\t\t\t} else if (this.instruction != null) {\n\t\t\t\t\tif (instruction.next == null || instruction.next.page.invalid) {\n\t\t\t\t\t\tinstruction.next = this.loadInstruction(gprs[ARMRegs.PC] - this.instructionWidth);\n\t\t\t\t\t}\n\t\t\t\t\tthis.instruction = instruction.next;\n\t\t\t\t}\n\t\t\t} else {\n\t\t\t\tthis.instruction = null;\n\t\t\t}\n\t\t}\n\t\tthis.irq.updateTimers();\n\t};\n};\n\nARMCore.prototype.freeze = function() : ARMCoreState {\n\treturn {\n\t\tPC: this.gprs[15] - this.instructionWidth,\n\t\tSP: this.gprs[13],\n\t\t'gprs': [\n\t\t\tthis.gprs[0],\n\t\t\tthis.gprs[1],\n\t\t\tthis.gprs[2],\n\t\t\tthis.gprs[3],\n\t\t\tthis.gprs[4],\n\t\t\tthis.gprs[5],\n\t\t\tthis.gprs[6],\n\t\t\tthis.gprs[7],\n\t\t\tthis.gprs[8],\n\t\t\tthis.gprs[9],\n\t\t\tthis.gprs[10],\n\t\t\tthis.gprs[11],\n\t\t\tthis.gprs[12],\n\t\t\tthis.gprs[13],\n\t\t\tthis.gprs[14],\n\t\t\tthis.gprs[15],\n\t\t],\n\t\t'mode': this.mode,\n\t\t'cpsrI': this.cpsrI,\n\t\t'cpsrF': this.cpsrF,\n\t\t'cpsrV': this.cpsrV,\n\t\t'cpsrC': this.cpsrC,\n\t\t'cpsrZ': this.cpsrZ,\n\t\t'cpsrN': this.cpsrN,\n\t\t'bankedRegisters': [\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[0][0],\n\t\t\t\tthis.bankedRegisters[0][1],\n\t\t\t\tthis.bankedRegisters[0][2],\n\t\t\t\tthis.bankedRegisters[0][3],\n\t\t\t\tthis.bankedRegisters[0][4],\n\t\t\t\tthis.bankedRegisters[0][5],\n\t\t\t\tthis.bankedRegisters[0][6]\n\t\t\t],\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[1][0],\n\t\t\t\tthis.bankedRegisters[1][1],\n\t\t\t\tthis.bankedRegisters[1][2],\n\t\t\t\tthis.bankedRegisters[1][3],\n\t\t\t\tthis.bankedRegisters[1][4],\n\t\t\t\tthis.bankedRegisters[1][5],\n\t\t\t\tthis.bankedRegisters[1][6]\n\t\t\t],\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[2][0],\n\t\t\t\tthis.bankedRegisters[2][1]\n\t\t\t],\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[3][0],\n\t\t\t\tthis.bankedRegisters[3][1]\n\t\t\t],\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[4][0],\n\t\t\t\tthis.bankedRegisters[4][1]\n\t\t\t],\n\t\t\t[\n\t\t\t\tthis.bankedRegisters[5][0],\n\t\t\t\tthis.bankedRegisters[5][1]\n\t\t\t]\n\t\t],\n\t\t'spsr': this.spsr,\n\t\t'bankedSPSRs': [\n\t\t\tthis.bankedSPSRs[0],\n\t\t\tthis.bankedSPSRs[1],\n\t\t\tthis.bankedSPSRs[2],\n\t\t\tthis.bankedSPSRs[3],\n\t\t\tthis.bankedSPSRs[4],\n\t\t\tthis.bankedSPSRs[5]\n\t\t],\n\t\t'cycles': this.cycles,\n\t\t'instructionWidth': this.instructionWidth,\n\t};\n};\n\nARMCore.prototype.defrost = function(frost: ARMCoreState) {\n\tthis.instruction = null;\n\n\tthis.page = null;\n\tthis.pageId = 0;\n\tthis.pageRegion = -1;\n\n\tthis.gprs[0] = frost.gprs[0];\n\tthis.gprs[1] = frost.gprs[1];\n\tthis.gprs[2] = frost.gprs[2];\n\tthis.gprs[3] = frost.gprs[3];\n\tthis.gprs[4] = frost.gprs[4];\n\tthis.gprs[5] = frost.gprs[5];\n\tthis.gprs[6] = frost.gprs[6];\n\tthis.gprs[7] = frost.gprs[7];\n\tthis.gprs[8] = frost.gprs[8];\n\tthis.gprs[9] = frost.gprs[9];\n\tthis.gprs[10] = frost.gprs[10];\n\tthis.gprs[11] = frost.gprs[11];\n\tthis.gprs[12] = frost.gprs[12];\n\tthis.gprs[13] = frost.gprs[13];\n\tthis.gprs[14] = frost.gprs[14];\n\tthis.gprs[15] = frost.gprs[15];\n\n\tthis.mode = frost.mode;\n\tthis.cpsrI = frost.cpsrI;\n\tthis.cpsrF = frost.cpsrF;\n\tthis.cpsrV = frost.cpsrV;\n\tthis.cpsrC = frost.cpsrC;\n\tthis.cpsrZ = frost.cpsrZ;\n\tthis.cpsrN = frost.cpsrN;\n\n\tthis.bankedRegisters[0][0] = frost.bankedRegisters[0][0];\n\tthis.bankedRegisters[0][1] = frost.bankedRegisters[0][1];\n\tthis.bankedRegisters[0][2] = frost.bankedRegisters[0][2];\n\tthis.bankedRegisters[0][3] = frost.bankedRegisters[0][3];\n\tthis.bankedRegisters[0][4] = frost.bankedRegisters[0][4];\n\tthis.bankedRegisters[0][5] = frost.bankedRegisters[0][5];\n\tthis.bankedRegisters[0][6] = frost.bankedRegisters[0][6];\n\n\tthis.bankedRegisters[1][0] = frost.bankedRegisters[1][0];\n\tthis.bankedRegisters[1][1] = frost.bankedRegisters[1][1];\n\tthis.bankedRegisters[1][2] = frost.bankedRegisters[1][2];\n\tthis.bankedRegisters[1][3] = frost.bankedRegisters[1][3];\n\tthis.bankedRegisters[1][4] = frost.bankedRegisters[1][4];\n\tthis.bankedRegisters[1][5] = frost.bankedRegisters[1][5];\n\tthis.bankedRegisters[1][6] = frost.bankedRegisters[1][6];\n\n\tthis.bankedRegisters[2][0] = frost.bankedRegisters[2][0];\n\tthis.bankedRegisters[2][1] = frost.bankedRegisters[2][1];\n\n\tthis.bankedRegisters[3][0] = frost.bankedRegisters[3][0];\n\tthis.bankedRegisters[3][1] = frost.bankedRegisters[3][1];\n\n\tthis.bankedRegisters[4][0] = frost.bankedRegisters[4][0];\n\tthis.bankedRegisters[4][1] = frost.bankedRegisters[4][1];\n\n\tthis.bankedRegisters[5][0] = frost.bankedRegisters[5][0];\n\tthis.bankedRegisters[5][1] = frost.bankedRegisters[5][1];\n\n\tthis.spsr = frost.spsr;\n\tthis.bankedSPSRs[0] = frost.bankedSPSRs[0];\n\tthis.bankedSPSRs[1] = frost.bankedSPSRs[1];\n\tthis.bankedSPSRs[2] = frost.bankedSPSRs[2];\n\tthis.bankedSPSRs[3] = frost.bankedSPSRs[3];\n\tthis.bankedSPSRs[4] = frost.bankedSPSRs[4];\n\tthis.bankedSPSRs[5] = frost.bankedSPSRs[5];\n\n\tthis.cycles = frost.cycles;\n\n\tthis.instructionWidth = frost.instructionWidth;\n\tthis.loadInstruction = frost.instructionWidth == 2 ? this.loadInstructionThumb : this.loadInstructionArm;\n\tthis.execMode = frost.instructionWidth == 2 ? ARMMode.MODE_THUMB : ARMMode.MODE_ARM;\n};\n\nARMCore.prototype.fetchPage = function(address : number) {\n\tvar mmu = this.mmu;\n\tvar region = address >>> mmu.BASE_OFFSET;\n\tvar pageId = mmu.addressToPage(region, address & mmu.OFFSET_MASK);\n\tif (region == this.pageRegion) {\n\t\tif (pageId == this.pageId && !(this.page as ARMMemoryPage).invalid) {\n\t\t\treturn;\n\t\t}\n\t\tthis.pageId = pageId;\n\t} else {\n\t\tthis.pageMask = mmu.memory[region].PAGE_MASK;\n\t\tthis.pageRegion = region;\n\t\tthis.pageId = pageId;\n\t}\n\n\tthis.page = mmu.accessPage(region, pageId);\n};\n\nARMCore.prototype.loadInstructionArm = function(address : number) {\n\tvar next : ARMOperation = null;\n\tthis.fetchPage(address);\n\tvar offset = (address & this.pageMask) >> 2;\n\tnext = (this.page as ARMMemoryPage).arm[offset];\n\tif (next) {\n\t\treturn next;\n\t}\n\tvar instruction = this.mmu.load32(address) >>> 0;\n\tnext = this.compileArm(instruction);\n\tnext.next = null;\n\tnext.page = this.page;\n\tnext.address = address;\n\tnext.opcode = instruction;\n\t(this.page as ARMMemoryPage).arm[offset] = next;\n\treturn next;\n};\n\nARMCore.prototype.loadInstructionThumb = function(address : number) {\n\tvar next : ARMOperation = null;\n\tthis.fetchPage(address);\n\tvar offset = (address & this.pageMask) >> 1;\n\tnext = (this.page as ARMMemoryPage).thumb[offset];\n\tif (next) {\n\t\treturn next;\n\t}\n\tvar instruction = this.mmu.load16(address);\n\tnext = this.compileThumb(instruction);\n\tnext.next = null;\n\tnext.page = this.page;\n\tnext.address = address;\n\tnext.opcode = instruction;\n\t(this.page as ARMMemoryPage).thumb[offset] = next;\n\treturn next;\n};\n\nARMCore.prototype.selectBank = function(mode : ARMMode) {\n\tswitch (mode) {\n\tcase ARMMode.MODE_USER:\n\tcase ARMMode.MODE_SYSTEM:\n\t\t// No banked registers\n\t\treturn ARMConstants.BANK_NONE;\n\tcase ARMMode.MODE_FIQ:\n\t\treturn ARMConstants.BANK_FIQ;\n\tcase ARMMode.MODE_IRQ:\n\t\treturn ARMConstants.BANK_IRQ;\n\tcase ARMMode.MODE_SUPERVISOR:\n\t\treturn ARMConstants.BANK_SUPERVISOR;\n\tcase ARMMode.MODE_ABORT:\n\t\treturn ARMConstants.BANK_ABORT;\n\tcase ARMMode.MODE_UNDEFINED:\n\t\treturn ARMConstants.BANK_UNDEFINED;\n\tdefault:\n\t\tthrow new EmuHalt(\"Invalid user mode \" + mode + \" passed to selectBank\");\n\t}\n};\n\nARMCore.prototype.switchExecMode = function(newMode) {\n\tif (this.execMode != newMode) {\n\t\tthis.execMode = newMode;\n\t\tif (newMode == ARMMode.MODE_ARM) {\n\t\t\tthis.instructionWidth = ARMConstants.WORD_SIZE_ARM;\n\t\t\tthis.loadInstruction = this.loadInstructionArm;\n\t\t} else {\n\t\t\tthis.instructionWidth = ARMConstants.WORD_SIZE_THUMB;\n\t\t\tthis.loadInstruction = this.loadInstructionThumb;\n\t\t}\n\t}\n\t\n};\n\nARMCore.prototype.switchMode = function(newMode) {\n\tif (newMode == this.mode) {\n\t\t// Not switching modes after all\n\t\treturn;\n\t}\n\tif (newMode != ARMMode.MODE_USER || newMode != ARMMode.MODE_SYSTEM) {\n\t\t// Switch banked registers\n\t\tvar newBank = this.selectBank(newMode);\n\t\tvar oldBank = this.selectBank(this.mode);\n\t\tif (newBank != oldBank) {\n\t\t\t// TODO: support FIQ\n\t\t\tif (newMode == ARMMode.MODE_FIQ || this.mode == ARMMode.MODE_FIQ) {\n\t\t\t\tvar oldFiqBank = (oldBank == ARMConstants.BANK_FIQ) ? 1 : 0;\n\t\t\t\tvar newFiqBank = (newBank == ARMConstants.BANK_FIQ) ? 1 : 0;\n\t\t\t\tthis.bankedRegisters[oldFiqBank][2] = this.gprs[8];\n\t\t\t\tthis.bankedRegisters[oldFiqBank][3] = this.gprs[9];\n\t\t\t\tthis.bankedRegisters[oldFiqBank][4] = this.gprs[10];\n\t\t\t\tthis.bankedRegisters[oldFiqBank][5] = this.gprs[11];\n\t\t\t\tthis.bankedRegisters[oldFiqBank][6] = this.gprs[12];\n\t\t\t\tthis.gprs[8] = this.bankedRegisters[newFiqBank][2];\n\t\t\t\tthis.gprs[9] = this.bankedRegisters[newFiqBank][3];\n\t\t\t\tthis.gprs[10] = this.bankedRegisters[newFiqBank][4];\n\t\t\t\tthis.gprs[11] = this.bankedRegisters[newFiqBank][5];\n\t\t\t\tthis.gprs[12] = this.bankedRegisters[newFiqBank][6];\n\t\t\t}\n\t\t\tthis.bankedRegisters[oldBank][0] = this.gprs[ARMRegs.SP];\n\t\t\tthis.bankedRegisters[oldBank][1] = this.gprs[ARMRegs.LR];\n\t\t\tthis.gprs[ARMRegs.SP] = this.bankedRegisters[newBank][0];\n\t\t\tthis.gprs[ARMRegs.LR] = this.bankedRegisters[newBank][1];\n\n\t\t\tthis.bankedSPSRs[oldBank] = this.spsr;\n\t\t\tthis.spsr = this.bankedSPSRs[newBank];\n\t\t}\n\t}\n\tthis.mode = newMode;\n};\n\nARMCore.prototype.packCPSR = function() {\n\treturn this.mode | (this.execMode << 5) | (this.cpsrF << 6) | (this.cpsrI << 7) |\n\t (this.cpsrN << 31) | (this.cpsrZ << 30) | (this.cpsrC << 29) | (this.cpsrV << 28);\n};\n\nARMCore.prototype.unpackCPSR = function(spsr) {\n\tthis.switchMode(spsr & 0x0000001F);\n\tthis.switchExecMode(!!(spsr & 0x00000020));\n\tthis.cpsrF = spsr & 0x00000040;\n\tthis.cpsrI = spsr & 0x00000080;\n\tthis.cpsrN = spsr & 0x80000000;\n\tthis.cpsrZ = spsr & 0x40000000;\n\tthis.cpsrC = spsr & 0x20000000;\n\tthis.cpsrV = spsr & 0x10000000;\n\n\tthis.irq.testIRQ();\n};\n\nARMCore.prototype.hasSPSR = function() {\n\treturn this.mode != ARMMode.MODE_SYSTEM && this.mode != ARMMode.MODE_USER;\n};\n\nARMCore.prototype.raiseIRQ = function() {\n\tif (this.cpsrI) {\n\t\treturn;\n\t}\n\tvar cpsr = this.packCPSR();\n\tvar instructionWidth = this.instructionWidth;\n\tthis.switchMode(ARMMode.MODE_IRQ);\n\tthis.spsr = cpsr;\n\tthis.gprs[ARMRegs.LR] = this.gprs[ARMRegs.PC] - instructionWidth + 4;\n\tthis.gprs[ARMRegs.PC] = this.BASE_IRQ + ARMConstants.WORD_SIZE_ARM;\n\tthis.instruction = null;\n\tthis.switchExecMode(ARMMode.MODE_ARM);\n\tthis.cpsrI = true;\n};\n\nARMCore.prototype.raiseTrap = function() {\n\tvar cpsr = this.packCPSR();\n\tvar instructionWidth = this.instructionWidth;\n\tthis.switchMode(ARMMode.MODE_SUPERVISOR);\n\tthis.spsr = cpsr;\n\tthis.gprs[ARMRegs.LR] = this.gprs[ARMRegs.PC] - instructionWidth;\n\tthis.gprs[ARMRegs.PC] = this.BASE_SWI + ARMConstants.WORD_SIZE_ARM;\n\tthis.instruction = null;\n\tthis.switchExecMode(ARMMode.MODE_ARM);\n\tthis.cpsrI = true;\n};\n\nARMCore.prototype.badOp = function(instruction) {\n\tvar func : AddressFunction = function() {\n\t\tthrow new EmuHalt(\"Illegal instruction: 0x\" + instruction.toString(16));\n\t};\n\tfunc.writesPC = true;\n\tfunc.fixedJump = false;\n\treturn func;\n};\n\nARMCore.prototype.generateConds = function() {\n\tvar cpu = this;\n\tthis.conds = [\n\t\t// EQ\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrZ;\n\t\t},\n\t\t// NE\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrZ;\n\t\t},\n\t\t// CS\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrC;\n\t\t},\n\t\t// CC\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrC;\n\t\t},\n\t\t// MI\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrN;\n\t\t},\n\t\t// PL\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrN;\n\t\t},\n\t\t// VS\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrV;\n\t\t},\n\t\t// VC\n\t\tfunction() {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrV;\n\t\t},\n\t\t// HI\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrC && !cpu.cpsrZ;\n\t\t},\n\t\t// LS\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrC || cpu.cpsrZ;\n\t\t},\n\t\t// GE\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrN == !cpu.cpsrV;\n\t\t},\n\t\t// LT\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrN != !cpu.cpsrV;\n\t\t},\n\t\t// GT\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = !cpu.cpsrZ && !cpu.cpsrN == !cpu.cpsrV;\n\t\t},\n\t\t// LE\n\t\tfunction () {\n\t\t\treturn cpu.conditionPassed = cpu.cpsrZ || !cpu.cpsrN != !cpu.cpsrV;\n\t\t},\n\t\t// AL\n\t\tnull,\n\t\tnull\n\t]\n}\n\nARMCore.prototype.barrelShiftImmediate = function(shiftType, immediate, rm) {\n\tvar cpu = this;\n\tvar gprs = this.gprs;\n\tvar shiftOp = this.badOp;\n\tswitch (shiftType) {\n\tcase 0x00000000:\n\t\t// LSL\n\t\tif (immediate) {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = gprs[rm] << immediate;\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & (1 << (32 - immediate));\n\t\t\t};\n\t\t} else {\n\t\t\t// This boils down to no shift\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = gprs[rm];\n\t\t\t\tcpu.shifterCarryOut = cpu.cpsrC;\n\t\t\t};\n\t\t}\n\t\tbreak;\n\tcase 0x00000020:\n\t\t// LSR\n\t\tif (immediate) {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = gprs[rm] >>> immediate;\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & (1 << (immediate - 1));\n\t\t\t};\n\t\t} else {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = 0;\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & 0x80000000;\n\t\t\t};\n\t\t}\n\t\tbreak;\n\tcase 0x00000040:\n\t\t// ASR\n\t\tif (immediate) {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = gprs[rm] >> immediate;\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & (1 << (immediate - 1));\n\t\t\t};\n\t\t} else {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & 0x80000000;\n\t\t\t\tif (cpu.shifterCarryOut) {\n\t\t\t\t\tcpu.shifterOperand = 0xFFFFFFFF;\n\t\t\t\t} else {\n\t\t\t\t\tcpu.shifterOperand = 0;\n\t\t\t\t}\n\t\t\t};\n\t\t}\n\t\tbreak;\n\tcase 0x00000060:\n\t\t// ROR\n\t\tif (immediate) {\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = (gprs[rm] >>> immediate) | (gprs[rm] << (32 - immediate));\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & (1 << (immediate - 1));\n\t\t\t};\n\t\t} else {\n\t\t\t// RRX\n\t\t\tshiftOp = function() {\n\t\t\t\tcpu.shifterOperand = ((cpu.cpsrC ? 1 : 0) << 31) | (gprs[rm] >>> 1);\n\t\t\t\tcpu.shifterCarryOut = gprs[rm] & 0x00000001;\n\t\t\t};\n\t\t}\n\t\tbreak;\n\t}\n\treturn shiftOp;\n}\n\nARMCore.prototype.compileArm = function(instruction) {\n\tvar op = this.badOp(instruction);\n\tvar i = instruction & 0x0E000000;\n\tvar cpu = this;\n\tvar gprs = this.gprs;\n\n\tvar condOp = this.conds[(instruction & 0xF0000000) >>> 28];\n\tif ((instruction & 0x0FFFFFF0) == 0x012FFF10) {\n\t\t// BX\n\t\tvar rm = instruction & 0xF;\n\t\top = this.armCompiler.constructBX(rm, condOp);\n\t\top.writesPC = true;\n\t\top.fixedJump = false;\n\t} else if (!(instruction & 0x0C000000) && (i == 0x02000000 || (instruction & 0x00000090) != 0x00000090)) {\n\t\tvar opcode = instruction & 0x01E00000;\n\t\tvar s = instruction & 0x00100000;\n\t\tvar shiftsRs = false;\n\t\tif ((opcode & 0x01800000) == 0x01000000 && !s) {\n\t\t\tvar r = instruction & 0x00400000;\n\t\t\tif ((instruction & 0x00B0F000) == 0x0020F000) {\n\t\t\t\t// MSR\n\t\t\t\tvar rm = instruction & 0x0000000F;\n\t\t\t\tvar immediate = instruction & 0x000000FF;\n\t\t\t\tvar rotateImm = (instruction & 0x00000F00) >> 7;\n\t\t\t\timmediate = (immediate >>> rotateImm) | (immediate << (32 - rotateImm));\n\t\t\t\top = this.armCompiler.constructMSR(rm, r, instruction, immediate, condOp);\n\t\t\t\top.writesPC = false;\n\t\t\t} else if ((instruction & 0x00BF0000) == 0x000F0000) {\n\t\t\t\t// MRS\n\t\t\t\tvar rd = (instruction & 0x0000F000) >> 12;\n\t\t\t\top = this.armCompiler.constructMRS(rd, r, condOp);\n\t\t\t\top.writesPC = rd == ARMRegs.PC;\n\t\t\t}\n\t\t} else {\n\t\t\t// Data processing/FSR transfer\n\t\t\tvar rn = (instruction & 0x000F0000) >> 16;\n\t\t\tvar rd = (instruction & 0x0000F000) >> 12;\n\n\t\t\t// Parse shifter operand\n\t\t\tvar shiftType = instruction & 0x00000060;\n\t\t\tvar rm = instruction & 0x0000000F;\n\t\t\tvar shiftOp = function() {\n\t\t\t\tthrow new EmuHalt('BUG: invalid barrel shifter');\n\t\t\t};\n\t\t\tif (instruction & 0x02000000) {\n\t\t\t\tvar immediate = instruction & 0x000000FF;\n\t\t\t\tvar rotate = (instruction & 0x00000F00) >> 7;\n\t\t\t\tif (!rotate) {\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1Immediate(immediate);\n\t\t\t\t} else {\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1ImmediateRotate(immediate, rotate);\n\t\t\t\t}\n\t\t\t} else if (instruction & 0x00000010) {\n\t\t\t\tvar rs = (instruction & 0x00000F00) >> 8;\n\t\t\t\tshiftsRs = true;\n\t\t\t\tswitch (shiftType) {\n\t\t\t\tcase 0x00000000:\n\t\t\t\t\t// LSL\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1LSL(rs, rm);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00000020:\n\t\t\t\t\t// LSR\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1LSR(rs, rm);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00000040:\n\t\t\t\t\t// ASR\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1ASR(rs, rm);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00000060:\n\t\t\t\t\t// ROR\n\t\t\t\t\tshiftOp = this.armCompiler.constructAddressingMode1ROR(rs, rm);\n\t\t\t\t\tbreak;\n\t\t\t\t}\n\t\t\t} else {\n\t\t\t\tvar immediate = (instruction & 0x00000F80) >> 7;\n\t\t\t\tshiftOp = this.barrelShiftImmediate(shiftType, immediate, rm);\n\t\t\t}\n\n\t\t\tswitch (opcode) {\n\t\t\tcase 0x00000000:\n\t\t\t\t// AND\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructANDS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructAND(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00200000:\n\t\t\t\t// EOR\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructEORS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructEOR(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00400000:\n\t\t\t\t// SUB\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructSUBS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructSUB(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00600000:\n\t\t\t\t// RSB\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructRSBS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructRSB(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00800000:\n\t\t\t\t// ADD\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructADDS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructADD(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00A00000:\n\t\t\t\t// ADC\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructADCS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructADC(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00C00000:\n\t\t\t\t// SBC\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructSBCS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructSBC(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x00E00000:\n\t\t\t\t// RSC\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructRSCS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructRSC(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x01000000:\n\t\t\t\t// TST\n\t\t\t\top = this.armCompiler.constructTST(rd, rn, shiftOp, condOp);\n\t\t\t\tbreak;\n\t\t\tcase 0x01200000:\n\t\t\t\t// TEQ\n\t\t\t\top = this.armCompiler.constructTEQ(rd, rn, shiftOp, condOp);\n\t\t\t\tbreak;\n\t\t\tcase 0x01400000:\n\t\t\t\t// CMP\n\t\t\t\top = this.armCompiler.constructCMP(rd, rn, shiftOp, condOp);\n\t\t\t\tbreak;\n\t\t\tcase 0x01600000:\n\t\t\t\t// CMN\n\t\t\t\top = this.armCompiler.constructCMN(rd, rn, shiftOp, condOp);\n\t\t\t\tbreak;\n\t\t\tcase 0x01800000:\n\t\t\t\t// ORR\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructORRS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructORR(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x01A00000:\n\t\t\t\t// MOV\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructMOVS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructMOV(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x01C00000:\n\t\t\t\t// BIC\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructBICS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructBIC(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\tcase 0x01E00000:\n\t\t\t\t// MVN\n\t\t\t\tif (s) {\n\t\t\t\t\top = this.armCompiler.constructMVNS(rd, rn, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructMVN(rd, rn, shiftOp, condOp);\n\t\t\t\t}\n\t\t\t\tbreak;\n\t\t\t}\n\t\t\top.writesPC = rd == ARMRegs.PC;\n\t\t}\n\t} else if ((instruction & 0x0FB00FF0) == 0x01000090) {\n\t\t// Single data swap\n\t\tvar rm = instruction & 0x0000000F;\n\t\tvar rd = (instruction >> 12) & 0x0000000F;\n\t\tvar rn = (instruction >> 16) & 0x0000000F;\n\t\tif (instruction & 0x00400000) {\n\t\t\top = this.armCompiler.constructSWPB(rd, rn, rm, condOp);\n\t\t} else {\n\t\t\top = this.armCompiler.constructSWP(rd, rn, rm, condOp);\n\t\t}\n\t\top.writesPC = rd == ARMRegs.PC;\n\t} else {\n\t\tswitch (i) {\n\t\tcase 0x00000000:\n\t\t\tif ((instruction & 0x010000F0) == 0x00000090) {\n\t\t\t\t// Multiplies\n\t\t\t\tvar rd = (instruction & 0x000F0000) >> 16;\n\t\t\t\tvar rn = (instruction & 0x0000F000) >> 12;\n\t\t\t\tvar rs = (instruction & 0x00000F00) >> 8;\n\t\t\t\tvar rm = instruction & 0x0000000F;\n\t\t\t\tswitch (instruction & 0x00F00000) {\n\t\t\t\tcase 0x00000000:\n\t\t\t\t\t// MUL\n\t\t\t\t\top = this.armCompiler.constructMUL(rd, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00100000:\n\t\t\t\t\t// MULS\n\t\t\t\t\top = this.armCompiler.constructMULS(rd, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00200000:\n\t\t\t\t\t// MLA\n\t\t\t\t\top = this.armCompiler.constructMLA(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak\n\t\t\t\tcase 0x00300000:\n\t\t\t\t\t// MLAS\n\t\t\t\t\top = this.armCompiler.constructMLAS(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00800000:\n\t\t\t\t\t// UMULL\n\t\t\t\t\top = this.armCompiler.constructUMULL(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00900000:\n\t\t\t\t\t// UMULLS\n\t\t\t\t\top = this.armCompiler.constructUMULLS(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00A00000:\n\t\t\t\t\t// UMLAL\n\t\t\t\t\top = this.armCompiler.constructUMLAL(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00B00000:\n\t\t\t\t\t// UMLALS\n\t\t\t\t\top = this.armCompiler.constructUMLALS(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00C00000:\n\t\t\t\t\t// SMULL\n\t\t\t\t\top = this.armCompiler.constructSMULL(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00D00000:\n\t\t\t\t\t// SMULLS\n\t\t\t\t\top = this.armCompiler.constructSMULLS(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00E00000:\n\t\t\t\t\t// SMLAL\n\t\t\t\t\top = this.armCompiler.constructSMLAL(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\tcase 0x00F00000:\n\t\t\t\t\t// SMLALS\n\t\t\t\t\top = this.armCompiler.constructSMLALS(rd, rn, rs, rm, condOp);\n\t\t\t\t\tbreak;\n\t\t\t\t}\n\t\t\t\top.writesPC = rd == ARMRegs.PC;\n\t\t\t} else {\n\t\t\t\t// Halfword and signed byte data transfer\n\t\t\t\tvar load = instruction & 0x00100000;\n\t\t\t\tvar rd = (instruction & 0x0000F000) >> 12;\n\t\t\t\tvar hiOffset = (instruction & 0x00000F00) >> 4;\n\t\t\t\tvar loOffset = rm = instruction & 0x0000000F;\n\t\t\t\tvar h = instruction & 0x00000020;\n\t\t\t\tvar s = instruction & 0x00000040;\n\t\t\t\tvar w = instruction & 0x00200000;\n\t\t\t\tvar i = instruction & 0x00400000;\n\n\t\t\t\tvar address : AddressFunction;\n\t\t\t\tif (i) {\n\t\t\t\t\tvar immediate = loOffset | hiOffset;\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode23Immediate(instruction, immediate, condOp);\n\t\t\t\t} else {\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode23Register(instruction, rm, condOp);\n\t\t\t\t}\n\t\t\t\taddress.writesPC = !!w && rn == ARMRegs.PC;\n\n\t\t\t\tif ((instruction & 0x00000090) == 0x00000090) {\n\t\t\t\t\tif (load) {\n\t\t\t\t\t\t// Load [signed] halfword/byte\n\t\t\t\t\t\tif (h) {\n\t\t\t\t\t\t\tif (s) {\n\t\t\t\t\t\t\t\t// LDRSH\n\t\t\t\t\t\t\t\top = this.armCompiler.constructLDRSH(rd, address, condOp);\n\t\t\t\t\t\t\t} else {\n\t\t\t\t\t\t\t\t// LDRH\n\t\t\t\t\t\t\t\top = this.armCompiler.constructLDRH(rd, address, condOp);\n\t\t\t\t\t\t\t}\n\t\t\t\t\t\t} else {\n\t\t\t\t\t\t\tif (s) {\n\t\t\t\t\t\t\t\t// LDRSB\n\t\t\t\t\t\t\t\top = this.armCompiler.constructLDRSB(rd, address, condOp);\n\t\t\t\t\t\t\t}\n\t\t\t\t\t\t}\n\t\t\t\t\t} else if (!s && h) {\n\t\t\t\t\t\t// STRH\n\t\t\t\t\t\top = this.armCompiler.constructSTRH(rd, address, condOp);\n\t\t\t\t\t}\n\t\t\t\t}\n\t\t\t\top.writesPC = rd == ARMRegs.PC || address.writesPC;\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 0x04000000:\n\t\tcase 0x06000000:\n\t\t\t// LDR/STR\n\t\t\tvar rd = (instruction & 0x0000F000) >> 12;\n\t\t\tvar load = instruction & 0x00100000;\n\t\t\tvar b = instruction & 0x00400000;\n\t\t\tvar i = instruction & 0x02000000;\n\n\t\t\tvar address : AddressFunction = function() {\n\t\t\t\tthrow new EmuHalt(\"Unimplemented memory access: 0x\" + instruction.toString(16));\n\t\t\t};\n\t\t\tif (~instruction & 0x01000000) {\n\t\t\t\t// Clear the W bit if the P bit is clear--we don't support memory translation, so these turn into regular accesses\n\t\t\t\tinstruction &= 0xFFDFFFFF;\n\t\t\t}\n\t\t\tif (i) {\n\t\t\t\t// Register offset\n\t\t\t\tvar rm = instruction & 0x0000000F;\n\t\t\t\tvar shiftType = instruction & 0x00000060;\n\t\t\t\tvar shiftImmediate = (instruction & 0x00000F80) >> 7;\n\t\t\t\t\n\t\t\t\tif (shiftType || shiftImmediate) {\n\t\t\t\t\tshiftOp = this.barrelShiftImmediate(shiftType, shiftImmediate, rm);\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode2RegisterShifted(instruction, shiftOp, condOp);\n\t\t\t\t} else {\n\t\t\t\t\taddress = this.armCompiler.constructAddressingMode23Register(instruction, rm, condOp);\n\t\t\t\t}\n\t\t\t} else {\n\t\t\t\t// Immediate\n\t\t\t\tvar offset = instruction & 0x00000FFF;\n\t\t\t\taddress = this.armCompiler.constructAddressingMode23Immediate(instruction, offset, condOp);\n\t\t\t}\n\t\t\tif (load) {\n\t\t\t\tif (b) {\n\t\t\t\t\t// LDRB\n\t\t\t\t\top = this.armCompiler.constructLDRB(rd, address, condOp);\n\t\t\t\t} else {\n\t\t\t\t\t// LDR\n\t\t\t\t\top = this.armCompiler.constructLDR(rd, address, condOp);\n\t\t\t\t}\n\t\t\t} else {\n\t\t\t\tif (b) {\n\t\t\t\t\t// STRB\n\t\t\t\t\top = this.armCompiler.constructSTRB(rd, address, condOp);\n\t\t\t\t} else {\n\t\t\t\t\t// STR\n\t\t\t\t\top = this.armCompiler.constructSTR(rd, address, condOp);\n\t\t\t\t}\n\t\t\t}\n\t\t\top.writesPC = load && (rd == ARMRegs.PC || address.writesPC); // SEH\n\t\t\tbreak;\n\t\tcase 0x08000000:\n\t\t\t// Block data transfer\n\t\t\tvar load = instruction & 0x00100000;\n\t\t\tvar w = instruction & 0x00200000;\n\t\t\tvar user = instruction & 0x00400000;\n\t\t\tvar u = instruction & 0x00800000;\n\t\t\tvar p = instruction & 0x01000000;\n\t\t\tvar rs = instruction & 0x0000FFFF;\n\t\t\tvar rn = (instruction & 0x000F0000) >> 16;\n\n\t\t\tvar address : AddressFunction;\n\t\t\tvar immediate = 0;\n\t\t\tvar offset = 0;\n\t\t\tvar overlap = false;\n\t\t\tif (u) {\n\t\t\t\tif (p) {\n\t\t\t\t\timmediate = 4;\n\t\t\t\t}\n\t\t\t\tfor (var m = 0x01, i = 0; i < 16; m <<= 1, ++i) {\n\t\t\t\t\tif (rs & m) {\n\t\t\t\t\t\tif (w && i == rn && !offset) {\n\t\t\t\t\t\t\trs &= ~m;\n\t\t\t\t\t\t\timmediate += 4;\n\t\t\t\t\t\t\toverlap = true;\n\t\t\t\t\t\t}\n\t\t\t\t\t\toffset += 4;\n\t\t\t\t\t}\n\t\t\t\t}\n\t\t\t} else {\n\t\t\t\tif (!p) {\n\t\t\t\t\timmediate = 4;\n\t\t\t\t}\n\t\t\t\tfor (var m = 0x01, i = 0; i < 16; m <<= 1, ++i) {\n\t\t\t\t\tif (rs & m) {\n\t\t\t\t\t\tif (w && i == rn && !offset) {\n\t\t\t\t\t\t\trs &= ~m;\n\t\t\t\t\t\t\timmediate += 4;\n\t\t\t\t\t\t\toverlap = true;\n\t\t\t\t\t\t}\n\t\t\t\t\t\timmediate -= 4;\n\t\t\t\t\t\toffset -= 4;\n\t\t\t\t\t}\n\t\t\t\t}\n\t\t\t}\n\t\t\tif (w) {\n\t\t\t\taddress = this.armCompiler.constructAddressingMode4Writeback(immediate, offset, rn, overlap);\n\t\t\t} else {\n\t\t\t\taddress = this.armCompiler.constructAddressingMode4(immediate, rn);\n\t\t\t}\n\t\t\tif (load) {\n\t\t\t\t// LDM\n\t\t\t\tif (user) {\n\t\t\t\t\top = this.armCompiler.constructLDMS(rs, address, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructLDM(rs, address, condOp);\n\t\t\t\t}\n\t\t\t\top.writesPC = !!(rs & (1 << 15));\n\t\t\t} else {\n\t\t\t\t// STM\n\t\t\t\tif (user) {\n\t\t\t\t\top = this.armCompiler.constructSTMS(rs, address, condOp);\n\t\t\t\t} else {\n\t\t\t\t\top = this.armCompiler.constructSTM(rs, address, condOp);\n\t\t\t\t}\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 0x0A000000:\n\t\t\t// Branch\n\t\t\tvar immediate = instruction & 0x00FFFFFF;\n\t\t\tif (immediate & 0x00800000) {\n\t\t\t\timmediate |= 0xFF000000;\n\t\t\t}\n\t\t\timmediate <<= 2;\n\t\t\tvar link = instruction & 0x01000000;\n\t\t\tif (link) {\n\t\t\t\top = this.armCompiler.constructBL(immediate, condOp);\n\t\t\t} else {\n\t\t\t\top = this.armCompiler.constructB(immediate, condOp);\n\t\t\t}\n\t\t\top.writesPC = true;\n\t\t\top.fixedJump = true;\n\t\t\tbreak;\n\t\tcase 0x0C000000:\n\t\t\t// Coprocessor data transfer\n\t\t\tbreak;\n\t\tcase 0x0E000000:\n\t\t\t// Coprocessor data operation/SWI\n\t\t\tif ((instruction & 0x0F000000) == 0x0F000000) {\n\t\t\t\t// SWI\n\t\t\t\tvar immediate = (instruction & 0x00FFFFFF);\n\t\t\t\top = this.armCompiler.constructSWI(immediate, condOp);\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\tbreak;\n\t\tdefault:\n\t\t\tthrow new EmuHalt('Bad opcode: 0x' + instruction.toString(16));\n\t\t}\n\t}\n\n\top.execMode = ARMMode.MODE_ARM;\n\top.fixedJump = op.fixedJump || false;\n\treturn op;\n};\n\nARMCore.prototype.compileThumb = function(instruction) {\n\tvar op = this.badOp(instruction & 0xFFFF);\n\tvar cpu = this;\n\tvar gprs = this.gprs;\n\tif ((instruction & 0xFC00) == 0x4000) {\n\t\t// Data-processing register\n\t\tvar rm = (instruction & 0x0038) >> 3;\n\t\tvar rd = instruction & 0x0007;\n\t\tswitch (instruction & 0x03C0) {\n\t\tcase 0x0000:\n\t\t\t// AND\n\t\t\top = this.thumbCompiler.constructAND(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0040:\n\t\t\t// EOR\n\t\t\top = this.thumbCompiler.constructEOR(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0080:\n\t\t\t// LSL(2)\n\t\t\top = this.thumbCompiler.constructLSL2(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x00C0:\n\t\t\t// LSR(2)\n\t\t\top = this.thumbCompiler.constructLSR2(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0100:\n\t\t\t// ASR(2)\n\t\t\top = this.thumbCompiler.constructASR2(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0140:\n\t\t\t// ADC\n\t\t\top = this.thumbCompiler.constructADC(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0180:\n\t\t\t// SBC\n\t\t\top = this.thumbCompiler.constructSBC(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x01C0:\n\t\t\t// ROR\n\t\t\top = this.thumbCompiler.constructROR(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0200:\n\t\t\t// TST\n\t\t\top = this.thumbCompiler.constructTST(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0240:\n\t\t\t// NEG\n\t\t\top = this.thumbCompiler.constructNEG(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0280:\n\t\t\t// CMP(2)\n\t\t\top = this.thumbCompiler.constructCMP2(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x02C0:\n\t\t\t// CMN\n\t\t\top = this.thumbCompiler.constructCMN(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0300:\n\t\t\t// ORR\n\t\t\top = this.thumbCompiler.constructORR(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0340:\n\t\t\t// MUL\n\t\t\top = this.thumbCompiler.constructMUL(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x0380:\n\t\t\t// BIC\n\t\t\top = this.thumbCompiler.constructBIC(rd, rm);\n\t\t\tbreak;\n\t\tcase 0x03C0:\n\t\t\t// MVN\n\t\t\top = this.thumbCompiler.constructMVN(rd, rm);\n\t\t\tbreak;\n\t\t}\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xFC00) == 0x4400) {\n\t\t// Special data processing / branch/exchange instruction set\n\t\tvar rm = (instruction & 0x0078) >> 3;\n\t\tvar rn = instruction & 0x0007;\n\t\tvar h1 = instruction & 0x0080;\n\t\tvar rd = rn | (h1 >> 4);\n\t\tswitch (instruction & 0x0300) {\n\t\tcase 0x0000:\n\t\t\t// ADD(4)\n\t\t\top = this.thumbCompiler.constructADD4(rd, rm)\n\t\t\top.writesPC = rd == ARMRegs.PC;\n\t\t\tbreak;\n\t\tcase 0x0100:\n\t\t\t// CMP(3)\n\t\t\top = this.thumbCompiler.constructCMP3(rd, rm);\n\t\t\top.writesPC = false;\n\t\t\tbreak;\n\t\tcase 0x0200:\n\t\t\t// MOV(3)\n\t\t\top = this.thumbCompiler.constructMOV3(rd, rm);\n\t\t\top.writesPC = rd == ARMRegs.PC;\n\t\t\tbreak;\n\t\tcase 0x0300:\n\t\t\t// BX\n\t\t\top = this.thumbCompiler.constructBX(rd, rm);\n\t\t\top.writesPC = true;\n\t\t\top.fixedJump = false;\n\t\t\tbreak;\n\t\t}\n\t} else if ((instruction & 0xF800) == 0x1800) {\n\t\t// Add/subtract\n\t\tvar rm = (instruction & 0x01C0) >> 6;\n\t\tvar rn = (instruction & 0x0038) >> 3;\n\t\tvar rd = instruction & 0x0007;\n\t\tswitch (instruction & 0x0600) {\n\t\tcase 0x0000:\n\t\t\t// ADD(3)\n\t\t\top = this.thumbCompiler.constructADD3(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0200:\n\t\t\t// SUB(3)\n\t\t\top = this.thumbCompiler.constructSUB3(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0400:\n\t\t\tvar immediate = (instruction & 0x01C0) >> 6;\n\t\t\tif (immediate) {\n\t\t\t\t// ADD(1)\n\t\t\t\top = this.thumbCompiler.constructADD1(rd, rn, immediate);\n\t\t\t} else {\n\t\t\t\t// MOV(2)\n\t\t\t\top = this.thumbCompiler.constructMOV2(rd, rn, rm);\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 0x0600:\n\t\t\t// SUB(1)\n\t\t\tvar immediate = (instruction & 0x01C0) >> 6;\n\t\t\top = this.thumbCompiler.constructSUB1(rd, rn, immediate);\n\t\t\tbreak;\n\t\t}\n\t\top.writesPC = false;\n\t} else if (!(instruction & 0xE000)) {\n\t\t// Shift by immediate\n\t\tvar rd = instruction & 0x0007;\n\t\tvar rm = (instruction & 0x0038) >> 3;\n\t\tvar immediate = (instruction & 0x07C0) >> 6;\n\t\tswitch (instruction & 0x1800) {\n\t\tcase 0x0000:\n\t\t\t// LSL(1)\n\t\t\top = this.thumbCompiler.constructLSL1(rd, rm, immediate);\n\t\t\tbreak;\n\t\tcase 0x0800:\n\t\t\t// LSR(1)\n\t\t\top = this.thumbCompiler.constructLSR1(rd, rm, immediate);\n\t\t\tbreak;\n\t\tcase 0x1000:\n\t\t\t// ASR(1)\n\t\t\top = this.thumbCompiler.constructASR1(rd, rm, immediate);\n\t\t\tbreak;\n\t\tcase 0x1800:\n\t\t\tbreak;\n\t\t}\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xE000) == 0x2000) {\n\t\t// Add/subtract/compare/move immediate\n\t\tvar immediate = instruction & 0x00FF;\n\t\tvar rn = (instruction & 0x0700) >> 8;\n\t\tswitch (instruction & 0x1800) {\n\t\tcase 0x0000:\n\t\t\t// MOV(1)\n\t\t\top = this.thumbCompiler.constructMOV1(rn, immediate);\n\t\t\tbreak;\n\t\tcase 0x0800:\n\t\t\t// CMP(1)\n\t\t\top = this.thumbCompiler.constructCMP1(rn, immediate);\n\t\t\tbreak;\n\t\tcase 0x1000:\n\t\t\t// ADD(2)\n\t\t\top = this.thumbCompiler.constructADD2(rn, immediate);\n\t\t\tbreak;\n\t\tcase 0x1800:\n\t\t\t// SUB(2)\n\t\t\top = this.thumbCompiler.constructSUB2(rn, immediate);\n\t\t\tbreak;\n\t\t}\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xF800) == 0x4800) {\n\t\t// LDR(3)\n\t\tvar rd = (instruction & 0x0700) >> 8;\n\t\tvar immediate = (instruction & 0x00FF) << 2;\n\t\top = this.thumbCompiler.constructLDR3(rd, immediate);\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xF000) == 0x5000) {\n\t\t// Load and store with relative offset\n\t\tvar rd = instruction & 0x0007;\n\t\tvar rn = (instruction & 0x0038) >> 3;\n\t\tvar rm = (instruction & 0x01C0) >> 6;\n\t\tvar opcode = instruction & 0x0E00;\n\t\tswitch (opcode) {\n\t\tcase 0x0000:\n\t\t\t// STR(2)\n\t\t\top = this.thumbCompiler.constructSTR2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0200:\n\t\t\t// STRH(2)\n\t\t\top = this.thumbCompiler.constructSTRH2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0400:\n\t\t\t// STRB(2)\n\t\t\top = this.thumbCompiler.constructSTRB2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0600:\n\t\t\t// LDRSB\n\t\t\top = this.thumbCompiler.constructLDRSB(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0800:\n\t\t\t// LDR(2)\n\t\t\top = this.thumbCompiler.constructLDR2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0A00:\n\t\t\t// LDRH(2)\n\t\t\top = this.thumbCompiler.constructLDRH2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0C00:\n\t\t\t// LDRB(2)\n\t\t\top = this.thumbCompiler.constructLDRB2(rd, rn, rm);\n\t\t\tbreak;\n\t\tcase 0x0E00:\n\t\t\t// LDRSH\n\t\t\top = this.thumbCompiler.constructLDRSH(rd, rn, rm);\n\t\t\tbreak;\n\t\t}\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xE000) == 0x6000) {\n\t\t// Load and store with immediate offset\n\t\tvar rd = instruction & 0x0007;\n\t\tvar rn = (instruction & 0x0038) >> 3;\n\t\tvar immediate = (instruction & 0x07C0) >> 4;\n\t\tvar b = instruction & 0x1000;\n\t\tif (b) {\n\t\t\timmediate >>= 2;\n\t\t}\n\t\tvar load = instruction & 0x0800;\n\t\tif (load) {\n\t\t\tif (b) {\n\t\t\t\t// LDRB(1)\n\t\t\t\top = this.thumbCompiler.constructLDRB1(rd, rn, immediate);\n\t\t\t} else {\n\t\t\t\t// LDR(1)\n\t\t\t\top = this.thumbCompiler.constructLDR1(rd, rn, immediate);\n\t\t\t}\n\t\t} else {\n\t\t\tif (b) {\n\t\t\t\t// STRB(1)\n\t\t\t\top = this.thumbCompiler.constructSTRB1(rd, rn, immediate);\n\t\t\t} else {\n\t\t\t\t// STR(1)\n\t\t\t\top = this.thumbCompiler.constructSTR1(rd, rn, immediate);\n\t\t\t}\n\t\t}\n\t\top.writesPC = false;\n\t} else if ((instruction & 0xF600) == 0xB400) {\n\t\t// Push and pop registers\n\t\tvar r = !!(instruction & 0x0100);\n\t\tvar rs = instruction & 0x00FF;\n\t\tif (instruction & 0x0800) {\n\t\t\t// POP\n\t\t\top = this.thumbCompiler.constructPOP(rs, r);\n\t\t\top.writesPC = r;\n\t\t\top.fixedJump = false;\n\t\t} else {\n\t\t\t// PUSH\n\t\t\top = this.thumbCompiler.constructPUSH(rs, r);\n\t\t\top.writesPC = false;\n\t\t}\n\t} else if (instruction & 0x8000) {\n\t\tswitch (instruction & 0x7000) {\n\t\tcase 0x0000:\n\t\t\t// Load and store halfword\n\t\t\tvar rd = instruction & 0x0007;\n\t\t\tvar rn = (instruction & 0x0038) >> 3;\n\t\t\tvar immediate = (instruction & 0x07C0) >> 5;\n\t\t\tif (instruction & 0x0800) {\n\t\t\t\t// LDRH(1)\n\t\t\t\top = this.thumbCompiler.constructLDRH1(rd, rn, immediate);\n\t\t\t} else {\n\t\t\t\t// STRH(1)\n\t\t\t\top = this.thumbCompiler.constructSTRH1(rd, rn, immediate);\n\t\t\t}\n\t\t\top.writesPC = false;\n\t\t\tbreak;\n\t\tcase 0x1000:\n\t\t\t// SP-relative load and store\n\t\t\tvar rd = (instruction & 0x0700) >> 8;\n\t\t\tvar immediate = (instruction & 0x00FF) << 2;\n\t\t\tvar load = instruction & 0x0800;\n\t\t\tif (load) {\n\t\t\t\t// LDR(4)\n\t\t\t\top = this.thumbCompiler.constructLDR4(rd, immediate);\n\t\t\t} else {\n\t\t\t\t// STR(3)\n\t\t\t\top = this.thumbCompiler.constructSTR3(rd, immediate);\n\t\t\t}\n\t\t\top.writesPC = false;\n\t\t\tbreak;\n\t\tcase 0x2000:\n\t\t\t// Load address\n\t\t\tvar rd = (instruction & 0x0700) >> 8;\n\t\t\tvar immediate = (instruction & 0x00FF) << 2;\n\t\t\tif (instruction & 0x0800) {\n\t\t\t\t// ADD(6)\n\t\t\t\top = this.thumbCompiler.constructADD6(rd, immediate);\n\t\t\t} else {\n\t\t\t\t// ADD(5)\n\t\t\t\top = this.thumbCompiler.constructADD5(rd, immediate);\n\t\t\t}\n\t\t\top.writesPC = false;\n\t\t\tbreak;\n\t\tcase 0x3000:\n\t\t\t// Miscellaneous\n\t\t\tif (!(instruction & 0x0F00)) {\n\t\t\t\t// Adjust stack pointer\n\t\t\t\t// ADD(7)/SUB(4)\n\t\t\t\tvar b = instruction & 0x0080;\n\t\t\t\tvar immediate = (instruction & 0x7F) << 2;\n\t\t\t\tif (b) {\n\t\t\t\t\timmediate = -immediate;\n\t\t\t\t}\n\t\t\t\top = this.thumbCompiler.constructADD7(immediate)\n\t\t\t\top.writesPC = false;\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 0x4000:\n\t\t\t// Multiple load and store\n\t\t\tvar rn = (instruction & 0x0700) >> 8;\n\t\t\tvar rs = instruction & 0x00FF;\n\t\t\tif (instruction & 0x0800) {\n\t\t\t\t// LDMIA\n\t\t\t\top = this.thumbCompiler.constructLDMIA(rn, rs);\n\t\t\t} else {\n\t\t\t\t// STMIA\n\t\t\t\top = this.thumbCompiler.constructSTMIA(rn, rs);\n\t\t\t}\n\t\t\top.writesPC = false;\n\t\t\tbreak;\n\t\tcase 0x5000:\n\t\t\t// Conditional branch\n\t\t\tvar cond = (instruction & 0x0F00) >> 8;\n\t\t\tvar immediate = (instruction & 0x00FF);\n\t\t\tif (cond == 0xF) {\n\t\t\t\t// SWI\n\t\t\t\top = this.thumbCompiler.constructSWI(immediate);\n\t\t\t\top.writesPC = false;\n\t\t\t} else {\n\t\t\t\t// B(1)\n\t\t\t\tif (instruction & 0x0080) {\n\t\t\t\t\timmediate |= 0xFFFFFF00;\n\t\t\t\t}\n\t\t\t\timmediate <<= 1;\n\t\t\t\tvar condOp = this.conds[cond];\n\t\t\t\top = this.thumbCompiler.constructB1(immediate, condOp);\n\t\t\t\top.writesPC = true;\n\t\t\t\top.fixedJump = true;\n\t\t\t}\n\t\t\tbreak;\n\t\tcase 0x6000:\n\t\tcase 0x7000:\n\t\t\t// BL(X)\n\t\t\tvar immediate = instruction & 0x07FF;\n\t\t\tvar h = instruction & 0x1800;\n\t\t\tswitch (h) {\n\t\t\tcase 0x0000:\n\t\t\t\t// B(2)\n\t\t\t\tif (immediate & 0x0400) {\n\t\t\t\t\timmediate |= 0xFFFFF800;\n\t\t\t\t}\n\t\t\t\timmediate <<= 1;\n\t\t\t\top = this.thumbCompiler.constructB2(immediate);\n\t\t\t\top.writesPC = true;\n\t\t\t\top.fixedJump = true;\n\t\t\t\tbreak;\n\t\t\tcase 0x0800:\n\t\t\t\t// BLX (ARMv5T)\n\t\t\t\t/*op = function() {\n\t\t\t\t\tvar pc = gprs[ARMRegs.PC];\n\t\t\t\t\tgprs[ARMRegs.PC] = (gprs[ARMRegs.LR] + (immediate << 1)) & 0xFFFFFFFC;\n\t\t\t\t\tgprs[ARMRegs.LR] = pc - 1;\n\t\t\t\t\tcpu.switchExecMode(cpu.MODE_ARM);\n\t\t\t\t}*/\n\t\t\t\tbreak;\n\t\t\tcase 0x1000:\n\t\t\t\t// BL(1)\n\t\t\t\tif (immediate & 0x0400) {\n\t\t\t\t\timmediate |= 0xFFFFFC00;\n\t\t\t\t}\n\t\t\t\timmediate <<= 12;\n\t\t\t\top = this.thumbCompiler.constructBL1(immediate);\n\t\t\t\top.writesPC = false;\n\t\t\t\tbreak;\n\t\t\tcase 0x1800:\n\t\t\t\t// BL(2)\n\t\t\t\top = this.thumbCompiler.constructBL2(immediate);\n\t\t\t\top.writesPC = true;\n\t\t\t\top.fixedJump = false;\n\t\t\t\tbreak;\n\t\t\t}\n\t\t\tbreak;\n\t\tdefault:\n\t\t\tthrow new EmuHalt(\"Undefined instruction: 0x\" + instruction.toString(16));\n\t\t}\n\t} else {\n\t\tthrow new EmuHalt('Bad opcode: 0x' + instruction.toString(16));\n\t}\n\n\top.execMode = ARMMode.MODE_THUMB;\n\top.fixedJump = op.fixedJump || false;\n\t//console.log(hex(instruction), op);\n\treturn op;\n};\n\n///////////////////////////////////////////////////////////////////////////\n\nexport class ARM32CPU implements CPU, InstructionBased, ARMMMUInterface, ARMIRQInterface, SavesState {\n\n\tcore : ARMCoreType;\n\tbus : Bus;\n\tmemory : ARMMemoryRegion[];\n\n\tBASE_OFFSET = 24;\n\tOFFSET_MASK = 0x00FFFFFF;\n\n\tconstructor() {\n\t\tthis.core = new ARMCore();\n\t\tthis.core.irq = this;\n\t\tthis.core.mmu = this;\n\t\tthis.resetMemory();\n\t}\n\tresetMemory() {\n\t\tthis.memory = []; // TODO\n\t\tfor (var i=0; i<256; i++) {\n\t\t\t// TODO: constant\n\t\t\tvar bits = 10;\n\t\t\tvar size = 0x80000; \n\t\t\tthis.memory[i] = {\n\t\t\t\tPAGE_MASK: (2 << bits) - 1,\n\t\t\t\tICACHE_PAGE_BITS: bits,\n\t\t\t\ticache: new Array() // size >> (bits + 1))\n\t\t\t }; // TODO?\n\t\t}\n\t}\n\tadvanceInsn() : number {\n\t\tvar n = this.core.cycles;\n\t\tthis.core.step();\n\t\tn -= this.core.cycles;\n\t\treturn n > 0 ? n : 1;\n\t}\n\tgetPC(): number {\n\t\treturn this.core.gprs[15] - this.core.instructionWidth;\n\t}\n\tgetSP(): number {\n\t\treturn this.core.gprs[13];\n\t}\n\tisStable(): boolean {\n\t\treturn true; // TODO?\n\t}\n\tconnectMemoryBus(bus: Bus): void {\n\t\tthis.bus = bus;\n\t}\n\treset(): void {\n\t\tthis.resetMemory();\n\t\tthis.core.resetCPU(0);\n\t}\n\tsaveState() : ARMCoreState {\n\t\treturn this.core.freeze();\n\t}\n\tloadState(state: ARMCoreState): void {\n\t\tthis.core.defrost(state);\n\t}\n\n\tload8(a: number): number {\n\t\treturn (this.bus.read(a) << 24) >> 24;\n\t}\n\tloadU8(a: number): number {\n\t\treturn this.bus.read(a) & 0xff;\n\t}\n\tload16(a: number): number {\n\t\treturn (this.loadU16(a) << 16) >> 16;\n\t}\n\tloadU16(a: number): number {\n\t\treturn this.bus.read(a) | (this.bus.read(a+1) << 8);\n\t}\n\tload32(a: number): number {\n\t\tvar v = this.bus.read(a) | (this.bus.read(a+1) << 8) | (this.bus.read(a+2) << 16) | (this.bus.read(a+3) << 24);\n\t\treturn v;\n\t}\n\t// TODO: memory.invalidatePage(maskedOffset);\n\tstore8(a: number, v: number): void {\n\t\tthis.bus.write(a, v & 0xff);\n\t}\n\tstore16(a: number, v: number): void {\n\t\tthis.bus.write(a, v & 0xff);\n\t\tthis.bus.write(a+1, (v >> 8) & 0xff);\n\t}\n\tstore32(a: number, v: number): void {\n\t\tthis.bus.write(a, v & 0xff);\n\t\tthis.bus.write(a+1, (v >> 8) & 0xff);\n\t\tthis.bus.write(a+2, (v >> 16) & 0xff);\n\t\tthis.bus.write(a+3, (v >> 24) & 0xff);\n\t}\n\t// TODO\n\twait(a: number): void {\n\t\t++this.core.cycles;\n\t}\n\twait32(a: number): void {\n\t\t++this.core.cycles;\n\t}\n\twaitSeq32(a: number): void {\n\t\t++this.core.cycles;\n\t}\n\twaitMul(rs: number): void {\n if (((rs & 0xFFFFFF00) == 0xFFFFFF00) || !(rs & 0xFFFFFF00)) {\n\t\t\tthis.core.cycles += 1;\n\t\t} else if (((rs & 0xFFFF0000) == 0xFFFF0000) || !(rs & 0xFFFF0000)) {\n\t\t\t\tthis.core.cycles += 2;\n\t\t} else if (((rs & 0xFF000000) == 0xFF000000) || !(rs & 0xFF000000)) {\n\t\t\t\tthis.core.cycles += 3;\n\t\t} else {\n\t\t\t\tthis.core.cycles += 4;\n\t\t}\n\t}\n\twaitMulti32(a: number, total: number): void {\n\t\tthis.core.cycles += 2;\n\t}\n\twaitPrefetch(a: number): void {\n\t\t++this.core.cycles;\n\t}\n\twaitPrefetch32(a: number): void {\n\t\t++this.core.cycles;\n\t}\n\taddressToPage(region: number, address: number) : number {\n return address >> this.memory[region].ICACHE_PAGE_BITS;\n\t}\n\taccessPage(region: number, pageId: number): ARMMemoryPage {\n\t\tvar memory = this.memory[region];\n\t\tvar page = memory.icache[pageId];\n\t\tif (!page || page.invalid) {\n\t\t\t\tpage = {\n\t\t\t\t\t\tthumb: new Array(1 << (memory.ICACHE_PAGE_BITS)),\n\t\t\t\t\t\tarm: new Array(1 << memory.ICACHE_PAGE_BITS - 1),\n\t\t\t\t\t\tinvalid: false\n\t\t\t\t}\n\t\t\t\tmemory.icache[pageId] = page;\n\t\t}\n\t\treturn page;\n\t}\n\n\tswi(opcode: number): void {\n\t\tthis.core.raiseTrap();\n\t}\n\tswi32(opcode: number): void {\n this.swi(opcode >> 16);\n\t}\n\tclear() : void {\n\t}\n\tupdateTimers() : void {\n\t}\n\ttestIRQ() : void {\n\t}\n\n\tisThumb() : boolean {\n\t\treturn this.core.instructionWidth == 2;\n\t}\n}\n", "\nimport { ARM32CPU, ARMCoreState } from \"../common/cpu/ARM\";\nimport { BasicScanlineMachine, HasSerialIO, SerialEvent, SerialIOInterface } from \"../common/devices\";\nimport { newAddressDecoder, Keys, makeKeycodeMap, newKeyboardHandler, EmuHalt } from \"../common/emu\";\nimport { Debuggable, EmuState } from \"../common/baseplatform\";\nimport { hex, lpad } from \"../common/util\";\n\nvar GBA_KEYCODE_MAP = makeKeycodeMap([\n [Keys.A, 0, 0x1],\n [Keys.B, 0, 0x2],\n [Keys.GP_A, 0, 0x1],\n [Keys.GP_B, 0, 0x2],\n [Keys.SELECT,0, 0x4],\n [Keys.START ,0, 0x8],\n [Keys.RIGHT, 0, 0x10],\n [Keys.LEFT, 0, 0x20],\n [Keys.UP, 0, 0x40],\n [Keys.DOWN, 0, 0x80],\n]);\n\nconst ROM_START = 0x0;\nconst ROM_SIZE = 0x80000;\nconst RAM_START = 0x2000000;\nconst RAM_SIZE = 0x80000;\nconst IO_START = 0x4000000;\nconst IO_SIZE = 0x100;\nconst MAX_SERIAL_CHARS = 1000000;\n\nconst CPU_FREQ = 4000000; // 4 MHz\n\nexport class ARM32Machine extends BasicScanlineMachine implements Debuggable, HasSerialIO {\n\n cpuFrequency = CPU_FREQ; // MHz\n canvasWidth = 160;\n numTotalScanlines = 256;\n numVisibleScanlines = 128;\n cpuCyclesPerLine = Math.floor(CPU_FREQ / (256*60));\n defaultROMSize = 512*1024;\n sampleRate = 1;\n \n cpu: ARM32CPU = new ARM32CPU();\n ram = new Uint8Array(96*1024);\n ram16 = new Uint16Array(this.ram.buffer);\n pixels32 : Uint32Array;\n pixels8 : Uint8Array;\n vidbase : number = 0;\n brightness : number = 255;\n serial : SerialIOInterface;\n serialOut : SerialEvent[];\n serialIn : SerialEvent[];\n\n constructor() {\n super();\n this.connectCPUMemoryBus(this);\n this.handler = newKeyboardHandler(this.inputs, GBA_KEYCODE_MAP);\n }\n\n connectVideo(pixels:Uint32Array) : void {\n super.connectVideo(pixels);\n this.pixels32 = pixels;\n this.pixels8 = new Uint8Array(pixels.buffer);\n }\n\n connectSerialIO(serial: SerialIOInterface) {\n this.serial = serial;\n }\n\n reset() {\n super.reset();\n this.serialOut = [];\n this.serialIn = [];\n }\n\n // TODO: 32-bit bus?\n\n read = newAddressDecoder([\n [ROM_START, ROM_START+ROM_SIZE-1, ROM_SIZE-1, (a) => {\n return this.rom ? this.rom[a] : 0;\n }],\n [RAM_START, RAM_START+RAM_SIZE-1, RAM_SIZE-1, (a) => {\n return this.ram[a];\n }],\n [IO_START, IO_START+IO_SIZE-1, IO_SIZE-1, (a, v) => {\n return this.readIO(a);\n }],\n [0, (1<<31)-1, 0, (a, v) => {\n throw new EmuHalt(`Address read out of bounds: 0x${hex(a)}`);\n }]\n ]);\n\n write = newAddressDecoder([\n [RAM_START, RAM_START+RAM_SIZE-1, RAM_SIZE-1, (a, v) => {\n this.ram[a] = v;\n }],\n [IO_START, IO_START+IO_SIZE-1, IO_SIZE-1, (a, v) => {\n this.writeIO(a, v);\n }],\n ]);\n\n readIO(a : number) : number {\n switch (a) {\n case 0x0:\n return this.inputs[0];\n case 0x40:\n return (this.serial.byteAvailable() ? 0x80 : 0) | (this.serial.clearToSend() ? 0x40 : 0);\n case 0x44:\n let evin = this.serialIn.shift();\n if (evin != null) {\n this.serialOut.push(evin);\n return evin.value;\n } else\n return 0;\n default:\n return 0;\n }\n }\n\n writeIO(a : number, v : number) : void {\n switch (a) {\n case 0x0:\n //this.brightness = v & 0xff;\n break;\n case 0x48:\n if (this.serialOut.length < MAX_SERIAL_CHARS) {\n this.serialOut.push({op:'write', value:v, nbits:8});\n }\n break;\n }\n }\n\n startScanline() {\n }\n\n drawScanline() {\n }\n \n postFrame() {\n var p32 = this.pixels32;\n var vbase = (this.vidbase >> 1) & 0xfffff;\n var mask = this.brightness << 24;\n for (var i=0; i\n // 000rrrrr000ggggg000bbbbb00011111111\n p32[i] = mask | ((col&31)<<3) | (((col>>5)&31)<<11) | (((col>>10)&31)<<19);\n }\n }\n\n getDebugCategories() {\n return ['CPU', 'Stack'];\n }\n\n getDebugInfo?(category: string, state: EmuState) : string {\n switch (category) {\n case 'CPU':\n var s = '';\n var c = state.c as ARMCoreState;\n const EXEC_MODE = {2:'Thumb',4:'ARM'};\n const REGNAMES = {15:'PC',14:'LR',13:'SP',12:'IP',11:'FP',9:'SB'};\n for (var i=0; i<16; i++) {\n s += lpad(REGNAMES[i]||'',3) + lpad('r'+i, 5) + ' ' + hex(c.gprs[i],8) + '\\n';\n }\n s += 'Flags ';\n s += c.cpsrN ? \" N\" : \" -\";\n s += c.cpsrV ? \" V\" : \" -\";\n s += c.cpsrF ? \" F\" : \" -\";\n s += c.cpsrZ ? \" Z\" : \" -\";\n s += c.cpsrC ? \" C\" : \" -\";\n s += c.cpsrI ? \" I\" : \" -\";\n s += '\\n';\n s += 'MODE ' + EXEC_MODE[c.instructionWidth] + ' ' + MODE_NAMES[c.mode] + '\\n';\n s += 'SPSR ' + hex(c.spsr,8) + '\\n';\n s += 'cycl ' + c.cycles + '\\n';\n return s;\n }\n }\n\n saveState() {\n var state = super.saveState() as any;\n state.serial = {\n sin: this.serialIn.slice(0),\n sout : this.serialOut.slice(0)\n }\n return state;\n }\n loadState(state) {\n super.loadState(state);\n this.serialIn = state.serial.sin;\n this.serialOut = state.serial.sout;\n }\n}\n\nconst MODE_NAMES = {\n\t0x10: \"USER\",\n 0x11: \"FIQ\",\n 0x12: \"IRQ\",\n 0x13: \"SUPERVISOR\",\n 0x17: \"ABORT\",\n 0x1b: \"UNDEFINED\",\n 0x1f: \"SYSTEM\",\n};\n", "\nimport { BaseDebugPlatform, CpuState, EmuState, Platform, DisasmLine, Debuggable, Machine, BaseMachinePlatform } from \"../common/baseplatform\";\nimport { AnimationTimer, EmuHalt, padBytes, PLATFORMS, RasterVideo } from \"../common/emu\";\nimport { hex, lpad, loadScript } from \"../common/util\";\nimport { ARM32CPU } from \"../common/cpu/ARM\";\nimport { ARM32Machine } from \"../machine/arm32\";\n\ndeclare var uc, cs : any; // Unicorn module\n\nconst ARM32_PRESETS = [\n { id: 'vidfill.vasm', name: 'Video Memory Fill' },\n];\n\nconst SCREEN_WIDTH = 160;\nconst SCREEN_HEIGHT = 128;\nconst ROM_START_ADDR = 0x0;\nconst HIROM_START_ADDR = 0xff800000;\nconst ROM_SIZE = 512*1024;\nconst RAM_START_ADDR = 0x20000000;\nconst RAM_SIZE = 512*1024;\nconst CLOCKS_PER_FRAME = 10000;\n\ninterface ARM32State extends EmuState {\n r: Uint32Array; // registers\n}\n\nexport abstract class BaseARMMachinePlatform extends BaseMachinePlatform {\n\n //getOpcodeMetadata = getOpcodeMetadata_z80;\n getToolForFilename(fn: string) {\n if (fn.endsWith('.vasm')) return \"vasmarm\";\n else if (fn.endsWith('.armips')) return \"armips\";\n else return \"vasmarm\";\n }\n getPresets() { return ARM32_PRESETS; }\n getDefaultExtension() { return \".vasm\"; };\n \n }\n \nclass ARM32Platform extends BaseARMMachinePlatform implements Platform {\n\n capstone_arm : any;\n capstone_thumb : any;\n\n async start() {\n super.start();\n console.log(\"Loading Capstone\");\n await loadScript('./lib/capstone-arm.min.js');\n this.capstone_arm = new cs.Capstone(cs.ARCH_ARM, cs.MODE_ARM);\n this.capstone_thumb = new cs.Capstone(cs.ARCH_ARM, cs.MODE_THUMB);\n }\n\n newMachine() { return new ARM32Machine(); }\n readAddress(a) { return this.machine.read(a); }\n getMemoryMap = function() { return { main:[\n {name:'ROM',start:0x0000000,size:0x80000,type:'rom'},\n {name:'RAM',start:0x2000000,size:0x80000,type:'ram'},\n {name:'I/O',start:0x4000000,size:0x100,type:'io'},\n ] } };\n disassemble(pc:number, read:(addr:number)=>number) : DisasmLine {\n var is_thumb = this.machine.cpu.isThumb();\n var capstone = is_thumb ? this.capstone_thumb : this.capstone_arm;\n var buf = [];\n for (var i=0; i<4; i++) {\n buf[i] = read(pc+i);\n }\n var insns = capstone.disasm(buf, pc, 4);\n var i0 = insns && insns[0];\n if (i0) {\n return {\n nbytes: i0.size,\n line: i0.mnemonic + \" \" + i0.op_str,\n isaddr: i0.address > 0\n };\n } else {\n return {\n nbytes: 4,\n line: \"???\",\n isaddr: false\n };\n }\n }\n}\n\n////\n\nPLATFORMS['arm32'] = ARM32Platform;\n"], - "mappings": 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cKhdJKVA+EBlwiAgqHAgACAQ+BBjBmO+Yw0A+GVhZQNAQABAAKCgYwJg8PBgAEDg4EAAkF0iyMCw4NBjPV0kxCAAQF0iv0DgQGMiZaFdJLsAAOBj/ABjFUAA4KCgoODAQEBjPCDggGWBYCBjC+AgY0Ug4GWBoGMMY1egY0JjEeBjMkBjd2AgACBdAqXgZSEAQCBAAGM0AEDwkBDQ8GBjJQDAYyYAYICA4ADAoKDAAODAYwJlgYBjDGMRoGNb4EBAYxsgY0fAwKAAgGNl4OBjUaCgZYNjB6DggGWC8GWBYxvggGBjDEBAXQL3Y77AgACgYysAoEBjKqBjEgDgIF0CTUBAYABAQCAgAGAgXQKPXSIkZQLwgF0E/2M0XQLTYwKA4EoHCbNd459KEwIP3V4G3VYHGkcTeLcgE2MRxgRKBwCPCALDWxd41iAwJCEGAk1E1d1mCt1uCeXdVggeINXFzVoQ8fHx0WMfhd13CBi9eNZkMCNdBxx+CPUzxTNjMOVdDSCVeNaAOJBKBgJzfiNmb+X94V0NL/1dDS3DuhZKEQCPxf3h/V4GaWAjZQFWY0VmBUoFCa3dbgbdZgflxc2SFiEHSgwKFkoHCrxKBAwM1cXNYBfxSgsAyWWhOetdCFp+CRJrYiM2AGOiXeyESgMAM10iT/tdI0/83W773Wb8XeLRfl3ComPGBWOG+l0FBgZjhvhdBQYHY4b35j9dw8v35kDdd/+3KAshDQLddf3ddP4YCSEGXQUDXSOl9N1+/koDBMNjHgQegBgCHgDdc/NjcoBdwo1dBE1KAwuwRt1e9hYAe8b/3Xf9es5lof7dbv3dZv7dy/5+KAJrYsssyx0JXQVSXvZLHXm3KGhj2n7LQygJSgQJZk8YEGWBY88rY+V5tyAKSgMD/AQOEBgESgMFaysZBgAJTnndhvNH1d1m+N1u+uXdfvldIr9dxEtdKMT5hd13+RiSXSM9MDEyMzQ1Njc4OSorLC0uLyBdR6Mh510iT0oLChPoSgYLrOljQU4Ea2JdIuxKBQvSCXnmA7Xdd+dKBg3fXSIKcvRYSgoCewAZ3XXu3XTv3X7nXSJc+3lKBAKp8N1++7coBz4n3ZbwGAPdfvDdd+1jWwhjk+5dYyfvXWInNusA3X7r3Zbp0usbYxnTDN1+7V0igDb2YxDwt8r5Gt1+80oDBkNKAwChNuwA3W7oJgAp3X7sXSJyNv9jH/6V3X7/nOInGu6A8l8bSgQE4X7dd+rdNPcgA900+F0DhFzdfvXdlv7dd/Hdfvbdnv9dIs5+/N2G8V1CSH793Y7yXUND+d1m+t1+6nfdfvFdItpjE/JdItxjDGMk+V0GJPpdCyQYUl0CVIb+Y5b23Y5dCijxXQYo8t1u8d1m8mNo3TT5XQKQXRtM3TTsZUHDChpKAwBK6DBt3XH53Tb6AN1e891W9BNKBAW9Rl0D0iFdA9L5b10D0Ppn3X78hWME/YxnXSSncBgfY1mGY9mO+md93Yb8b3zdjv1dBhkMGJzdfvdKAweP+F1iAk7sXQZlXQJXLl0EV10mMV0Dw10lMV0E1fJdB9U2ABgsXQRkXSYDXQPNXRXfNgBjEsYoXUME/UoEApo068PbGV2LAkoGEKIKSgYQ50oDD+gJGm8TSgMPsgddBwRKAxC2xc09XQ03O0oXBeVKAxBTCUoDBnX9Yzvdfv2V/XcASgMQWF0PDkoHBeLFzfAbXQNZ8cHR1cX1r2+wBhAgBAYIeSnLERcwARkQ98npSgwNON1OCN1GCWlgC3y1KAfdfgYSExjy3W4E3WYFSg4F413IPGPxXWKX/t1dYpT/XQo9E10EhX5KBg9JEhMY5uHlXQvuAWWBfgsHOEDdywgm3csJFt3LCmVhCxZdAl6WCF0CXp4JXQJYngpdAlieCzASYxY+Yx4eYyZlYQgeGAQESBi6XRYoOCRdBRJ3BF0FFXddA6hjGHcGY9vddwddDkxBDXi3IKxdBfVd4xRKCAJvZR9lH2UfZR9lG2UB";var S0=[{id:"01-helloworlds.asm",name:"Hello World (ASM)"},{id:"02-telephone.asm",name:"Telephone (ASM)"},{id:"03-horcbpal.asm",name:"Paddle Demo (ASM)"},{id:"hello.c",name:"Hello Graphics"},{id:"lines.c",name:"Lines"},{id:"sprites.c",name:"Sprites"},{id:"vsync.c",name:"Sprites w/ VSYNC"},{id:"fastsprites.c",name:"Fast Sprites"},{id:"music.c",name:"Music"},{id:"rotate.c",name:"Rotate Op"},{id:"rainbow.c",name:"Rainbow"},{id:"cosmic.c",name:"Cosmic Impalas Game"},{id:"racing.c",name:"Pseudo 3-D Racing Game"}],M0=[{id:"bios.c",name:"BIOS"}],V0=[{id:"hello.c",name:"Hello Graphics"}],k=class extends m0{constructor(){super(...arguments);this.getMemoryMap=function(){return{main:[{name:"BIOS",start:0,size:8192,type:"rom"},{name:"Screen RAM",start:16384,size:4096,type:"ram"},{name:"BIOS Variables",start:20430,size:20480-20430,type:"ram"}]}}}newMachine(){return new O(!1)}getPresets(){return S0}getDefaultExtension(){return".c"}readAddress(t){return this.machine.read(t)}showHelp(){return"https://8bitworkshop.com/docs/platforms/astrocade/"}},u0=class extends k{getPresets(){return M0}loadROM(t,i){this.machine.loadBIOS(i)}},h0=class extends k{constructor(){super(...arguments);this.getMemoryMap=function(){return{main:[{name:"ROM",start:0,size:16384,type:"rom"},{name:"Magic RAM",start:0,size:16384,type:"ram"},{name:"Screen RAM",start:16384,size:16384,type:"ram"},{name:"ROM",start:32768,size:16384,type:"rom"}]}}}newMachine(){return new O(!0)}getPresets(){return V0}};v.astrocade=k;v["astrocade-bios"]=u0;v["astrocade-arcade"]=h0; -//# sourceMappingURL=astrocade-Q5URXEDG.js.map +//# sourceMappingURL=astrocade-B6S7IURT.js.map diff --git a/gen/astrocade-Q5URXEDG.js.map b/gen/astrocade-B6S7IURT.js.map similarity index 100% rename from gen/astrocade-Q5URXEDG.js.map rename to gen/astrocade-B6S7IURT.js.map diff --git a/gen/atari7800-NF4HMROI.js b/gen/atari7800-QWAA5553.js similarity index 97% rename from gen/atari7800-NF4HMROI.js rename to gen/atari7800-QWAA5553.js index 4bb62bd2..e6e3558b 100644 --- a/gen/atari7800-NF4HMROI.js +++ b/gen/atari7800-QWAA5553.js @@ -1,7 +1,7 @@ -import{I as $,h as H,k as z,p as Y,t as K,y as V}from"./chunk-42IVW2OL.js";import{$ as W,J as O,V as L,W as o,X as F,Z as E,aa as T,ea as N,g as p}from"./chunk-S4FPTY4A.js";import"./chunk-RQFURXHW.js";var g=0,R=2,v=8,Z=E([[o.A,v+0,128],[o.B,v+1,128],[o.GP_A,v+0,128],[o.GP_B,v+1,128],[o.SELECT,R,-2],[o.START,R,-1],[o.UP,g,-16],[o.DOWN,g,-32],[o.LEFT,g,-64],[o.RIGHT,g,-128],[o.P2_A,v+2,128],[o.P2_B,v+3,128],[o.P2_UP,g,-1],[o.P2_DOWN,g,-2],[o.P2_LEFT,g,-4],[o.P2_RIGHT,g,-8]]);var D=263,j=258-16,y=451,tt=28,et=16,rt=24,G=2,X=D*60*G,B=class{constructor(){this.regs=new Uint8Array(32)}reset(){this.regs.fill(0)}read(t){return this.regs[t]|0}write(t,e){this.regs[t]=e}saveState(){return{regs:this.regs.slice(0)}}loadState(t){for(let e=0;e<32;e++)this.write(e,t.regs[e])}static stateToLongString(t){let e="";return e+=L(t.regs,0,32),e}},_=class{constructor(){this.cycles=0;this.regs=new Uint8Array(32);this.offset=-1;this.dll=0;this.dlstart=0;this.dli=!1;this.h16=!1;this.h8=!1;this.writemode=0;this.indirect=!1;this.pixels=new Uint8Array(320);this.WSYNC=0}reset(){this.regs.fill(0)}read(t){return this.regs[t]|0}write(t,e){this.regs[t]=e,t==4&&this.WSYNC++}saveState(){return{regs:this.regs.slice(0),offset:this.offset,dll:this.dll,dlstart:this.dlstart,dli:this.dli,h16:this.h16,h8:this.h8,indirect:this.indirect,writemode:this.writemode}}loadState(t){for(let e=0;e<32;e++)this.write(e,t.regs[e]|0);this.offset=t.offset|0,this.dll=t.dll|0,this.dlstart=t.dlstart|0,this.dli=!!t.dli,this.h16=!!t.h16,this.h8=!!t.h8,this.indirect=!!t.indirect,this.writemode=t.writemode|0}isDMAEnabled(){return(this.regs[28]&96)==64}getDLLStart(){return(this.regs[12]<<8)+this.regs[16]}getCharBaseAddress(){return(this.regs[20]<<8)+this.offset}setVBLANK(t){t?(this.regs[8]|=128,this.offset=-1,this.dll=this.getDLLStart(),this.dli=this.bus&&(this.bus.read(this.dll)&128)!=0):this.regs[8]&=~128}readDLLEntry(t){if(this.dll>=16384)return;let e=t.read(this.dll);this.offset=e&15,this.h16=(e&64)!=0,this.h8=(e&32)!=0,this.dlstart=(t.read(this.dll+1)<<8)+t.read(this.dll+2),this.dll=this.dll+3&65535,this.dli=(t.read(this.dll)&128)!=0}isHoley(t){return this.indirect?!1:!!(t&32768&&(this.h16&&t&4096||this.h8&&t&2048))}readDMA(t){return this.isHoley(t)?0:(this.cycles+=3,this.bus.read(t))}doDMA(t){this.bus=t,this.cycles=0;let e=this.pixels;if(e.fill(this.regs[0]),this.isDMAEnabled()){this.cycles+=this.offset==0?rt:et,this.offset<0&&this.readDLLEntry(t);let c=this.dlstart&65280,a=this.dlstart&255;do{let u=t.read(c+(a+0&511)),s=t.read(c+(a+1&511));if(s==0||c>=16384)break;let S=t.read(c+(a+2&511)),b=t.read(c+(a+3&511)),d=!1;if((s&31)==0){var i=b>>5,f=32-(b&31),r=t.read(c+(a+4&511));d=(s&32)!=0,a+=5,this.cycles+=10,this.writemode=s&128}else{var r=b,i=s>>5,f=32-(s&31);a+=4,this.cycles+=8}this.indirect=d;let x=u+((S+(d?0:this.offset)&255)<<8);r*=2;let C=this.regs[28],M=(C&3)+(this.writemode?4:0),A=(C&4)!=0,I=d&&(C&16)!=0;I&&(f*=2);for(var m=0;m>1):x+m);if(d){let w=(this.regs[20]+this.offset<<8)+h;I&&m&1&&(w++,this.cycles-=3),h=this.readDMA(w)}switch(M){case 0:for(let n=0;n<4;n++){let l=h>>6&3;(l||A)&&(e[r]=e[r+1]=this.regs[(i<<2)+l]),h<<=2,r=r+2&511}break;case 3:for(let n=0;n<8;n++){let l=(h&128)>>6;(l||A)&&(e[r]=this.regs[(i<<2)+l]),h<<=1,r=r+1&511}break;case 4:for(let n=0;n<2;n++){let l=(h>>6&3)+(h&12);(l&3||A)&&(e[r]=e[r+1]=e[r+2]=e[r+3]=this.regs[((i&4)<<2)+l]),h<<=2,r=r+2&511}break;case 6:for(let n=0;n<4;n++){let l=(h&128)>>6|(h&8)>>3;(l||A)&&(e[r]=this.regs[(i<<2)+l]),h<<=1,r=r+1&511}break;case 2:for(let n=0;n<8;n++){let l=(h&128)>>6;l+=n&1?i&1:i>>1&1,(l||A)&&(e[r]=this.regs[(i<<2)+l]),h<<=1,r=r+1&511}break;case 7:let w=h;for(let n=0;n<4;n++){n==2&&(w<<=2);let l=(h&128)>>6,Q=i&4|w>>2&3;(l||A)&&(e[r]=this.regs[(Q<<2)+l]),h<<=1,r=r+1&511}break}}}while(this.cycles=16384)return;let e=t.read(this.dll);this.offset=e&15,this.h16=(e&64)!=0,this.h8=(e&32)!=0,this.dlstart=(t.read(this.dll+1)<<8)+t.read(this.dll+2),this.dll=this.dll+3&65535,this.dli=(t.read(this.dll)&128)!=0}isHoley(t){return this.indirect?!1:!!(t&32768&&(this.h16&&t&4096||this.h8&&t&2048))}readDMA(t){return this.isHoley(t)?0:(this.cycles+=3,this.bus.read(t))}doDMA(t){this.bus=t,this.cycles=0;let e=this.pixels;if(e.fill(this.regs[0]),this.isDMAEnabled()){this.cycles+=this.offset==0?rt:et,this.offset<0&&this.readDLLEntry(t);let c=this.dlstart&65280,a=this.dlstart&255;do{let u=t.read(c+(a+0&511)),s=t.read(c+(a+1&511));if(s==0||c>=16384)break;let S=t.read(c+(a+2&511)),b=t.read(c+(a+3&511)),d=!1;if((s&31)==0){var i=b>>5,f=32-(b&31),r=t.read(c+(a+4&511));d=(s&32)!=0,a+=5,this.cycles+=10,this.writemode=s&128}else{var r=b,i=s>>5,f=32-(s&31);a+=4,this.cycles+=8}this.indirect=d;let x=u+((S+(d?0:this.offset)&255)<<8);r*=2;let C=this.regs[28],M=(C&3)+(this.writemode?4:0),A=(C&4)!=0,I=d&&(C&16)!=0;I&&(f*=2);for(var m=0;m>1):x+m);if(d){let w=(this.regs[20]+this.offset<<8)+h;I&&m&1&&(w++,this.cycles-=3),h=this.readDMA(w)}switch(M){case 0:for(let n=0;n<4;n++){let l=h>>6&3;(l||A)&&(e[r]=e[r+1]=this.regs[(i<<2)+l]),h<<=2,r=r+2&511}break;case 3:for(let n=0;n<8;n++){let l=(h&128)>>6;(l||A)&&(e[r]=this.regs[(i<<2)+l]),h<<=1,r=r+1&511}break;case 4:for(let n=0;n<2;n++){let l=(h>>6&3)+(h&12);(l&3||A)&&(e[r]=e[r+1]=e[r+2]=e[r+3]=this.regs[((i&4)<<2)+l]),h<<=2,r=r+2&511}break;case 6:for(let n=0;n<4;n++){let l=(h&128)>>6|(h&8)>>3;(l||A)&&(e[r]=this.regs[(i<<2)+l]),h<<=1,r=r+1&511}break;case 2:for(let n=0;n<8;n++){let l=(h&128)>>6;l+=n&1?i&1:i>>1&1,(l||A)&&(e[r]=this.regs[(i<<2)+l]),h<<=1,r=r+1&511}break;case 7:let w=h;for(let n=0;n<4;n++){n==2&&(w<<=2);let l=(h&128)>>6,Q=i&4|w>>2&3;(l||A)&&(e[r]=this.regs[(Q<<2)+l]),h<<=1,r=r+1&511}break}}}while(this.cycles(this.xtracyc++,this.readInput(t))],[0,31,31,t=>(this.xtracyc++,this.tia.read(t))],[32,63,31,t=>this.maria.read(t)],[64,255,255,t=>this.ram[t+2048]],[256,319,255,t=>this.read(t)],[320,511,511,t=>this.ram[t+2048]],[640,767,127,t=>(this.xtracyc++,this.readPIA(t))],[6144,10239,65535,t=>this.ram[t-6144]],[10240,16383,2047,t=>this.read(t|8192)],[16384,65535,65535,t=>this.rom?this.rom[t-16384]:0],[0,65535,65535,t=>this.probe&&this.probe.logIllegal(t)]]),this.write=T([[21,26,31,(t,e)=>{this.xtracyc++,this.pokey1.setTIARegister(t,e)}],[0,31,31,(t,e)=>{this.xtracyc++,this.tia.write(t,e)}],[32,63,31,(t,e)=>{this.maria.write(t,e)}],[64,255,255,(t,e)=>{this.ram[t+2048]=e}],[256,319,255,(t,e)=>{this.write(t,e)}],[320,511,511,(t,e)=>{this.ram[t+2048]=e}],[640,767,127,(t,e)=>{this.xtracyc++,this.writePIA(t,e)}],[6144,10239,65535,(t,e)=>{this.ram[t-6144]=e}],[10240,16383,2047,(t,e)=>{this.write(t|8192,e)}],[49151,49151,65535,(t,e)=>{}],[0,65535,65535,(t,e)=>{this.probe&&this.probe.logIllegal(t)}]]),this.connectCPUMemoryBus(this),this.dmaBus=this.probeDMABus(this),this.handler=F(this.inputs,Z),this.pokey1=new H,this.audioadapter=new z(this.pokey1,G,X)}readConst(t){let e=this.probe;this.probe=null;let i=this.read(t);return this.probe=e,i}readInput(t){switch(t){case 12:return~this.inputs[8]&128;case 13:return~this.inputs[9]&128;default:return this.inputs[t]|0}}readPIA(t){switch(t){case 0:case 2:return this.inputs[t];case 1:case 3:return this.regs6532[t];case 4:return this.getPIATimerValue();default:return 0}}writePIA(t,e){switch(t){case 0:case 1:case 2:case 3:this.regs6532[t]=e;return;case 20:this.setPIATimer(e,0);return;case 21:this.setPIATimer(e,3);return;case 22:this.setPIATimer(e,6);return;case 23:this.setPIATimer(e,10);return;case 24:this.setPIATimer(e,6);return}}setPIATimer(t,e){this.piatimer=t+1<0?t>>this.timerinterval:t&255}advanceCPU(){var t=super.advanceCPU();return this.tickPIATimer(t),this.xtracyc&&(t+=this.xtracyc,this.tickClocks(this.xtracyc),this.xtracyc=0),t}tickClocks(t){this.probe.logClocks(t),this.tickPIATimer(t)}tickPIATimer(t){this.piatimer=Math.max(-256,this.piatimer-t)}advanceFrame(t){var e=this.pixels,i=0,f,r=0,m=0,c=0;this.lastFrameCycles=-1,this.probe.logNewFrame();for(var a=0;a>2),r+=S,e){let x=(this.maria.regs[28]&128)!=0?15:255;for(var s=0;s<320;s++)e[i++]=q[this.maria.pixels[s]&x]}}for((u||a==D-1)&&this.maria.doInterrupt()&&(this.probe.logInterrupt(0),this.cpu.NMI());r>2),r=y;break}if(t&&t()){t=null,a=999,this.lastFrameCycles=r;break}r+=this.advanceCPU()<<2,c++}this.audio&&this.audioadapter.generate(this.audio),r-=y,m+=r,this.probe.logNewScanline()}return c}getRasterX(){return(this.lastFrameCycles+y)%y}getRasterY(){return this.scanline}getRasterCanvasPosition(){return{x:this.getRasterX(),y:this.getRasterY()}}loadROM(t){t.length==49280&&(t=t.slice(128)),this.rom=W(t,this.defaultROMSize,!0)}reset(){super.reset(),this.tia.reset(),this.maria.reset(),this.inputs.fill(0),this.inputs[g]=255,this.inputs[R]=1+2+8,this.setPIATimer(0,0)}readAddress(t){return this.read(t)|0}loadState(t){this.cpu.loadState(t.c),this.ram.set(t.ram),this.tia.loadState(t.tia),this.maria.loadState(t.maria),this.regs6532.set(t.regs6532),this.piatimer=t.pia.timer,this.timerinterval=t.pia.interval,this.loadControlsState(t)}saveState(){return{c:this.cpu.saveState(),ram:this.ram.slice(0),tia:this.tia.saveState(),maria:this.maria.saveState(),regs6532:this.regs6532.slice(0),inputs:this.inputs.slice(0),pia:{timer:this.piatimer,interval:this.timerinterval}}}loadControlsState(t){this.inputs.set(t.inputs)}saveControlsState(){return{inputs:this.inputs.slice(0)}}getDebugCategories(){return["CPU","Stack","TIA","MARIA"]}getDebugInfo(t,e){switch(t){case"TIA":return B.stateToLongString(e.tia);case"MARIA":return _.stateToLongString(e.maria)+` Scanline: `+this.scanline}}getDebugDisplayLists(){let t={},e=this.maria.getDLLStart(),i=0;for(;i<240;){let f=this.readConst(e),r=f&15,m=(f&64)!=0,c=(f&32)!=0,a=(this.readConst(e+1)<<8)+this.readConst(e+2);e=e+3&65535;let u=(this.readConst(e)&128)!=0,s="DL $"+p(a,4)+" "+i+"-"+(i+r);m&&(s+=" H16"),c&&(s+=" H8"),u&&(s+=" DLI"),t[s]={$$:this._readDebugDisplayList(a)},i+=r+1}return t}_readDebugDisplayList(t){return()=>this.readDebugDisplayList(t)}readDebugDisplayList(t){let e=[],i=t&65280,f=t&255;do{let a=this.maria.regs[28],u=this.readConst(i+(f+0&511)),s=this.readConst(i+(f+1&511));if(s==0)break;let S=this.readConst(i+(f+2&511)),b=this.readConst(i+(f+3&511)),d=!1,x="",C,M=(a&3)+(s&128?4:0);if((s&31)==0){var r=b>>5,m=32-(b&31),c=this.readConst(i+(f+4&511));d=(s&32)!=0,C=s&128,f+=5}else{var c=b,r=s>>5,m=32-(s&31);f+=4}x+="X="+c+" W="+m+" P="+r,C&&(x+=" WM=1"),d&&(x+=" CHR=$"+p(this.maria.regs[20]+this.maria.offset&255)+"xx");let A=u+((S+(d?0:this.maria.offset)&255)<<8);x=" $"+p(A,4)+" "+x,x=["160A","?","320D","320A","160B","?","320B","320C"][M]+" "+x,e.push(x)}while(f<512);return e}},q=new Uint32Array(256);for(P=0;P<256;P++)q[P]=N(P);var P;var it=[{id:"sprites.dasm",name:"Sprites (ASM)",category:"Assembler"},{id:"wsync.c",name:"WSYNC",category:"CC65"},{id:"sprites.c",name:"Double Buffering"},{id:"scroll.c",name:"Scrolling"},{id:"test_conio.c78",name:"Conio Test",category:"cc7800"},{id:"example_small_sprites.c78",name:"Small Sprites"},{id:"example_vertical_scrolling.c78",name:"Vertical Scrolling"}],J=class extends ${constructor(){super(...arguments);this.getMemoryMap=function(){return{main:[{name:"TIA",start:0,size:32,type:"io"},{name:"MARIA",start:32,size:32,type:"io"},{name:"RAM (6166 Block 0)",start:64,size:192,type:"ram"},{name:"RAM (6166 Block 1)",start:320,size:192,type:"ram"},{name:"PIA",start:640,size:24,type:"io"},{name:"RAM",start:6144,size:4096,type:"ram"},{name:"Cartridge ROM",start:16384,size:49152-6,type:"rom"},{name:"CPU Vectors",start:65530,size:6,type:"rom"}]}}}newMachine(){return new U}getPresets(){return it}getDefaultExtension(){return".c"}readAddress(t){return this.machine.readConst(t)}getROMExtension(){return".a78"}getDebugTree(){let t=super.getDebugTree();return t.display_list=this.machine.getDebugDisplayLists(),t}getToolForFilename(t){return t.endsWith(".cc7800")||t.endsWith(".c78")?"cc7800":V(t)}};O.atari7800=J; -//# sourceMappingURL=atari7800-NF4HMROI.js.map +//# sourceMappingURL=atari7800-QWAA5553.js.map diff --git a/gen/atari7800-NF4HMROI.js.map b/gen/atari7800-QWAA5553.js.map similarity index 100% rename from gen/atari7800-NF4HMROI.js.map rename to gen/atari7800-QWAA5553.js.map diff --git a/gen/atari8-7FKUDPVY.js b/gen/atari8-N4PRCBAP.js similarity index 98% rename from gen/atari8-7FKUDPVY.js rename to gen/atari8-N4PRCBAP.js index 399766be..313aa5fe 100644 --- a/gen/atari8-7FKUDPVY.js +++ b/gen/atari8-N4PRCBAP.js @@ -1,4 +1,4 @@ -import{a as xt}from"./chunk-ZYQJTLXH.js";import{B as ft,I as dt,g as nt,k as ht,q as ot,t as ct,y as lt}from"./chunk-42IVW2OL.js";import{J as I,O as T,V as A,W as i,X as it,Z as rt,a as v,aa as C,ea as at,g as f,r as _}from"./chunk-S4FPTY4A.js";import"./chunk-RQFURXHW.js";var Ut=[0,25,17,9],Yt=[0,25+64,17+80,9+96],E=0,Bt=1,j=2,z=3,Ht=4,Qt=5,jt=7,zt=9,L=10,Xt=11,Gt=12,qt=13,ut=14,Wt=15,K=15;var Zt=17-4,$t=110-4,Jt=105,X=[0,0,8,10,8,16,8,16,8,4,4,2,1,2,1,1],te=[0,0,2,2,2,2,4,4,8,4,4,4,4,2,2,2],ee=[0,0,0,0,0,1,0,1,0,0,2,1,0,0,0,0],mt=[0,0,1,1,2,2,2,2,8,4,4,2,2,2,2,1],V=class{constructor(t,e){this.regs=new Uint8Array(16);this.dma_enabled=!1;this.dliop=0;this.mode=0;this.jmp=!1;this.lms=!1;this.dlarg_lo=0;this.dlarg_hi=0;this.period=0;this.scanaddr=0;this.startaddr=0;this.pfbyte=0;this.ch=0;this.linesleft=0;this.yofs=0;this.isfirstline=!1;this.v=0;this.h=0;this.linebuf=new Uint8Array(48);this.dmaclock=0;this.dmaidx=0;this.output=0;this.dramrefresh=!1;this.in_vscroll=0;this.read=t,this.nmi=e}reset(){this.regs.fill(0),this.regs[ut]=0,this.regs[K]=127,this.regs[Gt]=0,this.regs[qt]=255,this.setReg(E,0),this.h=this.v=0,this.startaddr=this.scanaddr=0,this.dmaclock=0}saveState(){return _(0,{},this)}loadState(t){_(0,this,t),this.setReg(E,t.regs[E])}static stateToLongString(t){let e="";return e+="H: "+v(t.h,3)+" V: "+v(t.v,3)+` +import{a as xt}from"./chunk-ZE6LZV4I.js";import{B as ft,I as dt,g as nt,k as ht,q as ot,t as ct,y as lt}from"./chunk-ULPRULB6.js";import{J as I,O as T,V as A,W as i,X as it,Z as rt,a as v,aa as C,ea as at,g as f,r as _}from"./chunk-RXF2JDJ3.js";import"./chunk-WAARL7ET.js";var Ut=[0,25,17,9],Yt=[0,25+64,17+80,9+96],E=0,Bt=1,j=2,z=3,Ht=4,Qt=5,jt=7,zt=9,L=10,Xt=11,Gt=12,qt=13,ut=14,Wt=15,K=15;var Zt=17-4,$t=110-4,Jt=105,X=[0,0,8,10,8,16,8,16,8,4,4,2,1,2,1,1],te=[0,0,2,2,2,2,4,4,8,4,4,4,4,2,2,2],ee=[0,0,0,0,0,1,0,1,0,0,2,1,0,0,0,0],mt=[0,0,1,1,2,2,2,2,8,4,4,2,2,2,2,1],V=class{constructor(t,e){this.regs=new Uint8Array(16);this.dma_enabled=!1;this.dliop=0;this.mode=0;this.jmp=!1;this.lms=!1;this.dlarg_lo=0;this.dlarg_hi=0;this.period=0;this.scanaddr=0;this.startaddr=0;this.pfbyte=0;this.ch=0;this.linesleft=0;this.yofs=0;this.isfirstline=!1;this.v=0;this.h=0;this.linebuf=new Uint8Array(48);this.dmaclock=0;this.dmaidx=0;this.output=0;this.dramrefresh=!1;this.in_vscroll=0;this.read=t,this.nmi=e}reset(){this.regs.fill(0),this.regs[ut]=0,this.regs[K]=127,this.regs[Gt]=0,this.regs[qt]=255,this.setReg(E,0),this.h=this.v=0,this.startaddr=this.scanaddr=0,this.dmaclock=0}saveState(){return _(0,{},this)}loadState(t){_(0,this,t),this.setReg(E,t.regs[E])}static stateToLongString(t){let e="";return e+="H: "+v(t.h,3)+" V: "+v(t.v,3)+` `,e+="DLIOp: "+f(t.dliop,2)+" Lines: "+t.yofs+"/"+t.linesleft,e+=" DMA "+(t.dma_enabled?"ON ":"off"),t.dma_enabled&&(e+=" idx "+t.dmaidx+" clk "+f(t.dmaclock)),e+=` `,e+="Addr: "+f(t.scanaddr,4)+` `,e+=A(t.regs,0,16).replace("$00","Regs"),e}setReg(t,e){switch(t){case L:this.regs[L]=255;return;case Wt:this.regs[K]=31;return}this.regs[t]=e}readReg(t){switch(t){case K:return this.regs[t];case Xt:return this.v>>1;default:return 255}}processDLIEntry(){if(this.mode==0)this.linesleft=(this.dliop>>4&7)+1,this.dmaclock=0;else{this.linesleft=X[this.mode],this.period=te[this.mode],this.jmp?(this.regs[j]=this.dlarg_lo,this.regs[z]=this.dlarg_hi,this.mode=this.period=0,this.dliop&64&&(this.linesleft=1,this.dma_enabled=!1),this.dmaclock=0):this.lms&&(this.scanaddr=this.dlarg_lo+(this.dlarg_hi<<8)),this.startaddr=this.scanaddr;let t=this.regs[E]&3,e=this.dliop&16?(this.regs[Ht]&15)>>1:0;this.dliop&16&&t<3&&t++,this.left=Ut[t]+e,this.right=Yt[t]+e;let s=this.regs[Qt]&15;this.dliop&32^this.in_vscroll&&(this.in_vscroll?this.linesleft=s+1:(this.linesleft-=s,this.yofs+=s),this.linesleft&=15,this.in_vscroll^=32)}}nextLine(){this.linesleft>0&&(this.linesleft--,this.yofs++,this.isfirstline=!1,this.mode>=8&&this.linesleft&&(this.scanaddr=this.startaddr))}triggerNMI(t){this.regs[K]=t|31,this.regs[ut]&t&&this.nmi()}getDlistAddr(){return this.regs[j]+(this.regs[z]<<8)}nextInsn(){let t=this.getDlistAddr(),e=this.read(t);return t=t+1&1023|t&~1023,this.regs[j]=t&255,this.regs[z]=t>>8,e}nextScreen(){let t=this.read(this.scanaddr);return this.incScanAddr(),t}incScanAddr(){this.scanaddr=this.scanaddr+1&4095|this.scanaddr&~4095}dlDMAEnabled(){return this.regs[E]&32}isVisibleScanline(){return this.v>=8&&this.v<248}isPlayfieldDMAEnabled(){return this.dma_enabled&&!this.linesleft}isPlayerDMAEnabled(){return this.regs[E]&8}isMissileDMAEnabled(){return this.regs[E]&12}isWSYNC(){return this.regs[L]!=0}clockPulse(){let t=this.isWSYNC();if(!this.isVisibleScanline())this.doVBlank();else{switch(this.h){case 0:this.isMissileDMAEnabled()&&(this.doPlayerMissileDMA(3),t=!0);break;case 1:if(this.isPlayfieldDMAEnabled()){let e=this.nextInsn();this.jmp=(e&~64)==1,this.lms=(e&64)!=0&&(e&15)!=0,this.mode=e&15,this.dliop=e,this.yofs=0,this.isfirstline=!0,t=!0}break;case 2:case 3:case 4:case 5:this.isPlayerDMAEnabled()&&(this.doPlayerMissileDMA(this.h+2),t=!0);break;case 6:case 7:this.isPlayfieldDMAEnabled()&&this.isfirstline&&(this.jmp||this.lms)&&(this.h==6&&(this.dlarg_lo=this.nextInsn()),this.h==7&&(this.dlarg_hi=this.nextInsn()),t=!0);break;case 8:this.isfirstline&&this.processDLIEntry(),this.dliop&128&&this.linesleft==1&&this.triggerNMI(128);break;case 9:break;case 111:this.dma_enabled&&this.nextLine(),++this.v;break}if(this.output=0,this.mode>=2&&this.period){let e=this.h<=Jt;this.dmaclock=this.dmaclock<<1&511,this.dmaclock&1<=8&&this.incScanAddr(),t=e),this.output=this.h>=this.left+3&&this.h<=this.right+2?4:0}}return(this.h$t)&&(this.output=2),this.incHorizCounter(),!t&&this.dramrefresh&&(this.read(0),this.dramrefresh=!1,t=!0),t}incHorizCounter(){switch(this.h){case 25:case 25+4*1:case 25+4*2:case 25+4*3:case 25+4*4:case 25+4*5:case 25+4*6:case 25+4*7:case 25+4*8:this.dramrefresh=!0;break;case 102:this.regs[L]=0;break;case 113:this.h=0;return}++this.h}doVBlank(){this.linesleft=this.mode=this.period=0,this.h==111&&this.v++,this.v==248&&this.h==0&&this.triggerNMI(64),this.v==262&&this.h==112&&(this.v=0),this.v==7&&this.h==113&&(this.dma_enabled=this.dlDMAEnabled()!=0),this.output=2,this.dmaclock=0}doPlayerMissileDMA(t){let e=this.regs[E]&16,s=this.regs[jt]<<8;e?(s&=63488,s|=t<<8,s|=this.v&255):(s&=64512,s|=t<<7,s|=this.v>>1),this.read(s)}readBitmapData(){let t=this.mode;if(t<8){let e=this.ch,s=this.yofs>>ee[this.mode],a=s&7,n=this.regs[zt];(t&14)==6?(e&=63,n&=254):(e&=127,n&=252);let h=(e<<3)+(n<<8);if((t&14)==2){let o=this.regs[Bt],l=t==3&&(e&96)==96;o&4?this.pfbyte=this.read(h+(a^7)):this.pfbyte=this.read(h+a),l&&s<2&&(this.pfbyte=0),!l&&s>7&&(this.pfbyte=0),this.ch&128&&(o&1&&(this.pfbyte=0),o&2&&(this.pfbyte^=255))}else this.pfbyte=this.read(h+a)}else this.pfbyte=this.nextScreen()}shiftout(){if(this.output==4)switch(this.mode){case 2:case 3:case 15:{let t=this.pfbyte>>7&1;return this.pfbyte<<=1,t?8:6}case 6:case 7:{let t=this.pfbyte>>7&1;return this.pfbyte<<=1,t?(this.ch>>6)+4:0}case 9:case 11:case 12:{let t=this.pfbyte>>7&1;return this.pfbyte<<=1,t?4:0}case 4:case 5:{let t=this.pfbyte>>6&3;return this.pfbyte<<=2,this.ch&128?[0,4,5,7][t]:[0,4,5,6][t]}case 8:case 10:case 13:case 14:{let t=this.pfbyte>>6&3;return this.pfbyte<<=2,[0,4,5,6][t]}}return this.output}};var se=0;var ie=8,re=12,gt=13,pt=17,y=18,g=22,ae=23,ne=24,he=25,S=26,w=27,oe=28,bt=29,ce=30,le=31,fe=0,de=4,xe=8,N=12,_t=16,G=31,yt=-9,F=[0,1,2,3,7,7,7,7,8,8,8,8,4,5,6,7,0,1,2,3,7,7,7,7,8,8,8,8,4,5,6,7,0,1,6,7,5,5,5,5,8,8,8,8,2,3,4,5,0,1,6,7,5,5,5,5,8,8,8,8,2,3,4,5,4,5,6,7,3,3,3,3,8,8,8,8,0,1,2,3,4,5,6,7,3,3,3,3,8,8,8,8,0,1,2,3,4,5,6,7,3,3,3,3,8,8,8,8,0,1,2,3,4,5,6,7,3,3,3,3,8,8,8,8,0,1,2,3,2,3,4,5,7,7,7,7,8,8,8,8,0,1,6,7,2,3,4,5,7,7,7,7,8,8,8,8,0,1,6,7,2,3,4,5,7,7,7,7,8,8,8,8,0,1,6,7,2,3,4,5,7,7,7,7,8,8,8,8,0,1,6,7,2,3,4,5,7,7,7,7,8,8,8,8,0,1,6,7,2,3,4,5,7,7,7,7,8,8,8,8,0,1,6,7,2,3,4,5,7,7,7,7,8,8,8,8,0,1,6,7,2,3,4,5,7,7,7,7,8,8,8,8,0,1,6,7],ue=[y+0,y+1,y+2,y+3,g+0,g+1,g+2,g+3,S,S,S,S,g+0,g+1,g+2,g+3],U=class{constructor(){this.regs=new Uint8Array(32);this.readregs=new Uint8Array(32);this.shiftregs=new Uint32Array(8);this.count=0;this.an=0;this.rgb=0;this.pmcol=0;this.gtiacol=0;this.gtiacol2=0;this.hbias=yt;this.pmDebugMask=-1}reset(){this.regs.fill(0),this.readregs.fill(0),this.readregs[20]=15,this.readregs.fill(15,21),this.count=0}saveState(){return _(0,{},this)}loadState(t){_(0,this,t)}setReg(t,e){switch(t){case y:case y+1:case y+2:case y+3:case g:case g+1:case g+2:case g+3:case S:e&=254;break;case ce:this.readregs.fill(0,0,16);return}this.regs[t]=e}readReg(t){switch(t){case G:return this.readregs[t]&~this.regs[le]}return this.readregs[t]}sync(){this.count=0}setBias(t){this.hbias=yt+t}updateGfx(t,e,s){switch(t){case 0:this.regs[bt]&1&&(this.regs[pt]=s);break;case 2:case 3:case 4:case 5:this.regs[bt]&2&&(!(e&1)||!(this.regs[oe]&1<>6){case 0:switch(this.an){case 0:return S;case 4:case 5:case 6:case 7:return g+this.an-4;case 8:return this.regs[ne]&240|this.regs[ae]&15|256}break;case 1:return this.regs[S]&240|this.gtiacol&15|256;case 2:return ue[this.gtiacol];case 3:return this.regs[S]&15|this.gtiacol<<4|256}return 256}anySpriteActive(){return this.shiftregs[0]||this.shiftregs[1]||this.shiftregs[2]||this.shiftregs[3]||this.shiftregs[4]||this.shiftregs[5]||this.shiftregs[6]||this.shiftregs[7]}processPlayerMissile(){if(!this.anySpriteActive()){this.evalTrigger(0),this.evalTrigger(1),this.evalTrigger(2),this.evalTrigger(3),this.evalTrigger(4),this.evalTrigger(5),this.evalTrigger(6),this.evalTrigger(7),this.pmcol=-1;return}if(this.an==2){this.shiftObject(0),this.shiftObject(1),this.shiftObject(2),this.shiftObject(3),this.shiftObject(4),this.shiftObject(5),this.shiftObject(6),this.shiftObject(7),this.pmcol=-1;return}let t=(this.regs[w]&15)<<4,e=F[(this.an&7)+8+t],s=this.an-4,a=-1,n=0;for(let h=0;h<4;h++)if(this.shiftObject(h)){s>=0&&(this.readregs[de+h]|=1<=0&&(this.readregs[fe+h]|=1<=0?this.getObjectColor(a):-1}shiftObject(t){let e=(this.shiftregs[t]&2147483648)!=0;return this.shiftregs[t]<<=1,this.evalTrigger(t),e}getObjectColor(t){return this.regs[w]&16&&t>=4?this.regs[he]:this.regs[y+(t&3)]}evalTrigger(t){this.regs[se+t]+this.hbias==this.count&&this.triggerObject(t)}triggerObject(t){let e,s;if(!!(this.pmDebugMask&1<>a&3,s=(this.regs[pt]>>a&3)<<6}e&1?s=At(s):s<<=8,e==3?s=At(s):s<<=16,this.shiftregs[t]|=s}}clockPulse1(){this.processPlayerMissile(),this.clockPulse2(),this.count++}clockPulse2(){var t;if(this.pmcol>=0)t=this.pmcol;else{let e=this.getPlayfieldColor();t=e&256?e&255:this.regs[e]}this.rgb=Et[t],this.gtiacol2=this.gtiacol2<<1|this.an>>3}clockPulse4(){this.gtiacol=this.gtiacol2&15}static stateToLongString(t){let e="";return e+=`X: ${v(t.count,3)} ANTIC: ${f(t.an,1)} PM: ${f(t.pmcol,3)} @@ -7,4 +7,4 @@ import{a as xt}from"./chunk-ZYQJTLXH.js";import{B as ft,I as dt,g as nt,k as ht, `,e+=A(t.readregs,0,32),e}};function At(r){return r=(r|r<<8)&16711935,r=(r|r<<4)&252645135,r=(r|r<<2)&858993459,r=(r|r<<1)&1431655765,r|r<<1}var Et=new Uint32Array(256);for(k=0;k<256;k++)Et[k]=at(k);var k;var c=0;var me=2;var St=4;var Ot=6;var p=8,ge=9,pe=10,be=11,_e=13,q=14,R=15;var ye=8,Ae=9,Ee=10,Se=13,P=14,Y=15;var Rt=128,It=64,Oe=32,Tt=16,Pt=8;var Re=1,Dt=28,Ie=114;var Mt=511,vt=131071,u=0,m=1,b=2,d=3,O=114,Te=15;var Pe=8;var W,B;function De(){W=new Uint8Array(511),B=new Uint8Array(16385);let r=511;for(let t=0;t<511;t++)r=(((r>>5^r)&1)<<8)+(r>>1),W[t]=r;r=131071;for(let t=0;t<16385;t++)r=(((r>>5^r)&255)<<9)+(r>>8),B[t]=r>>1}var H=class{constructor(t,e){this.irq=t;this.antic_xpos=e;this.regs=new Uint8Array(16);this.readregs=new Uint8Array(16);this.divnirq=new Uint32Array(4);this.divnmax=new Uint32Array(4);this.pot_inputs=new Uint8Array(8);this.basemult=0;this.pot_scanline=0;this.random_scanline_counter=0;this.kbcode=0;this.DELAYED_SERIN_IRQ=0;this.DELAYED_SEROUT_IRQ=0;this.DELAYED_XMTDONE_IRQ=0;this.init()}saveState(){return _(0,{},this)}loadState(t){_(0,this,t)}init(){this.readregs.fill(255),this.readregs[Y]=239,this.basemult=Dt,this.pot_inputs.fill(128),De()}read(t){let e=this.readregs[t];switch(t&=15,t){case 0:case 1:case 2:case 3:case 4:case 5:case 6:case 7:return e=this.pot_inputs[t],e>3;s&=7,e=(B[a]>>s)+(B[a+1]<<8-s)}}break}return e&255}write(t,e){switch(t&=15,this.regs[t]=e,t){case p:e&Re?this.basemult=Ie:this.basemult=Dt,this.update_counter(1<=3?(this.readregs[P]|=8,this.DELAYED_XMTDONE_IRQ=2*this.DELAYED_SEROUT_IRQ-2):(this.DELAYED_SEROUT_IRQ=0,this.DELAYED_XMTDONE_IRQ=0));break;case ge:this.divnirq[u]=this.divnmax[u],this.divnirq[m]=this.divnmax[m],this.divnirq[b]=this.divnmax[b],this.divnirq[d]=this.divnmax[d];break;case R:e&4&&(this.pot_scanline=228),(e&3)==0&&(this.DELAYED_SERIN_IRQ=0,this.DELAYED_SEROUT_IRQ=0,this.DELAYED_XMTDONE_IRQ=0);break}this.snd_update(t)}update_counter(t){t&1<0&&--this.DELAYED_SERIN_IRQ==0&&(this.readregs[Se]=this.SIO_GetByte(),this.generateIRQ(32)),this.DELAYED_SEROUT_IRQ>0&&--this.DELAYED_SEROUT_IRQ==0&&this.generateIRQ(16),this.DELAYED_XMTDONE_IRQ>0&&--this.DELAYED_XMTDONE_IRQ==0&&this.generateIRQ(8),this.advanceIRQTimer(u,1),this.advanceIRQTimer(m,2),this.advanceIRQTimer(d,4))}advanceIRQTimer(t,e){(this.divnirq[t]-=O)<0&&(this.divnirq[t]+=this.divnmax[t],this.generateIRQ(e))}generateIRQ(t){this.regs[q]&t&&(this.irq(),this.readregs[P]&=~t)}static stateToLongString(t){let e="";return e+=`Write Registers: `,e+=A(t.regs,0,16),e+=`Read Registers: `,e+=A(t.readregs,0,16),e}CASSETTE_IOLineStatus(){return 0}siocheck(){return((this.regs[c+b]==40||this.regs[c+b]==16||this.regs[c+b]==8||this.regs[c+b]==10)&&this.regs[c+d]==0||(this.regs[R]&120)==40)&&(this.regs[p]&40)==40}SIO_PutByte(t){console.log("SIO put byte",t)}SIO_GetByte(){return 0}};var Me=[i.VK_L,i.VK_J,i.VK_SEMICOLON,i.VK_F4,i.VK_F5,i.VK_K,i.VK_BACK_SLASH,i.VK_TILDE,i.VK_O,null,i.VK_P,i.VK_U,i.VK_ENTER,i.VK_I,i.VK_MINUS2,i.VK_EQUALS2,i.VK_V,i.VK_F7,i.VK_C,i.VK_F6,i.VK_F4,i.VK_B,i.VK_X,i.VK_Z,i.VK_4,null,i.VK_3,i.VK_6,i.VK_ESCAPE,i.VK_5,i.VK_2,i.VK_1,i.VK_COMMA,i.VK_SPACE,i.VK_PERIOD,i.VK_N,null,i.VK_M,i.VK_SLASH,null,i.VK_R,null,i.VK_E,i.VK_Y,i.VK_TAB,i.VK_T,i.VK_W,i.VK_Q,i.VK_9,null,i.VK_0,i.VK_7,i.VK_BACK_SPACE,i.VK_8,null,null,i.VK_F,i.VK_H,i.VK_D,null,i.VK_CAPS_LOCK,i.VK_G,i.VK_S,i.VK_A],ve=rt([[i.UP,0,1],[i.DOWN,0,2],[i.LEFT,0,4],[i.RIGHT,0,8],[{c:16,n:"Shift",plyr:0,button:0},2,1],[i.VK_F1,3,1],[i.VK_F2,3,2],[i.VK_F3,3,4]]),Q=class extends ot{constructor(){super();this.cpuFrequency=1789773;this.numTotalScanlines=262;this.cpuCyclesPerLine=114;this.canvasWidth=336;this.numVisibleScanlines=224;this.aspectRatio=this.canvasWidth/this.numVisibleScanlines*.857;this.firstVisibleScanline=16;this.firstVisibleClock=(44-6)*2;this.defaultROMSize=32768;this.overscan=!0;this.audioOversample=2;this.sampleRate=this.numTotalScanlines*60*this.audioOversample;this.run_address=-1;this.inputs=new Uint8Array(4);this.linergb=new Uint32Array(this.canvasWidth);this.lastdmabyte=0;this.keycode=0;this.cart_80=!1;this.cart_a0=!1;this.xexdata=null;this.keyboard_active=!0;this.d500=new Uint8Array(256);this.cpu=new ct,this.ram=new Uint8Array(65536),this.bios=new Uint8Array(10240),this.bus=this.newBus(),this.connectCPUMemoryBus(this.bus),this.antic=new V(this.readDMA.bind(this),this.antic_nmi.bind(this)),this.gtia=new U,this.irq_pokey=new H(this.pokey_irq.bind(this),()=>this.antic.h),this.audio_pokey=nt(1),this.audioadapter=new ht(this.audio_pokey.pokey1,this.audioOversample,this.sampleRate),this.handler=it(this.inputs,ve,this.getKeyboardFunction(),!0)}newBus(){return{read:C([[0,32767,65535,t=>this.ram[t]],[32768,40959,65535,t=>this.cart_80?this.rom[t-32768]:this.ram[t]],[40960,49151,65535,t=>this.cart_a0?this.rom[t-32768]:this.ram[t]],[53248,53503,31,t=>this.gtia.readReg(t)],[53760,54015,15,t=>this.readPokey(t)],[54016,54271,15,t=>this.readPIA(t)],[54272,54527,15,t=>this.antic.readReg(t)],[54528,54783,255,t=>this.d500[t]],[55296,65535,65535,t=>this.bios[t-55296]]]),write:C([[0,49146,65535,(t,e)=>{this.ram[t]=e}],[49147,49151,65535,(t,e)=>{this.ram[t]=e,this.initCartA()}],[53248,53503,31,(t,e)=>{this.gtia.setReg(t,e)}],[53760,54015,15,(t,e)=>{this.writePokey(t,e)}],[54272,54527,15,(t,e)=>{this.antic.setReg(t,e)}],[54528,54783,255,(t,e)=>{this.writeMapper(t,e)}]])}}loadBIOS(t){this.bios.set(t)}reset(){super.reset(),this.antic.reset(),this.gtia.reset(),this.keycode=0}read(t){return this.bus.read(t)}readDMA(t){let e=this.bus.read(t);return this.probe.logDMARead(t,e),this.lastdmabyte=e,e}readConst(t){return t<53248||t>=54528?this.bus.read(t):255}write(t,e){this.bus.write(t,e)}readPokey(t){switch(t&15){case 9:return this.keycode&255;case 15:return~this.keycode>>6&4|~this.keycode>>3&8|18;default:return this.irq_pokey.read(t)}}readPIA(t){if(t==0||t==1)return~this.inputs[t]}writePokey(t,e){this.audio_pokey.pokey1.setRegister(t,e),this.irq_pokey.write(t,e)}startScanline(){this.gtia.sync();for(let t=0;t<4;t++)this.gtia.readregs[_t+t]=~this.inputs[2]>>t&1;this.gtia.readregs[G]=~this.inputs[3]&7,this.audio&&this.audioadapter.generate(this.audio),this.irq_pokey.advanceScanline()}drawScanline(){let t=this.antic.v-this.firstVisibleScanline;t>=0&&t{this.gtia.clockPulse1(),this.linergb[t++]=this.gtia.rgb},s=()=>{this.gtia.clockPulse2(),this.linergb[t++]=this.gtia.rgb};this.gtia.clockPulse4(),this.antic.dliop&16&&this.antic.regs[4]&1?(t+=2,this.gtia.setBias(-1)):this.gtia.setBias(0);let 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this.antic.h}getRasterCanvasPosition(){return{x:this.antic.h*4-this.firstVisibleClock,y:this.antic.v-this.firstVisibleScanline}}getDebugCategories(){return["CPU","Stack","ANTIC","GTIA","POKEY"]}getDebugInfo(t,e){switch(t){case"ANTIC":return V.stateToLongString(e.antic);case"GTIA":return U.stateToLongString(e.gtia);case"POKEY":return H.stateToLongString(e.pokey)}}getKeyboardFunction(){return(t,e,s,a)=>{if(!this.keyboard_active)return!1;if(a&(T.KeyDown|T.KeyUp)){var n=Me;if(e==i.VK_F9.c)return this.irq_pokey.generateIRQ(128),!0;for(var h=0;h>8}if(e>t.length)throw new Error("Bad .XEX file format")}n>=0&&(s[a++]=169,s[a++]=160,s[a++]=141,s[a++]=255,s[a++]=213,s[a++]=76,s[a++]=n&255,s[a++]=n>>8,this.ram[10]=0,this.ram[11]=213,this.run_address=54528)}initCartA(){this.cpu.getPC()==61823&&this.xexdata&&this.loadXEX(this.xexdata)}setPaddleInput(t,e){this.irq_pokey.pot_inputs[t]=255-e}getDebugDisplayList(){let t=this.antic.getDlistAddr(),e=()=>{let n=this.read(t);return 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r.endsWith(".bas")||r.endsWith(".fb")||r.endsWith(".fbi")?"fastbasic":lt(r)}var J=class extends dt{constructor(){super(...arguments);this.getToolForFilename=Lt;this.showHelp=wt;this.getROMExtension=Ce;this.biosPath="res/altirra/kernel.rom"}newMachine(){return new Q}getPresets(){return Ct}getDefaultExtension(){return".c"}readAddress(t){return this.machine.readConst(t)}getMemoryMap(){return kt}async start(){let t=await this.loadKernel();await super.start(),this.machine.loadBIOS(t)}async loadKernel(){var t=await fetch(this.biosPath);if(t.status==200||t.size){var e=await t.arrayBuffer();return new Uint8Array(e)}else throw new Error("could not load BIOS file")}getDebugTree(){let t=super.getDebugTree();return t.display_list=this.machine.getDebugDisplayList(),t}},Kt=class extends J{constructor(){super(...arguments);this.biosPath="res/altirra/superkernel.rom"}getPresets(){return $}newMachine(){return new Z}},tt=class extends xt{constructor(){super(...arguments);this.getToolForFilename=Lt;this.getOpcodeMetadata=ft;this.showHelp=wt}getPresets(){return $}getDefaultExtension(){return".asm"}},et=class extends tt{constructor(){super(...arguments);this.getMemoryMap=function(){return kt}}getPresets(){return Ct}loadROM(t,e){this.started?(this.loadROMFile(e),this.loadRegion(":cartleft:cart:rom",e)):this.startModule(this.mainElement,{jsfile:"mame8bitws.js",biosfile:"a800xl.zip",cfgfile:"a800xl.cfg",driver:"a800xl",width:336*2,height:225*2,romfn:"/emulator/cart.rom",romdata:new Uint8Array(e),romsize:8192,preInit:function(s){}})}start(){}},Vt=class extends tt{constructor(){super(...arguments);this.getMemoryMap=function(){return{main:[{name:"RAM",start:0,size:16384,type:"ram"},{name:"Cartridge ROM",start:16384,size:32768,type:"rom"},{name:"GTIA",start:49152,size:32,type:"io"},{name:"ANTIC",start:54272,size:16,type:"io"},{name:"POKEY",start:59392,size:16,type:"io"},{name:"ATARI Character Set",start:63488,size:1024,type:"rom"},{name:"ROM",start:64512,size:1024,type:"rom"}]}}}loadROM(t,e){this.started?(this.loadROMFile(e),this.loadRegion(":cartleft:cart:rom",e)):this.startModule(this.mainElement,{jsfile:"mame8bitws.js",biosfile:"a5200/5200.rom",cfgfile:"a5200.cfg",driver:"a5200",width:336*2,height:225*2,romfn:"/emulator/cart.rom",romdata:new Uint8Array(e),romsize:32768,preInit:function(s){}})}start(){}};function Ce(r){return r==null?".bin":r[0]==255&&r[1]==255?".xex":".rom"}function wt(){return"https://8bitworkshop.com/docs/platforms/atari8/"}I["atari8-800.xlmame"]=et;I["atari8-800xl.mame"]=et;I["atari8-5200.mame"]=Vt;I["atari8-800"]=J;I["atari8-5200"]=Kt; -//# sourceMappingURL=atari8-7FKUDPVY.js.map +//# sourceMappingURL=atari8-N4PRCBAP.js.map diff --git a/gen/atari8-7FKUDPVY.js.map b/gen/atari8-N4PRCBAP.js.map similarity index 100% rename from gen/atari8-7FKUDPVY.js.map rename to gen/atari8-N4PRCBAP.js.map diff --git a/gen/basic-PW5NXC77.js b/gen/basic-O4Z2JMQ2.js similarity index 98% rename from gen/basic-PW5NXC77.js rename to gen/basic-O4Z2JMQ2.js index 6295da34..76fb108b 100644 --- a/gen/basic-PW5NXC77.js +++ b/gen/basic-O4Z2JMQ2.js @@ -1,4 +1,4 @@ -import{b as v}from"./chunk-3XE5YOCV.js";import{a as d,t as S}from"./chunk-W3JZ7KMT.js";import"./chunk-SDBJC2RS.js";import"./chunk-XMPGMPQ4.js";import"./chunk-2KLMJIHE.js";import"./chunk-42IVW2OL.js";import{B as c,J as b,T as g,U as f,a as p}from"./chunk-S4FPTY4A.js";import"./chunk-RQFURXHW.js";function O(o){return o.value!=null}function E(o){return o.name!=null}function N(o){return o.op!=null&&o.left!=null&&o.right!=null}function I(o){return o.op!=null&&o.expr!=null}var y=class{randomize(){this.seed(Math.random()*2147483647,Math.random()*2147483647,Math.random()*2147483647,Math.random()*2147483647)}constructor(){(()=>{var r,e,i,n;this.seed=function(s,a,u,h){r=s,e=a,i=u,n=h},this.seedfloat=function(s){this.seed(s,s*4294,s*429496,s*4294967296),this.next(),this.next(),this.next()},this.next=function(){r>>>=0,e>>>=0,i>>>=0,n>>>=0;var s=r+e|0;return r=e^e>>>9,e=i+(i<<3)|0,i=i<<21|i>>>11,n=n+1|0,s=s+n|0,i=i+s|0,(s>>>0)/4294967296}})(),this.seedfloat(-1)}},L=1024*1024,l=class{constructor(){this.margin=80;this.running=!1;this.exited=!0;this.trace=!1}load(t){let r=null,e=0;if(this.pc2label!=null){let s=this.curpc;for(;s>0&&(r=this.pc2label.get(s))==null;)s--;e=this.curpc-s,console.log("oldpc=",this.curpc,"restart @ label",r,"+",e)}this.program=t,this.opts=t.opts,this.opts.maxArrayElements||(this.opts.maxArrayElements=L),this.allstmts=t.stmts,this.label2pc=t.labels,this.label2dataptr={},this.pc2label=new Map,this.datums=[],this.subroutines={},this.builtins=this.getBuiltinFunctions();for(var i in t.labels){var n=t.labels[i];this.pc2label.set(n,i)}return this.allstmts.forEach((s,a)=>{this.curpc=a+1,this.compileStatement(s),s.command=="DATA"&&(this.label2dataptr[s.$loc.label]=this.datums.length,s.datums.forEach(u=>{this.curpc=s.$loc.offset,this.datums.push(u)}))}),this.label2pc[r]!=null?(this.curpc=this.label2pc[r]+e,!0):(this.curpc=0,!1)}reset(){this.curpc=0,this.dataptr=0,this.clearVars(),this.returnStack=[],this.column=0,this.running=!0,this.exited=!1}clearVars(){this.globals=this.vars={},this.arrays={},this.defs={},this.forLoops={},this.forLoopStack=[],this.whileLoops=[],this.rng=new y,this.opts&&this.opts.staticArrays&&this.allstmts.filter(t=>t.command=="DIM").forEach(t=>{t.args.forEach(r=>this.compileJS(this._DIM(r))())})}saveState(){return $.extend(!0,{},this)}loadState(t){$.extend(!0,this,t)}getBuiltinFunctions(){var t=this.program&&this.opts.validFunctions;t||(t=Object.getOwnPropertyNames(l.prototype).filter(i=>/^[A-Z]{3,}[$]?$/.test(i)));var r={};for(var e of t)this.supportsFunction(e)&&(r[e]=this[e].bind(this));return r}supportsFunction(t){return typeof this[t]=="function"}runtimeError(t){throw this.curpc--,new g(t,this.getCurrentSourceLocation())}dialectError(t){this.runtimeError(`I can't ${t} in this dialect of BASIC.`)}getLineForPC(t){var r=this.allstmts[t];return r&&r.$loc&&r.$loc.line}getLabelForPC(t){var r=this.allstmts[t];return r&&r.$loc&&r.$loc.label}getCurrentSourceLocation(){var t=this.getStatement();return t&&t.$loc}getCurrentLabel(){var t=this.getCurrentSourceLocation();return t&&t.label}getStatement(){return this.allstmts[this.curpc]}step(){if(!this.running)return!1;var t=this.getStatement();return t?(this.trace&&console.log(this.curpc,t,this.vars,Object.keys(this.arrays)),this.curpc++,this.executeStatement(t),this.running):(this.running=!1,this.exited=!0,!1)}compileStatement(t){if(t.$run==null)try{var r=this["do__"+t.command];r==null&&this.runtimeError(`I don't know how to "${t.command}".`);var e=r.bind(this)(t);this.trace&&console.log(e),t.$run=this.compileJS(e)}catch(i){throw e&&console.log(e),i}}compileJS(t){return new Function(t).bind(this)}executeStatement(t){this.compileStatement(t),t.$run()}skipToEOL(){do this.curpc++;while(this.curpc=0?this.curpc=r:this.runtimeError(`I tried to go to the label "${t}" but couldn't find it.`)}newLocalScope(){this.vars=Object.create(this.vars)}popLocalScope(){this.vars!==this.globals&&(this.vars=Object.getPrototypeOf(this.vars))}gosubLabel(t){this.returnStack.length>32767&&this.runtimeError("I did too many GOSUBs without a RETURN."),this.returnStack.push(this.curpc),this.gotoLabel(t)}returnFromGosub(){this.returnStack.length==0&&this.runtimeError("I tried to RETURN, but there wasn't a corresponding GOSUB.");var t=this.returnStack.pop();this.curpc=t,this.popLocalScope()}popReturnStack(){this.returnStack.length==0&&this.runtimeError("I tried to POP, but there wasn't a corresponding GOSUB."),this.returnStack.pop()}valueToString(t,r){var e;if(typeof t=="number"){var i=this.float2str(t,this.opts.printZoneLength-4);return r?i.startsWith("-")?`${i} `:` ${i} `:i}else if(t==` +import{b as v}from"./chunk-3XE5YOCV.js";import{a as d,t as S}from"./chunk-JNII2TLU.js";import"./chunk-UC2UKQOH.js";import"./chunk-B2GOFULO.js";import"./chunk-IJD2K6VH.js";import"./chunk-ULPRULB6.js";import{B as c,J as b,T as g,U as f,a as p}from"./chunk-RXF2JDJ3.js";import"./chunk-WAARL7ET.js";function O(o){return o.value!=null}function E(o){return o.name!=null}function N(o){return o.op!=null&&o.left!=null&&o.right!=null}function I(o){return o.op!=null&&o.expr!=null}var y=class{randomize(){this.seed(Math.random()*2147483647,Math.random()*2147483647,Math.random()*2147483647,Math.random()*2147483647)}constructor(){(()=>{var r,e,i,n;this.seed=function(s,a,u,h){r=s,e=a,i=u,n=h},this.seedfloat=function(s){this.seed(s,s*4294,s*429496,s*4294967296),this.next(),this.next(),this.next()},this.next=function(){r>>>=0,e>>>=0,i>>>=0,n>>>=0;var s=r+e|0;return r=e^e>>>9,e=i+(i<<3)|0,i=i<<21|i>>>11,n=n+1|0,s=s+n|0,i=i+s|0,(s>>>0)/4294967296}})(),this.seedfloat(-1)}},L=1024*1024,l=class{constructor(){this.margin=80;this.running=!1;this.exited=!0;this.trace=!1}load(t){let r=null,e=0;if(this.pc2label!=null){let s=this.curpc;for(;s>0&&(r=this.pc2label.get(s))==null;)s--;e=this.curpc-s,console.log("oldpc=",this.curpc,"restart @ label",r,"+",e)}this.program=t,this.opts=t.opts,this.opts.maxArrayElements||(this.opts.maxArrayElements=L),this.allstmts=t.stmts,this.label2pc=t.labels,this.label2dataptr={},this.pc2label=new Map,this.datums=[],this.subroutines={},this.builtins=this.getBuiltinFunctions();for(var i in t.labels){var n=t.labels[i];this.pc2label.set(n,i)}return this.allstmts.forEach((s,a)=>{this.curpc=a+1,this.compileStatement(s),s.command=="DATA"&&(this.label2dataptr[s.$loc.label]=this.datums.length,s.datums.forEach(u=>{this.curpc=s.$loc.offset,this.datums.push(u)}))}),this.label2pc[r]!=null?(this.curpc=this.label2pc[r]+e,!0):(this.curpc=0,!1)}reset(){this.curpc=0,this.dataptr=0,this.clearVars(),this.returnStack=[],this.column=0,this.running=!0,this.exited=!1}clearVars(){this.globals=this.vars={},this.arrays={},this.defs={},this.forLoops={},this.forLoopStack=[],this.whileLoops=[],this.rng=new y,this.opts&&this.opts.staticArrays&&this.allstmts.filter(t=>t.command=="DIM").forEach(t=>{t.args.forEach(r=>this.compileJS(this._DIM(r))())})}saveState(){return $.extend(!0,{},this)}loadState(t){$.extend(!0,this,t)}getBuiltinFunctions(){var t=this.program&&this.opts.validFunctions;t||(t=Object.getOwnPropertyNames(l.prototype).filter(i=>/^[A-Z]{3,}[$]?$/.test(i)));var r={};for(var e of t)this.supportsFunction(e)&&(r[e]=this[e].bind(this));return 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e&&console.log(e),i}}compileJS(t){return new Function(t).bind(this)}executeStatement(t){this.compileStatement(t),t.$run()}skipToEOL(){do this.curpc++;while(this.curpc=0?this.curpc=r:this.runtimeError(`I tried to go to the label "${t}" but couldn't find it.`)}newLocalScope(){this.vars=Object.create(this.vars)}popLocalScope(){this.vars!==this.globals&&(this.vars=Object.getPrototypeOf(this.vars))}gosubLabel(t){this.returnStack.length>32767&&this.runtimeError("I did too many GOSUBs without a RETURN."),this.returnStack.push(this.curpc),this.gotoLabel(t)}returnFromGosub(){this.returnStack.length==0&&this.runtimeError("I tried to RETURN, but there wasn't a corresponding GOSUB.");var t=this.returnStack.pop();this.curpc=t,this.popLocalScope()}popReturnStack(){this.returnStack.length==0&&this.runtimeError("I tried to POP, but there wasn't a corresponding GOSUB."),this.returnStack.pop()}valueToString(t,r){var e;if(typeof t=="number"){var i=this.float2str(t,this.opts.printZoneLength-4);return r?i.startsWith("-")?`${i} `:` ${i} `:i}else if(t==` `)this.column=0,e=t;else if(t==" "){var n=this.opts.printZoneLength,s=Math.floor(this.column/n),a=(s+1)*this.opts.printZoneLength;a+n>this.margin?(this.column=0,e=` `):e=this.TAB(a)}else e=`${t}`;return e}float2str(t,r){var e=t.toString().toUpperCase();if(r>0){for(var i=r;e.length>r;)e=t.toPrecision(i--);e.startsWith("0.")?e=e.substr(1):e.startsWith("-0.")&&(e="-"+e.substr(2))}return e}printExpr(t){var r=this.valueToString(t,this.opts.numericPadding);this.column+=r.length,this.print(r)}print(t){console.log(t)}async input(t,r){return{line:"",vals:[]}}resume(){}expr2js(t,r){if(r||(r={}),O(t))return JSON.stringify(t.value);if(E(t)){if(!t.args&&r.locals&&r.locals.indexOf(t.name)>=0)return t.name;{r.isconst&&this.runtimeError("I expected a constant value here.");var e="",i=JSON.stringify(t.name);let u=t.args?t.args.map(h=>this.expr2js(h,r)).join(", "):[];return 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u=[4,10,7,6,4,4,7,4,4,11,7,6,4,4,7,4,8,10,7,6,4,4,7,4,12,11,7,6,4,4,7,4,7,10,16,6,4,4,7,4,7,11,16,6,4,4,7,4,7,10,13,6,11,11,10,4,7,11,13,6,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,7,7,7,7,7,7,4,7,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,4,4,4,4,4,4,7,4,5,10,10,10,10,11,7,11,5,10,10,0,10,17,7,11,5,10,10,11,10,11,7,11,5,4,10,11,10,0,7,11,5,10,10,19,10,11,7,11,5,4,10,4,10,0,7,11,5,10,10,4,10,11,7,11,5,6,10,4,10,0,7,11],n=[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,12,12,15,20,8,14,8,9,12,12,15,20,8,14,8,9,12,12,15,20,8,14,8,9,12,12,15,20,8,14,8,9,12,12,15,20,8,14,8,18,12,12,15,20,8,14,8,18,12,12,15,20,8,14,8,0,12,12,15,20,8,14,8,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,16,16,16,16,0,0,0,0,16,16,16,16,0,0,0,0,16,16,16,16,0,0,0,0,16,16,16,16,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],g=[8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,12,8,8,8,8,8,8,8,12,8,8,8,8,8,8,8,12,8,8,8,8,8,8,8,12,8,8,8,8,8,8,8,12,8,8,8,8,8,8,8,12,8,8,8,8,8,8,8,12,8,8,8,8,8,8,8,12,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8,8,8,8,8,8,8,15,8],s=[0,0,0,0,0,0,0,0,0,15,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,15,0,0,0,0,0,0,0,14,20,10,8,8,11,0,0,15,20,10,8,8,11,0,0,0,0,0,23,23,19,0,0,15,0,0,0,0,0,0,0,0,0,0,8,8,19,0,0,0,0,0,8,8,19,0,0,0,0,0,8,8,19,0,0,0,0,0,8,8,19,0,8,8,8,8,8,8,19,8,8,8,8,8,8,8,19,8,19,19,19,19,19,19,0,19,0,0,0,0,8,8,19,0,0,0,0,0,8,8,19,0,0,0,0,0,8,8,19,0,0,0,0,0,8,8,19,0,0,0,0,0,8,8,19,0,0,0,0,0,8,8,19,0,0,0,0,0,8,8,19,0,0,0,0,0,8,8,19,0,0,0,0,0,8,8,19,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,14,0,23,0,15,0,0,0,8,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,10,0,0,0,0,0,0];this.saveState=q,this.loadState=V0,this.reset=K,this.advanceInsn=U,this.interrupt=A0,this.getPC=()=>i,this.getSP=()=>z,this.getHalted=()=>_}var at=class{constructor(){this.retryInterrupts=!1;this.retryData=-1}buildCPU(){this.memBus&&this.ioBus&&(this.cpu=new un({mem_read:this.memBus.read.bind(this.memBus),mem_write:this.memBus.write.bind(this.memBus),io_read:this.ioBus.read.bind(this.ioBus),io_write:this.ioBus.write.bind(this.ioBus)}))}connectMemoryBus(e){this.memBus=e,this.buildCPU()}connectIOBus(e){this.ioBus=e,this.buildCPU()}advanceInsn(){return this.retryInterrupts&&this.retryData>=0&&this.cpu.interrupt(!1,this.retryData)&&(this.retryData=-1),this.cpu.advanceInsn()}reset(){this.cpu.reset()}interrupt(e){!this.cpu.interrupt(!1,e)&&this.retryInterrupts&&(this.retryData=e)}NMI(){this.cpu.interrupt(!0,0)}getSP(){return this.cpu.getSP()}getPC(){return this.cpu.getPC()}isHalted(){return this.cpu.getHalted()}saveState(){return this.cpu.saveState()}loadState(e){this.cpu.loadState(e)}isStable(){return!0}};var pt=class{constructor(){this.master=new MasterChannel}start(){this.looper||(this.looper=new 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Uint8Array(h.length*e.length),c=0,m=0;m.5?1:0;var W0=Ne(I,K),F0=Ne(K,V0),w0=[W0,K,F0,K,I,q,V0,q],Q=Xe(2),l0=Xe(6),O0=Xe(31),b0=Xe(93),B0=Ne(A0,V0),z0=Ne(K,Q),E0=Ne(K,l0),U0=[t0,V0,B0,F0,Q,Q,O0,z0,U,K,O0,t0,l0,l0,b0,E0],p0=new Uint8Array(16),c0=new Float32Array(4),i0=new Float32Array(4),Z=new Float32Array(4),w=new Uint8Array(4),T=[t0,t0,t0,t0],f0,M,n0,O,E=!0;this.setBufferLength=function(H){f0=new Int32Array(H)},this.getBuffer=function(){return f0},this.setSampleRate=function(H){M=H,O=S/H};function _0(H){var r0=p0[8],C0=r0&N?G:k,$,m0=H&4,N0=m0>>1,Y=m0>>2;r0&a>>Y?(r0&d>>Y?$=p0[m0+2]*256+p0[m0+0]+7:$=(p0[m0+2]*256+p0[m0+0]+1)*C0,i0[N0+1]=O/$,i0[N0+0]=0):(r0&d>>Y?$=p0[m0+0]+4:$=(p0[m0+0]+1)*C0,i0[N0+0]=O/$,$=(p0[m0+2]+1)*C0,i0[N0+1]=O/$)}this.setRegister=function(H,r0){if(H&=15,r0&=255,p0[H]!=r0)switch(p0[H]=r0,H){case 0:case 2:case 4:case 6:case 8:E=!0;break;case 1:case 3:case 5:case 7:Z[H>>1]=r0&15,T[H>>1]=w0[r0>>5];break}},this.getRegister=function(H){return H&=15,p0[H]},this.setTIARegister=function(H,r0){switch(H){case 23:case 24:p0[(H&1)*4]=r0&31,E=!0;break;case 21:case 22:T[(H&1)*2]=U0[r0&15];break;case 25:case 26:Z[(H&1)*2]=r0&15;break}},this.generate=function(H){E&&(_0(0),_0(4),E=!1);for(var r0=0;r00&&m0<1&&N0>0){var Y=T[$],e0=c0[$]+=m0;e0>Y.length&&(e0=c0[$]=e0-Math.floor(e0/Y.length)*Y.length);var s0=Y[Math.floor(e0)];s0&&(C0+=N0)}}C0*=64,f0[r0]=C0,f0[r0+1]=C0}}},Tn=function(h){var e,r,c=[],m=0;h.onmessage=function(o){o&&o.data&&o.data.samples&&r&&(c.push(o.data.samples),m+=o.data.samples.length)},this.setBufferLength=function(o){r=new Int16Array(o),m=0},this.getBuffer=function(){return r},this.setSampleRate=function(o){e=o,h.postMessage({sampleRate:o})},this.generate=function(o){if(m=o.length)){d=0,x[W]=o;var u0=(W+1)%x.length;u0==a?W=Math.floor(a+y/2)%x.length:W=u0,o=x[W]}},this.feedSample=function(G,u0){if(m+=G*u0,r+=c*u0,r>=1){for(m/=r;r>=1;)this.addSingleSample(m*c),r-=1;m*=r}}},it=class{constructor(e){this.sa=new dn(e)}feedSample(e,r){this.sa.feedSample(e,r)}start(){this.sa.start()}stop(){this.sa.stop()}},hn=class{constructor(e,r,c){this.audioGain=1/8192;this.bufferLength=r*2,this.channels=e.generate?[e]:e,this.channels.forEach(m=>{m.setBufferLength(this.bufferLength),m.setSampleRate(c)})}generate(e){var r=this.bufferLength,c=this.channels.map(o=>o.getBuffer());this.channels.forEach(o=>{o.generate(r)});for(let o=0;om+=d[o]),e.feedSample(m*this.audioGain,1)}}};var L0;(function(L){L[L.CLOCKS=0]="CLOCKS",L[L.EXECUTE=16777216]="EXECUTE",L[L.INTERRUPT=134217728]="INTERRUPT",L[L.ILLEGAL=150994944]="ILLEGAL",L[L.SP_PUSH=167772160]="SP_PUSH",L[L.SP_POP=184549376]="SP_POP",L[L.HAS_VALUE=268435456]="HAS_VALUE",L[L.MEM_READ=301989888]="MEM_READ",L[L.MEM_WRITE=318767104]="MEM_WRITE",L[L.IO_READ=335544320]="IO_READ",L[L.IO_WRITE=352321536]="IO_WRITE",L[L.VRAM_READ=369098752]="VRAM_READ",L[L.VRAM_WRITE=385875968]="VRAM_WRITE",L[L.DMA_READ=402653184]="DMA_READ",L[L.DMA_WRITE=419430400]="DMA_WRITE",L[L.WAIT=520093696]="WAIT",L[L.SCANLINE=2113929216]="SCANLINE",L[L.FRAME=2130706432]="FRAME"})(L0||(L0={}));var ft=class{constructor(e,r){this.idx=0;this.sl=0;this.cur_sp=-1;this.singleFrame=!0;this.m=e,this.reset(r||1048576)}start(){this.m.connectProbe(this)}stop(){this.m.connectProbe(null)}reset(e){e&&(this.buf=new Uint32Array(e)),this.sl=0,this.cur_sp=-1,this.clear()}clear(){this.idx=0}logData(e){this.log(e)}log(e){this.idx>=this.buf.length||(this.buf[this.idx++]=e)}relog(e){this.buf[this.idx-1]=e}lastOp(){return this.idx>0?this.buf[this.idx-1]&4278190080:-1}lastAddr(){return this.idx>0?this.buf[this.idx-1]&16777215:-1}addLogBuffer(e){this.idx+e.length>this.buf.length&&(e=e.slice(0,this.buf.length-this.idx)),this.buf.set(e,this.idx),this.idx+=e.length}logClocks(e){e|=0,e>0&&(this.lastOp()==0?this.relog(this.lastAddr()+e|0):this.log(e|0))}logNewScanline(){this.log(2113929216),this.sl++}logNewFrame(){this.log(2130706432),this.sl=0,this.singleFrame&&this.clear()}logExecute(e,r){this.cur_sp!==r&&(rthis.cur_sp&&this.log(184549376|r),this.cur_sp=r),this.log(e|16777216)}logInterrupt(e){this.log(e|134217728)}logValue(e,r,c){this.log(e&65535|(r&255)<<16|c)}logRead(e,r){this.logValue(e,r,301989888)}logWrite(e,r){this.logValue(e,r,318767104)}logIORead(e,r){this.logValue(e,r,335544320)}logIOWrite(e,r){this.logValue(e,r,352321536)}logVRAMRead(e,r){this.logValue(e,r,369098752)}logVRAMWrite(e,r){this.logValue(e,r,385875968)}logIllegal(e){this.log(e|150994944)}logWait(e){this.log(e|520093696)}logDMARead(e,r){this.logValue(e,r,402653184)}logDMAWrite(e,r){this.logValue(e,r,419430400)}countEvents(e){for(var r=0,c=0;cthis.rom.length)throw new Error(`ROM too big: ${e.length} > ${this.rom.length}}`);this.rom.set(e)}loadState(e){this.cpu.loadState(e.c),this.ram.set(e.ram),this.inputs.set(e.inputs)}saveState(){return{c:this.cpu.saveState(),ram:this.ram.slice(0),inputs:this.inputs.slice(0)}}loadControlsState(e){this.inputs.set(e.inputs)}saveControlsState(){return{inputs:this.inputs.slice(0)}}advanceCPU(){var e=this.cpu,r=1;return this.cpu.isStable()&&this.probe.logExecute(this.cpu.getPC(),this.cpu.getSP()),e.advanceClock?e.advanceClock():e.advanceInsn&&(r=e.advanceInsn(1)),this.probe.logClocks(r),r}probeMemoryBus(e){return{read:r=>{let c=e.read(r);return this.probe.logRead(r,c),c},write:(r,c)=>{this.probe.logWrite(r,c),e.write(r,c)}}}connectCPUMemoryBus(e){this.cpu.connectMemoryBus(this.probeMemoryBus(e))}probeIOBus(e){return{read:r=>{let c=e.read(r);return this.probe.logIORead(r,c),c},write:(r,c)=>{this.probe.logIOWrite(r,c),e.write(r,c)}}}probeDMABus(e){return{read:r=>{let c=e.read(r);return this.probe.logDMARead(r,c),c},write:(r,c)=>{this.probe.logDMAWrite(r,c),e.write(r,c)}}}connectCPUIOBus(e){this.cpu.connectIOBus(this.probeIOBus(e))}},Pt=class extends _t{constructor(){super(...arguments);this.overscan=!1;this.rotate=0}getAudioParams(){return{sampleRate:this.sampleRate,stereo:!1}}connectAudio(e){this.audio=e}getVideoParams(){return{width:this.canvasWidth,height:this.numVisibleScanlines,aspect:this.aspectRatio,overscan:this.overscan,rotate:this.rotate}}connectVideo(e){this.pixels=e}},An=class extends Pt{advanceFrame(e){this.preFrame();var r=0,c=0;this.probe.logNewFrame(),this.frameCycles=0;for(var m=0;m=64&&r<=127&&(x=wt[r-64]),r>=160&&r<=191&&(x=wt[r-160+64]),d++;break;case 221:case 253:var y=e==221?"ix":"iy";r==203?(x=Dt[m],a[2]=m,a[3]=c,d++):x=kt[r],x=x.replace(/[(]hl[)]/,"("+y+"+x)"),x=x.replace(/\bhl\b/,y),d++;break;default:x=kt[e];break}if((!x||!x.length)&&(x="??"),/\bxx\b/.test(x))x=x.replace(/\bxx\b/,"$"+a0(a[d]+(a[d+1]<<8),4)),d+=2,W=!0;else if(/\bx\b/.test(x)){if(x.startsWith("j")){var p=r<128?h+2+r:h+2-(256-r);p&=65535,x=x.replace(/\bx\b/,"$"+a0(p,4)),W=!0}else x=x.replace(/\bx\b/,"$"+a0(a[d],2));d+=1}return{line:x.toUpperCase(),nbytes:d,isaddr:W}}var Ve=class{constructor(e){this.maxROMSize=262144;this.videoOffsetBytes=0;this.prefix=e;var r=this;this.cpu={getPC:r.getPC.bind(r),getSP:r.getSP.bind(r),isStable:r.isStable.bind(r),reset:r.reset.bind(r),saveState:()=>r.getCPUState(),loadState:()=>{console.log("loadState not implemented")},connectMemoryBus(){console.log("connectMemoryBus not implemented")}}}getImports(e){return{}}async fetchWASM(){var e=await fetch("res/"+this.prefix+".wasm");if(e.status==200||e.size){var r=await e.arrayBuffer(),c=await WebAssembly.compile(r),m=await WebAssembly.instantiate(c,this.getImports(c));this.instance=m,this.exports=m.exports}else throw new Error("could not load WASM file")}allocateBIOS(e){this.biosptr=this.exports.malloc(e.byteLength),this.biosarr=new Uint8Array(this.exports.memory.buffer,this.biosptr,e.byteLength)}async fetchBIOS(){var e=await fetch("res/"+this.prefix+".bios");if(e.status==200||e.size){var r=new Uint8Array(await e.arrayBuffer());this.allocateBIOS(r),this.loadBIOS(r)}else throw new Error("could not load BIOS file")}async initWASM(){this.sys=this.exports.machine_init(this.biosptr);let e=this.exports.machine_get_state_size();this.stateptr=this.exports.malloc(e);let r=this.exports.machine_get_controls_state_size();this.ctrlstateptr=this.exports.malloc(r);let c=this.exports.machine_get_cpu_state_size();this.cpustateptr=this.exports.malloc(c),this.romptr=this.exports.malloc(this.maxROMSize),this.statearr=new Uint8Array(this.exports.memory.buffer,this.stateptr,e),this.ctrlstatearr=new Uint8Array(this.exports.memory.buffer,this.ctrlstateptr,r),this.cpustatearr=new Uint8Array(this.exports.memory.buffer,this.cpustateptr,c);let m=4096*4;this.audioarr=new Float32Array(this.exports.memory.buffer,this.exports.machine_get_sample_buffer(),m),this.romarr=new Uint8Array(this.exports.memory.buffer,this.romptr,this.maxROMSize),console.log("machine_init",this.sys,e,r,c,m)}async loadWASM(){await this.fetchWASM(),this.exports.memory.grow(96),await this.fetchBIOS(),await this.initWASM()}getPC(){return this.exports.machine_cpu_get_pc(this.sys)}getSP(){return this.exports.machine_cpu_get_sp(this.sys)}isStable(){return this.exports.machine_cpu_is_stable(this.sys)}loadROM(e){if(e.length>this.maxROMSize)throw new vt(`Rom size too big: ${e.length} bytes`);this.romarr.set(e),this.romlen=e.length,console.log("load rom",e.length,"bytes"),this.reset()}loadBIOS(e){this.biosarr.set(e)}reset(){this.exports.machine_reset(this.sys)}read(e){return this.exports.machine_mem_read(this.sys,e&65535)}readConst(e){return this.exports.machine_mem_read(this.sys,e&65535)}write(e,r){this.exports.machine_mem_write(this.sys,e&65535,r&255)}getAudioParams(){return{sampleRate:44100,stereo:!1}}connectVideo(e){this.pixel_dest=e;var r=this.exports.machine_get_pixel_buffer(this.sys);console.log("connectVideo",r,e.length),this.pixel_src=new Uint32Array(this.exports.memory.buffer,r+this.videoOffsetBytes,e.length)}syncVideo(){this.exports.machine_update_video&&this.exports.machine_update_video(this.sys),this.pixel_dest!=null&&this.pixel_dest.set(this.pixel_src)}saveControlsState(){return this.exports.machine_save_controls_state(this.sys,this.ctrlstateptr),{controls:this.ctrlstatearr.slice(0)}}loadControlsState(e){this.ctrlstatearr.set(e.controls),this.exports.machine_load_controls_state(this.sys,this.ctrlstateptr)}connectAudio(e){this.audio=e}syncAudio(){if(this.audio!=null)for(var e=this.exports.machine_get_sample_count(),r=0;r>1)&128)>>6},K=function(u,n,g){a|=((u^n^g^g>>1)&32768)>>14},U=function(){return(e<<8)+r},A0=function(u){e=u>>8&255,r=u&255},x0=function(u){_(--d,u&255)},I=function(u){_(--d,u&255),_(--d,u>>8&255)},X0=function(u){_(--o,u&255)},W0=function(u){_(--o,u&255),_(--o,u>>8&255)},F0=function(){return S(d++)},w0=function(){return S(d++)*256+S(d++)},Q=function(){return S(o++)},l0=function(){return S(o++)*256+S(o++)},O0=function(u){var n=0;u&128&&(I(x),n+=2),u&64&&(I(o),n+=2),u&32&&(I(m),n+=2),u&16&&(I(c),n+=2),u&8&&(x0(W),n++),u&4&&(x0(r),n++),u&2&&(x0(e),n++),u&1&&(x0(a),n++),V+=n},b0=function(u){var n=0;u&128&&(W0(x),n+=2),u&64&&(W0(d),n+=2),u&32&&(W0(m),n+=2),u&16&&(W0(c),n+=2),u&8&&(X0(W),n++),u&4&&(X0(r),n++),u&2&&(X0(e),n++),u&1&&(X0(a),n++),V+=n},B0=function(u){var n=0;u&1&&(a=F0(),n++),u&2&&(e=F0(),n++),u&4&&(r=F0(),n++),u&8&&(W=F0(),n++),u&16&&(c=w0(),n+=2),u&32&&(m=w0(),n+=2),u&64&&(o=w0(),n+=2),u&128&&(x=w0(),n+=2),V+=n},z0=function(u){var n=0;u&1&&(a=Q(),n++),u&2&&(e=Q(),n++),u&4&&(r=Q(),n++),u&8&&(W=Q(),n++),u&16&&(c=l0(),n+=2),u&32&&(m=l0(),n+=2),u&64&&(d=l0(),n+=2),u&128&&(x=l0(),n+=2),V+=n},E0=function(u){switch(u&15){case 0:return U();case 1:return c;case 2:return m;case 3:return o;case 4:return d;case 5:return x;case 8:return e;case 9:return r;case 10:return a;case 11:return W;default:return null}},U0=function(u,n){switch(u&15){case 0:A0(n);return;case 1:c=n;return;case 2:m=n;return;case 3:o=n;return;case 4:d=n;return;case 5:x=n;return;case 8:e=n;return;case 9:r=n;return;case 10:a=n;return;case 11:W=n;return;default:return}},p0=function(u,n){var g=u&136;(g==128||g==8)&&(g=0),n?(g=E0(u>>4),U0(u>>4,E0(u)),U0(u,g)):U0(u,E0(u>>4))},c0=function(u){return u>127?u-256:u},i0=function(u){return u>32767?u-65536:u},Z=function(){var u=S(x++);return x&=65535,u},w=function(){var u=S(x++);x&=65535;var n=S(x++);return x&=65535,u*256+n},T=function(u){var n=S(u++);u&=65535;var g=S(u++);return u&=65535,n*256+g},f0=function(u,n){_(u++,n>>8&255),u&=65535,_(u,n&255)},M=function(){var u=Z(),n;switch(u&96){case 0:n=c;break;case 32:n=m;break;case 64:n=o;break;case 96:n=d;break}var g=null,s=null,t;if(u&128){switch(u&15){case 0:s=n,g=n+1,V+=2;break;case 1:s=n,g=n+2,V+=3;break;case 2:g=n-1,s=g,V+=2;break;case 3:g=n-2,s=g,V+=3;break;case 4:s=n;break;case 5:s=n+c0(r),V+=1;break;case 6:s=n+c0(e),V+=1;break;case 7:s=0;break;case 8:s=n+c0(Z()),V+=1;break;case 9:s=n+i0(w()),V+=4;break;case 10:s=0;break;case 11:V+=4,s=n+U();break;case 12:t=c0(Z()),s=x+t,V+=1;break;case 13:t=i0(w()),s=x+t,V+=5;break;case 14:s=0;break;case 15:V+=5,s=w();break}s&=65535,u&16&&(s=S(s)*256+S(s+1&65535),V+=3)}else{var b=u&31;b>15&&(b-=32),s=n+b,V+=1}if(g!==null)switch(u&96){case 0:c=g;break;case 32:m=g;break;case 64:o=g;break;case 96:d=g;break}return s&65535},n0=function(u){a&=~(N|k),u===0&&(a|=N),u&32768&&(a|=k)},O=function(u){return u++,u&=255,a&=~(N|p|k),a|=q[u],(u===0||u==128)&&(a|=p),u},E=function(u){return u--,u&=255,a&=~(N|p|k),a|=q[u],(u===127||u==255)&&(a|=p),u},_0=function(u,n){var g=u-n;return a&=~(y|N|p|k),a|=q[g&255],g&256&&(a|=y),V0(u,n,g),g&255},H=function(u,n){var g=u-n;return a&=~(y|N|p|k),(g&65535)==0&&(a|=N),g&32768&&(a|=k),g&65536&&(a|=y),K(u,n,g),g&65535},r0=function(u,n){var g=u+n;return a&=~(u0|y|N|p|k),a|=q[g&255],g&256&&(a|=y),V0(u,n,g),(g^u^n)&16&&(a|=u0),g&255},C0=function(u,n){var g=u+n;return a&=~(y|N|p|k),(g&65535)==0&&(a|=N),g&32768&&(a|=k),g&65536&&(a|=y),K(u,n,g),g&65535},$=function(u,n){var g=u+n+(a&y);return a&=~(u0|y|N|p|k),a|=q[g&255],g&256&&(a|=y),V0(u,n,g),(g^u^n)&16&&(a|=u0),g&255},m0=function(u,n){var g=u-n-(a&y);return a&=~(y|N|p|k),a|=q[g&255],g&256&&(a|=y),V0(u,n,g),g&255},N0=function(u,n){var g=u-n;a&=~(y|N|p|k),a|=q[g&255],g&256&&(a|=y),V0(u,n,g)},Y=function(u,n){var g=u-n;a&=~(y|N|p|k),(g&65535)==0&&(a|=N),g&32768&&(a|=k),g&65536&&(a|=y),K(u,n,g)},e0=function(u){return a&=~(y|N|p|k),u==128&&(a|=p),u=(~u&255)+1,u===0&&(a|=N),u&128&&(a|=k|y),u},s0=function(u){return a&=~(N|y|k),u&1&&(a|=y),u>>=1,u===0&&(a|=N),u&255},P0=function(u){return a&=~(N|y|k),u&1&&(a|=y),u=u&128|u>>1,a|=q[u],u},R0=function(u){var n=u;return a&=~(N|y|k|p),u&128&&(a|=y),u<<=1,a|=q[u],(u^n)&128&&(a|=p),u},H0=function(u){var n=u,g=a&y;return a&=~(N|y|k|p),u&128&&(a|=y),u=u<<1|g,a|=q[u],(u^n)&128&&(a|=p),u},o0=function(u){var n=a&y;return a&=~(N|y|k),u&1&&(a|=y),u=u>>1|n<<7,a|=q[u],u},d0=function(u,n){return a&=~(N|k|p),u^=n,a|=q[u],u},Z0=function(u,n){return a&=~(N|k|p),u|=n,a|=q[u],u},k0=function(u,n){return a&=~(N|k|p),u&=n,a|=q[u],u},K0=function(u){return a&=~(N|k|p),u^=255,a|=q[u],a|=y,u},X=function(){return W*256+Z()},j0=function(){var u=V,n=null,g=null,s=x,t=Z();switch(V+=Y0[t],t){case 0:n=X(),_(n,e0(S(n)));break;case 3:n=X(),_(n,K0(S(n)));break;case 4:n=X(),_(n,s0(S(n)));break;case 6:n=X(),_(n,o0(S(n)));break;case 7:n=X(),_(n,P0(S(n)));break;case 8:n=X(),_(n,R0(S(n)));break;case 9:n=X(),_(n,H0(S(n)));break;case 10:n=X(),_(n,E(S(n)));break;case 12:n=X(),_(n,O(S(n)));break;case 13:n=X(),g=S(n),a&=~(N|k|p),a|=q[g];break;case 14:n=X(),x=n;break;case 15:n=X(),_(n,0),a&=~(y|k|p),a|=N;break;case 18:break;case 19:break;case 22:n=i0(w()),x+=n;break;case 23:n=i0(w()),I(x),x+=n;break;case 25:var b=0,P=e&240,y0=e&15;(y0>9||a&32)&&(b|=6),P>128&&y0>9&&(b|=96),(P>144||a&1)&&(b|=96),n=b+e,a&=~(y|k|N|p),n&256&&(a|=y),e=n&255,a|=q[e];break;case 26:a|=Z();break;case 28:a&=Z();break;case 29:e=r&128?255:0,n0(U()),a&=~p;break;case 30:g=Z(),p0(g,!0);break;case 31:g=Z(),p0(g,!1);break;case 32:n=c0(Z()),x+=n;break;case 33:n=c0(Z());break;case 34:n=c0(Z()),a&(y|N)||(x+=n);break;case 35:n=c0(Z()),a&(y|N)&&(x+=n);break;case 36:n=c0(Z()),a&y||(x+=n);break;case 37:n=c0(Z()),a&y&&(x+=n);break;case 38:n=c0(Z()),a&N||(x+=n);break;case 39:n=c0(Z()),a&N&&(x+=n);break;case 40:n=c0(Z()),a&p||(x+=n);break;case 41:n=c0(Z()),a&p&&(x+=n);break;case 42:n=c0(Z()),a&k||(x+=n);break;case 43:n=c0(Z()),a&k&&(x+=n);break;case 44:n=c0(Z()),a&k^(a&p)<<2||(x+=n);break;case 45:n=c0(Z()),a&k^(a&p)<<2&&(x+=n);break;case 46:n=c0(Z()),a&k^(a&p)<<2||a&N||(x+=n);break;case 47:n=c0(Z()),(a&k^(a&p)<<2||a&N)&&(x+=n);break;case 48:c=M(),c===0?a|=N:a&=~N;break;case 49:m=M(),m===0?a|=N:a&=~N;break;case 50:d=M();break;case 51:o=M();break;case 52:O0(Z());break;case 53:B0(Z());break;case 54:b0(Z());break;case 55:z0(Z());break;case 57:x=w0();break;case 58:c+=r;break;case 59:a=F0(),a&R&&(V+=9,e=F0(),r=F0(),W=F0(),c=w0(),m=w0(),o=w0()),x=w0();break;case 60:a&=Z();break;case 61:n=e*r,n===0?a|=N:a&=~N,n&128?a|=y:a&=~y,A0(n);break;case 63:a|=R,I(x),I(o),I(m),I(c),x0(W),x0(r),x0(e),x0(a),a|=G|A,x=T(z);break;case 64:e=e0(e);break;case 67:e=K0(e);break;case 68:e=s0(e);break;case 70:e=o0(e);break;case 71:e=P0(e);break;case 72:e=R0(e);break;case 73:e=H0(e);break;case 74:e=E(e);break;case 76:e=O(e);break;case 77:a&=~(N|k|p),a|=q[e];break;case 79:e=0,a&=~(k|p|y),a|=N;break;case 80:r=e0(r);break;case 83:r=K0(r);break;case 84:r=s0(r);break;case 86:r=o0(r);break;case 87:r=P0(r);break;case 88:r=R0(r);break;case 89:r=H0(r);break;case 90:r=E(r);break;case 92:r=O(r);break;case 93:a&=~(N|k|p),a|=q[r];break;case 95:r=0,a&=~(k|p|y),a|=N;break;case 96:n=M(),_(n,e0(S(n)));break;case 99:n=M(),_(n,K0(S(n)));break;case 100:n=M(),_(n,s0(S(n)));break;case 102:n=M(),_(n,o0(S(n)));break;case 103:n=M(),_(n,P0(S(n)));break;case 104:n=M(),_(n,R0(S(n)));break;case 105:n=M(),_(n,H0(S(n)));break;case 106:n=M(),_(n,E(S(n)));break;case 108:n=M(),_(n,O(S(n)));break;case 109:n=M(),g=S(n),a&=~(N|k|p),a|=q[g];break;case 110:n=M(),x=n;break;case 111:n=M(),_(n,0),a&=~(y|k|p),a|=N;break;case 112:n=w(),_(n,e0(S(n)));break;case 115:n=w(),_(n,K0(S(n)));break;case 116:n=w(),_(n,s0(S(n)));break;case 118:n=w(),_(n,o0(S(n)));break;case 119:n=w(),_(n,P0(S(n)));break;case 120:n=w(),_(n,R0(S(n)));break;case 121:n=w(),_(n,H0(S(n)));break;case 122:n=w(),_(n,E(S(n)));break;case 124:n=w(),_(n,O(S(n)));break;case 125:n=w(),g=S(n),a&=~(N|k|p),a|=q[g];break;case 126:n=w(),x=n;break;case 127:n=w(),_(n,0),a&=~(y|k|p),a|=N;break;case 128:e=_0(e,Z());break;case 129:N0(e,Z());break;case 130:e=m0(e,Z());break;case 131:A0(H(U(),w()));break;case 132:e=k0(e,Z());break;case 133:k0(e,Z());break;case 134:e=Z(),a&=~(N|k|p),a|=q[e];break;case 136:e=d0(e,Z());break;case 137:e=$(e,Z());break;case 138:e=Z0(e,Z());break;case 139:e=r0(e,Z());break;case 140:Y(c,w());break;case 141:n=c0(Z()),I(x),x+=n;break;case 142:c=w(),n0(c),a&=~p;break;case 144:n=X(),e=_0(e,S(n));break;case 145:n=X(),N0(e,S(n));break;case 146:n=X(),e=m0(e,S(n));break;case 147:n=X(),A0(H(U(),T(n)));break;case 148:n=X(),e=k0(e,S(n));break;case 149:n=X(),k0(e,S(n));break;case 150:n=X(),e=S(n),a&=~(N|k|p),a|=q[e];break;case 151:n=X(),_(n,e),a&=~(N|k|p),a|=q[e];break;case 152:n=X(),e=d0(e,S(n));break;case 153:n=X(),e=$(e,S(n));break;case 154:n=X(),e=Z0(e,S(n));break;case 155:n=X(),e=r0(e,S(n));break;case 156:n=X(),Y(c,T(n));break;case 157:n=X(),I(x),x=n;break;case 158:n=X(),c=T(n),n0(c),a&=~p;break;case 159:n=X(),f0(n,c),n0(c),a&=~p;break;case 160:n=M(),e=_0(e,S(n));break;case 161:n=M(),N0(e,S(n));break;case 162:n=M(),e=m0(e,S(n));break;case 163:n=M(),A0(H(U(),T(n)));break;case 164:n=M(),e=k0(e,S(n));break;case 165:n=M(),k0(e,S(n));break;case 166:n=M(),e=S(n),a&=~(N|k|p),a|=q[e];break;case 167:n=M(),_(n,e),a&=~(N|k|p),a|=q[e];break;case 168:n=M(),e=d0(e,S(n));break;case 169:n=M(),e=$(e,S(n));break;case 170:n=M(),e=Z0(e,S(n));break;case 171:n=M(),e=r0(e,S(n));break;case 172:n=M(),Y(c,T(n));break;case 173:n=M(),I(x),x=n;break;case 174:n=M(),c=T(n),n0(c),a&=~p;break;case 175:n=M(),f0(n,c),n0(c),a&=~p;break;case 176:n=w(),e=_0(e,S(n));break;case 177:n=w(),N0(e,S(n));break;case 178:n=w(),e=m0(e,S(n));break;case 179:n=w(),A0(H(U(),T(n)));break;case 180:n=w(),e=k0(e,S(n));break;case 181:n=w(),k0(e,S(n));break;case 182:n=w(),e=S(n),a&=~(N|k|p),a|=q[e];break;case 183:n=w(),_(n,e),a&=~(N|k|p),a|=q[e];break;case 184:n=w(),e=d0(e,S(n));break;case 185:n=w(),e=$(e,S(n));break;case 186:n=w(),e=Z0(e,S(n));break;case 187:n=w(),e=r0(e,S(n));break;case 188:n=w(),Y(c,T(n));break;case 189:n=w(),I(x),x=n;break;case 190:n=w(),c=T(n),n0(c),a&=~p;break;case 191:n=w(),f0(n,c),n0(c),a&=~p;break;case 192:r=_0(r,Z());break;case 193:N0(r,Z());break;case 194:r=m0(r,Z());break;case 195:A0(C0(U(),w()));break;case 196:r=k0(r,Z());break;case 197:k0(r,Z());break;case 198:r=Z(),a&=~(N|k|p),a|=q[r];break;case 200:r=d0(r,Z());break;case 201:r=$(r,Z());break;case 202:r=Z0(r,Z());break;case 203:r=r0(r,Z());break;case 204:n=w(),A0(n),n0(n),a&=~p;break;case 206:o=w(),n0(o),a&=~p;break;case 208:n=X(),r=_0(r,S(n));break;case 209:n=X(),N0(r,S(n));break;case 210:n=X(),r=m0(r,S(n));break;case 211:n=X(),A0(C0(U(),T(n)));break;case 212:n=X(),r=k0(r,S(n));break;case 213:n=X(),k0(r,S(n));break;case 214:n=X(),r=S(n),a&=~(N|k|p),a|=q[r];break;case 215:n=X(),_(n,r),a&=~(N|k|p),a|=q[r];break;case 216:n=X(),r=d0(r,S(n));break;case 217:n=X(),r=$(r,S(n));break;case 218:n=X(),r=Z0(r,S(n));break;case 219:n=X(),r=r0(r,S(n));break;case 220:n=X(),g=T(n),A0(g),n0(g),a&=~p;break;case 221:n=X(),f0(n,U()),a&=~p;break;case 222:n=X(),o=T(n),n0(o),a&=~p;break;case 223:n=X(),f0(n,o),n0(o),a&=~p;break;case 224:n=M(),r=_0(r,S(n));break;case 225:n=M(),N0(r,S(n));break;case 226:n=M(),r=m0(r,S(n));break;case 227:n=M(),A0(C0(U(),T(n)));break;case 228:n=M(),r=k0(r,S(n));break;case 229:n=M(),k0(r,S(n));break;case 230:n=M(),r=S(n),a&=~(N|k|p),a|=q[r];break;case 231:n=M(),_(n,r),a&=~(N|k|p),a|=q[r];break;case 232:n=M(),r=d0(r,S(n));break;case 233:n=M(),r=$(r,S(n));break;case 234:n=M(),r=Z0(r,S(n));break;case 235:n=M(),r=r0(r,S(n));break;case 236:n=M(),g=T(n),A0(g),n0(g),a&=~p;break;case 237:n=M(),f0(n,U()),a&=~p;break;case 238:n=M(),o=T(n),n0(o),a&=~p;break;case 239:n=M(),f0(n,o),n0(o),a&=~p;break;case 240:n=w(),r=_0(r,S(n));break;case 241:n=w(),N0(r,S(n));break;case 242:n=w(),r=m0(r,S(n));break;case 243:n=w(),A0(C0(U(),T(n)));break;case 244:n=w(),r=k0(r,S(n));break;case 245:n=w(),k0(r,S(n));break;case 246:n=w(),r=S(n),a&=~(N|k|p),a|=q[r];break;case 247:n=w(),_(n,r),a&=~(N|k|p),a|=q[r];break;case 248:n=w(),r=d0(r,S(n));break;case 249:n=w(),r=$(r,S(n));break;case 250:n=w(),r=Z0(r,S(n));break;case 251:n=w(),r=r0(r,S(n));break;case 252:n=w(),g=T(n),A0(g),n0(g),a&=~p;break;case 253:n=w(),f0(n,U()),a&=~p;break;case 254:n=w(),o=T(n),n0(o),a&=~p;break;case 255:n=w(),f0(n,o),n0(o),a&=~p;break;case 16:switch(t=Z(),V+=t0[t],t){case 33:n=i0(w());break;case 34:n=i0(w()),a&(y|N)||(x+=n);break;case 35:n=i0(w()),a&(y|N)&&(x+=n);break;case 36:n=i0(w()),a&y||(x+=n);break;case 37:n=i0(w()),a&y&&(x+=n);break;case 38:n=i0(w()),a&N||(x+=n);break;case 39:n=i0(w()),a&N&&(x+=n);break;case 40:n=i0(w()),a&p||(x+=n);break;case 41:n=i0(w()),a&p&&(x+=n);break;case 42:n=i0(w()),a&k||(x+=n);break;case 43:n=i0(w()),a&k&&(x+=n);break;case 44:n=i0(w()),a&k^(a&p)<<2||(x+=n);break;case 45:n=i0(w()),a&k^(a&p)<<2&&(x+=n);break;case 46:n=i0(w()),a&k^(a&p)<<2||a&N||(x+=n);break;case 47:n=i0(w()),(a&k^(a&p)<<2||a&N)&&(x+=n);break;case 63:a|=R,I(x),I(o),I(m),I(c),x0(W),x0(r),x0(e),x0(a),a|=G|A,x=T(g0);break;case 131:Y(U(),w());break;case 140:Y(m,w());break;case 142:m=w(),n0(m),a&=~p;break;case 147:n=X(),Y(U(),T(n));break;case 156:n=X(),Y(m,T(n));break;case 158:n=X(),m=T(n),n0(m),a&=~p;break;case 159:n=X(),f0(n,m),n0(m),a&=~p;break;case 163:n=M(),Y(U(),T(n));break;case 172:n=M(),Y(m,T(n));break;case 174:n=M(),m=T(n),n0(m),a&=~p;break;case 175:n=M(),f0(n,m),n0(m),a&=~p;break;case 179:n=w(),Y(U(),T(n));break;case 188:n=w(),Y(m,T(n));break;case 190:n=w(),m=T(n),n0(m),a&=~p;break;case 191:n=w(),f0(n,m),n0(m),a&=~p;break;case 206:d=w(),n0(d),a&=~p;break;case 222:n=X(),d=T(n),n0(d),a&=~p;break;case 223:n=X(),f0(n,d),n0(d),a&=~p;break;case 238:n=M(),d=T(n),n0(d),a&=~p;break;case 239:n=M(),f0(n,d),n0(d),a&=~p;break;case 254:n=w(),d=T(n),n0(d),a&=~p;break;case 255:n=w(),f0(n,d),n0(d),a&=~p;break}break;case 17:switch(t=Z(),V+=t0[t],t){case 63:a|=R,I(x),I(o),I(m),I(c),x0(W),x0(r),x0(e),x0(a),a|=G|A,x=T(T0);break;case 131:Y(o,w());break;case 140:Y(d,w());break;case 147:n=X(),Y(o,T(n));break;case 156:n=X(),Y(d,T(n));break;case 163:n=M(),Y(o,T(n));break;case 172:n=M(),Y(d,T(n));break;case 179:n=w(),Y(o,T(n));break;case 188:n=w(),Y(d,T(n));break}break}return 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$t(){return[K,A0,function(){$(o)},U]}function Jt(){return[K,A0,function(){$(m0())},U]}function Gt(){return[K,A0,C0,function(){o=r0(),O(o),E(o)},U]}function Qt(){return[K,A0,C0,function(){N0(r0())},U]}function qt(){return[K,I,C0,function(){$(c>>>8&255)},function(){$(c&255)},X0,function(){c=L,U()}]}function en(){return[K,i0,function(){h.debug&&h.breakpoint("BRK "+R),$(c>>>8&255)},function(){$(c&255)},function(){$(m0())},function(){L=e.read(D0)},function(){L|=e.read(D0+1)<<8},function(){c=L,p=1,U()}]}function tn(){return[K,i0,function(){h.debug&&h.breakpoint("IRQ "+R),$(c>>>8&255)},function(){$(c&255)},function(){$(m0()&~16)},function(){L=e.read(D0)},function(){L|=e.read(D0+1)<<8},function(){c=L,U()}]}function nn(){return[K,i0,function(){h.debug&&h.breakpoint("NMI "+R),$(c>>>8&255)},function(){$(c&255)},function(){$(m0()&~16)},function(){L=e.read(T0)},function(){L|=e.read(T0+1)<<8},function(){c=L,U()}]}function rn(){return[K,A0,C0,function(){N0(r0())},function(){L=r0()},function(){L|=r0()<<8},function(){c=L,U()}]}function an(){return[K,A0,C0,function(){L=r0()},function(){L|=r0()<<8},function(){c=L,i0()},U]}function fn(){return[K,I,X0,function(){c=L,U()}]}function cn(){return[K,U0,p0,l0,function(){c0(),O0()},function(){c=F,U()}]}function xe(l,C){var j;return l===q?j=function(){return N===C}:l===Y0?j=function(){return a===C}:l===V0?j=function(){return k===C}:j=function(){return W===C},[K,x0,function(){j()?(A0(),M()):U()},function(){g0?(A0(),n0()):U()},U]}this.saveState=function(){return{PC:c-1&65535,A:o,X:d,Y:x,SP:m,N:a,V:W,D:y,I:p,Z:N,C:k,T:G,o:u0,R:r?1:0,d:R,AD:L,BA:F,BC:z?1:0,IA:i,bo:f,boa:g0}},this.loadState=function(l){c=l.PC+1&65535,o=l.A,d=l.X,x=l.Y,m=l.SP,a=l.N,W=l.V,y=l.D,p=l.I,N=l.Z,k=l.C,G=l.T,u0=l.o,r=!!l.R,R=l.d,L=l.AD,F=l.BA,z=!!l.BC,i=l.IA,f=l.bo,g0=l.boa,A=u0<0?[K]:t[u0]},this.toString=function(){return"CPU PC: "+c.toString(16)+" op: "+u0.toString()+" T: "+G+" data: "+R+` - A: `+o.toString(16)+" X: "+d.toString(16)+" Y: "+x.toString(16)+" SP: "+m.toString(16)+" N"+a+" V"+W+" D"+y+" I"+p+" Z"+N+" C"+k+" "},this.breakpoint=function(l){if(this.trace)var C="CPU Breakpoint! "+(l?"("+l+")":"")+` - -`+this.toString()};var bt=[7,6,0,8,3,3,5,5,3,2,2,2,4,4,6,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7,6,6,0,8,3,3,5,5,4,2,2,2,4,4,6,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7,6,6,0,8,3,3,5,5,3,2,2,2,3,4,6,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7,6,6,0,8,3,3,5,5,4,2,2,2,5,4,6,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7,0,6,0,6,3,3,3,3,2,0,2,0,4,4,4,4,2,6,0,0,4,4,4,4,2,5,2,0,0,5,0,0,2,6,2,6,3,3,3,3,2,2,2,0,4,4,4,4,2,5,0,5,4,4,4,4,2,4,2,0,4,4,4,4,2,6,0,8,3,3,5,5,2,2,2,2,4,4,6,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7,2,6,0,8,3,3,5,5,2,2,2,0,4,4,6,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7],sn=[0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,0,1,1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1],on=[1,2,0,2,2,2,2,2,1,2,1,2,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3,3,2,0,2,2,2,2,2,1,2,1,2,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3,1,2,0,2,2,2,2,2,1,2,1,2,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3,1,2,0,2,2,2,2,2,1,2,1,2,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3,0,2,0,2,2,2,2,2,1,0,1,0,3,3,3,3,2,2,0,0,2,2,2,3,1,3,1,0,0,3,0,0,2,2,2,2,2,2,2,2,1,2,1,0,3,3,3,3,2,2,0,2,2,2,2,2,1,3,1,0,3,3,3,3,2,2,0,2,2,2,2,2,1,2,1,2,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3,2,2,0,2,2,2,2,2,1,2,1,0,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3],Ln=[1,2,0,0,0,2,2,0,1,2,1,0,0,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0,3,2,0,0,2,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0,1,2,0,0,0,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0,1,2,0,0,0,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0,0,2,0,0,2,2,2,0,1,0,1,0,3,3,3,0,2,2,0,0,2,2,2,0,1,3,1,0,0,3,0,0,2,2,2,0,2,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,2,2,2,0,1,3,1,0,3,3,3,0,2,2,0,0,2,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0,2,2,0,0,2,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0];this.getOpcodeMetadata=function(l,C){return{opcode:l,mnenomic:s[l],minCycles:bt[l],maxCycles:bt[l]+sn[l],insnlength:on[l]}},this.setNMI=function(){A=nn(),G=1,c=c-1&65535},this.setIRQ=function(){p||(A=tn(),G=1,c=c-1&65535)},this.getSP=function(){return m},this.getPC=function(){return c-1&65535},this.getT=function(){return G},this.isHalted=function(){return s[u0]=="uKIL"},this.isPCStable=function(){return G==0}},ue;(function(c){c[c.None=0]="None",c[c.NMI=1]="NMI",c[c.IRQ=2]="IRQ"})(ue||(ue={}));var Cn=class{constructor(){this.cpu=new st;this.interruptType=0}connectMemoryBus(e){this.cpu.connectBus(e)}advanceClock(){if(this.interruptType&&this.isStable()){switch(this.interruptType){case 1:this.cpu.setNMI();break;case 2:this.cpu.setIRQ();break}this.interruptType=0}this.cpu.clockPulse()}advanceInsn(){do this.advanceClock();while(!this.isStable())}reset(){this.cpu.reset(),this.interruptType=0}interrupt(e){this.interruptType!=1&&(this.interruptType=e)}NMI(){this.interrupt(1)}IRQ(){this.interrupt(2)}getSP(){return this.cpu.getSP()}getPC(){return this.cpu.getPC()}isHalted(){return this.cpu.isHalted()}saveState(){var e=this.cpu.saveState();return e.it=this.interruptType,e}loadState(e){this.cpu.loadState(e),this.interruptType=e.it}isStable(){return this.cpu.isPCStable()}getOpcodeMetadata(e){return this.cpu.getOpcodeMetadata(e)}};var vn=class{constructor(e,r){this.symbolmap=e,this.debuginfo=r,this.addr2symbol=dt(e),this.addr2symbol[0]||(this.addr2symbol[0]="$00"),this.addr2symbol[65536]="__END__"}};function ge(h){return h&&typeof h.getDebugCategories=="function"}var Rt=class{constructor(){this.id2bp={}}getDebugCondition(){return Object.keys(this.id2bp).length==0?null:()=>{var e=!1;for(var r in this.id2bp)this.id2bp[r].cond()&&(e=!0);return e}}},Bt=class{constructor(){this.recorder=null;this.internalFiles={}}setRecorder(e){this.recorder=e}updateRecorder(){this.recorder&&this.isRunning()&&this.recorder.frameRequested()&&this.recorder.recordFrame(this.saveState())}inspect(e){return Sn(this,e)}getDebugTree(){var r;var e={};return e.state=this.saveState(),((r=this.debugSymbols)==null?void 0:r.debuginfo)&&(e.debuginfo=this.debugSymbols.debuginfo),e}readFile(e){return this.internalFiles[e]}writeFile(e,r){return this.internalFiles[e]=r,!0}},We=class extends Bt{constructor(){super(...arguments);this.debugSavedState=null;this.debugBreakState=null;this.debugTargetClock=0;this.debugClock=0;this.breakpoints=new Rt;this.frameCount=0}setBreakpoint(e,r){r?(this.breakpoints.id2bp[e]={cond:r},this.restartDebugging()):this.clearBreakpoint(e)}clearBreakpoint(e){delete this.breakpoints.id2bp[e]}hasBreakpoint(e){return this.breakpoints.id2bp[e]!=null}getDebugCallback(){return this.breakpoints.getDebugCondition()}setupDebug(e){this.onBreakpointHit=e}clearDebug(){this.debugBreakState!=null&&this.debugSavedState!=null&&this.loadState(this.debugSavedState),this.debugSavedState=null,this.debugBreakState=null,this.debugTargetClock=-1,this.debugClock=0,this.onBreakpointHit=null,this.clearBreakpoint("debug"),this.frameCount=0}setDebugCondition(e){this.setBreakpoint("debug",e)}resetDebugging(){this.debugSavedState?this.loadState(this.debugSavedState):this.debugSavedState=this.saveState(),this.debugClock=0,this.debugCallback=this.getDebugCallback(),this.debugBreakState=null}restartDebugging(){this.resetDebugging(),this.resume()}preFrame(){this.debugCallback&&!this.debugBreakState&&(this.debugSavedState=this.saveState(),this.debugTargetClock-=this.debugClock,this.debugClock=0)}postFrame(){this.debugCallback&&this.debugBreakState&&this.loadState(this.debugBreakState),this.frameCount++}pollControls(){}nextFrame(e){this.pollControls(),this.updateRecorder(),this.preFrame();var r=this.advance(e);return this.postFrame(),r}evalDebugCondition(){this.debugCallback&&!this.debugBreakState&&this.debugCallback()}wasBreakpointHit(){return this.debugBreakState!=null}breakpointHit(e,r){console.log(this.debugTargetClock,e,this.debugClock,this.isStable()),this.debugTargetClock=e,this.debugBreakState=this.saveState(),console.log("Breakpoint at clk",this.debugClock,"PC",this.debugBreakState.c.PC.toString(16)),this.pause(),this.onBreakpointHit&&this.onBreakpointHit(this.debugBreakState,r)}haltAndCatchFire(e){this.breakpointHit(this.debugClock,e)}runEval(e){this.setDebugCondition(()=>{if(++this.debugClock>=this.debugTargetClock&&this.isStable()){var r=this.getCPUState();return e(r)?(this.breakpointHit(this.debugClock),!0):!1}})}runToPC(e){this.debugTargetClock++,this.runEval(r=>r.PC==e)}runUntilReturn(){var e=this.getSP();this.runEval(r=>r.SP>e)}runToFrameClock(e){this.restartDebugging(),this.debugTargetClock=e,this.runEval(()=>!0)}step(){this.runToFrameClock(this.debugClock+1)}stepBack(){var e,r,c=this.debugTargetClock;this.restartDebugging(),this.debugTargetClock=c-25,this.runEval(m=>this.debugClockthis.frameCount>e)}};function Sn(h,e){if(!!h.debugSymbols){var r=h.debugSymbols.symbolmap,c=h.debugSymbols.addr2symbol;if(!r||!h.readAddress)return null;var m=r["_"+e]||r[e];if(typeof m!="number")return null;var o=h.readAddress(m);if(c&&c[m+1]!=null)return"$"+a0(m,4)+" = $"+a0(o,2)+" ("+o+" decimal)";{let d=h.readAddress(m+1),x=o|d<<8;return"$"+a0(m,4)+" = $"+a0(o,2)+" $"+a0(d,2)+" ("+(x<<16>>16)+" decimal)"}}}function Nt(h){return h.endsWith("-llvm.c")?"remote:llvm-mos":h.endsWith(".c")||h.endsWith(".h")?"cc65":h.endsWith(".s")||h.endsWith(".ca65")?"ca65":h.endsWith(".dasm")?"dasm":h.endsWith(".acme")?"acme":h.endsWith(".wiz")?"wiz":h.endsWith(".ecs")?"ecs":"dasm"}var gn=class extends We{constructor(){super(...arguments);this.debugPCDelta=-1;this.getToolForFilename=Nt}fixPC(e){return e.PC=e.PC+this.debugPCDelta&65535,e}unfixPC(e){return e.PC=e.PC-this.debugPCDelta&65535,e}getSP(){return this.getCPUState().SP}getPC(){return this.getCPUState().PC}isStable(){return!this.getCPUState().T}newCPU(e){var r=new st;return r.connectBus(e),r}getOpcodeMetadata(e,r){return It(e,r)}getOriginPC(){return(this.readAddress(65532)|this.readAddress(65533)<<8)&65535}disassemble(e,r){return rt(e,r(e),r(e+1),r(e+2))}getDefaultExtension(){return".a"}getDebugCategories(){return["CPU","ZPRAM","Stack"]}getDebugInfo(e,r){switch(e){case"CPU":return yt(r.c);case"ZPRAM":return nt(r.b||r.ram,0,256);case"Stack":return ye(this,r.b||r.ram,256,511,256+r.c.SP,32)}}};function yt(h){function e(r){var c="";return c+=r.N?" N":" -",c+=r.V?" V":" -",c+=r.D?" D":" -",c+=r.Z?" Z":" -",c+=r.C?" C":" -",c+=r.I?" I":" -",c}return"PC "+a0(h.PC,4)+" "+e(h)+` - A `+a0(h.A)+" "+(h.R?"":"BUSY")+` - X `+a0(h.X)+` - Y `+a0(h.Y)+" SP "+a0(h.SP)+` -`}var ze={cycletime:[7,6,0,8,3,3,5,5,3,2,2,2,4,4,6,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7,6,6,0,8,3,3,5,5,4,2,2,2,4,4,6,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7,6,6,0,8,3,3,5,5,3,2,2,2,3,4,6,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7,6,6,0,8,3,3,5,5,4,2,2,2,5,4,6,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7,0,6,0,6,3,3,3,3,2,0,2,0,4,4,4,4,2,6,0,0,4,4,4,4,2,5,2,0,0,5,0,0,2,6,2,6,3,3,3,3,2,2,2,0,4,4,4,4,2,5,0,5,4,4,4,4,2,4,2,0,4,4,4,4,2,6,0,8,3,3,5,5,2,2,2,2,4,4,3,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7,2,6,0,8,3,3,5,5,2,2,2,0,4,4,6,6,2,5,0,8,4,4,6,6,2,4,0,7,4,4,7,7],extracycles:[0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,0,1,1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1,0,0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,2,1,0,1,0,0,0,1,0,1,0,1,1,1,0,1],insnlengths:[1,2,0,2,2,2,2,2,1,2,1,2,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3,3,2,0,2,2,2,2,2,1,2,1,2,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3,1,2,0,2,2,2,2,2,1,2,1,2,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3,1,2,0,2,2,2,2,2,1,2,1,2,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3,0,2,0,2,2,2,2,2,1,0,1,0,3,3,3,3,2,2,0,0,2,2,2,3,1,3,1,0,0,3,0,0,2,2,2,2,2,2,2,2,1,2,1,0,3,3,3,3,2,2,0,2,2,2,2,2,1,3,1,0,3,3,3,3,2,2,0,2,2,2,2,2,1,2,1,2,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3,2,2,0,2,2,2,2,2,1,2,1,0,3,3,3,3,2,2,0,2,2,2,2,2,1,3,0,3,3,3,3,3],validinsns:[1,2,0,0,0,2,2,0,1,2,1,0,0,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0,3,2,0,0,2,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0,1,2,0,0,0,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0,1,2,0,0,0,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0,0,2,0,0,2,2,2,0,1,0,1,0,3,3,3,0,2,2,0,0,2,2,2,0,1,3,1,0,0,3,0,0,2,2,2,0,2,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,2,2,2,0,1,3,1,0,3,3,3,0,2,2,0,0,2,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0,2,2,0,0,2,2,2,0,1,2,1,0,3,3,3,0,2,2,0,0,0,2,2,0,1,3,0,0,0,3,3,0]};function It(h,e){return{opcode:h,minCycles:ze.cycletime[h],maxCycles:ze.cycletime[h]+ze.extracycles[h],insnlength:ze.insnlengths[h]}}function Lt(h){function e(r){return tt(r,["S","Z",,"H",,"V","N","C"],!0)}return"PC "+a0(h.PC,4)+" "+e(h.AF)+" "+(h.iff1?"I":"-")+(h.iff2?"I":"-")+` -SP `+a0(h.SP,4)+" IR "+a0(h.IR,4)+` -IX `+a0(h.IX,4)+" IY "+a0(h.IY,4)+` -AF `+a0(h.AF,4)+" BC "+a0(h.BC,4)+` -DE `+a0(h.DE,4)+" HL "+a0(h.HL,4)+` -`}var Ot=class extends We{constructor(){super(...arguments);this.waitCycles=0;this.getToolForFilename=Et}newCPU(e,r){return this._cpu=new at,this._cpu.connectMemoryBus(e),this._cpu.connectIOBus(r),this._cpu}getPC(){return this._cpu.getPC()}getSP(){return this._cpu.getSP()}isStable(){return!0}runCPU(e,r){if(this._cpu=e,this.waitCycles=0,this.wasBreakpointHit())return 0;var c=this.getDebugCallback(),m=0;for(this.waitCycles+=r;this.waitCycles>0;){if(c&&c()){c=null;break}var o=e.advanceInsn();m+=o,this.waitCycles-=o}return m}getDefaultExtension(){return".c"}getDebugCategories(){return["CPU","Stack"]}getDebugInfo(e,r){switch(e){case"CPU":return Lt(r.c);case"Stack":{var c=r.c.SP-1&65535,m=c&65280,o=m+255;return c==0&&(c=65536),console.log(c,m,o),ye(this,[],m,o,c,205)}}}disassemble(e,r){return ct(e,r(e),r(e+1),r(e+2),r(e+3))}};function Et(h){return h.endsWith(".c")||h.endsWith(".h")?"sdcc":h.endsWith(".s")?"sdasz80":h.endsWith(".ns")?"naken":h.endsWith(".scc")?"sccz80":h.endsWith(".z")?"zmac":h.endsWith(".wiz")?"wiz":"zmac"}function ot(h){function e(r){return tt(r,["E","F","H","I","N","Z","V","C"],!0)}return"PC "+a0(h.PC,4)+" "+e(h.CC)+` -SP `+a0(h.SP,4)+` -DP `+a0(h.DP,2)+` - A `+a0(h.A,2)+` - B `+a0(h.B,2)+` - X `+a0(h.X,4)+` - Y `+a0(h.Y,4)+` - U `+a0(h.U,4)+` -`}function Zt(h){return h.endsWith(".c")||h.endsWith(".h")?"cmoc":h.endsWith(".xasm")?"xasm6809":h.endsWith(".lwasm")?"lwasm":"cmoc"}var pn=class extends Ot{constructor(){super(...arguments);this.getToolForFilename=Zt}newCPU(e){var r=Object.create(Ye());return r.init(e.write,e.read,0),r}cpuStateToLongString(e){return ot(e)}disassemble(e,r){return Object.create(Ye()).disasm(r(e),r(e+1),r(e+2),r(e+3),r(e+4),e)}getDefaultExtension(){return".asm"}getDebugCategories(){return["CPU","Stack"]}getDebugInfo(e,r){switch(e){case"CPU":return ot(r.c);default:return super.getDebugInfo(e,r)}}};function ye(h,e,r,c,m,o,d){var x="",a=0;function W(k){return k>8);var p=o==32?-2:-3,N=W(y+p);N==o?(x+=` -$`+a0(m)+": ",x+=a0(y,4)+" "+_n(h,y,!0),m++,a=0):(a==0&&(x+=` -$`+a0(m)+": "),x+=a0(W(m))+" ",++a==8&&(a=0))}return x+` -`}function _n(h,e,r){for(var c=e,m=h.debugSymbols&&h.debugSymbols.addr2symbol;m&&e>=0;){var o=m[e];if(o){var o=m[e];return r?o+" + $"+a0(c-e):o}if(!r)break;e--}return""}function Pn(h){return typeof h.connectVideo=="function"}function kn(h){return typeof h.connectAudio=="function"}function wn(h){return typeof h.setKeyInput=="function"}function Mt(h){return typeof h.setPaddleInput=="function"}function xt(h){return typeof h.getRasterY=="function"}function Dn(h){return typeof h.connectProbe=="function"}function Rn(h){return typeof h.loadBIOS=="function"}function Bn(h){return typeof h.connectSerialIO=="function"}var Ke=class extends We{constructor(e){super();this.mainElement=e}reset(){this.machine.reset(),this.serialVisualizer!=null&&this.serialVisualizer.reset()}loadState(e){this.machine.loadState(e)}saveState(){return this.machine.saveState()}getSP(){return this.machine.cpu.getSP()}getPC(){return this.machine.cpu.getPC()}isStable(){return this.machine.cpu.isStable()}getCPUState(){return this.machine.cpu.saveState()}loadControlsState(e){this.machine.loadControlsState(e)}saveControlsState(){return this.machine.saveControlsState()}async start(){this.machine=this.newMachine();let e=this.machine;e instanceof Ve&&await e.loadWASM();var r;if(Pn(e)){var c=e.getVideoParams();this.video=new At(this.mainElement,c.width,c.height,{overscan:!!c.overscan,rotate:c.rotate|0,aspect:c.aspect}),this.video.create(),e.connectVideo(this.video.getFrameData()),wn(e)&&(this.video.setKeyboardEvents(e.setKeyInput.bind(e)),this.poller=new gt(e.setKeyInput.bind(e))),r=c.videoFrequency}if(this.timer=new St(r||60,this.nextFrame.bind(this)),kn(e)){var m=e.getAudioParams();this.audio=new it(m.sampleRate),this.audio.start(),e.connectAudio(this.audio)}Mt(e)&&this.video.setupMouseEvents(),Dn(e)&&(this.probeRecorder=new ft(e),this.startProbing=()=>(e.connectProbe(this.probeRecorder),this.probeRecorder),this.stopProbing=()=>{e.connectProbe(null)}),Rn(e)&&(this.loadBIOS=(o,d)=>{e.loadBIOS(d,o)}),Bn(e)&&(this.serialIOInterface==null?this.serialVisualizer=new Tt(this.mainElement,e):e.connectSerialIO(this.serialIOInterface))}loadROM(e,r){this.machine.loadROM(r,e),this.reset()}pollControls(){this.poller&&this.poller.poll(),Mt(this.machine)&&(this.machine.setPaddleInput(0,this.video.paddle_x),this.machine.setPaddleInput(1,this.video.paddle_y)),this.machine.pollControls&&this.machine.pollControls()}advance(e){let r=this.getDebugCallback();var c=this.machine.advanceFrame(r);return!e&&this.video&&(this.video.updateFrame(),this.updateVideoDebugger()),!e&&this.serialVisualizer&&this.serialVisualizer.refresh(),c}updateVideoDebugger(){var e;if(!this.isRunning()&&xt(this.machine)&&this.machine.getRasterCanvasPosition){let{x:r,y:c}=this.machine.getRasterCanvasPosition();if(r>=0||c>=0){let m=(e=this.video)==null?void 0:e.getContext();m&&Ct(m,r,c,1)}}}advanceFrameClock(e,r){if(r>0)return this.machine instanceof Ve?this.machine.advanceFrameClock(e,r):this.machine.advanceFrame(()=>--r<=0)}isRunning(){return this.timer&&this.timer.isRunning()}resume(){this.timer.start(),this.audio&&this.audio.start()}pause(){this.timer.stop(),this.audio&&this.audio.stop()}runToVsync(){this.restartDebugging();var e=!1;this.runEval(()=>{if(this.getRasterScanline()>0)e=!0;else return e})}getRasterScanline(){return xt(this.machine)&&this.machine.getRasterY?this.machine.getRasterY():-1}getRasterLineClock(){return xt(this.machine)&&this.machine.getRasterX?this.machine.getRasterX():-1}readAddress(e){return this.machine.read(e)}getDebugCategories(){if(ge(this.machine))return this.machine.getDebugCategories()}getDebugInfo(e,r){return ge(this.machine)&&this.machine.getDebugInfo(e,r)}},Nn=class extends Ke{constructor(){super(...arguments);this.getOpcodeMetadata=It}getToolForFilename(e){return Nt(e)}disassemble(e,r){return rt(e,r(e),r(e+1),r(e+2))}getDebugCategories(){return ge(this.machine)?this.machine.getDebugCategories():["CPU","ZPRAM","Stack"]}getDebugInfo(e,r){switch(e){case"CPU":return yt(r.c);case"ZPRAM":return nt(r.b||r.ram,0,256);case"Stack":return ye(this,r.b||r.ram,256,511,256+r.c.SP,32);default:return ge(this.machine)&&this.machine.getDebugInfo(e,r)}}},yn=class extends Ke{constructor(){super(...arguments);this.getToolForFilename=Et}getDebugCategories(){return ge(this.machine)?this.machine.getDebugCategories():["CPU","Stack"]}getDebugInfo(e,r){switch(e){case"CPU":return Lt(r.c);case"Stack":{var c=r.c.SP-1&65535,m=c&65280,o=m+255;return c==0&&(c=65536),ye(this,[],m,o,c,205)}default:return ge(this.machine)&&this.machine.getDebugInfo(e,r)}}disassemble(e,r){return ct(e,r(e),r(e+1),r(e+2),r(e+3))}},In=class extends Ke{constructor(){super(...arguments);this.getToolForFilename=Zt}getDebugCategories(){return ge(this.machine)?this.machine.getDebugCategories():["CPU","Stack"]}getDebugInfo(e,r){switch(e){case"CPU":return ot(r.c);case"Stack":{var c=r.c.SP-1&65535,m=c&65280,o=m+255;return c==0&&(c=65536),ye(this,[],m,o,c,23,!0)}default:return super.getDebugInfo(e,r)}}disassemble(e,r){return Object.create(Ye()).disasm(r(e),r(e+1),r(e+2),r(e+3),r(e+4),e)}},Tt=class{constructor(e,r){this.lastOutCount=-1;this.lastInCount=-1;this.device=r,this.textarea=document.createElement("textarea"),this.textarea.classList.add("transcript"),this.textarea.classList.add("transcript-style-2"),this.textarea.style.display="none",e.appendChild(this.textarea)}reset(){this.lastOutCount=0,this.lastInCount=0,this.textarea.style.display="none"}refresh(){var e="";if(this.device.serialOut.length!=this.lastOutCount){var r="";for(var c of this.device.serialOut)e!=c.op&&(r!=""&&(r+=` -`),c.op==="read"?r+="<< ":c.op==="write"&&(r+=">> "),e=c.op),c.value==10?(r+="\u21B5",e=""):r+=ht(c.value);this.textarea.value=r,this.lastOutCount=this.device.serialOut.length,this.textarea.style.display="block"}}};export{rt as a,ct as b,at as c,pt as d,mn as e,ln as f,Mn as g,bn as h,Tn as i,dn as j,hn as k,L0 as l,ft as m,He as n,_t as o,Pt as p,An as q,Ve as r,Ye as s,Cn as t,vn as u,ge as v,Bt as w,Sn as x,Nt as y,gn as z,yt as A,It as B,Lt as C,Ot as D,Et as E,pn as F,ye as G,Ke as H,Nn as I,yn as J,In as K}; -//# sourceMappingURL=chunk-42IVW2OL.js.map diff --git a/gen/chunk-42IVW2OL.js.map b/gen/chunk-42IVW2OL.js.map deleted file mode 100644 index 36122889..00000000 --- a/gen/chunk-42IVW2OL.js.map +++ /dev/null @@ -1,7 +0,0 @@ -{ - "version": 3, - "sources": ["../src/common/cpu/disasm6502.ts", "../src/common/cpu/ZilogZ80.ts", "../src/common/audio.ts", "../src/common/probe.ts", "../src/common/devices.ts", "../src/common/cpu/disasmz80.ts", "../src/common/wasmplatform.ts", "../src/common/cpu/6809.ts", "../src/common/cpu/MOS6502.ts", "../src/common/baseplatform.ts"], - "sourcesContent": ["\nimport { hex } from \"../util\";\n\nexport var OPS_6502 = [\n {mn:\"BRK\",am:\"\",nb:1,il:0,c1:7,c2:0,nw:3,br:1,mod:\"SI\"}, // 0\n {mn:\"ORA\",am:\"(aa,x)\",nb:2,il:0,c1:6,c2:0,nw:0,br:0,mod:\"AZN\"}, // 1\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // 2\n {mn:\"SLO\",am:\"(aa,x)\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 3\n {mn:\"NOP\",am:\"aa\",nb:2,il:1,c1:3,c2:0,nw:0,br:0,mod:\"\"}, // 4\n {mn:\"ORA\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"AZN\"}, // 5\n {mn:\"ASL\",am:\"aa\",nb:2,il:0,c1:5,c2:0,nw:2,br:0,mod:\"CZN\"}, // 6\n {mn:\"SLO\",am:\"aa\",nb:2,il:1,c1:5,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 7\n {mn:\"PHP\",am:\"\",nb:1,il:0,c1:3,c2:0,nw:1,br:0,mod:\"S\"}, // 8\n {mn:\"ORA\",am:\"#aa\",nb:2,il:0,c1:2,c2:0,nw:0,br:0,mod:\"AZN\"}, // 9\n {mn:\"ASL\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"ACZN\"}, // a\n {mn:\"ANC\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"ACZN\"}, // b\n {mn:\"NOP\",am:\"AAAA\",nb:3,il:1,c1:3,c2:0,nw:0,br:0,mod:\"\"}, // c\n {mn:\"ORA\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"AZN\"}, // d\n {mn:\"ASL\",am:\"AAAA\",nb:3,il:0,c1:6,c2:0,nw:2,br:0,mod:\"CZN\"}, // e\n {mn:\"SLO\",am:\"AAAA\",nb:3,il:1,c1:6,c2:0,nw:2,br:0,mod:\"ACZN\"}, // f\n {mn:\"BPL\",am:\"branch\",nb:2,il:0,c1:2,c2:2,nw:0,br:1,mod:\"\"}, // 10\n {mn:\"ORA\",am:\"(aa),y\",nb:2,il:0,c1:5,c2:1,nw:0,br:0,mod:\"AZN\"}, // 11\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // 12\n {mn:\"SLO\",am:\"(aa),y\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 13\n {mn:\"NOP\",am:\"aa,x\",nb:2,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // 14\n {mn:\"ORA\",am:\"aa,x\",nb:2,il:0,c1:4,c2:0,nw:0,br:0,mod:\"AZN\"}, // 15\n {mn:\"ASL\",am:\"aa,x\",nb:2,il:0,c1:6,c2:0,nw:2,br:0,mod:\"CZN\"}, // 16\n {mn:\"SLO\",am:\"aa,x\",nb:2,il:1,c1:6,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 17\n {mn:\"CLC\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"C\"}, // 18\n {mn:\"ORA\",am:\"AAAA,y\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"AZN\"}, // 19\n {mn:\"NOP\",am:\"\",nb:1,il:1,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // 1a\n {mn:\"SLO\",am:\"AAAA,y\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 1b\n {mn:\"NOP\",am:\"AAAA,x\",nb:3,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // 1c\n {mn:\"ORA\",am:\"AAAA,x\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"AZN\"}, // 1d\n {mn:\"ASL\",am:\"AAAA,x\",nb:3,il:0,c1:7,c2:0,nw:2,br:0,mod:\"CZN\"}, // 1e\n {mn:\"SLO\",am:\"AAAA,x\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 1f\n {mn:\"JSR\",am:\"AAAA\",nb:3,il:0,c1:6,c2:0,nw:2,br:1,mod:\"S\"}, // 20\n {mn:\"AND\",am:\"(aa,x)\",nb:2,il:0,c1:6,c2:0,nw:0,br:0,mod:\"AZN\"}, // 21\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // 22\n {mn:\"RLA\",am:\"(aa,x)\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 23\n {mn:\"BIT\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"ZVN\"}, // 24\n {mn:\"AND\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"AZN\"}, // 25\n {mn:\"ROL\",am:\"aa\",nb:2,il:0,c1:5,c2:0,nw:2,br:0,mod:\"CZN\"}, // 26\n {mn:\"RLA\",am:\"aa\",nb:2,il:1,c1:5,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 27\n {mn:\"PLP\",am:\"\",nb:1,il:0,c1:4,c2:0,nw:0,br:0,mod:\"SCZIDVN\"}, // 28\n {mn:\"AND\",am:\"#aa\",nb:2,il:0,c1:2,c2:0,nw:0,br:0,mod:\"AZN\"}, // 29\n {mn:\"ROL\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"ACZN\"}, // 2a\n {mn:\"ANC\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"ACZN\"}, // 2b\n {mn:\"BIT\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"ZVN\"}, // 2c\n {mn:\"AND\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"AZN\"}, // 2d\n {mn:\"ROL\",am:\"AAAA\",nb:3,il:0,c1:6,c2:0,nw:2,br:0,mod:\"CZN\"}, // 2e\n {mn:\"RLA\",am:\"AAAA\",nb:3,il:1,c1:6,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 2f\n {mn:\"BMI\",am:\"branch\",nb:2,il:0,c1:2,c2:2,nw:0,br:1,mod:\"\"}, // 30\n {mn:\"AND\",am:\"(aa),y\",nb:2,il:0,c1:5,c2:1,nw:0,br:0,mod:\"AZN\"}, // 31\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // 32\n {mn:\"RLA\",am:\"(aa),y\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 33\n {mn:\"NOP\",am:\"aa,x\",nb:2,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // 34\n {mn:\"AND\",am:\"aa,x\",nb:2,il:0,c1:4,c2:0,nw:0,br:0,mod:\"AZN\"}, // 35\n {mn:\"ROL\",am:\"aa,x\",nb:2,il:0,c1:6,c2:0,nw:2,br:0,mod:\"CZN\"}, // 36\n {mn:\"RLA\",am:\"aa,x\",nb:2,il:1,c1:6,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 37\n {mn:\"SEC\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"C\"}, // 38\n {mn:\"AND\",am:\"AAAA,y\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"AZN\"}, // 39\n {mn:\"NOP\",am:\"\",nb:1,il:1,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // 3a\n {mn:\"RLA\",am:\"AAAA,y\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 3b\n {mn:\"NOP\",am:\"AAAA,x\",nb:3,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // 3c\n {mn:\"AND\",am:\"AAAA,x\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"AZN\"}, // 3d\n {mn:\"ROL\",am:\"AAAA,x\",nb:3,il:0,c1:7,c2:0,nw:2,br:0,mod:\"CZN\"}, // 3e\n {mn:\"RLA\",am:\"AAAA,x\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 3f\n {mn:\"RTI\",am:\"\",nb:1,il:0,c1:6,c2:0,nw:0,br:1,mod:\"SCZIDVN\"}, // 40\n {mn:\"EOR\",am:\"(aa,x)\",nb:2,il:0,c1:6,c2:0,nw:0,br:0,mod:\"AZN\"}, // 41\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // 42\n {mn:\"SRE\",am:\"(aa,x)\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 43\n {mn:\"NOP\",am:\"aa\",nb:2,il:1,c1:3,c2:0,nw:0,br:0,mod:\"\"}, // 44\n {mn:\"EOR\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"AZN\"}, // 45\n {mn:\"LSR\",am:\"aa\",nb:2,il:0,c1:5,c2:0,nw:2,br:0,mod:\"CZN\"}, // 46\n {mn:\"SRE\",am:\"aa\",nb:2,il:1,c1:5,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 47\n {mn:\"PHA\",am:\"\",nb:1,il:0,c1:3,c2:0,nw:1,br:0,mod:\"S\"}, // 48\n {mn:\"EOR\",am:\"#aa\",nb:2,il:0,c1:2,c2:0,nw:0,br:0,mod:\"AZN\"}, // 49\n {mn:\"LSR\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"ACZN\"}, // 4a\n {mn:\"ASR\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"ACZN\"}, // 4b\n {mn:\"JMP\",am:\"AAAA\",nb:3,il:0,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // 4c\n {mn:\"EOR\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"AZN\"}, // 4d\n {mn:\"LSR\",am:\"AAAA\",nb:3,il:0,c1:6,c2:0,nw:2,br:0,mod:\"CZN\"}, // 4e\n {mn:\"SRE\",am:\"AAAA\",nb:3,il:1,c1:6,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 4f\n {mn:\"BVC\",am:\"branch\",nb:2,il:0,c1:2,c2:2,nw:0,br:1,mod:\"\"}, // 50\n {mn:\"EOR\",am:\"(aa),y\",nb:2,il:0,c1:5,c2:1,nw:0,br:0,mod:\"AZN\"}, // 51\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // 52\n {mn:\"SRE\",am:\"(aa),y\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 53\n {mn:\"NOP\",am:\"aa,x\",nb:2,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // 54\n {mn:\"EOR\",am:\"aa,x\",nb:2,il:0,c1:4,c2:0,nw:0,br:0,mod:\"AZN\"}, // 55\n {mn:\"LSR\",am:\"aa,x\",nb:2,il:0,c1:6,c2:0,nw:2,br:0,mod:\"CZN\"}, // 56\n {mn:\"SRE\",am:\"aa,x\",nb:2,il:1,c1:6,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 57\n {mn:\"CLI\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"I\"}, // 58\n {mn:\"EOR\",am:\"AAAA,y\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"AZN\"}, // 59\n {mn:\"NOP\",am:\"\",nb:1,il:1,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // 5a\n {mn:\"SRE\",am:\"AAAA,y\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 5b\n {mn:\"NOP\",am:\"AAAA,x\",nb:3,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // 5c\n {mn:\"EOR\",am:\"AAAA,x\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"AZN\"}, // 5d\n {mn:\"LSR\",am:\"AAAA,x\",nb:3,il:0,c1:7,c2:0,nw:2,br:0,mod:\"CZN\"}, // 5e\n {mn:\"SRE\",am:\"AAAA,x\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"ACZN\"}, // 5f\n {mn:\"RTS\",am:\"\",nb:1,il:0,c1:6,c2:0,nw:0,br:1,mod:\"S\"}, // 60\n {mn:\"ADC\",am:\"(aa,x)\",nb:2,il:0,c1:6,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // 61\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // 62\n {mn:\"RRA\",am:\"(aa,x)\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // 63\n {mn:\"NOP\",am:\"aa\",nb:2,il:1,c1:3,c2:0,nw:0,br:0,mod:\"\"}, // 64\n {mn:\"ADC\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // 65\n {mn:\"ROR\",am:\"aa\",nb:2,il:0,c1:5,c2:0,nw:2,br:0,mod:\"CZN\"}, // 66\n {mn:\"RRA\",am:\"aa\",nb:2,il:1,c1:5,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // 67\n {mn:\"PLA\",am:\"\",nb:1,il:0,c1:4,c2:0,nw:0,br:0,mod:\"SAZN\"}, // 68\n {mn:\"ADC\",am:\"#aa\",nb:2,il:0,c1:2,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // 69\n {mn:\"ROR\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"ACZN\"}, // 6a\n {mn:\"ARR\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // 6b\n {mn:\"JMP\",am:\"(AAAA)\",nb:3,il:0,c1:5,c2:0,nw:0,br:1,mod:\"\"}, // 6c\n {mn:\"ADC\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // 6d\n {mn:\"ROR\",am:\"AAAA\",nb:3,il:0,c1:6,c2:0,nw:2,br:0,mod:\"CZN\"}, // 6e\n {mn:\"RRA\",am:\"AAAA\",nb:3,il:1,c1:6,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // 6f\n {mn:\"BVS\",am:\"branch\",nb:2,il:0,c1:2,c2:2,nw:0,br:1,mod:\"\"}, // 70\n {mn:\"ADC\",am:\"(aa),y\",nb:2,il:0,c1:5,c2:1,nw:0,br:0,mod:\"ACZVN\"}, // 71\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // 72\n {mn:\"RRA\",am:\"(aa),y\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // 73\n {mn:\"NOP\",am:\"aa,x\",nb:2,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // 74\n {mn:\"ADC\",am:\"aa,x\",nb:2,il:0,c1:4,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // 75\n {mn:\"ROR\",am:\"aa,x\",nb:2,il:0,c1:6,c2:0,nw:2,br:0,mod:\"CZN\"}, // 76\n {mn:\"RRA\",am:\"aa,x\",nb:2,il:1,c1:6,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // 77\n {mn:\"SEI\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"I\"}, // 78\n {mn:\"ADC\",am:\"AAAA,y\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"ACZVN\"}, // 79\n {mn:\"NOP\",am:\"\",nb:1,il:1,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // 7a\n {mn:\"RRA\",am:\"AAAA,y\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // 7b\n {mn:\"NOP\",am:\"AAAA,x\",nb:3,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // 7c\n {mn:\"ADC\",am:\"AAAA,x\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"ACZVN\"}, // 7d\n {mn:\"ROR\",am:\"AAAA,x\",nb:3,il:0,c1:7,c2:0,nw:2,br:0,mod:\"CZN\"}, // 7e\n {mn:\"RRA\",am:\"AAAA,x\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // 7f\n {mn:\"NOP\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // 80\n {mn:\"STA\",am:\"(aa,x)\",nb:2,il:0,c1:6,c2:0,nw:1,br:0,mod:\"\"}, // 81\n {mn:\"NOP\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // 82\n {mn:\"SAX\",am:\"(aa,x)\",nb:2,il:1,c1:6,c2:0,nw:1,br:0,mod:\"\"}, // 83\n {mn:\"STY\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:1,br:0,mod:\"\"}, // 84\n {mn:\"STA\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:1,br:0,mod:\"\"}, // 85\n {mn:\"STX\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:1,br:0,mod:\"\"}, // 86\n {mn:\"SAX\",am:\"aa\",nb:2,il:1,c1:3,c2:0,nw:1,br:0,mod:\"\"}, // 87\n {mn:\"DEY\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"YZN\"}, // 88\n {mn:\"NOP\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // 89\n {mn:\"TXA\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"AZN\"}, // 8a\n {mn:\"ANE\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"AZN\"}, // 8b\n {mn:\"STY\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:1,br:0,mod:\"\"}, // 8c\n {mn:\"STA\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:1,br:0,mod:\"\"}, // 8d\n {mn:\"STX\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:1,br:0,mod:\"\"}, // 8e\n {mn:\"SAX\",am:\"AAAA\",nb:3,il:1,c1:4,c2:0,nw:1,br:0,mod:\"\"}, // 8f\n {mn:\"BCC\",am:\"branch\",nb:2,il:0,c1:2,c2:2,nw:0,br:1,mod:\"\"}, // 90\n {mn:\"STA\",am:\"(aa),y\",nb:2,il:0,c1:6,c2:0,nw:1,br:0,mod:\"\"}, // 91\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // 92\n {mn:\"SHA\",am:\"(aa),y\",nb:2,il:1,c1:6,c2:0,nw:1,br:0,mod:\"\"}, // 93\n {mn:\"STY\",am:\"aa,x\",nb:2,il:0,c1:4,c2:0,nw:1,br:0,mod:\"\"}, // 94\n {mn:\"STA\",am:\"aa,x\",nb:2,il:0,c1:4,c2:0,nw:1,br:0,mod:\"\"}, // 95\n {mn:\"STX\",am:\"aa,y\",nb:2,il:0,c1:4,c2:0,nw:1,br:0,mod:\"\"}, // 96\n {mn:\"SAX\",am:\"aa,y\",nb:3,il:1,c1:4,c2:0,nw:1,br:1,mod:\"\"}, // 97\n {mn:\"TYA\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"AZN\"}, // 98\n {mn:\"STA\",am:\"AAAA,y\",nb:3,il:0,c1:5,c2:0,nw:1,br:0,mod:\"\"}, // 99\n {mn:\"TXS\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"S\"}, // 9a\n {mn:\"SHS\",am:\"AAAA,y\",nb:3,il:1,c1:5,c2:0,nw:1,br:0,mod:\"S\"}, // 9b\n {mn:\"SHY\",am:\"AAAA,x\",nb:3,il:1,c1:5,c2:0,nw:1,br:0,mod:\"\"}, // 9c\n {mn:\"STA\",am:\"AAAA,x\",nb:3,il:0,c1:5,c2:0,nw:1,br:0,mod:\"\"}, // 9d\n {mn:\"SHX\",am:\"AAAA,y\",nb:3,il:1,c1:5,c2:0,nw:1,br:0,mod:\"\"}, // 9e\n {mn:\"SHA\",am:\"AAAA,y\",nb:3,il:1,c1:5,c2:0,nw:1,br:0,mod:\"\"}, // 9f\n {mn:\"LDY\",am:\"#aa\",nb:2,il:0,c1:2,c2:0,nw:0,br:0,mod:\"YZN\"}, // a0\n {mn:\"LDA\",am:\"(aa,x)\",nb:2,il:0,c1:6,c2:0,nw:0,br:0,mod:\"AZN\"}, // a1\n {mn:\"LDX\",am:\"#aa\",nb:2,il:0,c1:2,c2:0,nw:0,br:0,mod:\"XZN\"}, // a2\n {mn:\"LAX\",am:\"(aa,x)\",nb:2,il:1,c1:6,c2:0,nw:0,br:0,mod:\"AXZN\"}, // a3\n {mn:\"LDY\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"YZN\"}, // a4\n {mn:\"LDA\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"AZN\"}, // a5\n {mn:\"LDX\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"XZN\"}, // a6\n {mn:\"LAX\",am:\"aa\",nb:2,il:1,c1:3,c2:0,nw:0,br:0,mod:\"AXZN\"}, // a7\n {mn:\"TAY\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"YZN\"}, // a8\n {mn:\"LDA\",am:\"#aa\",nb:2,il:0,c1:2,c2:0,nw:0,br:0,mod:\"AZN\"}, // a9\n {mn:\"TAX\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"XZN\"}, // aa\n {mn:\"LXA\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"AXZN\"}, // ab\n {mn:\"LDY\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"YZN\"}, // ac\n {mn:\"LDA\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"AZN\"}, // ad\n {mn:\"LDX\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"XZN\"}, // ae\n {mn:\"LAX\",am:\"AAAA\",nb:3,il:1,c1:4,c2:0,nw:0,br:0,mod:\"AXZN\"}, // af\n {mn:\"BCS\",am:\"branch\",nb:2,il:0,c1:2,c2:2,nw:0,br:1,mod:\"\"}, // b0\n {mn:\"LDA\",am:\"(aa),y\",nb:2,il:0,c1:5,c2:1,nw:0,br:0,mod:\"AZN\"}, // b1\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // b2\n {mn:\"LAX\",am:\"(aa),y\",nb:2,il:1,c1:5,c2:1,nw:0,br:0,mod:\"AXZN\"}, // b3\n {mn:\"LDY\",am:\"aa,x\",nb:2,il:0,c1:4,c2:0,nw:0,br:0,mod:\"YZN\"}, // b4\n {mn:\"LDA\",am:\"aa,x\",nb:2,il:0,c1:4,c2:0,nw:0,br:0,mod:\"AZN\"}, // b5\n {mn:\"LDX\",am:\"aa,y\",nb:2,il:0,c1:4,c2:0,nw:0,br:0,mod:\"XZN\"}, // b6\n {mn:\"LAX\",am:\"aa,y\",nb:2,il:1,c1:4,c2:0,nw:0,br:0,mod:\"AXZN\"}, // b7\n {mn:\"CLV\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"V\"}, // b8\n {mn:\"LDA\",am:\"AAAA,y\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"AZN\"}, // b9\n {mn:\"TSX\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"XZN\"}, // ba\n {mn:\"LAS\",am:\"AAAA,y\",nb:3,il:1,c1:4,c2:1,nw:0,br:0,mod:\"SAXZN\"}, // bb\n {mn:\"LDY\",am:\"AAAA,x\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"YZN\"}, // bc\n {mn:\"LDA\",am:\"AAAA,x\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"AZN\"}, // bd\n {mn:\"LDX\",am:\"AAAA,y\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"XZN\"}, // be\n {mn:\"LAX\",am:\"AAAA,y\",nb:3,il:1,c1:4,c2:1,nw:0,br:0,mod:\"AXZN\"}, // bf\n {mn:\"CPY\",am:\"#aa\",nb:2,il:0,c1:2,c2:0,nw:0,br:0,mod:\"CZN\"}, // c0\n {mn:\"CMP\",am:\"(aa,x)\",nb:2,il:0,c1:6,c2:0,nw:0,br:0,mod:\"CZN\"}, // c1\n {mn:\"NOP\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // c2\n {mn:\"DCP\",am:\"(aa,x)\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"CZN\"}, // c3\n {mn:\"CPY\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"CZN\"}, // c4\n {mn:\"CMP\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"CZN\"}, // c5\n {mn:\"DEC\",am:\"aa\",nb:2,il:0,c1:5,c2:0,nw:2,br:0,mod:\"ZN\"}, // c6\n {mn:\"DCP\",am:\"aa\",nb:2,il:1,c1:5,c2:0,nw:2,br:0,mod:\"CZN\"}, // c7\n {mn:\"INY\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"YZN\"}, // c8\n {mn:\"CMP\",am:\"#aa\",nb:2,il:0,c1:2,c2:0,nw:0,br:0,mod:\"CZN\"}, // c9\n {mn:\"DEX\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"XZN\"}, // ca\n {mn:\"SBX\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"XCZN\"}, // cb\n {mn:\"CPY\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"CZN\"}, // cc\n {mn:\"CMP\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"CZN\"}, // cd\n {mn:\"DEC\",am:\"AAAA\",nb:3,il:0,c1:6,c2:0,nw:2,br:0,mod:\"ZN\"}, // ce\n {mn:\"DCP\",am:\"AAAA\",nb:3,il:1,c1:6,c2:0,nw:2,br:0,mod:\"CZN\"}, // cf\n {mn:\"BNE\",am:\"branch\",nb:2,il:0,c1:2,c2:2,nw:0,br:1,mod:\"\"}, // d0\n {mn:\"CMP\",am:\"(aa),y\",nb:2,il:0,c1:5,c2:1,nw:0,br:0,mod:\"CZN\"}, // d1\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // d2\n {mn:\"DCP\",am:\"(aa),y\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"CZN\"}, // d3\n {mn:\"NOP\",am:\"aa,x\",nb:2,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // d4\n {mn:\"CMP\",am:\"aa,x\",nb:2,il:0,c1:4,c2:0,nw:0,br:0,mod:\"CZN\"}, // d5\n {mn:\"DEC\",am:\"aa,x\",nb:2,il:0,c1:6,c2:0,nw:2,br:0,mod:\"ZN\"}, // d6\n {mn:\"DCP\",am:\"aa,x\",nb:2,il:1,c1:6,c2:0,nw:2,br:0,mod:\"CZN\"}, // d7\n {mn:\"CLD\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"D\"}, // d8\n {mn:\"CMP\",am:\"AAAA,y\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"CZN\"}, // d9\n {mn:\"NOP\",am:\"\",nb:1,il:1,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // da\n {mn:\"DCP\",am:\"AAAA,y\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"CZN\"}, // db\n {mn:\"NOP\",am:\"AAAA,x\",nb:3,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // dc\n {mn:\"CMP\",am:\"AAAA,x\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"CZN\"}, // dd\n {mn:\"DEC\",am:\"AAAA,x\",nb:3,il:0,c1:7,c2:0,nw:2,br:0,mod:\"ZN\"}, // de\n {mn:\"DCP\",am:\"AAAA,x\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"CZN\"}, // df\n {mn:\"CPX\",am:\"#aa\",nb:2,il:0,c1:2,c2:0,nw:0,br:0,mod:\"CZN\"}, // e0\n {mn:\"SBC\",am:\"(aa,x)\",nb:2,il:0,c1:6,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // e1\n {mn:\"NOP\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // e2\n {mn:\"ISB\",am:\"(aa,x)\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // e3\n {mn:\"CPX\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"CZN\"}, // e4\n {mn:\"SBC\",am:\"aa\",nb:2,il:0,c1:3,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // e5\n {mn:\"INC\",am:\"aa\",nb:2,il:0,c1:5,c2:0,nw:2,br:0,mod:\"ZN\"}, // e6\n {mn:\"ISB\",am:\"aa\",nb:2,il:1,c1:5,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // e7\n {mn:\"INX\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"XZN\"}, // e8\n {mn:\"SBC\",am:\"#aa\",nb:2,il:0,c1:2,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // e9\n {mn:\"NOP\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // ea\n {mn:\"SBC\",am:\"#aa\",nb:2,il:1,c1:2,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // eb\n {mn:\"CPX\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"CZN\"}, // ec\n {mn:\"SBC\",am:\"AAAA\",nb:3,il:0,c1:4,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // ed\n {mn:\"INC\",am:\"AAAA\",nb:3,il:0,c1:6,c2:0,nw:2,br:0,mod:\"ZN\"}, // ee\n {mn:\"ISB\",am:\"AAAA\",nb:3,il:1,c1:6,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // ef\n {mn:\"BEQ\",am:\"branch\",nb:2,il:0,c1:2,c2:2,nw:0,br:1,mod:\"\"}, // f0\n {mn:\"SBC\",am:\"(aa),y\",nb:2,il:0,c1:5,c2:1,nw:0,br:0,mod:\"ACZVN\"}, // f1\n {mn:\"KIL\",am:\"\",nb:1,il:2,c1:3,c2:0,nw:0,br:1,mod:\"\"}, // f2\n {mn:\"ISB\",am:\"(aa),y\",nb:2,il:1,c1:8,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // f3\n {mn:\"NOP\",am:\"aa,x\",nb:2,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // f4\n {mn:\"SBC\",am:\"aa,x\",nb:2,il:0,c1:4,c2:0,nw:0,br:0,mod:\"ACZVN\"}, // f5\n {mn:\"INC\",am:\"aa,x\",nb:2,il:0,c1:6,c2:0,nw:2,br:0,mod:\"ZN\"}, // f6\n {mn:\"ISB\",am:\"aa,x\",nb:2,il:1,c1:6,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // f7\n {mn:\"SED\",am:\"\",nb:1,il:0,c1:2,c2:0,nw:0,br:0,mod:\"D\"}, // f8\n {mn:\"SBC\",am:\"AAAA,y\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"ACZVN\"}, // f9\n {mn:\"NOP\",am:\"\",nb:1,il:1,c1:2,c2:0,nw:0,br:0,mod:\"\"}, // fa\n {mn:\"ISB\",am:\"AAAA,y\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // fb\n {mn:\"NOP\",am:\"AAAA,x\",nb:3,il:1,c1:4,c2:0,nw:0,br:0,mod:\"\"}, // fc\n {mn:\"SBC\",am:\"AAAA,x\",nb:3,il:0,c1:4,c2:1,nw:0,br:0,mod:\"ACZVN\"}, // fd\n {mn:\"INC\",am:\"AAAA,x\",nb:3,il:0,c1:7,c2:0,nw:2,br:0,mod:\"ZN\"}, // fe\n {mn:\"ISB\",am:\"AAAA,x\",nb:3,il:1,c1:7,c2:0,nw:2,br:0,mod:\"ACZVN\"}, // ff\n];\n\nexport function disassemble6502(pc:number, b0:number, b1:number, b2:number) : {line:string, nbytes:number, isaddr:boolean} {\n\n var op = OPS_6502[b0];\n if (op == null) return {line:\"???\", nbytes:1, isaddr:false};\n var s = op.mn;\n var am = op.am;\n var isaddr = false;\n if (am == 'branch') {\n var offset = (b1 < 0x80) ? (pc+2+b1) : (pc+2-(256-b1));\n offset &= 0xffff;\n am = '$'+hex(offset, 4);\n isaddr = true;\n } else {\n am = am.replace('aa','$'+hex(b1, 2));\n am = am.replace('AAAA','$'+hex(b1+(b2<<8), 4));\n if (am.indexOf('#') < 0 && am.indexOf('$') >= 0)\n isaddr = true;\n }\n return {line:op.mn + \" \" + am, nbytes:op.nb, isaddr:isaddr};\n};\n", "// Generated by CoffeeScript 1.9.3\n\nimport { CPU, Bus, InstructionBased, IOBusConnected, SavesState, Interruptable } from \"../devices\";\n\n///////////////////////////////////////////////////////////////////////////////\n/// @file Z80.js\n///\n/// @brief Emulator for the Zilog Z80 microprocessor\n///\n/// @author Matthew Howell\n///\n/// @remarks\n/// This module is a simple, straightforward instruction interpreter.\n/// There is no fancy dynamic recompilation or cycle-accurate emulation.\n/// The author believes that this should be sufficient for any emulator that\n/// would be feasible to write in JavaScript anyway.\n/// The code and the comments in this file assume that the reader is familiar\n/// with the Z80 architecture. If you're not, here are some references I use:\n/// http://clrhome.org/table/ - Z80 instruction set tables\n/// http://www.zilog.com/docs/z80/um0080.pdf - The official manual\n/// http://www.myquest.nl/z80undocumented/z80-documented-v0.91.pdf\n/// - The Undocumented Z80, Documented\n///\n/// @copyright (c) 2013 Matthew Howell\n/// This code is released under the MIT license,\n/// a copy of which is available in the associated README.md file,\n/// or at http://opensource.org/licenses/MIT\n///////////////////////////////////////////////////////////////////////////////\n\n///////////////////////////////////////////////////////////////////////////////\n/// We'll begin with the object constructor and the public API functions.\n///////////////////////////////////////////////////////////////////////////////\nfunction FastZ80(coreParameter)\n{\n // Obviously we'll be needing the core object's functions again.\n const core = coreParameter;\n \n // The argument to this constructor should be an object containing 4 functions:\n // mem_read(address) should return the byte at the given memory address,\n // mem_write(address, value) should write the given value to the given memory address,\n // io_read(port) should read a return a byte read from the given I/O port,\n // io_write(port, value) should write the given byte to the given I/O port.\n // If any of those functions is missing, this module cannot run.\n if (!core || (typeof core.mem_read !== \"function\") || (typeof core.mem_write !== \"function\") ||\n (typeof core.io_read !== \"function\") || (typeof core.io_write !== \"function\"))\n throw(\"Z80: Core object is missing required functions.\");\n \n // All right, let's initialize the registers.\n // First, the standard 8080 registers.\n let a = 0x00;\n let b = 0x00;\n let c = 0x00;\n let d = 0x00;\n let e = 0x00;\n let h = 0x00;\n let l = 0x00;\n // Now the special Z80 copies of the 8080 registers\n // (the ones used for the SWAP instruction and such).\n let a_prime = 0x00;\n let b_prime = 0x00;\n let c_prime = 0x00;\n let d_prime = 0x00;\n let e_prime = 0x00;\n let h_prime = 0x00;\n let l_prime = 0x00;\n // And now the Z80 index registers.\n let ix = 0x0000;\n let iy = 0x0000;\n // Then the \"utility\" registers: the interrupt vector,\n // the memory refresh, the stack pointer, and the program counter.\n let i = 0x00;\n let r = 0x00;\n let sp = 0xdff0;\n let pc = 0x0000;\n // We don't keep an F register for the flags,\n // because most of the time we're only accessing a single flag,\n // so we optimize for that case and use utility functions\n // for the rarer occasions when we need to access the whole register.\n let flags = {S:0, Z:0, Y:0, H:0, X:0, P:0, N:0, C:0};\n let flags_prime = {S:0, Z:0, Y:0, H:0, X:0, P:0, N:0, C:0};\n // And finally we have the interrupt mode and flip-flop registers.\n let imode = 0;\n let iff1 = 0;\n let iff2 = 0;\n \n // These are all specific to this implementation, not Z80 features.\n // Keep track of whether we've had a HALT instruction called.\n let halted = false;\n // EI and DI wait one instruction before they take effect;\n // these flags tell us when we're in that wait state.\n let do_delayed_di = false;\n let do_delayed_ei = false;\n // This tracks the number of cycles spent in a single instruction run,\n // including processing any prefixes and handling interrupts.\n let cycle_counter = 0;\n \n function getState():Z80State {\n return {\n PC:pc,\n SP:sp,\n IX:ix,\n IY:iy,\n AF:(a<<8)+get_flags_register(),\n BC:(b<<8)+c,\n DE:(d<<8)+e,\n HL:(h<<8)+l,\n AF_:(a_prime<<8)+get_flags_prime(),\n BC_:(b_prime<<8)+c_prime,\n DE_:(d_prime<<8)+e_prime,\n HL_:(h_prime<<8)+l_prime,\n IR:(i<<8)+r,\n im : imode,\n iff1 : iff1,\n iff2 : iff2,\n halted : halted,\n do_delayed_di : do_delayed_di,\n do_delayed_ei : do_delayed_ei,\n cycle_counter : cycle_counter\n }; \n }\n\n function setState(state:Z80State) {\n pc = state.PC;\n sp = state.SP;\n ix = state.IX;\n iy = state.IY;\n a = (state.AF >> 8) & 0xff;\n set_flags_register(state.AF);\n b = (state.BC >> 8) & 0xff;\n c = state.BC & 0xff;\n d = (state.DE >> 8) & 0xff;\n e = state.DE & 0xff;\n h = (state.HL >> 8) & 0xff;\n l = state.HL & 0xff;\n a_prime = (state.AF_ >> 8) & 0xff;\n set_flags_prime(state.AF_);\n b_prime = (state.BC_ >> 8) & 0xff;\n c_prime = state.BC_ & 0xff;\n d_prime = (state.DE_ >> 8) & 0xff;\n e_prime = state.DE_ & 0xff;\n h_prime = (state.HL_ >> 8) & 0xff;\n l_prime = state.HL_ & 0xff;\n i = (state.IR >> 8) & 0xff;\n r = state.IR & 0xff;\n imode = state.im;\n iff1 = state.iff1;\n iff2 = state.iff2;\n halted = state.halted;\n do_delayed_di = state.do_delayed_di;\n do_delayed_ei = state.do_delayed_ei;\n cycle_counter = state.cycle_counter;\n }\n\n///////////////////////////////////////////////////////////////////////////////\n/// @public reset\n///\n/// @brief Re-initialize the processor as if a reset or power on had occured\n///////////////////////////////////////////////////////////////////////////////\nlet reset = function()\n{\n // These registers are the ones that have predictable states\n // immediately following a power-on or a reset.\n // The others are left alone, because their states are unpredictable.\n sp = 0xdff0;\n pc = 0x0000;\n a = 0x00;\n r = 0x00;\n set_flags_register(0);\n // Start up with interrupts disabled.\n imode = 0;\n iff1 = 0;\n iff2 = 0;\n // Don't start halted or in a delayed DI or EI.\n halted = false;\n do_delayed_di = false;\n do_delayed_ei = false;\n // Obviously we've not used any cycles yet.\n cycle_counter = 0;\n};\n\n///////////////////////////////////////////////////////////////////////////////\n/// @public run_instruction\n///\n/// @brief Runs a single instruction\n///\n/// @return The number of T cycles the instruction took to run,\n/// plus any time that went into handling interrupts that fired\n/// while this instruction was executing\n///////////////////////////////////////////////////////////////////////////////\nlet run_instruction = function()\n{\n if (!halted)\n {\n // If the previous instruction was a DI or an EI,\n // we'll need to disable or enable interrupts\n // after whatever instruction we're about to run is finished.\n var doing_delayed_di = false, doing_delayed_ei = false;\n if (do_delayed_di)\n {\n do_delayed_di = false;\n doing_delayed_di = true;\n }\n else if (do_delayed_ei)\n {\n do_delayed_ei = false;\n doing_delayed_ei = true;\n }\n\n // R is incremented at the start of every instruction cycle,\n // before the instruction actually runs.\n // The high bit of R is not affected by this increment,\n // it can only be changed using the LD R, A instruction.\n r = (r & 0x80) | (((r & 0x7f) + 1) & 0x7f);\n \n // Read the byte at the PC and run the instruction it encodes.\n var opcode = core.mem_read(pc);\n decode_instruction(opcode);\n pc = (pc + 1) & 0xffff;\n \n // Actually do the delayed interrupt disable/enable if we have one.\n if (doing_delayed_di)\n {\n iff1 = 0;\n iff2 = 0;\n //console.log(\"DI\",pc);\n }\n else if (doing_delayed_ei)\n {\n iff1 = 1;\n iff2 = 1;\n //console.log(\"EI\",pc);\n }\n \n // And finally clear out the cycle counter for the next instruction\n // before returning it to the emulator core.\n var retval = cycle_counter;\n cycle_counter = 0;\n return retval;\n }\n else\n {\n // While we're halted, claim that we spent a cycle doing nothing,\n // so that the rest of the emulator can still proceed.\n return 1;\n }\n};\n\n///////////////////////////////////////////////////////////////////////////////\n/// @public interrupt\n///\n/// @brief Simulates pulsing the processor's INT (or NMI) pin\n///\n/// @param non_maskable - true if this is a non-maskable interrupt\n/// @param data - the value to be placed on the data bus, if needed\n///////////////////////////////////////////////////////////////////////////////\nlet interrupt = function(non_maskable:boolean, data:number) : boolean\n{\n //console.log(non_maskable, data, iff1, iff2, do_delayed_ei, do_delayed_di);\n if (non_maskable)\n {\n // The high bit of R is not affected by this increment,\n // it can only be changed using the LD R, A instruction.\n r = (r & 0x80) | (((r & 0x7f) + 1) & 0x7f);\n // Non-maskable interrupts are always handled the same way;\n // clear IFF1 and then do a CALL 0x0066.\n // Also, all interrupts reset the HALT state.\n halted = false;\n iff2 = iff1;\n iff1 = 0;\n push_word(pc);\n pc = 0x66;\n cycle_counter += 11;\n return true;\n }\n else if (iff1)\n {\n // The high bit of R is not affected by this increment,\n // it can only be changed using the LD R, A instruction.\n r = (r & 0x80) | (((r & 0x7f) + 1) & 0x7f);\n \n halted = false;\n iff1 = 0;\n iff2 = 0;\n \n if (imode === 0)\n {\n // In the 8080-compatible interrupt mode,\n // decode the content of the data bus as an instruction and run it.\n pc = (pc - 1) & 0xffff; //SEH: so do_reset() pushes right value\n decode_instruction(data);\n pc = (pc + 1) & 0xffff; //SEH: so do_reset() pushes right value\n cycle_counter += 2;\n }\n else if (imode === 1)\n {\n // Mode 1 is always just RST 0x38.\n push_word(pc);\n pc = 0x38;\n cycle_counter += 13;\n }\n else if (imode === 2)\n {\n // Mode 2 uses the value on the data bus as in index\n // into the vector table pointer to by the I register.\n push_word(pc);\n // The Z80 manual says that this address must be 2-byte aligned,\n // but it doesn't appear that this is actually the case on the hardware,\n // so we don't attempt to enforce that here.\n var vector_address = ((i << 8) | data);\n pc = core.mem_read(vector_address) | \n (core.mem_read((vector_address + 1) & 0xffff) << 8);\n \n cycle_counter += 19;\n }\n //console.log(imode,data,pc);\n return true;\n }\n};\n\n///////////////////////////////////////////////////////////////////////////////\n/// The public API functions end here.\n///\n/// What begins here are just general utility functions, used variously.\n///////////////////////////////////////////////////////////////////////////////\nlet decode_instruction = function(opcode)\n{\n // The register-to-register loads and ALU instructions\n // are all so uniform that we can decode them directly\n // instead of going into the instruction array for them.\n // This function gets the operand for all of these instructions.\n var get_operand = function(opcode)\n {\n return ((opcode & 0x07) === 0) ? b :\n ((opcode & 0x07) === 1) ? c :\n ((opcode & 0x07) === 2) ? d :\n ((opcode & 0x07) === 3) ? e :\n ((opcode & 0x07) === 4) ? h :\n ((opcode & 0x07) === 5) ? l :\n ((opcode & 0x07) === 6) ? core.mem_read(l | (h << 8)) : a;\n };\n\n // Handle HALT right up front, because it fouls up our LD decoding\n // by falling where LD (HL), (HL) ought to be.\n if (opcode === 0x76)\n {\n halted = true;\n }\n else if ((opcode >= 0x40) && (opcode < 0x80))\n {\n // This entire range is all 8-bit register loads.\n // Get the operand and assign it to the correct destination.\n var operand = get_operand(opcode);\n \n if (((opcode & 0x38) >>> 3) === 0)\n b = operand;\n else if (((opcode & 0x38) >>> 3) === 1)\n c = operand;\n else if (((opcode & 0x38) >>> 3) === 2)\n d = operand;\n else if (((opcode & 0x38) >>> 3) === 3)\n e = operand;\n else if (((opcode & 0x38) >>> 3) === 4)\n h = operand;\n else if (((opcode & 0x38) >>> 3) === 5)\n l = operand;\n else if (((opcode & 0x38) >>> 3) === 6)\n core.mem_write(l | (h << 8), operand);\n else if (((opcode & 0x38) >>> 3) === 7)\n a = operand;\n }\n else if ((opcode >= 0x80) && (opcode < 0xc0))\n {\n // These are the 8-bit register ALU instructions.\n // We'll get the operand and then use this \"jump table\"\n // to call the correct utility function for the instruction.\n var operand = get_operand(opcode),\n op_array = [do_add, do_adc, do_sub, do_sbc,\n do_and, do_xor, do_or, do_cp];\n \n op_array[(opcode & 0x38) >>> 3]( operand);\n }\n else\n {\n // This is one of the less formulaic instructions;\n // we'll get the specific function for it from our array.\n var func = instructions[opcode];\n func();\n }\n \n // Update the cycle counter with however many cycles\n // the base instruction took.\n // If this was a prefixed instruction, then\n // the prefix handler has added its extra cycles already.\n cycle_counter += cycle_counts[opcode];\n};\n\nlet get_signed_offset_byte = function(value)\n{\n // This function requires some explanation.\n // We just use JavaScript Number variables for our registers,\n // not like a typed array or anything.\n // That means that, when we have a byte value that's supposed\n // to represent a signed offset, the value we actually see\n // isn't signed at all, it's just a small integer.\n // So, this function converts that byte into something JavaScript\n // will recognize as signed, so we can easily do arithmetic with it.\n // First, we clamp the value to a single byte, just in case.\n value &= 0xff;\n // We don't have to do anything if the value is positive.\n if (value & 0x80)\n {\n // But if the value is negative, we need to manually un-two's-compliment it.\n // I'm going to assume you can figure out what I meant by that,\n // because I don't know how else to explain it.\n // We could also just do value |= 0xffffff00, but I prefer\n // not caring how many bits are in the integer representation\n // of a JavaScript number in the currently running browser.\n value = -((0xff & ~value) + 1);\n }\n return value;\n};\n\nlet get_flags_register = function()\n{\n // We need the whole F register for some reason.\n // probably a PUSH AF instruction,\n // so make the F register out of our separate flags.\n return (flags.S << 7) |\n (flags.Z << 6) |\n (flags.Y << 5) |\n (flags.H << 4) |\n (flags.X << 3) |\n (flags.P << 2) |\n (flags.N << 1) |\n (flags.C);\n};\n\nlet get_flags_prime = function()\n{\n // This is the same as the above for the F' register.\n return (flags_prime.S << 7) |\n (flags_prime.Z << 6) |\n (flags_prime.Y << 5) |\n (flags_prime.H << 4) |\n (flags_prime.X << 3) |\n (flags_prime.P << 2) |\n (flags_prime.N << 1) |\n (flags_prime.C);\n};\n\nlet set_flags_register = function(operand)\n{\n // We need to set the F register, probably for a POP AF,\n // so break out the given value into our separate flags.\n flags.S = (operand & 0x80) >>> 7;\n flags.Z = (operand & 0x40) >>> 6;\n flags.Y = (operand & 0x20) >>> 5;\n flags.H = (operand & 0x10) >>> 4;\n flags.X = (operand & 0x08) >>> 3;\n flags.P = (operand & 0x04) >>> 2;\n flags.N = (operand & 0x02) >>> 1;\n flags.C = (operand & 0x01);\n};\n\nlet set_flags_prime = function(operand)\n{\n // Again, this is the same as the above for F'.\n flags_prime.S = (operand & 0x80) >>> 7;\n flags_prime.Z = (operand & 0x40) >>> 6;\n flags_prime.Y = (operand & 0x20) >>> 5;\n flags_prime.H = (operand & 0x10) >>> 4;\n flags_prime.X = (operand & 0x08) >>> 3;\n flags_prime.P = (operand & 0x04) >>> 2;\n flags_prime.N = (operand & 0x02) >>> 1;\n flags_prime.C = (operand & 0x01);\n};\n\nlet update_xy_flags = function(result)\n{\n // Most of the time, the undocumented flags\n // (sometimes called X and Y, or 3 and 5),\n // take their values from the corresponding bits\n // of the result of the instruction,\n // or from some other related value.\n // This is a utility function to set those flags based on those bits.\n flags.Y = (result & 0x20) >>> 5;\n flags.X = (result & 0x08) >>> 3;\n};\n\nlet get_parity = function(value)\n{\n // We could try to actually calculate the parity every time,\n // but why calculate what you can pre-calculate?\n var parity_bits = [\n 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,\n 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, \n 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, \n 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, \n 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, \n 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, \n 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, \n 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, \n 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, \n 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, \n 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, \n 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, \n 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, \n 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, \n 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, \n 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1\n ];\n return parity_bits[value];\n};\n\nlet push_word = function(operand)\n{\n // Pretty obvious what this function does; given a 16-bit value,\n // decrement the stack pointer, write the high byte to the new\n // stack pointer location, then repeat for the low byte.\n sp = (sp - 1) & 0xffff;\n core.mem_write(sp, (operand & 0xff00) >>> 8);\n sp = (sp - 1) & 0xffff;\n core.mem_write(sp, operand & 0x00ff);\n};\n\nlet pop_word = function()\n{\n // Again, not complicated; read a byte off the top of the stack,\n // increment the stack pointer, rinse and repeat.\n var retval = core.mem_read(sp) & 0xff;\n sp = (sp + 1) & 0xffff;\n retval |= core.mem_read(sp) << 8;\n sp = (sp + 1) & 0xffff;\n return retval;\n};\n\n///////////////////////////////////////////////////////////////////////////////\n/// Now, the way most instructions work in this emulator is that they set up\n/// their operands according to their addressing mode, and then they call a\n/// utility function that handles all variations of that instruction.\n/// Those utility functions begin here.\n///////////////////////////////////////////////////////////////////////////////\nlet do_conditional_absolute_jump = function(condition)\n{\n // This function implements the JP [condition],nn instructions.\n if (condition)\n {\n // We're taking this jump, so write the new PC,\n // and then decrement the thing we just wrote,\n // because the instruction decoder increments the PC\n // unconditionally at the end of every instruction\n // and we need to counteract that so we end up at the jump target.\n pc = core.mem_read((pc + 1) & 0xffff) |\n (core.mem_read((pc + 2) & 0xffff) << 8);\n pc = (pc - 1) & 0xffff;\n }\n else\n {\n // We're not taking this jump, just move the PC past the operand.\n pc = (pc + 2) & 0xffff;\n }\n};\n\nlet do_conditional_relative_jump = function(condition)\n{\n // This function implements the JR [condition],n instructions.\n if (condition)\n {\n // We need a few more cycles to actually take the jump.\n cycle_counter += 5;\n // Calculate the offset specified by our operand.\n var offset = get_signed_offset_byte(core.mem_read((pc + 1) & 0xffff));\n // Add the offset to the PC, also skipping past this instruction.\n pc = (pc + offset + 1) & 0xffff;\n }\n else\n {\n // No jump happening, just skip the operand.\n pc = (pc + 1) & 0xffff;\n }\n};\n\nlet do_conditional_call = function(condition)\n{\n // This function is the CALL [condition],nn instructions.\n // If you've seen the previous functions, you know this drill.\n if (condition)\n {\n cycle_counter += 7;\n push_word((pc + 3) & 0xffff);\n pc = core.mem_read((pc + 1) & 0xffff) |\n (core.mem_read((pc + 2) & 0xffff) << 8);\n pc = (pc - 1) & 0xffff;\n }\n else\n {\n pc = (pc + 2) & 0xffff;\n }\n};\n\nlet do_conditional_return = function(condition)\n{\n if (condition)\n {\n cycle_counter += 6;\n pc = (pop_word() - 1) & 0xffff;\n }\n};\n\nlet do_reset = function(address)\n{\n // The RST [address] instructions go through here.\n push_word((pc + 1) & 0xffff);\n pc = (address - 1) & 0xffff;\n};\n\nlet do_add = function(operand)\n{\n // This is the ADD A, [operand] instructions.\n // We'll do the literal addition, which includes any overflow,\n // so that we can more easily figure out whether we had\n // an overflow or a carry and set the flags accordingly.\n var result = a + operand;\n \n // The great majority of the work for the arithmetic instructions\n // turns out to be setting the flags rather than the actual operation.\n flags.S = (result & 0x80) ? 1 : 0;\n flags.Z = !(result & 0xff) ? 1 : 0;\n flags.H = (((operand & 0x0f) + (a & 0x0f)) & 0x10) ? 1 : 0;\n // An overflow has happened if the sign bits of the accumulator and the operand\n // don't match the sign bit of the result value.\n flags.P = ((a & 0x80) === (operand & 0x80)) && ((a & 0x80) !== (result & 0x80)) ? 1 : 0;\n flags.N = 0;\n flags.C = (result & 0x100) ? 1 : 0;\n \n a = result & 0xff;\n update_xy_flags(a);\n};\n\nlet do_adc = function(operand)\n{\n var result = a + operand + flags.C;\n \n flags.S = (result & 0x80) ? 1 : 0;\n flags.Z = !(result & 0xff) ? 1 : 0;\n flags.H = (((operand & 0x0f) + (a & 0x0f) + flags.C) & 0x10) ? 1 : 0;\n flags.P = ((a & 0x80) === (operand & 0x80)) && ((a & 0x80) !== (result & 0x80)) ? 1 : 0;\n flags.N = 0;\n flags.C = (result & 0x100) ? 1 : 0;\n \n a = result & 0xff;\n update_xy_flags(a);\n};\n\nlet do_sub = function(operand)\n{\n var result = a - operand;\n \n flags.S = (result & 0x80) ? 1 : 0;\n flags.Z = !(result & 0xff) ? 1 : 0;\n flags.H = (((a & 0x0f) - (operand & 0x0f)) & 0x10) ? 1 : 0;\n flags.P = ((a & 0x80) !== (operand & 0x80)) && ((a & 0x80) !== (result & 0x80)) ? 1 : 0;\n flags.N = 1;\n flags.C = (result & 0x100) ? 1 : 0;\n \n a = result & 0xff;\n update_xy_flags(a);\n};\n\nlet do_sbc = function(operand)\n{\n var result = a - operand - flags.C;\n \n flags.S = (result & 0x80) ? 1 : 0;\n flags.Z = !(result & 0xff) ? 1 : 0;\n flags.H = (((a & 0x0f) - (operand & 0x0f) - flags.C) & 0x10) ? 1 : 0;\n flags.P = ((a & 0x80) !== (operand & 0x80)) && ((a & 0x80) !== (result & 0x80)) ? 1 : 0;\n flags.N = 1;\n flags.C = (result & 0x100) ? 1 : 0;\n \n a = result & 0xff;\n update_xy_flags(a);\n};\n\nlet do_cp = function(operand)\n{\n // A compare instruction is just a subtraction that doesn't save the value,\n // so we implement it as... a subtraction that doesn't save the value.\n var temp = a;\n do_sub(operand);\n a = temp;\n // Since this instruction has no \"result\" value, the undocumented flags\n // are set based on the operand instead.\n update_xy_flags(operand);\n};\n\nlet do_and = function(operand)\n{\n // The logic instructions are all pretty straightforward.\n a &= operand & 0xff;\n flags.S = (a & 0x80) ? 1 : 0;\n flags.Z = !a ? 1 : 0;\n flags.H = 1;\n flags.P = get_parity(a);\n flags.N = 0;\n flags.C = 0;\n update_xy_flags(a);\n};\n\nlet do_or = function(operand)\n{\n a = (operand | a) & 0xff;\n flags.S = (a & 0x80) ? 1 : 0;\n flags.Z = !a ? 1 : 0;\n flags.H = 0;\n flags.P = get_parity(a);\n flags.N = 0;\n flags.C = 0;\n update_xy_flags(a);\n};\n\nlet do_xor = function(operand)\n{\n a = (operand ^ a) & 0xff;\n flags.S = (a & 0x80) ? 1 : 0;\n flags.Z = !a ? 1 : 0;\n flags.H = 0;\n flags.P = get_parity(a);\n flags.N = 0;\n flags.C = 0;\n update_xy_flags(a);\n};\n\nlet do_inc = function(operand)\n{\n var result = operand + 1;\n \n flags.S = (result & 0x80) ? 1 : 0;\n flags.Z = !(result & 0xff) ? 1 : 0;\n flags.H = ((operand & 0x0f) === 0x0f) ? 1 : 0;\n // It's a good deal easier to detect overflow for an increment/decrement.\n flags.P = (operand === 0x7f) ? 1 : 0;\n flags.N = 0;\n \n result &= 0xff;\n update_xy_flags(result);\n \n return result;\n};\n\nlet do_dec = function(operand)\n{\n var result = operand - 1;\n \n flags.S = (result & 0x80) ? 1 : 0;\n flags.Z = !(result & 0xff) ? 1 : 0;\n flags.H = ((operand & 0x0f) === 0x00) ? 1 : 0;\n flags.P = (operand === 0x80) ? 1 : 0;\n flags.N = 1;\n \n result &= 0xff;\n update_xy_flags(result);\n \n return result;\n};\n\nlet do_hl_add = function(operand)\n{\n // The HL arithmetic instructions are the same as the A ones,\n // just with twice as many bits happening.\n var hl = l | (h << 8), result = hl + operand;\n \n flags.N = 0;\n flags.C = (result & 0x10000) ? 1 : 0;\n flags.H = (((hl & 0x0fff) + (operand & 0x0fff)) & 0x1000) ? 1 : 0;\n \n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n\n update_xy_flags(h);\n};\n\nlet do_hl_adc = function(operand)\n{\n operand += flags.C;\n var hl = l | (h << 8), result = hl + operand;\n \n flags.S = (result & 0x8000) ? 1 : 0;\n flags.Z = !(result & 0xffff) ? 1 : 0;\n flags.H = (((hl & 0x0fff) + (operand & 0x0fff)) & 0x1000) ? 1 : 0;\n flags.P = ((hl & 0x8000) === (operand & 0x8000)) && ((result & 0x8000) !== (hl & 0x8000)) ? 1 : 0;\n flags.N = 0;\n flags.C = (result & 0x10000) ? 1 : 0;\n \n l = result & 0xff;\n h = (result >>> 8) & 0xff;\n \n update_xy_flags(h);\n};\n\nlet do_hl_sbc = function(operand)\n{\n operand += flags.C;\n var hl = l | (h << 8), result = hl - operand;\n \n flags.S = (result & 0x8000) ? 1 : 0;\n flags.Z = !(result & 0xffff) ? 1 : 0;\n flags.H = (((hl & 0x0fff) - (operand & 0x0fff)) & 0x1000) ? 1 : 0;\n flags.P = ((hl & 0x8000) !== (operand & 0x8000)) && ((result & 0x8000) !== (hl & 0x8000)) ? 1 : 0;\n flags.N = 1;\n flags.C = (result & 0x10000) ? 1 : 0;\n \n l = result & 0xff;\n h = (result >>> 8) & 0xff;\n \n update_xy_flags(h);\n};\n\nlet do_in = function(port)\n{\n var result = core.io_read(port);\n \n flags.S = (result & 0x80) ? 1 : 0;\n flags.Z = result ? 0 : 1;\n flags.H = 0;\n flags.P = get_parity(result) ? 1 : 0;\n flags.N = 0;\n update_xy_flags(result);\n \n return result;\n};\n\nlet do_neg = function()\n{\n // This instruction is defined to not alter the register if it === 0x80.\n if (a !== 0x80)\n {\n // This is a signed operation, so convert A to a signed value.\n a = get_signed_offset_byte(a);\n \n a = (-a) & 0xff;\n }\n \n flags.S = (a & 0x80) ? 1 : 0;\n flags.Z = !a ? 1 : 0;\n flags.H = (((-a) & 0x0f) > 0) ? 1 : 0;\n flags.P = (a === 0x80) ? 1 : 0;\n flags.N = 1;\n flags.C = a ? 1 : 0;\n update_xy_flags(a);\n};\n\nlet do_ldi = function()\n{\n // Copy the value that we're supposed to copy.\n var read_value = core.mem_read(l | (h << 8));\n core.mem_write(e | (d << 8), read_value);\n \n // Increment DE and HL, and decrement BC.\n var result = (e | (d << 8)) + 1;\n e = result & 0xff;\n d = (result & 0xff00) >>> 8;\n result = (l | (h << 8)) + 1;\n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n result = (c | (b << 8)) - 1;\n c = result & 0xff;\n b = (result & 0xff00) >>> 8;\n \n flags.H = 0;\n flags.P = (c || b) ? 1 : 0;\n flags.N = 0;\n flags.Y = ((a + read_value) & 0x02) >>> 1;\n flags.X = ((a + read_value) & 0x08) >>> 3;\n};\n\nlet do_cpi = function()\n{\n var temp_carry = flags.C;\n var read_value = core.mem_read(l | (h << 8))\n do_cp(read_value);\n flags.C = temp_carry;\n flags.Y = ((a - read_value - flags.H) & 0x02) >>> 1;\n flags.X = ((a - read_value - flags.H) & 0x08) >>> 3;\n \n var result = (l | (h << 8)) + 1;\n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n result = (c | (b << 8)) - 1;\n c = result & 0xff;\n b = (result & 0xff00) >>> 8;\n \n flags.P = result ? 1 : 0;\n};\n\nlet do_ini = function()\n{\n b = do_dec(b);\n \n core.mem_write(l | (h << 8), core.io_read((b << 8) | c));\n \n var result = (l | (h << 8)) + 1;\n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n\n flags.N = 1;\n};\n\nlet do_outi = function()\n{\n core.io_write((b << 8) | c, core.mem_read(l | (h << 8)));\n \n var result = (l | (h << 8)) + 1;\n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n \n b = do_dec(b);\n flags.N = 1;\n};\n\nlet do_ldd = function()\n{\n flags.N = 0;\n flags.H = 0;\n \n var read_value = core.mem_read(l | (h << 8));\n core.mem_write(e | (d << 8), read_value);\n \n var result = (e | (d << 8)) - 1;\n e = result & 0xff;\n d = (result & 0xff00) >>> 8;\n result = (l | (h << 8)) - 1;\n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n result = (c | (b << 8)) - 1;\n c = result & 0xff;\n b = (result & 0xff00) >>> 8;\n \n flags.P = (c || b) ? 1 : 0;\n flags.Y = ((a + read_value) & 0x02) >>> 1;\n flags.X = ((a + read_value) & 0x08) >>> 3;\n};\n\nlet do_cpd = function()\n{\n var temp_carry = flags.C\n var read_value = core.mem_read(l | (h << 8))\n do_cp(read_value);\n flags.C = temp_carry;\n flags.Y = ((a - read_value - flags.H) & 0x02) >>> 1;\n flags.X = ((a - read_value - flags.H) & 0x08) >>> 3;\n \n var result = (l | (h << 8)) - 1;\n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n result = (c | (b << 8)) - 1;\n c = result & 0xff;\n b = (result & 0xff00) >>> 8;\n \n flags.P = result ? 1 : 0;\n};\n\nlet do_ind = function()\n{\n b = do_dec(b);\n \n core.mem_write(l | (h << 8), core.io_read((b << 8) | c));\n \n var result = (l | (h << 8)) - 1;\n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n \n flags.N = 1;\n};\n\nlet do_outd = function()\n{\n core.io_write((b << 8) | c, core.mem_read(l | (h << 8)));\n \n var result = (l | (h << 8)) - 1;\n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n \n b = do_dec(b);\n flags.N = 1;\n};\n\nlet do_rlc = function(operand)\n{\n flags.N = 0;\n flags.H = 0;\n \n flags.C = (operand & 0x80) >>> 7;\n operand = ((operand << 1) | flags.C) & 0xff;\n \n flags.Z = !operand ? 1 : 0;\n flags.P = get_parity(operand);\n flags.S = (operand & 0x80) ? 1 : 0;\n update_xy_flags(operand);\n \n return operand;\n};\n\nlet do_rrc = function(operand)\n{\n flags.N = 0;\n flags.H = 0;\n \n flags.C = operand & 1;\n operand = ((operand >>> 1) & 0x7f) | (flags.C << 7);\n \n flags.Z = !(operand & 0xff) ? 1 : 0;\n flags.P = get_parity(operand);\n flags.S = (operand & 0x80) ? 1 : 0;\n update_xy_flags(operand);\n \n return operand & 0xff;\n};\n\nlet do_rl = function(operand)\n{\n flags.N = 0;\n flags.H = 0;\n \n var temp = flags.C;\n flags.C = (operand & 0x80) >>> 7;\n operand = ((operand << 1) | temp) & 0xff;\n \n flags.Z = !operand ? 1 : 0;\n flags.P = get_parity(operand);\n flags.S = (operand & 0x80) ? 1 : 0;\n update_xy_flags(operand);\n\n return operand;\n};\n\nlet do_rr = function(operand)\n{\n flags.N = 0;\n flags.H = 0;\n \n var temp = flags.C;\n flags.C = operand & 1;\n operand = ((operand >>> 1) & 0x7f) | (temp << 7);\n \n flags.Z = !operand ? 1 : 0;\n flags.P = get_parity(operand);\n flags.S = (operand & 0x80) ? 1 : 0;\n update_xy_flags(operand);\n\n return operand;\n};\n\nlet do_sla = function(operand)\n{\n flags.N = 0;\n flags.H = 0;\n \n flags.C = (operand & 0x80) >>> 7;\n operand = (operand << 1) & 0xff;\n \n flags.Z = !operand ? 1 : 0;\n flags.P = get_parity(operand);\n flags.S = (operand & 0x80) ? 1 : 0;\n update_xy_flags(operand);\n \n return operand;\n};\n\nlet do_sra = function(operand)\n{\n flags.N = 0;\n flags.H = 0;\n \n flags.C = operand & 1;\n operand = ((operand >>> 1) & 0x7f) | (operand & 0x80);\n \n flags.Z = !operand ? 1 : 0;\n flags.P = get_parity(operand);\n flags.S = (operand & 0x80) ? 1 : 0;\n update_xy_flags(operand);\n \n return operand;\n};\n\nlet do_sll = function(operand)\n{\n flags.N = 0;\n flags.H = 0;\n \n flags.C = (operand & 0x80) >>> 7;\n operand = ((operand << 1) & 0xff) | 1;\n \n flags.Z = !operand ? 1 : 0;\n flags.P = get_parity(operand);\n flags.S = (operand & 0x80) ? 1 : 0;\n update_xy_flags(operand);\n \n return operand;\n};\n\nlet do_srl = function(operand)\n{\n flags.N = 0;\n flags.H = 0;\n \n flags.C = operand & 1;\n operand = (operand >>> 1) & 0x7f;\n \n flags.Z = !operand ? 1 : 0;\n flags.P = get_parity(operand);\n flags.S = 0;\n update_xy_flags(operand);\n \n return operand;\n};\n\nlet do_ix_add = function(operand)\n{\n flags.N = 0;\n \n var result = ix + operand;\n \n flags.C = (result & 0x10000) ? 1 : 0;\n flags.H = (((ix & 0xfff) + (operand & 0xfff)) & 0x1000) ? 1 : 0;\n update_xy_flags((result & 0xff00) >>> 8);\n \n ix = result & 0xffff;\n};\n\n\n///////////////////////////////////////////////////////////////////////////////\n/// This table contains the implementations for the instructions that weren't\n/// implemented directly in the decoder function (everything but the 8-bit\n/// register loads and the accumulator ALU instructions, in other words).\n/// Similar tables for the ED and DD/FD prefixes follow this one.\n///////////////////////////////////////////////////////////////////////////////\nlet instructions = [];\n\n// 0x00 : NOP\ninstructions[0x00] = function() { };\n// 0x01 : LD BC, nn\ninstructions[0x01] = function()\n{\n pc = (pc + 1) & 0xffff;\n c = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n b = core.mem_read(pc);\n};\n// 0x02 : LD (BC), A\ninstructions[0x02] = function()\n{\n core.mem_write(c | (b << 8), a);\n};\n// 0x03 : INC BC\ninstructions[0x03] = function()\n{\n var result = (c | (b << 8));\n result += 1;\n c = result & 0xff;\n b = (result & 0xff00) >>> 8;\n};\n// 0x04 : INC B\ninstructions[0x04] = function()\n{\n b = do_inc(b);\n};\n// 0x05 : DEC B\ninstructions[0x05] = function()\n{\n b = do_dec(b);\n};\n// 0x06 : LD B, n\ninstructions[0x06] = function()\n{\n pc = (pc + 1) & 0xffff;\n b = core.mem_read(pc);\n};\n// 0x07 : RLCA\ninstructions[0x07] = function()\n{\n // This instruction is implemented as a special case of the\n // more general Z80-specific RLC instruction.\n // Specifially, RLCA is a version of RLC A that affects fewer flags.\n // The same applies to RRCA, RLA, and RRA.\n var temp_s = flags.S, temp_z = flags.Z, temp_p = flags.P;\n a = do_rlc(a);\n flags.S = temp_s;\n flags.Z = temp_z;\n flags.P = temp_p;\n};\n// 0x08 : EX AF, AF'\ninstructions[0x08] = function()\n{\n var temp = a;\n a = a_prime;\n a_prime = temp;\n \n temp = get_flags_register();\n set_flags_register(get_flags_prime());\n set_flags_prime(temp);\n};\n// 0x09 : ADD HL, BC\ninstructions[0x09] = function()\n{\n do_hl_add(c | (b << 8));\n};\n// 0x0a : LD A, (BC)\ninstructions[0x0a] = function()\n{\n a = core.mem_read(c | (b << 8));\n};\n// 0x0b : DEC BC\ninstructions[0x0b] = function()\n{\n var result = (c | (b << 8));\n result -= 1;\n c = result & 0xff;\n b = (result & 0xff00) >>> 8;\n};\n// 0x0c : INC C\ninstructions[0x0c] = function()\n{\n c = do_inc(c);\n};\n// 0x0d : DEC C\ninstructions[0x0d] = function()\n{\n c = do_dec(c);\n};\n// 0x0e : LD C, n\ninstructions[0x0e] = function()\n{\n pc = (pc + 1) & 0xffff;\n c = core.mem_read(pc);\n};\n// 0x0f : RRCA\ninstructions[0x0f] = function()\n{\n var temp_s = flags.S, temp_z = flags.Z, temp_p = flags.P;\n a = do_rrc(a);\n flags.S = temp_s;\n flags.Z = temp_z;\n flags.P = temp_p;\n};\n// 0x10 : DJNZ nn\ninstructions[0x10] = function()\n{\n b = (b - 1) & 0xff;\n do_conditional_relative_jump(b !== 0);\n};\n// 0x11 : LD DE, nn\ninstructions[0x11] = function()\n{\n pc = (pc + 1) & 0xffff;\n e = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n d = core.mem_read(pc);\n};\n// 0x12 : LD (DE), A\ninstructions[0x12] = function()\n{\n core.mem_write(e | (d << 8), a);\n};\n// 0x13 : INC DE\ninstructions[0x13] = function()\n{\n var result = (e | (d << 8));\n result += 1;\n e = result & 0xff;\n d = (result & 0xff00) >>> 8;\n};\n// 0x14 : INC D\ninstructions[0x14] = function()\n{\n d = do_inc(d);\n};\n// 0x15 : DEC D\ninstructions[0x15] = function()\n{\n d = do_dec(d);\n};\n// 0x16 : LD D, n\ninstructions[0x16] = function()\n{\n pc = (pc + 1) & 0xffff;\n d = core.mem_read(pc);\n};\n// 0x17 : RLA\ninstructions[0x17] = function()\n{\n var temp_s = flags.S, temp_z = flags.Z, temp_p = flags.P;\n a = do_rl(a);\n flags.S = temp_s;\n flags.Z = temp_z;\n flags.P = temp_p;\n};\n// 0x18 : JR n\ninstructions[0x18] = function()\n{\n var offset = get_signed_offset_byte(core.mem_read((pc + 1) & 0xffff));\n pc = (pc + offset + 1) & 0xffff;\n};\n// 0x19 : ADD HL, DE\ninstructions[0x19] = function()\n{\n do_hl_add(e | (d << 8));\n};\n// 0x1a : LD A, (DE)\ninstructions[0x1a] = function()\n{\n a = core.mem_read(e | (d << 8));\n};\n// 0x1b : DEC DE\ninstructions[0x1b] = function()\n{\n var result = (e | (d << 8));\n result -= 1;\n e = result & 0xff;\n d = (result & 0xff00) >>> 8;\n};\n// 0x1c : INC E\ninstructions[0x1c] = function()\n{\n e = do_inc(e);\n};\n// 0x1d : DEC E\ninstructions[0x1d] = function()\n{\n e = do_dec(e);\n};\n// 0x1e : LD E, n\ninstructions[0x1e] = function()\n{\n pc = (pc + 1) & 0xffff;\n e = core.mem_read(pc);\n};\n// 0x1f : RRA\ninstructions[0x1f] = function()\n{\n var temp_s = flags.S, temp_z = flags.Z, temp_p = flags.P;\n a = do_rr(a);\n flags.S = temp_s;\n flags.Z = temp_z;\n flags.P = temp_p;\n};\n// 0x20 : JR NZ, n\ninstructions[0x20] = function()\n{\n do_conditional_relative_jump(!flags.Z);\n};\n// 0x21 : LD HL, nn\ninstructions[0x21] = function()\n{\n pc = (pc + 1) & 0xffff;\n l = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n h = core.mem_read(pc);\n};\n// 0x22 : LD (nn), HL\ninstructions[0x22] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n core.mem_write(address, l);\n core.mem_write((address + 1) & 0xffff, h);\n};\n// 0x23 : INC HL\ninstructions[0x23] = function()\n{\n var result = (l | (h << 8));\n result += 1;\n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n};\n// 0x24 : INC H\ninstructions[0x24] = function()\n{\n h = do_inc(h);\n};\n// 0x25 : DEC H\ninstructions[0x25] = function()\n{\n h = do_dec(h);\n};\n// 0x26 : LD H, n\ninstructions[0x26] = function()\n{\n pc = (pc + 1) & 0xffff;\n h = core.mem_read(pc);\n};\n// 0x27 : DAA\ninstructions[0x27] = function()\n{\n var temp = a;\n if (!flags.N)\n {\n if (flags.H || ((a & 0x0f) > 9))\n temp += 0x06;\n if (flags.C || (a > 0x99))\n temp += 0x60;\n }\n else\n {\n if (flags.H || ((a & 0x0f) > 9))\n temp -= 0x06;\n if (flags.C || (a > 0x99))\n temp -= 0x60;\n }\n \n flags.S = (temp & 0x80) ? 1 : 0;\n flags.Z = !(temp & 0xff) ? 1 : 0;\n flags.H = ((a & 0x10) ^ (temp & 0x10)) ? 1 : 0;\n flags.P = get_parity(temp & 0xff);\n // DAA never clears the carry flag if it was already set,\n // but it is able to set the carry flag if it was clear.\n // Don't ask me, I don't know.\n // Note also that we check for a BCD carry, instead of the usual.\n flags.C = (flags.C || (a > 0x99)) ? 1 : 0;\n \n a = temp & 0xff;\n \n update_xy_flags(a);\n};\n// 0x28 : JR Z, n\ninstructions[0x28] = function()\n{\n do_conditional_relative_jump(!!flags.Z);\n};\n// 0x29 : ADD HL, HL\ninstructions[0x29] = function()\n{\n do_hl_add(l | (h << 8));\n};\n// 0x2a : LD HL, (nn)\ninstructions[0x2a] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n l = core.mem_read(address);\n h = core.mem_read((address + 1) & 0xffff);\n};\n// 0x2b : DEC HL\ninstructions[0x2b] = function()\n{\n var result = (l | (h << 8));\n result -= 1;\n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n};\n// 0x2c : INC L\ninstructions[0x2c] = function()\n{\n l = do_inc(l);\n};\n// 0x2d : DEC L\ninstructions[0x2d] = function()\n{\n l = do_dec(l);\n};\n// 0x2e : LD L, n\ninstructions[0x2e] = function()\n{\n pc = (pc + 1) & 0xffff;\n l = core.mem_read(pc);\n};\n// 0x2f : CPL\ninstructions[0x2f] = function()\n{\n a = (~a) & 0xff;\n flags.N = 1;\n flags.H = 1;\n update_xy_flags(a);\n};\n// 0x30 : JR NC, n\ninstructions[0x30] = function()\n{\n do_conditional_relative_jump(!flags.C);\n};\n// 0x31 : LD SP, nn\ninstructions[0x31] = function()\n{\n sp = core.mem_read((pc + 1) & 0xffff) | \n (core.mem_read((pc + 2) & 0xffff) << 8);\n pc = (pc + 2) & 0xffff;\n};\n// 0x32 : LD (nn), A\ninstructions[0x32] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n core.mem_write(address, a);\n};\n// 0x33 : INC SP\ninstructions[0x33] = function()\n{\n sp = (sp + 1) & 0xffff;\n};\n// 0x34 : INC (HL)\ninstructions[0x34] = function()\n{\n var address = l | (h << 8);\n core.mem_write(address, do_inc(core.mem_read(address)));\n};\n// 0x35 : DEC (HL)\ninstructions[0x35] = function()\n{\n var address = l | (h << 8);\n core.mem_write(address, do_dec(core.mem_read(address)));\n};\n// 0x36 : LD (HL), n\ninstructions[0x36] = function()\n{\n pc = (pc + 1) & 0xffff;\n core.mem_write(l | (h << 8), core.mem_read(pc));\n};\n// 0x37 : SCF\ninstructions[0x37] = function()\n{\n flags.N = 0;\n flags.H = 0;\n flags.C = 1;\n update_xy_flags(a);\n};\n// 0x38 : JR C, n\ninstructions[0x38] = function()\n{\n do_conditional_relative_jump(!!flags.C);\n};\n// 0x39 : ADD HL, SP\ninstructions[0x39] = function()\n{\n do_hl_add(sp);\n};\n// 0x3a : LD A, (nn)\ninstructions[0x3a] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n a = core.mem_read(address);\n};\n// 0x3b : DEC SP\ninstructions[0x3b] = function()\n{\n sp = (sp - 1) & 0xffff;\n};\n// 0x3c : INC A\ninstructions[0x3c] = function()\n{\n a = do_inc(a);\n};\n// 0x3d : DEC A\ninstructions[0x3d] = function()\n{\n a = do_dec(a);\n};\n// 0x3e : LD A, n\ninstructions[0x3e] = function()\n{\n a = core.mem_read((pc + 1) & 0xffff);\n pc = (pc + 1) & 0xffff;\n};\n// 0x3f : CCF\ninstructions[0x3f] = function()\n{\n flags.N = 0;\n flags.H = flags.C;\n flags.C = flags.C ? 0 : 1;\n update_xy_flags(a);\n};\n// 0xc0 : RET NZ\ninstructions[0xc0] = function()\n{\n do_conditional_return(!flags.Z);\n};\n// 0xc1 : POP BC\ninstructions[0xc1] = function()\n{\n var result = pop_word();\n c = result & 0xff;\n b = (result & 0xff00) >>> 8;\n};\n// 0xc2 : JP NZ, nn\ninstructions[0xc2] = function()\n{\n do_conditional_absolute_jump(!flags.Z);\n};\n// 0xc3 : JP nn\ninstructions[0xc3] = function()\n{\n pc = core.mem_read((pc + 1) & 0xffff) |\n (core.mem_read((pc + 2) & 0xffff) << 8);\n pc = (pc - 1) & 0xffff;\n};\n// 0xc4 : CALL NZ, nn\ninstructions[0xc4] = function()\n{\n do_conditional_call(!flags.Z);\n};\n// 0xc5 : PUSH BC\ninstructions[0xc5] = function()\n{\n push_word(c | (b << 8));\n};\n// 0xc6 : ADD A, n\ninstructions[0xc6] = function()\n{\n pc = (pc + 1) & 0xffff;\n do_add(core.mem_read(pc));\n};\n// 0xc7 : RST 00h\ninstructions[0xc7] = function()\n{\n do_reset(0x00);\n};\n// 0xc8 : RET Z\ninstructions[0xc8] = function()\n{\n do_conditional_return(!!flags.Z);\n};\n// 0xc9 : RET\ninstructions[0xc9] = function()\n{\n pc = (pop_word() - 1) & 0xffff;\n};\n// 0xca : JP Z, nn\ninstructions[0xca] = function()\n{\n do_conditional_absolute_jump(!!flags.Z);\n};\n// 0xcb : CB Prefix\ninstructions[0xcb] = function()\n{\n // R is incremented at the start of the second instruction cycle,\n // before the instruction actually runs.\n // The high bit of R is not affected by this increment,\n // it can only be changed using the LD R, A instruction.\n r = (r & 0x80) | (((r & 0x7f) + 1) & 0x7f);\n\n // We don't have a table for this prefix,\n // the instructions are all so uniform that we can directly decode them.\n pc = (pc + 1) & 0xffff;\n var opcode = core.mem_read(pc),\n bit_number = (opcode & 0x38) >>> 3,\n reg_code = opcode & 0x07;\n \n if (opcode < 0x40)\n {\n // Shift/rotate instructions\n var op_array = [do_rlc, do_rrc, do_rl, do_rr,\n do_sla, do_sra, do_sll, do_srl];\n \n if (reg_code === 0)\n b = op_array[bit_number]( b);\n else if (reg_code === 1)\n c = op_array[bit_number]( c);\n else if (reg_code === 2)\n d = op_array[bit_number]( d);\n else if (reg_code === 3)\n e = op_array[bit_number]( e);\n else if (reg_code === 4)\n h = op_array[bit_number]( h);\n else if (reg_code === 5)\n l = op_array[bit_number]( l);\n else if (reg_code === 6)\n core.mem_write(l | (h << 8),\n op_array[bit_number]( core.mem_read(l | (h << 8))));\n else if (reg_code === 7)\n a = op_array[bit_number]( a);\n }\n else if (opcode < 0x80)\n {\n // BIT instructions\n if (reg_code === 0)\n flags.Z = !(b & (1 << bit_number)) ? 1 : 0;\n else if (reg_code === 1)\n flags.Z = !(c & (1 << bit_number)) ? 1 : 0;\n else if (reg_code === 2)\n flags.Z = !(d & (1 << bit_number)) ? 1 : 0;\n else if (reg_code === 3)\n flags.Z = !(e & (1 << bit_number)) ? 1 : 0;\n else if (reg_code === 4)\n flags.Z = !(h & (1 << bit_number)) ? 1 : 0;\n else if (reg_code === 5)\n flags.Z = !(l & (1 << bit_number)) ? 1 : 0;\n else if (reg_code === 6)\n flags.Z = !((core.mem_read(l | (h << 8))) & (1 << bit_number)) ? 1 : 0;\n else if (reg_code === 7)\n flags.Z = !(a & (1 << bit_number)) ? 1 : 0;\n \n flags.N = 0;\n flags.H = 1;\n flags.P = flags.Z;\n flags.S = ((bit_number === 7) && !flags.Z) ? 1 : 0;\n // For the BIT n, (HL) instruction, the X and Y flags are obtained\n // from what is apparently an internal temporary register used for\n // some of the 16-bit arithmetic instructions.\n // I haven't implemented that register here,\n // so for now we'll set X and Y the same way for every BIT opcode,\n // which means that they will usually be wrong for BIT n, (HL).\n flags.Y = ((bit_number === 5) && !flags.Z) ? 1 : 0;\n flags.X = ((bit_number === 3) && !flags.Z) ? 1 : 0;\n }\n else if (opcode < 0xc0)\n {\n // RES instructions\n if (reg_code === 0)\n b &= (0xff & ~(1 << bit_number));\n else if (reg_code === 1)\n c &= (0xff & ~(1 << bit_number));\n else if (reg_code === 2)\n d &= (0xff & ~(1 << bit_number));\n else if (reg_code === 3)\n e &= (0xff & ~(1 << bit_number));\n else if (reg_code === 4)\n h &= (0xff & ~(1 << bit_number));\n else if (reg_code === 5)\n l &= (0xff & ~(1 << bit_number));\n else if (reg_code === 6)\n core.mem_write(l | (h << 8),\n core.mem_read(l | (h << 8)) & ~(1 << bit_number));\n else if (reg_code === 7)\n a &= (0xff & ~(1 << bit_number));\n }\n else\n {\n // SET instructions\n if (reg_code === 0)\n b |= (1 << bit_number);\n else if (reg_code === 1)\n c |= (1 << bit_number);\n else if (reg_code === 2)\n d |= (1 << bit_number);\n else if (reg_code === 3)\n e |= (1 << bit_number);\n else if (reg_code === 4)\n h |= (1 << bit_number);\n else if (reg_code === 5)\n l |= (1 << bit_number);\n else if (reg_code === 6)\n core.mem_write(l | (h << 8),\n core.mem_read(l | (h << 8)) | (1 << bit_number));\n else if (reg_code === 7)\n a |= (1 << bit_number);\n }\n \n cycle_counter += cycle_counts_cb[opcode];\n};\n// 0xcc : CALL Z, nn\ninstructions[0xcc] = function()\n{\n do_conditional_call(!!flags.Z);\n};\n// 0xcd : CALL nn\ninstructions[0xcd] = function()\n{\n push_word((pc + 3) & 0xffff);\n pc = core.mem_read((pc + 1) & 0xffff) |\n (core.mem_read((pc + 2) & 0xffff) << 8);\n pc = (pc - 1) & 0xffff;\n};\n// 0xce : ADC A, n\ninstructions[0xce] = function()\n{\n pc = (pc + 1) & 0xffff;\n do_adc(core.mem_read(pc));\n};\n// 0xcf : RST 08h\ninstructions[0xcf] = function()\n{\n do_reset(0x08);\n};\n// 0xd0 : RET NC\ninstructions[0xd0] = function()\n{\n do_conditional_return(!flags.C);\n};\n// 0xd1 : POP DE\ninstructions[0xd1] = function()\n{\n var result = pop_word();\n e = result & 0xff;\n d = (result & 0xff00) >>> 8;\n};\n// 0xd2 : JP NC, nn\ninstructions[0xd2] = function()\n{\n do_conditional_absolute_jump(!flags.C);\n};\n// 0xd3 : OUT (n), A\ninstructions[0xd3] = function()\n{\n pc = (pc + 1) & 0xffff;\n core.io_write((a << 8) | core.mem_read(pc), a);\n};\n// 0xd4 : CALL NC, nn\ninstructions[0xd4] = function()\n{\n do_conditional_call(!flags.C);\n};\n// 0xd5 : PUSH DE\ninstructions[0xd5] = function()\n{\n push_word(e | (d << 8));\n};\n// 0xd6 : SUB n\ninstructions[0xd6] = function()\n{\n pc = (pc + 1) & 0xffff;\n do_sub(core.mem_read(pc));\n};\n// 0xd7 : RST 10h\ninstructions[0xd7] = function()\n{\n do_reset(0x10);\n};\n// 0xd8 : RET C\ninstructions[0xd8] = function()\n{\n do_conditional_return(!!flags.C);\n};\n// 0xd9 : EXX\ninstructions[0xd9] = function()\n{\n var temp = b;\n b = b_prime;\n b_prime = temp;\n temp = c;\n c = c_prime;\n c_prime = temp;\n temp = d;\n d = d_prime;\n d_prime = temp;\n temp = e;\n e = e_prime;\n e_prime = temp;\n temp = h;\n h = h_prime;\n h_prime = temp;\n temp = l;\n l = l_prime;\n l_prime = temp;\n};\n// 0xda : JP C, nn\ninstructions[0xda] = function()\n{\n do_conditional_absolute_jump(!!flags.C);\n};\n// 0xdb : IN A, (n)\ninstructions[0xdb] = function()\n{\n pc = (pc + 1) & 0xffff;\n a = core.io_read((a << 8) | core.mem_read(pc));\n};\n// 0xdc : CALL C, nn\ninstructions[0xdc] = function()\n{\n do_conditional_call(!!flags.C);\n};\n// 0xdd : DD Prefix (IX instructions)\ninstructions[0xdd] = function()\n{\n // R is incremented at the start of the second instruction cycle,\n // before the instruction actually runs.\n // The high bit of R is not affected by this increment,\n // it can only be changed using the LD R, A instruction.\n r = (r & 0x80) | (((r & 0x7f) + 1) & 0x7f);\n\n pc = (pc + 1) & 0xffff;\n var opcode = core.mem_read(pc),\n func = dd_instructions[opcode];\n \n if (func)\n {\n //func = func.bind(this);\n func();\n cycle_counter += cycle_counts_dd[opcode];\n }\n else\n {\n // Apparently if a DD opcode doesn't exist,\n // it gets treated as an unprefixed opcode.\n // What we'll do to handle that is just back up the \n // program counter, so that this byte gets decoded\n // as a normal instruction.\n pc = (pc - 1) & 0xffff;\n // And we'll add in the cycle count for a NOP.\n cycle_counter += cycle_counts[0];\n }\n};\n// 0xde : SBC n\ninstructions[0xde] = function()\n{\n pc = (pc + 1) & 0xffff;\n do_sbc(core.mem_read(pc));\n};\n// 0xdf : RST 18h\ninstructions[0xdf] = function()\n{\n do_reset(0x18);\n};\n// 0xe0 : RET PO\ninstructions[0xe0] = function()\n{\n do_conditional_return(!flags.P);\n};\n// 0xe1 : POP HL\ninstructions[0xe1] = function()\n{\n var result = pop_word();\n l = result & 0xff;\n h = (result & 0xff00) >>> 8;\n};\n// 0xe2 : JP PO, (nn)\ninstructions[0xe2] = function()\n{\n do_conditional_absolute_jump(!flags.P);\n};\n// 0xe3 : EX (SP), HL\ninstructions[0xe3] = function()\n{\n var temp = core.mem_read(sp);\n core.mem_write(sp, l);\n l = temp;\n temp = core.mem_read((sp + 1) & 0xffff);\n core.mem_write((sp + 1) & 0xffff, h);\n h = temp;\n};\n// 0xe4 : CALL PO, nn\ninstructions[0xe4] = function()\n{\n do_conditional_call(!flags.P);\n};\n// 0xe5 : PUSH HL\ninstructions[0xe5] = function()\n{\n push_word(l | (h << 8));\n};\n// 0xe6 : AND n\ninstructions[0xe6] = function()\n{\n pc = (pc + 1) & 0xffff;\n do_and(core.mem_read(pc));\n};\n// 0xe7 : RST 20h\ninstructions[0xe7] = function()\n{\n do_reset(0x20);\n};\n// 0xe8 : RET PE\ninstructions[0xe8] = function()\n{\n do_conditional_return(!!flags.P);\n};\n// 0xe9 : JP (HL)\ninstructions[0xe9] = function()\n{\n pc = l | (h << 8);\n pc = (pc - 1) & 0xffff;\n};\n// 0xea : JP PE, nn\ninstructions[0xea] = function()\n{\n do_conditional_absolute_jump(!!flags.P);\n};\n// 0xeb : EX DE, HL\ninstructions[0xeb] = function()\n{\n var temp = d;\n d = h;\n h = temp;\n temp = e;\n e = l;\n l = temp;\n};\n// 0xec : CALL PE, nn\ninstructions[0xec] = function()\n{\n do_conditional_call(!!flags.P);\n};\n// 0xed : ED Prefix\ninstructions[0xed] = function()\n{\n // R is incremented at the start of the second instruction cycle,\n // before the instruction actually runs.\n // The high bit of R is not affected by this increment,\n // it can only be changed using the LD R, A instruction.\n r = (r & 0x80) | (((r & 0x7f) + 1) & 0x7f);\n\n pc = (pc + 1) & 0xffff;\n var opcode = core.mem_read(pc),\n func = ed_instructions[opcode];\n \n if (func)\n {\n //func = func.bind(this);\n func();\n cycle_counter += cycle_counts_ed[opcode];\n }\n else\n {\n // If the opcode didn't exist, the whole thing is a two-byte NOP.\n cycle_counter += cycle_counts[0];\n }\n};\n// 0xee : XOR n\ninstructions[0xee] = function()\n{\n pc = (pc + 1) & 0xffff;\n do_xor(core.mem_read(pc));\n};\n// 0xef : RST 28h\ninstructions[0xef] = function()\n{\n do_reset(0x28);\n};\n// 0xf0 : RET P\ninstructions[0xf0] = function()\n{\n do_conditional_return(!flags.S);\n};\n// 0xf1 : POP AF\ninstructions[0xf1] = function()\n{\n var result = pop_word();\n set_flags_register(result & 0xff);\n a = (result & 0xff00) >>> 8;\n};\n// 0xf2 : JP P, nn\ninstructions[0xf2] = function()\n{\n do_conditional_absolute_jump(!flags.S);\n};\n// 0xf3 : DI\ninstructions[0xf3] = function()\n{\n // DI doesn't actually take effect until after the next instruction.\n do_delayed_di = true;\n};\n// 0xf4 : CALL P, nn\ninstructions[0xf4] = function()\n{\n do_conditional_call(!flags.S);\n};\n// 0xf5 : PUSH AF\ninstructions[0xf5] = function()\n{\n push_word(get_flags_register() | (a << 8));\n};\n// 0xf6 : OR n\ninstructions[0xf6] = function()\n{\n pc = (pc + 1) & 0xffff;\n do_or(core.mem_read(pc));\n};\n// 0xf7 : RST 30h\ninstructions[0xf7] = function()\n{\n do_reset(0x30);\n};\n// 0xf8 : RET M\ninstructions[0xf8] = function()\n{\n do_conditional_return(!!flags.S);\n};\n// 0xf9 : LD SP, HL\ninstructions[0xf9] = function()\n{\n sp = l | (h << 8);\n};\n// 0xfa : JP M, nn\ninstructions[0xfa] = function()\n{\n do_conditional_absolute_jump(!!flags.S);\n};\n// 0xfb : EI\ninstructions[0xfb] = function()\n{\n // EI doesn't actually take effect until after the next instruction.\n do_delayed_ei = true;\n};\n// 0xfc : CALL M, nn\ninstructions[0xfc] = function()\n{\n do_conditional_call(!!flags.S);\n};\n// 0xfd : FD Prefix (IY instructions)\ninstructions[0xfd] = function()\n{\n // R is incremented at the start of the second instruction cycle,\n // before the instruction actually runs.\n // The high bit of R is not affected by this increment,\n // it can only be changed using the LD R, A instruction.\n r = (r & 0x80) | (((r & 0x7f) + 1) & 0x7f);\n \n pc = (pc + 1) & 0xffff;\n var opcode = core.mem_read(pc),\n func = dd_instructions[opcode];\n \n if (func)\n {\n // Rather than copy and paste all the IX instructions into IY instructions,\n // what we'll do is sneakily copy IY into IX, run the IX instruction,\n // and then copy the result into IY and restore the old IX.\n var temp = ix;\n ix = iy;\n //func = func.bind(this);\n func();\n iy = ix;\n ix = temp;\n \n cycle_counter += cycle_counts_dd[opcode];\n }\n else\n {\n // Apparently if an FD opcode doesn't exist,\n // it gets treated as an unprefixed opcode.\n // What we'll do to handle that is just back up the \n // program counter, so that this byte gets decoded\n // as a normal instruction.\n pc = (pc - 1) & 0xffff;\n // And we'll add in the cycle count for a NOP.\n cycle_counter += cycle_counts[0];\n }\n};\n// 0xfe : CP n\ninstructions[0xfe] = function()\n{\n pc = (pc + 1) & 0xffff;\n do_cp(core.mem_read(pc));\n};\n// 0xff : RST 38h\ninstructions[0xff] = function()\n{\n do_reset(0x38);\n};\n\n\n///////////////////////////////////////////////////////////////////////////////\n/// This table of ED opcodes is pretty sparse;\n/// there are not very many valid ED-prefixed opcodes in the Z80,\n/// and many of the ones that are valid are not documented.\n///////////////////////////////////////////////////////////////////////////////\nlet ed_instructions = [];\n// 0x40 : IN B, (C)\ned_instructions[0x40] = function()\n{\n b = do_in((b << 8) | c);\n};\n// 0x41 : OUT (C), B\ned_instructions[0x41] = function()\n{\n core.io_write((b << 8) | c, b);\n};\n// 0x42 : SBC HL, BC\ned_instructions[0x42] = function()\n{\n do_hl_sbc(c | (b << 8));\n};\n// 0x43 : LD (nn), BC\ned_instructions[0x43] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n core.mem_write(address, c);\n core.mem_write((address + 1) & 0xffff, b);\n};\n// 0x44 : NEG\ned_instructions[0x44] = function()\n{\n do_neg();\n};\n// 0x45 : RETN\ned_instructions[0x45] = function()\n{\n pc = (pop_word() - 1) & 0xffff;\n iff1 = iff2;\n};\n// 0x46 : IM 0\ned_instructions[0x46] = function()\n{\n imode = 0;\n};\n// 0x47 : LD I, A\ned_instructions[0x47] = function()\n{\n i = a\n};\n// 0x48 : IN C, (C)\ned_instructions[0x48] = function()\n{\n c = do_in((b << 8) | c);\n};\n// 0x49 : OUT (C), C\ned_instructions[0x49] = function()\n{\n core.io_write((b << 8) | c, c);\n};\n// 0x4a : ADC HL, BC\ned_instructions[0x4a] = function()\n{\n do_hl_adc(c | (b << 8));\n};\n// 0x4b : LD BC, (nn)\ned_instructions[0x4b] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n c = core.mem_read(address);\n b = core.mem_read((address + 1) & 0xffff);\n};\n// 0x4c : NEG (Undocumented)\ned_instructions[0x4c] = function()\n{\n do_neg();\n};\n// 0x4d : RETI\ned_instructions[0x4d] = function()\n{\n pc = (pop_word() - 1) & 0xffff;\n};\n// 0x4e : IM 0 (Undocumented)\ned_instructions[0x4e] = function()\n{\n imode = 0;\n};\n// 0x4f : LD R, A\ned_instructions[0x4f] = function()\n{\n r = a;\n};\n// 0x50 : IN D, (C)\ned_instructions[0x50] = function()\n{\n d = do_in((b << 8) | c);\n};\n// 0x51 : OUT (C), D\ned_instructions[0x51] = function()\n{\n core.io_write((b << 8) | c, d);\n};\n// 0x52 : SBC HL, DE\ned_instructions[0x52] = function()\n{\n do_hl_sbc(e | (d << 8));\n};\n// 0x53 : LD (nn), DE\ned_instructions[0x53] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n core.mem_write(address, e);\n core.mem_write((address + 1) & 0xffff, d);\n};\n// 0x54 : NEG (Undocumented)\ned_instructions[0x54] = function()\n{\n do_neg();\n};\n// 0x55 : RETN\ned_instructions[0x55] = function()\n{\n pc = (pop_word() - 1) & 0xffff;\n iff1 = iff2;\n};\n// 0x56 : IM 1\ned_instructions[0x56] = function()\n{\n imode = 1;\n};\n// 0x57 : LD A, I\ned_instructions[0x57] = function()\n{\n a = i;\n flags.S = a & 0x80 ? 1 : 0;\n flags.Z = a ? 0 : 1;\n flags.H = 0;\n flags.P = iff2;\n flags.N = 0;\n update_xy_flags(a);\n};\n// 0x58 : IN E, (C)\ned_instructions[0x58] = function()\n{\n e = do_in((b << 8) | c);\n};\n// 0x59 : OUT (C), E\ned_instructions[0x59] = function()\n{\n core.io_write((b << 8) | c, e);\n};\n// 0x5a : ADC HL, DE\ned_instructions[0x5a] = function()\n{\n do_hl_adc(e | (d << 8));\n};\n// 0x5b : LD DE, (nn)\ned_instructions[0x5b] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n e = core.mem_read(address);\n d = core.mem_read((address + 1) & 0xffff);\n};\n// 0x5c : NEG (Undocumented)\ned_instructions[0x5c] = function()\n{\n do_neg();\n};\n// 0x5d : RETN\ned_instructions[0x5d] = function()\n{\n pc = (pop_word() - 1) & 0xffff;\n iff1 = iff2;\n};\n// 0x5e : IM 2\ned_instructions[0x5e] = function()\n{\n imode = 2;\n};\n// 0x5f : LD A, R\ned_instructions[0x5f] = function()\n{\n a = r;\n flags.S = a & 0x80 ? 1 : 0;\n flags.Z = a ? 0 : 1;\n flags.H = 0;\n flags.P = iff2;\n flags.N = 0;\n update_xy_flags(a);\n};\n// 0x60 : IN H, (C)\ned_instructions[0x60] = function()\n{\n h = do_in((b << 8) | c);\n};\n// 0x61 : OUT (C), H\ned_instructions[0x61] = function()\n{\n core.io_write((b << 8) | c, h);\n};\n// 0x62 : SBC HL, HL\ned_instructions[0x62] = function()\n{\n do_hl_sbc(l | (h << 8));\n};\n// 0x63 : LD (nn), HL (Undocumented)\ned_instructions[0x63] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n core.mem_write(address, l);\n core.mem_write((address + 1) & 0xffff, h);\n};\n// 0x64 : NEG (Undocumented)\ned_instructions[0x64] = function()\n{\n do_neg();\n};\n// 0x65 : RETN\ned_instructions[0x65] = function()\n{\n pc = (pop_word() - 1) & 0xffff;\n iff1 = iff2;\n};\n// 0x66 : IM 0\ned_instructions[0x66] = function()\n{\n imode = 0;\n};\n// 0x67 : RRD\ned_instructions[0x67] = function()\n{\n var hl_value = core.mem_read(l | (h << 8));\n var temp1 = hl_value & 0x0f, temp2 = a & 0x0f;\n hl_value = ((hl_value & 0xf0) >>> 4) | (temp2 << 4);\n a = (a & 0xf0) | temp1;\n core.mem_write(l | (h << 8), hl_value);\n \n flags.S = (a & 0x80) ? 1 : 0;\n flags.Z = a ? 0 : 1;\n flags.H = 0;\n flags.P = get_parity(a) ? 1 : 0;\n flags.N = 0;\n update_xy_flags(a);\n};\n// 0x68 : IN L, (C)\ned_instructions[0x68] = function()\n{\n l = do_in((b << 8) | c);\n};\n// 0x69 : OUT (C), L\ned_instructions[0x69] = function()\n{\n core.io_write((b << 8) | c, l);\n};\n// 0x6a : ADC HL, HL\ned_instructions[0x6a] = function()\n{\n do_hl_adc(l | (h << 8));\n};\n// 0x6b : LD HL, (nn) (Undocumented)\ned_instructions[0x6b] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n l = core.mem_read(address);\n h = core.mem_read((address + 1) & 0xffff);\n};\n// 0x6c : NEG (Undocumented)\ned_instructions[0x6c] = function()\n{\n do_neg();\n};\n// 0x6d : RETN\ned_instructions[0x6d] = function()\n{\n pc = (pop_word() - 1) & 0xffff;\n iff1 = iff2;\n};\n// 0x6e : IM 0 (Undocumented)\ned_instructions[0x6e] = function()\n{\n imode = 0;\n};\n// 0x6f : RLD\ned_instructions[0x6f] = function()\n{\n var hl_value = core.mem_read(l | (h << 8));\n var temp1 = hl_value & 0xf0, temp2 = a & 0x0f;\n hl_value = ((hl_value & 0x0f) << 4) | temp2;\n a = (a & 0xf0) | (temp1 >>> 4);\n core.mem_write(l | (h << 8), hl_value);\n \n flags.S = (a & 0x80) ? 1 : 0;\n flags.Z = a ? 0 : 1;\n flags.H = 0;\n flags.P = get_parity(a) ? 1 : 0;\n flags.N = 0;\n update_xy_flags(a);\n};\n// 0x70 : IN (C) (Undocumented)\ned_instructions[0x70] = function()\n{\n do_in((b << 8) | c);\n};\n// 0x71 : OUT (C), 0 (Undocumented)\ned_instructions[0x71] = function()\n{\n core.io_write((b << 8) | c, 0);\n};\n// 0x72 : SBC HL, SP\ned_instructions[0x72] = function()\n{\n do_hl_sbc(sp);\n};\n// 0x73 : LD (nn), SP\ned_instructions[0x73] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n core.mem_write(address, sp & 0xff);\n core.mem_write((address + 1) & 0xffff, (sp >>> 8) & 0xff);\n};\n// 0x74 : NEG (Undocumented)\ned_instructions[0x74] = function()\n{\n do_neg();\n};\n// 0x75 : RETN\ned_instructions[0x75] = function()\n{\n pc = (pop_word() - 1) & 0xffff;\n iff1 = iff2;\n};\n// 0x76 : IM 1\ned_instructions[0x76] = function()\n{\n imode = 1;\n};\n// 0x78 : IN A, (C)\ned_instructions[0x78] = function()\n{\n a = do_in((b << 8) | c);\n};\n// 0x79 : OUT (C), A\ned_instructions[0x79] = function()\n{\n core.io_write((b << 8) | c, a);\n};\n// 0x7a : ADC HL, SP\ned_instructions[0x7a] = function()\n{\n do_hl_adc(sp);\n};\n// 0x7b : LD SP, (nn)\ned_instructions[0x7b] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= core.mem_read(pc) << 8;\n \n sp = core.mem_read(address);\n sp |= core.mem_read((address + 1) & 0xffff) << 8;\n};\n// 0x7c : NEG (Undocumented)\ned_instructions[0x7c] = function()\n{\n do_neg();\n};\n// 0x7d : RETN\ned_instructions[0x7d] = function()\n{\n pc = (pop_word() - 1) & 0xffff;\n iff1 = iff2;\n};\n// 0x7e : IM 2\ned_instructions[0x7e] = function()\n{\n imode = 2;\n};\n// 0xa0 : LDI\ned_instructions[0xa0] = function()\n{\n do_ldi();\n};\n// 0xa1 : CPI\ned_instructions[0xa1] = function()\n{\n do_cpi();\n};\n// 0xa2 : INI\ned_instructions[0xa2] = function()\n{\n do_ini();\n};\n// 0xa3 : OUTI\ned_instructions[0xa3] = function()\n{\n do_outi();\n};\n// 0xa8 : LDD\ned_instructions[0xa8] = function()\n{\n do_ldd();\n};\n// 0xa9 : CPD\ned_instructions[0xa9] = function()\n{\n do_cpd();\n};\n// 0xaa : IND\ned_instructions[0xaa] = function()\n{\n do_ind();\n};\n// 0xab : OUTD\ned_instructions[0xab] = function()\n{\n do_outd();\n};\n// 0xb0 : LDIR\ned_instructions[0xb0] = function()\n{\n do_ldi();\n if (b || c)\n {\n cycle_counter += 5;\n pc = (pc - 2) & 0xffff;\n }\n};\n// 0xb1 : CPIR\ned_instructions[0xb1] = function()\n{\n do_cpi();\n if (!flags.Z && (b || c))\n {\n cycle_counter += 5;\n pc = (pc - 2) & 0xffff;\n }\n};\n// 0xb2 : INIR\ned_instructions[0xb2] = function()\n{\n do_ini();\n if (b)\n {\n cycle_counter += 5;\n pc = (pc - 2) & 0xffff;\n }\n};\n// 0xb3 : OTIR\ned_instructions[0xb3] = function()\n{\n do_outi();\n if (b)\n {\n cycle_counter += 5;\n pc = (pc - 2) & 0xffff;\n }\n};\n// 0xb8 : LDDR\ned_instructions[0xb8] = function()\n{\n do_ldd();\n if (b || c)\n {\n cycle_counter += 5;\n pc = (pc - 2) & 0xffff;\n }\n};\n// 0xb9 : CPDR\ned_instructions[0xb9] = function()\n{\n do_cpd();\n if (!flags.Z && (b || c))\n {\n cycle_counter += 5;\n pc = (pc - 2) & 0xffff;\n }\n};\n// 0xba : INDR\ned_instructions[0xba] = function()\n{\n do_ind();\n if (b)\n {\n cycle_counter += 5;\n pc = (pc - 2) & 0xffff;\n }\n};\n// 0xbb : OTDR\ned_instructions[0xbb] = function()\n{\n do_outd();\n if (b)\n {\n cycle_counter += 5;\n pc = (pc - 2) & 0xffff;\n }\n};\n\n\n///////////////////////////////////////////////////////////////////////////////\n/// Like ED, this table is quite sparse,\n/// and many of the opcodes here are also undocumented.\n/// The undocumented instructions here are those that deal with only one byte\n/// of the two-byte IX register; the bytes are designed IXH and IXL here.\n///////////////////////////////////////////////////////////////////////////////\nlet dd_instructions = [];\n// 0x09 : ADD IX, BC\ndd_instructions[0x09] = function()\n{\n do_ix_add(c | (b << 8));\n};\n// 0x19 : ADD IX, DE\ndd_instructions[0x19] = function()\n{\n do_ix_add(e | (d << 8));\n};\n// 0x21 : LD IX, nn\ndd_instructions[0x21] = function()\n{\n pc = (pc + 1) & 0xffff;\n ix = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n ix |= (core.mem_read(pc) << 8);\n};\n// 0x22 : LD (nn), IX\ndd_instructions[0x22] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= (core.mem_read(pc) << 8);\n \n core.mem_write(address, ix & 0xff);\n core.mem_write((address + 1) & 0xffff, (ix >>> 8) & 0xff);\n};\n// 0x23 : INC IX\ndd_instructions[0x23] = function()\n{\n ix = (ix + 1) & 0xffff;\n};\n// 0x24 : INC IXH (Undocumented)\ndd_instructions[0x24] = function()\n{\n ix = (do_inc(ix >>> 8) << 8) | (ix & 0xff);\n};\n// 0x25 : DEC IXH (Undocumented)\ndd_instructions[0x25] = function()\n{\n ix = (do_dec(ix >>> 8) << 8) | (ix & 0xff);\n};\n// 0x26 : LD IXH, n (Undocumented)\ndd_instructions[0x26] = function()\n{\n pc = (pc + 1) & 0xffff;\n ix = (core.mem_read(pc) << 8) | (ix & 0xff);\n};\n// 0x29 : ADD IX, IX\ndd_instructions[0x29] = function()\n{\n do_ix_add(ix);\n};\n// 0x2a : LD IX, (nn)\ndd_instructions[0x2a] = function()\n{\n pc = (pc + 1) & 0xffff;\n var address = core.mem_read(pc);\n pc = (pc + 1) & 0xffff;\n address |= (core.mem_read(pc) << 8);\n \n ix = core.mem_read(address);\n ix |= (core.mem_read((address + 1) & 0xffff) << 8);\n};\n// 0x2b : DEC IX\ndd_instructions[0x2b] = function()\n{\n ix = (ix - 1) & 0xffff;\n};\n// 0x2c : INC IXL (Undocumented)\ndd_instructions[0x2c] = function()\n{\n ix = do_inc(ix & 0xff) | (ix & 0xff00);\n};\n// 0x2d : DEC IXL (Undocumented)\ndd_instructions[0x2d] = function()\n{\n ix = do_dec(ix & 0xff) | (ix & 0xff00);\n};\n// 0x2e : LD IXL, n (Undocumented)\ndd_instructions[0x2e] = function()\n{\n pc = (pc + 1) & 0xffff;\n ix = (core.mem_read(pc) & 0xff) | (ix & 0xff00);\n};\n// 0x34 : INC (IX+n)\ndd_instructions[0x34] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc)),\n value = core.mem_read((offset + ix) & 0xffff);\n core.mem_write((offset + ix) & 0xffff, do_inc(value));\n};\n// 0x35 : DEC (IX+n)\ndd_instructions[0x35] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc)),\n value = core.mem_read((offset + ix) & 0xffff);\n core.mem_write((offset + ix) & 0xffff, do_dec(value));\n};\n// 0x36 : LD (IX+n), n\ndd_instructions[0x36] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n pc = (pc + 1) & 0xffff;\n core.mem_write((ix + offset) & 0xffff, core.mem_read(pc)); \n};\n// 0x39 : ADD IX, SP\ndd_instructions[0x39] = function()\n{\n do_ix_add(sp);\n};\n// 0x44 : LD B, IXH (Undocumented)\ndd_instructions[0x44] = function()\n{\n b = (ix >>> 8) & 0xff;\n};\n// 0x45 : LD B, IXL (Undocumented)\ndd_instructions[0x45] = function()\n{\n b = ix & 0xff;\n};\n// 0x46 : LD B, (IX+n)\ndd_instructions[0x46] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n b = core.mem_read((ix + offset) & 0xffff);\n};\n// 0x4c : LD C, IXH (Undocumented)\ndd_instructions[0x4c] = function()\n{\n c = (ix >>> 8) & 0xff;\n};\n// 0x4d : LD C, IXL (Undocumented)\ndd_instructions[0x4d] = function()\n{\n c = ix & 0xff;\n};\n// 0x4e : LD C, (IX+n)\ndd_instructions[0x4e] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n c = core.mem_read((ix + offset) & 0xffff);\n};\n// 0x54 : LD D, IXH (Undocumented)\ndd_instructions[0x54] = function()\n{\n d = (ix >>> 8) & 0xff;\n};\n// 0x55 : LD D, IXL (Undocumented)\ndd_instructions[0x55] = function()\n{\n d = ix & 0xff;\n};\n// 0x56 : LD D, (IX+n)\ndd_instructions[0x56] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n d = core.mem_read((ix + offset) & 0xffff);\n};\n// 0x5c : LD E, IXH (Undocumented)\ndd_instructions[0x5c] = function()\n{\n e = (ix >>> 8) & 0xff;\n};\n// 0x5d : LD E, IXL (Undocumented)\ndd_instructions[0x5d] = function()\n{\n e = ix & 0xff;\n};\n// 0x5e : LD E, (IX+n)\ndd_instructions[0x5e] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n e = core.mem_read((ix + offset) & 0xffff);\n};\n// 0x60 : LD IXH, B (Undocumented)\ndd_instructions[0x60] = function()\n{\n ix = (ix & 0xff) | (b << 8);\n};\n// 0x61 : LD IXH, C (Undocumented)\ndd_instructions[0x61] = function()\n{\n ix = (ix & 0xff) | (c << 8);\n};\n// 0x62 : LD IXH, D (Undocumented)\ndd_instructions[0x62] = function()\n{\n ix = (ix & 0xff) | (d << 8);\n};\n// 0x63 : LD IXH, E (Undocumented)\ndd_instructions[0x63] = function()\n{\n ix = (ix & 0xff) | (e << 8);\n};\n// 0x64 : LD IXH, IXH (Undocumented)\ndd_instructions[0x64] = function()\n{\n // No-op.\n};\n// 0x65 : LD IXH, IXL (Undocumented)\ndd_instructions[0x65] = function()\n{\n ix = (ix & 0xff) | ((ix & 0xff) << 8);\n};\n// 0x66 : LD H, (IX+n)\ndd_instructions[0x66] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n h = core.mem_read((ix + offset) & 0xffff);\n};\n// 0x67 : LD IXH, A (Undocumented)\ndd_instructions[0x67] = function()\n{\n ix = (ix & 0xff) | (a << 8);\n};\n// 0x68 : LD IXL, B (Undocumented)\ndd_instructions[0x68] = function()\n{\n ix = (ix & 0xff00) | b;\n};\n// 0x69 : LD IXL, C (Undocumented)\ndd_instructions[0x69] = function()\n{\n ix = (ix & 0xff00) | c;\n};\n// 0x6a : LD IXL, D (Undocumented)\ndd_instructions[0x6a] = function()\n{\n ix = (ix & 0xff00) | d;\n};\n// 0x6b : LD IXL, E (Undocumented)\ndd_instructions[0x6b] = function()\n{\n ix = (ix & 0xff00) | e;\n};\n// 0x6c : LD IXL, IXH (Undocumented)\ndd_instructions[0x6c] = function()\n{\n ix = (ix & 0xff00) | (ix >>> 8);\n};\n// 0x6d : LD IXL, IXL (Undocumented)\ndd_instructions[0x6d] = function()\n{\n // No-op.\n};\n// 0x6e : LD L, (IX+n)\ndd_instructions[0x6e] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n l = core.mem_read((ix + offset) & 0xffff);\n};\n// 0x6f : LD IXL, A (Undocumented)\ndd_instructions[0x6f] = function()\n{\n ix = (ix & 0xff00) | a;\n};\n// 0x70 : LD (IX+n), B\ndd_instructions[0x70] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n core.mem_write((ix + offset) & 0xffff, b);\n};\n// 0x71 : LD (IX+n), C\ndd_instructions[0x71] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n core.mem_write((ix + offset) & 0xffff, c);\n};\n// 0x72 : LD (IX+n), D\ndd_instructions[0x72] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n core.mem_write((ix + offset) & 0xffff, d);\n};\n// 0x73 : LD (IX+n), E\ndd_instructions[0x73] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n core.mem_write((ix + offset) & 0xffff, e);\n};\n// 0x74 : LD (IX+n), H\ndd_instructions[0x74] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n core.mem_write((ix + offset) & 0xffff, h);\n};\n// 0x75 : LD (IX+n), L\ndd_instructions[0x75] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n core.mem_write((ix + offset) & 0xffff, l);\n};\n// 0x77 : LD (IX+n), A\ndd_instructions[0x77] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n core.mem_write((ix + offset) & 0xffff, a);\n};\n// 0x7c : LD A, IXH (Undocumented)\ndd_instructions[0x7c] = function()\n{\n a = (ix >>> 8) & 0xff;\n};\n// 0x7d : LD A, IXL (Undocumented)\ndd_instructions[0x7d] = function()\n{\n a = ix & 0xff;\n};\n// 0x7e : LD A, (IX+n)\ndd_instructions[0x7e] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n a = core.mem_read((ix + offset) & 0xffff);\n};\n// 0x84 : ADD A, IXH (Undocumented)\ndd_instructions[0x84] = function()\n{\n do_add((ix >>> 8) & 0xff);\n};\n// 0x85 : ADD A, IXL (Undocumented)\ndd_instructions[0x85] = function()\n{\n do_add(ix & 0xff);\n};\n// 0x86 : ADD A, (IX+n)\ndd_instructions[0x86] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n do_add(core.mem_read((ix + offset) & 0xffff));\n};\n// 0x8c : ADC A, IXH (Undocumented)\ndd_instructions[0x8c] = function()\n{\n do_adc((ix >>> 8) & 0xff);\n};\n// 0x8d : ADC A, IXL (Undocumented)\ndd_instructions[0x8d] = function()\n{\n do_adc(ix & 0xff);\n};\n// 0x8e : ADC A, (IX+n)\ndd_instructions[0x8e] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n do_adc(core.mem_read((ix + offset) & 0xffff));\n};\n// 0x94 : SUB IXH (Undocumented)\ndd_instructions[0x94] = function()\n{\n do_sub((ix >>> 8) & 0xff);\n};\n// 0x95 : SUB IXL (Undocumented)\ndd_instructions[0x95] = function()\n{\n do_sub(ix & 0xff);\n};\n// 0x96 : SUB A, (IX+n)\ndd_instructions[0x96] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n do_sub(core.mem_read((ix + offset) & 0xffff));\n};\n// 0x9c : SBC IXH (Undocumented)\ndd_instructions[0x9c] = function()\n{\n do_sbc((ix >>> 8) & 0xff);\n};\n// 0x9d : SBC IXL (Undocumented)\ndd_instructions[0x9d] = function()\n{\n do_sbc(ix & 0xff);\n};\n// 0x9e : SBC A, (IX+n)\ndd_instructions[0x9e] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n do_sbc(core.mem_read((ix + offset) & 0xffff));\n};\n// 0xa4 : AND IXH (Undocumented)\ndd_instructions[0xa4] = function()\n{\n do_and((ix >>> 8) & 0xff);\n};\n// 0xa5 : AND IXL (Undocumented)\ndd_instructions[0xa5] = function()\n{\n do_and(ix & 0xff);\n};\n// 0xa6 : AND A, (IX+n)\ndd_instructions[0xa6] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n do_and(core.mem_read((ix + offset) & 0xffff));\n};\n// 0xac : XOR IXH (Undocumented)\ndd_instructions[0xac] = function()\n{\n do_xor((ix >>> 8) & 0xff);\n};\n// 0xad : XOR IXL (Undocumented)\ndd_instructions[0xad] = function()\n{\n do_xor(ix & 0xff);\n};\n// 0xae : XOR A, (IX+n)\ndd_instructions[0xae] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n do_xor(core.mem_read((ix + offset) & 0xffff));\n};\n// 0xb4 : OR IXH (Undocumented)\ndd_instructions[0xb4] = function()\n{\n do_or((ix >>> 8) & 0xff);\n};\n// 0xb5 : OR IXL (Undocumented)\ndd_instructions[0xb5] = function()\n{\n do_or(ix & 0xff);\n};\n// 0xb6 : OR A, (IX+n)\ndd_instructions[0xb6] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n do_or(core.mem_read((ix + offset) & 0xffff));\n};\n// 0xbc : CP IXH (Undocumented)\ndd_instructions[0xbc] = function()\n{\n do_cp((ix >>> 8) & 0xff);\n};\n// 0xbd : CP IXL (Undocumented)\ndd_instructions[0xbd] = function()\n{\n do_cp(ix & 0xff);\n};\n// 0xbe : CP A, (IX+n)\ndd_instructions[0xbe] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n do_cp(core.mem_read((ix + offset) & 0xffff));\n};\n// 0xcb : CB Prefix (IX bit instructions)\ndd_instructions[0xcb] = function()\n{\n pc = (pc + 1) & 0xffff;\n var offset = get_signed_offset_byte(core.mem_read(pc));\n pc = (pc + 1) & 0xffff;\n var opcode = core.mem_read(pc), value;\n \n // As with the \"normal\" CB prefix, we implement the DDCB prefix\n // by decoding the opcode directly, rather than using a table.\n if (opcode < 0x40)\n {\n // Shift and rotate instructions.\n var ddcb_functions = [do_rlc, do_rrc, do_rl, do_rr,\n do_sla, do_sra, do_sll, do_srl];\n \n // Most of the opcodes in this range are not valid,\n // so we map this opcode onto one of the ones that is.\n var func = ddcb_functions[(opcode & 0x38) >>> 3],\n value = func( core.mem_read((ix + offset) & 0xffff));\n \n core.mem_write((ix + offset) & 0xffff, value);\n }\n else\n {\n var bit_number = (opcode & 0x38) >>> 3;\n \n if (opcode < 0x80)\n {\n // BIT\n flags.N = 0;\n flags.H = 1;\n flags.Z = !(core.mem_read((ix + offset) & 0xffff) & (1 << bit_number)) ? 1 : 0;\n flags.P = flags.Z;\n flags.S = ((bit_number === 7) && !flags.Z) ? 1 : 0;\n }\n else if (opcode < 0xc0)\n {\n // RES\n value = core.mem_read((ix + offset) & 0xffff) & ~(1 << bit_number) & 0xff;\n core.mem_write((ix + offset) & 0xffff, value);\n }\n else\n {\n // SET\n value = core.mem_read((ix + offset) & 0xffff) | (1 << bit_number);\n core.mem_write((ix + offset) & 0xffff, value);\n }\n }\n \n // This implements the undocumented shift, RES, and SET opcodes,\n // which write their result to memory and also to an 8080 register.\n if (value !== undefined)\n {\n if ((opcode & 0x07) === 0)\n b = value;\n else if ((opcode & 0x07) === 1)\n c = value;\n else if ((opcode & 0x07) === 2)\n d = value;\n else if ((opcode & 0x07) === 3)\n e = value;\n else if ((opcode & 0x07) === 4)\n h = value;\n else if ((opcode & 0x07) === 5)\n l = value;\n // 6 is the documented opcode, which doesn't set a register.\n else if ((opcode & 0x07) === 7)\n a = value;\n }\n \n cycle_counter += cycle_counts_cb[opcode] + 8;\n};\n// 0xe1 : POP IX\ndd_instructions[0xe1] = function()\n{\n ix = pop_word();\n};\n// 0xe3 : EX (SP), IX\ndd_instructions[0xe3] = function()\n{\n var temp = ix;\n ix = core.mem_read(sp);\n ix |= core.mem_read((sp + 1) & 0xffff) << 8;\n core.mem_write(sp, temp & 0xff);\n core.mem_write((sp + 1) & 0xffff, (temp >>> 8) & 0xff);\n};\n// 0xe5 : PUSH IX\ndd_instructions[0xe5] = function()\n{\n push_word(ix);\n};\n// 0xe9 : JP (IX)\ndd_instructions[0xe9] = function()\n{\n pc = (ix - 1) & 0xffff;\n};\n// 0xf9 : LD SP, IX\ndd_instructions[0xf9] = function()\n{\n sp = ix;\n};\n\n\n///////////////////////////////////////////////////////////////////////////////\n/// These tables contain the number of T cycles used for each instruction.\n/// In a few special cases, such as conditional control flow instructions,\n/// additional cycles might be added to these values.\n/// The total number of cycles is the return value of run_instruction().\n///////////////////////////////////////////////////////////////////////////////\nlet cycle_counts = [\n 4, 10, 7, 6, 4, 4, 7, 4, 4, 11, 7, 6, 4, 4, 7, 4,\n 8, 10, 7, 6, 4, 4, 7, 4, 12, 11, 7, 6, 4, 4, 7, 4,\n 7, 10, 16, 6, 4, 4, 7, 4, 7, 11, 16, 6, 4, 4, 7, 4,\n 7, 10, 13, 6, 11, 11, 10, 4, 7, 11, 13, 6, 4, 4, 7, 4,\n 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,\n 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,\n 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,\n 7, 7, 7, 7, 7, 7, 4, 7, 4, 4, 4, 4, 4, 4, 7, 4,\n 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,\n 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,\n 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,\n 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,\n 5, 10, 10, 10, 10, 11, 7, 11, 5, 10, 10, 0, 10, 17, 7, 11,\n 5, 10, 10, 11, 10, 11, 7, 11, 5, 4, 10, 11, 10, 0, 7, 11,\n 5, 10, 10, 19, 10, 11, 7, 11, 5, 4, 10, 4, 10, 0, 7, 11,\n 5, 10, 10, 4, 10, 11, 7, 11, 5, 6, 10, 4, 10, 0, 7, 11\n];\n\nlet cycle_counts_ed = [\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 12, 12, 15, 20, 8, 14, 8, 9, 12, 12, 15, 20, 8, 14, 8, 9,\n 12, 12, 15, 20, 8, 14, 8, 9, 12, 12, 15, 20, 8, 14, 8, 9,\n 12, 12, 15, 20, 8, 14, 8, 18, 12, 12, 15, 20, 8, 14, 8, 18,\n 12, 12, 15, 20, 8, 14, 8, 0, 12, 12, 15, 20, 8, 14, 8, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 16, 16, 16, 16, 0, 0, 0, 0, 16, 16, 16, 16, 0, 0, 0, 0,\n 16, 16, 16, 16, 0, 0, 0, 0, 16, 16, 16, 16, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0\n];\n\nlet cycle_counts_cb = [\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8,\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8,\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8,\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8,\n 8, 8, 8, 8, 8, 8, 12, 8, 8, 8, 8, 8, 8, 8, 12, 8,\n 8, 8, 8, 8, 8, 8, 12, 8, 8, 8, 8, 8, 8, 8, 12, 8,\n 8, 8, 8, 8, 8, 8, 12, 8, 8, 8, 8, 8, 8, 8, 12, 8,\n 8, 8, 8, 8, 8, 8, 12, 8, 8, 8, 8, 8, 8, 8, 12, 8,\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8,\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8,\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8,\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8,\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8,\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8,\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8,\n 8, 8, 8, 8, 8, 8, 15, 8, 8, 8, 8, 8, 8, 8, 15, 8\n];\n\nlet cycle_counts_dd = [\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 15, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 15, 0, 0, 0, 0, 0, 0,\n 0, 14, 20, 10, 8, 8, 11, 0, 0, 15, 20, 10, 8, 8, 11, 0,\n 0, 0, 0, 0, 23, 23, 19, 0, 0, 15, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 8, 8, 19, 0, 0, 0, 0, 0, 8, 8, 19, 0,\n 0, 0, 0, 0, 8, 8, 19, 0, 0, 0, 0, 0, 8, 8, 19, 0,\n 8, 8, 8, 8, 8, 8, 19, 8, 8, 8, 8, 8, 8, 8, 19, 8,\n 19, 19, 19, 19, 19, 19, 0, 19, 0, 0, 0, 0, 8, 8, 19, 0,\n 0, 0, 0, 0, 8, 8, 19, 0, 0, 0, 0, 0, 8, 8, 19, 0,\n 0, 0, 0, 0, 8, 8, 19, 0, 0, 0, 0, 0, 8, 8, 19, 0,\n 0, 0, 0, 0, 8, 8, 19, 0, 0, 0, 0, 0, 8, 8, 19, 0,\n 0, 0, 0, 0, 8, 8, 19, 0, 0, 0, 0, 0, 8, 8, 19, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 0, 14, 0, 23, 0, 15, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, 0, 0, 0, 0\n];\n\n // There's tons of stuff in this object,\n // but only these three functions are the public API.\n this.saveState = getState;\n this.loadState = setState;\n this.reset = reset;\n this.advanceInsn = run_instruction;\n this.interrupt = interrupt;\n this.getPC = ():number => { return pc; }\n this.getSP = ():number => { return sp; }\n this.getHalted = ():boolean => { return halted; }\n}\n\nexport interface Z80State {\nAF : number;\nBC : number;\nDE : number;\nHL : number;\nAF_ : number;\nBC_ : number;\nDE_ : number;\nHL_ : number;\nIX : number;\nIY : number;\nSP : number;\nPC : number;\nIR : number;\niff1 : number;\niff2 : number;\nim : number;\nhalted : boolean;\ndo_delayed_di : boolean;\ndo_delayed_ei : boolean;\ncycle_counter : number;\n}\n\nexport class Z80 implements CPU, InstructionBased, IOBusConnected, SavesState, Interruptable {\n\n cpu;\n interruptType;\n memBus : Bus;\n ioBus : Bus;\n retryInterrupts : boolean = false;\n retryData : number = -1;\n \n private buildCPU() {\n if (this.memBus && this.ioBus) {\n this.cpu = new FastZ80({\n mem_read: this.memBus.read.bind(this.memBus),\n mem_write: this.memBus.write.bind(this.memBus),\n io_read: this.ioBus.read.bind(this.ioBus),\n io_write: this.ioBus.write.bind(this.ioBus),\n });\n }\n }\n connectMemoryBus(bus:Bus) {\n this.memBus = bus;\n this.buildCPU();\n }\n connectIOBus(bus:Bus) {\n this.ioBus = bus;\n this.buildCPU();\n }\n advanceInsn() {\n if (this.retryInterrupts && this.retryData >= 0 && this.cpu.interrupt(false, this.retryData)) {\n this.retryData = -1;\n }\n return this.cpu.advanceInsn();\n }\n reset() {\n this.cpu.reset();\n }\n interrupt(data:number) {\n if (!this.cpu.interrupt(false, data) && this.retryInterrupts) {\n this.retryData = data;\n }\n }\n NMI() {\n this.cpu.interrupt(true, 0);\n }\n getSP() {\n return this.cpu.getSP();\n }\n getPC() {\n return this.cpu.getPC();\n }\n isHalted() {\n return this.cpu.getHalted();\n }\n saveState() {\n return this.cpu.saveState();\n }\n loadState(s) {\n this.cpu.loadState(s);\n }\n isStable() { return true; }\n // TODO: metadata\n // TODO: disassembler\n}\n", "\nimport { SampledAudioSink } from \"./devices\";\n\n// from TSS\ndeclare var MasterChannel, AudioLooper, PsgDeviceChannel;\n\nexport class MasterAudio {\n master = new MasterChannel();\n looper;\n start() {\n if (!this.looper) {\n this.looper = new AudioLooper(512);\n this.looper.setChannel(this.master);\n this.looper.activate();\n }\n }\n stop() {\n if (this.looper) {\n this.looper.setChannel(null);\n this.looper = null;\n }\n }\n}\n\nexport class AY38910_Audio {\n master : MasterAudio;\n psg = new PsgDeviceChannel();\n curreg = 0;\n\n constructor(master : MasterAudio) {\n this.master = master;\n this.psg.setMode(PsgDeviceChannel.MODE_SIGNED);\n this.psg.setDevice(PsgDeviceChannel.DEVICE_AY_3_8910);\n master.master.addChannel(this.psg);\n }\n\n reset() {\n for (var i=15; i>=0; i--) {\n this.selectRegister(i);\n this.setData(0);\n }\n }\n selectRegister(val : number) {\n this.curreg = val & 0xf;\n }\n setData(val : number) {\n this.psg.writeRegisterAY(this.curreg, val & 0xff);\n }\n readData() {\n return this.psg.readRegister(this.curreg);\n }\n currentRegister() { return this.curreg; }\n}\n\nexport class SN76489_Audio {\n master : MasterAudio;\n psg = new PsgDeviceChannel();\n\n constructor(master : MasterAudio) {\n this.master = master;\n this.psg.setMode(PsgDeviceChannel.MODE_SIGNED);\n this.psg.setDevice(PsgDeviceChannel.DEVICE_SN76489);\n master.master.addChannel(this.psg);\n }\n reset() {\n // TODO\n }\n setData(val : number) {\n this.psg.writeRegisterSN(0, val & 0xff);\n }\n}\n\n// https://en.wikipedia.org/wiki/POKEY\n// https://user.xmission.com/~trevin/atari/pokey_regs.html\n// http://krap.pl/mirrorz/atari/homepage.ntlworld.com/kryten_droid/Atari/800XL/atari_hw/pokey.htm\n\nexport function newPOKEYAudio(count:number) {\n var audio = new MasterAudio();\n for (var i=1; i<=count; i++) {\n var pokey = new POKEYDeviceChannel();\n audio['pokey'+i] = pokey; // TODO: cheezy\n audio.master.addChannel(pokey);\n }\n return audio;\n}\n\nfunction combinePolys(a, b) {\n var arr = new Uint8Array(a.length * b.length);\n var n = 0;\n for (var i=0; i 0.5 ? 1 : 0;\n }\n var bit17_5 = combinePolys(bit17, bit5);\n var bit5_4 = combinePolys(bit5, bit4);\n var wavetones = [\n bit17_5, bit5, bit5_4, bit5,\n bit17, bit2, bit4, bit2\n ];\n // TIA\n var div2 = divideBy(2);\n var div6 = divideBy(6);\n var div31 = divideBy(31);\n var div93 = divideBy(93);\n var bit15_4 = combinePolys(bit15, bit4);\n var bit5_2 = combinePolys(bit5, div2);\n var bit5_6 = combinePolys(bit5, div6);\n var tiawavetones = [\n bit1, bit4, bit15_4, bit5_4,\n div2, div2, div31, bit5_2,\n bit9, bit5, div31, bit1,\n div6, div6, div93, bit5_6\n ];\n \n // registers\n var regs = new Uint8Array(16);\n var counters = new Float32Array(4);\n var deltas = new Float32Array(4);\n var volume = new Float32Array(4);\n var audc = new Uint8Array(4);\n var waveforms = [bit1, bit1, bit1, bit1];\n var buffer;\n var sampleRate;\n var clock, baseDelta;\n var dirty = true;\n\n //\n\n this.setBufferLength = function (length) {\n buffer = new Int32Array(length);\n };\n\n this.getBuffer = function () {\n return buffer;\n };\n\n this.setSampleRate = function (rate) {\n sampleRate = rate;\n baseDelta = FREQ_17_EXACT / rate;\n };\n\n function updateValues(addr) {\n var ctrl = regs[8];\n var base = (ctrl & CLOCK_15) ? DIV_15 : DIV_64;\n var div;\n var i = addr & 4;\n var j = i>>1;\n var k = i>>2;\n if (ctrl & (CH1_CH2>>k)) {\n if (ctrl & (CH1_179>>k))\n div = regs[i+2] * 256 + regs[i+0] + 7;\n else\n div = (regs[i+2] * 256 + regs[i+0] + 1) * base;\n deltas[j+1] = baseDelta / div;\n deltas[j+0] = 0;\n } else {\n if (ctrl & (CH1_179>>k)) {\n div = regs[i+0] + 4;\n } else {\n div = (regs[i+0] + 1) * base;\n }\n deltas[j+0] = baseDelta / div;\n div = (regs[i+2] + 1) * base;\n deltas[j+1] = baseDelta / div;\n }\n //console.log(addr, ctrl.toString(16), div, deltas[j+0], deltas[j+1]);\n }\n\n this.setRegister = function(addr, value) {\n addr &= 0xf;\n value &= 0xff;\n if (regs[addr] != value) {\n regs[addr] = value;\n switch (addr) {\n case 0:\n case 2:\n case 4:\n case 6: // AUDF\n case 8: // ctrl\n dirty = true;\n break;\n case 1:\n case 3:\n case 5:\n case 7: // AUDC\n volume[addr>>1] = value & 0xf;\n waveforms[addr>>1] = wavetones[value>>5];\n break;\n }\n }\n }\n\n this.getRegister = function(addr) {\n addr &= 0xf;\n return regs[addr];\n }\n \n this.setTIARegister = function(addr, value) {\n switch (addr) {\n case 0x17:\n case 0x18:\n regs[(addr&1)*4] = value & 0x1f;\n dirty = true;\n break;\n case 0x15:\n case 0x16:\n waveforms[(addr&1)*2] = tiawavetones[value & 0xf];\n break;\n case 0x19:\n case 0x1a:\n volume[(addr&1)*2] = value & 0xf;\n break;\n }\n }\n\n this.generate = function (length) {\n if (dirty) {\n updateValues(0);\n updateValues(4);\n dirty = false;\n }\n for (var s=0; s 0 && d < 1 && v > 0) {\n var wav = waveforms[i];\n var cnt = counters[i] += d;\n if (cnt > wav.length) {\n cnt = counters[i] = cnt - Math.floor(cnt / wav.length) * wav.length;\n }\n var on = wav[Math.floor(cnt)];\n if (on) {\n sample += v;\n }\n }\n }\n sample *= 64;\n buffer[s] = sample;\n buffer[s+1] = sample;\n }\n }\n}\n\n////// Worker sound\n\nexport var WorkerSoundChannel = function(worker) {\n var sampleRate;\n var output;\n var pending = [];\n var pendingLength = 0;\n\n worker.onmessage = function(e) {\n if (e && e.data && e.data.samples && output) {\n pending.push(e.data.samples);\n pendingLength += e.data.samples.length;\n }\n };\n\n this.setBufferLength = function (length) {\n output = new Int16Array(length);\n //worker.postMessage({bufferLength:length,numChannels:2});\n pendingLength = 0;\n };\n\n this.getBuffer = function () {\n return output;\n };\n\n this.setSampleRate = function (rate) {\n sampleRate = rate;\n worker.postMessage({sampleRate:rate});\n };\n\n this.generate = function (length) {\n if (pendingLength < length*3) {\n //console.log(length, pendingLength);\n output.fill(0);\n return; // TODO: send sync msg?\n }\n for (var i=0; i= buffer.length) {\n bufpos = 0;\n bufferlist[ifill] = buffer;\n var inext = (ifill + 1) % bufferlist.length;\n if (inext == idrain) {\n ifill = Math.floor(idrain + nbuffers/2) % bufferlist.length;\n //console.log('SampleAudio: skipped buffer', idrain, ifill); // TODO\n } else {\n ifill = inext;\n }\n buffer = bufferlist[ifill];\n }\n }\n\n this.feedSample = function(value, count) {\n accum += value * count;\n sfrac += sinc * count;\n if (sfrac >= 1) {\n accum /= sfrac;\n while (sfrac >= 1) {\n this.addSingleSample(accum * sinc);\n sfrac -= 1;\n }\n accum *= sfrac;\n }\n }\n \n}\n\n\nexport class SampledAudio {\n sa;\n constructor(sampleRate : number) {\n this.sa = new SampleAudio(sampleRate);\n }\n feedSample(value:number, count:number) {\n this.sa.feedSample(value, count);\n }\n start() {\n this.sa.start();\n }\n stop() {\n this.sa.stop();\n }\n}\n\ninterface TssChannel {\n setBufferLength(len : number) : void;\n setSampleRate(rate : number) : void;\n getBuffer() : number[];\n generate(numSamples : number) : void;\n}\n\nexport class TssChannelAdapter {\n channels : TssChannel[];\n audioGain = 1.0 / 8192;\n bufferLength : number;\n\n constructor(chans, oversample:number, sampleRate:number) {\n this.bufferLength = oversample * 2;\n this.channels = chans.generate ? [chans] : chans; // array or single channel\n this.channels.forEach((c) => {\n c.setBufferLength(this.bufferLength);\n c.setSampleRate(sampleRate);\n });\n }\n\n generate(sink:SampledAudioSink) {\n var l = this.bufferLength;\n var bufs = this.channels.map((ch) => ch.getBuffer());\n this.channels.forEach((ch) => {\n ch.generate(l);\n });\n for (let i=0; i total += buf[i]);\n sink.feedSample(total * this.audioGain, 1);\n };\n }\n}\n\n", "\nimport { Probeable, ProbeAll } from \"./devices\";\n\nexport enum ProbeFlags {\n CLOCKS\t = 0x00000000,\n EXECUTE\t = 0x01000000,\n INTERRUPT\t= 0x08000000,\n ILLEGAL\t = 0x09000000,\n SP_PUSH\t = 0x0a000000,\n SP_POP\t = 0x0b000000,\n HAS_VALUE = 0x10000000,\n MEM_READ\t= 0x12000000,\n MEM_WRITE\t= 0x13000000,\n IO_READ\t = 0x14000000,\n IO_WRITE\t= 0x15000000,\n VRAM_READ\t= 0x16000000,\n VRAM_WRITE= 0x17000000,\n DMA_READ = 0x18000000,\n DMA_WRITE = 0x19000000,\n WAIT = 0x1f000000,\n SCANLINE\t= 0x7e000000,\n FRAME\t\t = 0x7f000000,\n}\n\nclass ProbeFrame {\n data : Uint32Array;\n len : number;\n}\n\nexport class ProbeRecorder implements ProbeAll {\n\n m : Probeable; // machine to probe\n buf : Uint32Array; // buffer\n idx : number = 0; // index into buffer\n sl : number = 0; // scanline\n cur_sp = -1; // last stack pointer\n singleFrame : boolean = true; // clear between frames\n\n constructor(m:Probeable, buflen?:number) {\n this.m = m;\n this.reset(buflen || 0x100000);\n }\n start() {\n this.m.connectProbe(this);\n }\n stop() {\n this.m.connectProbe(null);\n }\n reset(newbuflen? : number) {\n if (newbuflen) this.buf = new Uint32Array(newbuflen);\n this.sl = 0;\n this.cur_sp = -1;\n this.clear();\n }\n clear() {\n this.idx = 0;\n }\n logData(a:number) {\n this.log(a);\n }\n log(a:number) {\n // TODO: coalesce READ and EXECUTE and PUSH/POP\n if (this.idx >= this.buf.length) return;\n this.buf[this.idx++] = a;\n }\n relog(a:number) {\n this.buf[this.idx-1] = a;\n }\n lastOp() {\n if (this.idx > 0)\n return this.buf[this.idx-1] & 0xff000000;\n else\n return -1;\n }\n lastAddr() {\n if (this.idx > 0)\n return this.buf[this.idx-1] & 0xffffff;\n else\n return -1;\n }\n addLogBuffer(src: Uint32Array) {\n if (this.idx + src.length > this.buf.length) {\n src = src.slice(0, this.buf.length - this.idx);\n }\n this.buf.set(src, this.idx);\n this.idx += src.length;\n}\n logClocks(clocks:number) {\n clocks |= 0;\n if (clocks > 0) {\n if (this.lastOp() == ProbeFlags.CLOCKS)\n this.relog((this.lastAddr() + clocks) | ProbeFlags.CLOCKS); // coalesce clocks\n else\n this.log(clocks | ProbeFlags.CLOCKS);\n }\n }\n logNewScanline() {\n this.log(ProbeFlags.SCANLINE);\n this.sl++;\n }\n logNewFrame() {\n this.log(ProbeFlags.FRAME);\n this.sl = 0;\n if (this.singleFrame) this.clear();\n }\n logExecute(address:number, SP:number) {\n // record stack pushes/pops (from last instruction)\n if (this.cur_sp !== SP) {\n if (SP < this.cur_sp) {\n this.log(ProbeFlags.SP_PUSH | SP);\n }\n if (SP > this.cur_sp) {\n this.log(ProbeFlags.SP_POP | SP);\n }\n this.cur_sp = SP;\n }\n this.log(address | ProbeFlags.EXECUTE);\n }\n logInterrupt(type:number) {\n this.log(type | ProbeFlags.INTERRUPT);\n }\n logValue(address:number, value:number, op:number) {\n this.log((address & 0xffff) | ((value & 0xff)<<16) | op);\n }\n logRead(address:number, value:number) {\n this.logValue(address, value, ProbeFlags.MEM_READ);\n }\n logWrite(address:number, value:number) {\n this.logValue(address, value, ProbeFlags.MEM_WRITE);\n }\n logIORead(address:number, value:number) {\n this.logValue(address, value, ProbeFlags.IO_READ);\n }\n logIOWrite(address:number, value:number) {\n this.logValue(address, value, ProbeFlags.IO_WRITE);\n }\n logVRAMRead(address:number, value:number) {\n this.logValue(address, value, ProbeFlags.VRAM_READ);\n }\n logVRAMWrite(address:number, value:number) {\n this.logValue(address, value, ProbeFlags.VRAM_WRITE);\n }\n logIllegal(address:number) {\n this.log(address | ProbeFlags.ILLEGAL);\n }\n logWait(address:number) {\n this.log(address | ProbeFlags.WAIT);\n }\n logDMARead(address:number, value:number) {\n this.logValue(address, value, ProbeFlags.DMA_READ);\n }\n logDMAWrite(address:number, value:number) {\n this.logValue(address, value, ProbeFlags.DMA_WRITE);\n }\n countEvents(op : number) : number {\n var count = 0;\n for (var i=0; i {\n saveState(): S;\n loadState(state: S): void;\n}\n\nexport interface Bus {\n read(a: number): number;\n write(a: number, v: number): void;\n readConst?(a: number): number;\n}\n\nexport interface ClockBased {\n advanceClock(): void;\n}\n\nexport interface InstructionBased {\n advanceInsn(): number;\n}\n\nexport type TrapCondition = () => boolean;\n\nexport interface FrameBased {\n advanceFrame(trap: TrapCondition): number;\n}\n\nexport interface VideoSource {\n getVideoParams(): VideoParams;\n connectVideo(pixels: Uint32Array): void;\n}\n\nexport interface RasterFrameBased extends FrameBased, VideoSource {\n getRasterY(): number;\n getRasterX(): number;\n getRasterCanvasPosition?(): { x: number, y: number };\n}\n\nexport interface VideoParams {\n width: number;\n height: number;\n overscan?: boolean;\n rotate?: number;\n videoFrequency?: number; // default = 60\n aspect?: number;\n}\n\n// TODO: frame buffer optimization (apple2, etc)\n\nexport interface SampledAudioParams {\n sampleRate: number;\n stereo: boolean;\n}\n\nexport interface SampledAudioSink {\n feedSample(value: number, count: number): void;\n //sendAudioFrame(samples:Uint16Array) : void;\n}\n\nexport interface SampledAudioSource {\n getAudioParams(): SampledAudioParams;\n connectAudio(audio: SampledAudioSink): void;\n}\n\nexport interface AcceptsROM {\n loadROM(data: Uint8Array, title?: string): void;\n}\n\nexport interface AcceptsBIOS {\n loadBIOS(data: Uint8Array, title?: string): void;\n}\n\nexport interface Resettable {\n reset(): void;\n}\n\nexport interface MemoryBusConnected {\n connectMemoryBus(bus: Bus): void;\n}\n\nexport interface IOBusConnected {\n connectIOBus(bus: Bus): void;\n}\n\nexport interface CPU extends MemoryBusConnected, Resettable, SavesState {\n getPC(): number;\n getSP(): number;\n isStable(): boolean;\n}\n\nexport interface HasCPU extends Resettable {\n cpu: CPU;\n}\n\nexport interface Interruptable {\n interrupt(type: IT): void;\n}\n\nexport interface SavesInputState {\n loadControlsState(cs: CS): void;\n saveControlsState(): CS;\n}\n\nexport interface AcceptsKeyInput {\n setKeyInput(key: number, code: number, flags: number): void;\n}\n\nexport interface AcceptsPaddleInput {\n setPaddleInput(controller: number, value: number): void;\n}\n\n// TODO: interface not yet used (setKeyInput() handles joystick)\nexport interface AcceptsJoyInput {\n setJoyInput(joy: number, bitmask: number): void;\n}\n\n// SERIAL I/O\n\nexport interface SerialEvent {\n op: 'read' | 'write';\n value: number;\n nbits: number;\n}\n\n// TODO: all these needed?\nexport interface SerialIOInterface {\n // from machine to platform\n clearToSend(): boolean;\n sendByte(b: number);\n // from platform to machine\n byteAvailable(): boolean;\n recvByte(): number;\n // implement these too\n reset(): void;\n advance(clocks: number): void;\n // refresh() : void;\n}\n\nexport interface HasSerialIO {\n connectSerialIO(serial: SerialIOInterface);\n serialOut?: SerialEvent[]; // outgoing event log\n serialIn?: SerialEvent[]; // incoming queue\n}\n\n/// PROFILER\n\nexport interface Probeable {\n connectProbe(probe: ProbeAll): void;\n}\n\nexport interface ProbeTime {\n logClocks(clocks: number);\n logNewScanline();\n logNewFrame();\n}\n\nexport interface ProbeCPU {\n logExecute(address: number, SP: number);\n logInterrupt(type: number);\n logIllegal(address: number);\n logWait(address: number);\n}\n\nexport interface ProbeBus {\n logRead(address: number, value: number);\n logWrite(address: number, value: number);\n logDMARead(address: number, value: number);\n logDMAWrite(address: number, value: number);\n}\n\nexport interface ProbeIO {\n logIORead(address: number, value: number);\n logIOWrite(address: number, value: number);\n}\n\nexport interface ProbeVRAM {\n logVRAMRead(address: number, value: number);\n logVRAMWrite(address: number, value: number);\n}\n\nexport interface ProbeAll extends ProbeTime, ProbeCPU, ProbeBus, ProbeIO, ProbeVRAM {\n logData(data: number); // entire 32 bits\n addLogBuffer(src: Uint32Array);\n}\n\nexport class NullProbe implements ProbeAll {\n logClocks() { }\n logNewScanline() { }\n logNewFrame() { }\n logExecute() { }\n logInterrupt() { }\n logRead() { }\n logWrite() { }\n logIORead() { }\n logIOWrite() { }\n logVRAMRead() { }\n logVRAMWrite() { }\n logIllegal() { }\n logWait() { }\n logDMARead() { }\n logDMAWrite() { }\n logData() { }\n addLogBuffer(src: Uint32Array) { }\n}\n\n/// CONVENIENCE\n\nexport interface BasicMachineControlsState {\n inputs: Uint8Array;\n}\n\nexport interface BasicMachineState extends BasicMachineControlsState {\n c: any; // TODO\n ram: Uint8Array;\n}\n\nexport abstract class BasicHeadlessMachine implements HasCPU, Bus, AcceptsROM, Probeable,\n SavesState, SavesInputState {\n\n abstract cpuFrequency: number;\n abstract defaultROMSize: number;\n\n abstract cpu: CPU;\n abstract ram: Uint8Array;\n\n rom: Uint8Array;\n inputs: Uint8Array = new Uint8Array(32);\n handler: (key, code, flags) => void; // keyboard handler\n\n nullProbe = new NullProbe();\n probe: ProbeAll = this.nullProbe;\n\n abstract read(a: number): number;\n abstract write(a: number, v: number): void;\n\n setKeyInput(key: number, code: number, flags: number): void {\n this.handler && this.handler(key, code, flags);\n }\n connectProbe(probe: ProbeAll): void {\n this.probe = probe || this.nullProbe;\n }\n reset() {\n this.cpu.reset();\n }\n loadROM(data: Uint8Array, title?: string): void {\n if (!this.rom) this.rom = new Uint8Array(this.defaultROMSize);\n if (data.length > this.rom.length)\n throw new Error(`ROM too big: ${data.length} > ${this.rom.length}}`);\n this.rom.set(data);\n }\n loadState(state) {\n this.cpu.loadState(state.c);\n this.ram.set(state.ram);\n this.inputs.set(state.inputs);\n }\n saveState() {\n return {\n c: this.cpu.saveState(),\n ram: this.ram.slice(0),\n inputs: this.inputs.slice(0),\n };\n }\n loadControlsState(state) {\n this.inputs.set(state.inputs);\n }\n saveControlsState() {\n return {\n inputs: this.inputs.slice(0)\n };\n }\n advanceCPU() {\n var c = this.cpu as any;\n var n = 1;\n if (this.cpu.isStable()) { this.probe.logExecute(this.cpu.getPC(), this.cpu.getSP()); }\n if (c.advanceClock) { c.advanceClock(); }\n else if (c.advanceInsn) { n = c.advanceInsn(1); }\n this.probe.logClocks(n);\n return n;\n }\n probeMemoryBus(membus: Bus): Bus {\n return {\n read: (a) => {\n let val = membus.read(a);\n this.probe.logRead(a, val);\n return val;\n },\n write: (a, v) => {\n this.probe.logWrite(a, v);\n membus.write(a, v);\n }\n };\n }\n connectCPUMemoryBus(membus: Bus): void {\n this.cpu.connectMemoryBus(this.probeMemoryBus(membus));\n }\n probeIOBus(iobus: Bus): Bus {\n return {\n read: (a) => {\n let val = iobus.read(a);\n this.probe.logIORead(a, val);\n return val;\n },\n write: (a, v) => {\n this.probe.logIOWrite(a, v);\n iobus.write(a, v);\n }\n };\n }\n probeDMABus(iobus: Bus): Bus {\n return {\n read: (a) => {\n let val = iobus.read(a);\n this.probe.logDMARead(a, val);\n return val;\n },\n write: (a, v) => {\n this.probe.logDMAWrite(a, v);\n iobus.write(a, v);\n }\n };\n }\n connectCPUIOBus(iobus: Bus): void {\n this.cpu['connectIOBus'](this.probeIOBus(iobus));\n }\n}\n\nexport abstract class BasicMachine extends BasicHeadlessMachine implements SampledAudioSource {\n\n abstract canvasWidth: number;\n abstract numVisibleScanlines: number;\n abstract sampleRate: number;\n overscan: boolean = false;\n rotate: number = 0;\n aspectRatio: number;\n\n pixels: Uint32Array;\n audio: SampledAudioSink;\n\n scanline: number;\n\n getAudioParams(): SampledAudioParams {\n return { sampleRate: this.sampleRate, stereo: false };\n }\n connectAudio(audio: SampledAudioSink): void {\n this.audio = audio;\n }\n getVideoParams(): VideoParams {\n return {\n width: this.canvasWidth,\n height: this.numVisibleScanlines,\n aspect: this.aspectRatio,\n overscan: this.overscan,\n rotate: this.rotate\n };\n }\n connectVideo(pixels: Uint32Array): void {\n this.pixels = pixels;\n }\n}\n\nexport abstract class BasicScanlineMachine extends BasicMachine implements RasterFrameBased {\n\n abstract numTotalScanlines: number;\n abstract cpuCyclesPerLine: number;\n\n abstract startScanline(): void;\n abstract drawScanline(): void;\n\n frameCycles: number;\n\n advanceFrame(trap: TrapCondition): number {\n this.preFrame();\n var endLineClock = 0;\n var steps = 0;\n this.probe.logNewFrame();\n this.frameCycles = 0;\n for (var sl = 0; sl < this.numTotalScanlines; sl++) {\n endLineClock += this.cpuCyclesPerLine; // could be fractional\n this.scanline = sl;\n this.startScanline();\n while (this.frameCycles < endLineClock) {\n if (trap && trap()) {\n sl = 999;\n break;\n }\n this.frameCycles += this.advanceCPU();\n steps++;\n }\n this.drawScanline();\n this.probe.logNewScanline();\n this.probe.logClocks(Math.floor(this.frameCycles - endLineClock)); // remainder of prev. line\n }\n this.postFrame();\n return steps; // TODO: return steps, not clock? for recorder\n }\n preFrame() { }\n postFrame() { }\n getRasterY() { return this.scanline; }\n getRasterX() { return this.frameCycles % this.cpuCyclesPerLine; }\n}\n", "\nimport { hex } from \"../util\";\n\nconst Z80_OPS = [\"nop\",\"ld bc,xx\",\"ld (bc),a\",\"inc bc\",\"inc b\",\"dec b\",\"ld b,x\",\"rlca\",\"ex af,af'\",\"add hl,bc\",\"ld a,(bc)\",\"dec bc\",\"inc c\",\"dec c\",\"ld c,x\",\"rrca\",\"djnz x\",\"ld de,xx\",\"ld (de),a\",\"inc de\",\"inc d\",\"dec d\",\"ld d,x\",\"rla\",\"jr x\",\"add hl,de\",\"ld a,(de)\",\"dec de\",\"inc e\",\"dec e\",\"ld e,x\",\"rra\",\"jr nz,x\",\"ld hl,xx\",\"ld (xx),hl\",\"inc hl\",\"inc h\",\"dec h\",\"ld h,x\",\"daa\",\"jr z,x\",\"add hl,hl\",\"ld hl,(xx)\",\"dec hl\",\"inc l\",\"dec l\",\"ld l,x\",\"cpl\",\"jr nc,x\",\"ld sp,xx\",\"ld (xx),a\",\"inc sp\",\"inc (hl)\",\"dec (hl)\",\"ld (hl),x\",\"scf\",\"jr c,x\",\"add hl,sp\",\"ld a,(xx)\",\"dec sp\",\"inc a\",\"dec a\",\"ld a,x\",\"ccf\",\"ld b,b\",\"ld b,c\",\"ld b,d\",\"ld b,e\",\"ld b,h\",\"ld b,l\",\"ld b,(hl)\",\"ld b,a\",\"ld c,b\",\"ld c,c\",\"ld c,d\",\"ld c,e\",\"ld c,h\",\"ld c,l\",\"ld c,(hl)\",\"ld c,a\",\"ld d,b\",\"ld d,c\",\"ld d,d\",\"ld d,e\",\"ld d,h\",\"ld d,l\",\"ld d,(hl)\",\"ld d,a\",\"ld e,b\",\"ld e,c\",\"ld e,d\",\"ld e,e\",\"ld e,h\",\"ld e,l\",\"ld e,(hl)\",\"ld e,a\",\"ld h,b\",\"ld h,c\",\"ld h,d\",\"ld h,e\",\"ld h,h\",\"ld h,l\",\"ld h,(hl)\",\"ld h,a\",\"ld l,b\",\"ld l,c\",\"ld l,d\",\"ld l,e\",\"ld l,h\",\"ld l,l\",\"ld l,(hl)\",\"ld l,a\",\"ld (hl),b\",\"ld (hl),c\",\"ld (hl),d\",\"ld (hl),e\",\"ld (hl),h\",\"ld (hl),l\",\"halt\",\"ld (hl),a\",\"ld a,b\",\"ld a,c\",\"ld a,d\",\"ld a,e\",\"ld a,h\",\"ld a,l\",\"ld a,(hl)\",\"ld a,a\",\"add a,b\",\"add a,c\",\"add a,d\",\"add a,e\",\"add a,h\",\"add a,l\",\"add a,(hl)\",\"add a,a\",\"adc a,b\",\"adc a,c\",\"adc a,d\",\"adc a,e\",\"adc a,h\",\"adc a,l\",\"adc a,(hl)\",\"adc a,a\",\"sub b\",\"sub c\",\"sub d\",\"sub e\",\"sub h\",\"sub l\",\"sub (hl)\",\"sub a\",\"sbc a,b\",\"sbc a,c\",\"sbc a,d\",\"sbc a,e\",\"sbc a,h\",\"sbc a,l\",\"sbc a,(hl)\",\"sbc a,a\",\"and b\",\"and c\",\"and d\",\"and e\",\"and h\",\"and l\",\"and (hl)\",\"and a\",\"xor b\",\"xor c\",\"xor d\",\"xor e\",\"xor h\",\"xor l\",\"xor (hl)\",\"xor a\",\"or b\",\"or c\",\"or d\",\"or e\",\"or h\",\"or l\",\"or (hl)\",\"or a\",\"cp b\",\"cp c\",\"cp d\",\"cp e\",\"cp h\",\"cp l\",\"cp (hl)\",\"cp a\",\"ret nz\",\"pop bc\",\"jp nz,xx\",\"jp xx\",\"call nz,xx\",\"push bc\",\"add a,x\",\"rst 00h\",\"ret z\",\"ret\",\"jp z,xx\",\"xxBITxx\",\"call z,xx\",\"call xx\",\"adc a,x\",\"rst 08h\",\"ret nc\",\"pop de\",\"jp nc,xx\",\"out (x),a\",\"call nc,xx\",\"push de\",\"sub x\",\"rst 10h\",\"ret c\",\"exx\",\"jp c,xx\",\"in a,(x)\",\"call c,xx\",\"xxIXxx\",\"sbc a,x\",\"rst 18h\",\"ret po\",\"pop hl\",\"jp po,xx\",\"ex (sp),hl\",\"call po,xx\",\"push hl\",\"and x\",\"rst 20h\",\"ret pe\",\"jp (hl)\",\"jp pe,xx\",\"ex de,hl\",\"call pe,xx\",\"xx80xx\",\"xor x\",\"rst 28h\",\"ret p\",\"pop af\",\"jp p,xx\",\"di\",\"call p,xx\",\"push af\",\"or x\",\"rst 30h\",\"ret m\",\"ld sp,hl\",\"jp m,xx\",\"ei\",\"call m,xx\",\"xxIYxx\",\"cp x\",\"rst 38h\"];\nconst Z80_OPS_ED = [\"in b,(c)\",\"out (c),b\",\"sbc hl,bc\",\"ld (xx),bc\",\"neg\",\"retn\",\"im 0\",\"ld i,a\",\"in c,(c)\",\"out (c),c\",\"adc hl,bc\",\"ld bc,(xx)\",\"neg\",\"reti\",\"\",\"ld r,a\",\"in d,(c)\",\"out (c),d\",\"sbc hl,de\",\"ld (xx),de\",\"neg\",\"retn\",\"im 1\",\"ld a,i\",\"in e,(c)\",\"out (c),e\",\"adc hl,de\",\"ld de,(xx)\",\"neg\",\"retn\",\"im 2\",\"ld a,r\",\"in h,(c)\",\"out (c),h\",\"sbc hl,hl\",\"ld (xx),hl\",\"neg\",\"retn\",\"\",\"rrd\",\"in l,(c)\",\"out (c),l\",\"adc hl,hl\",\"ld hl,(xx)\",\"neg\",\"retn\",\"\",\"rld\",\"in f,(c)\",\"out (c),f\",\"sbc hl,sp\",\"ld (xx),sp\",\"neg\",\"retn\",\"\",\"\",\"in a,(c)\",\"out (c),a\",\"adc hl,sp\",\"ld sp,(xx)\",\"neg\",\"reti\",\"\",\"\",\"ldi\",\"cpi\",\"ini\",\"outi\",\"\",\"\",\"\",\"\",\"ldd\",\"cpd\",\"ind\",\"outd\",\"\",\"\",\"\",\"\",\"ldir\",\"cpir\",\"inir\",\"otir\",\"\",\"\",\"\",\"\",\"lddr\",\"cpdr\",\"indr\",\"otdr\",\"\",\"\",\"\",\"\"];\nconst Z80_OPS_CB = [\"rlc b\",\"rlc c\",\"rlc d\",\"rlc e\",\"rlc h\",\"rlc l\",\"rlc (hl)\",\"rlc a\",\"rrc b\",\"rrc c\",\"rrc d\",\"rrc e\",\"rrc h\",\"rrc l\",\"rrc (hl)\",\"rrc a\",\"rl b\",\"rl c\",\"rl d\",\"rl e\",\"rl h\",\"rl l\",\"rl (hl)\",\"rl a\",\"rr b\",\"rr c\",\"rr d\",\"rr e\",\"rr h\",\"rr l\",\"rr (hl)\",\"rr a\",\"sla b\",\"sla c\",\"sla d\",\"sla e\",\"sla h\",\"sla l\",\"sla (hl)\",\"sla a\",\"sra b\",\"sra c\",\"sra d\",\"sra e\",\"sra h\",\"sra l\",\"sra (hl)\",\"sra a\",\"sll b\",\"sll c\",\"sll d\",\"sll e\",\"sll h\",\"sll l\",\"sll (hl)\",\"sll a\",\"srl b\",\"srl c\",\"srl d\",\"srl e\",\"srl h\",\"srl l\",\"srl (hl)\",\"srl a\",\"bit 0,b\",\"bit 0,c\",\"bit 0,d\",\"bit 0,e\",\"bit 0,h\",\"bit 0,l\",\"bit 0,(hl)\",\"bit 0,a\",\"bit 1,b\",\"bit 1,c\",\"bit 1,d\",\"bit 1,e\",\"bit 1,h\",\"bit 1,l\",\"bit 1,(hl)\",\"bit 1,a\",\"bit 2,b\",\"bit 2,c\",\"bit 2,d\",\"bit 2,e\",\"bit 2,h\",\"bit 2,l\",\"bit 2,(hl)\",\"bit 2,a\",\"bit 3,b\",\"bit 3,c\",\"bit 3,d\",\"bit 3,e\",\"bit 3,h\",\"bit 3,l\",\"bit 3,(hl)\",\"bit 3,a\",\"bit 4,b\",\"bit 4,c\",\"bit 4,d\",\"bit 4,e\",\"bit 4,h\",\"bit 4,l\",\"bit 4,(hl)\",\"bit 4,a\",\"bit 5,b\",\"bit 5,c\",\"bit 5,d\",\"bit 5,e\",\"bit 5,h\",\"bit 5,l\",\"bit 5,(hl)\",\"bit 5,a\",\"bit 6,b\",\"bit 6,c\",\"bit 6,d\",\"bit 6,e\",\"bit 6,h\",\"bit 6,l\",\"bit 6,(hl)\",\"bit 6,a\",\"bit 7,b\",\"bit 7,c\",\"bit 7,d\",\"bit 7,e\",\"bit 7,h\",\"bit 7,l\",\"bit 7,(hl)\",\"bit 7,a\",\"res 0,b\",\"res 0,c\",\"res 0,d\",\"res 0,e\",\"res 0,h\",\"res 0,l\",\"res 0,(hl)\",\"res 0,a\",\"res 1,b\",\"res 1,c\",\"res 1,d\",\"res 1,e\",\"res 1,h\",\"res 1,l\",\"res 1,(hl)\",\"res 1,a\",\"res 2,b\",\"res 2,c\",\"res 2,d\",\"res 2,e\",\"res 2,h\",\"res 2,l\",\"res 2,(hl)\",\"res 2,a\",\"res 3,b\",\"res 3,c\",\"res 3,d\",\"res 3,e\",\"res 3,h\",\"res 3,l\",\"res 3,(hl)\",\"res 3,a\",\"res 4,b\",\"res 4,c\",\"res 4,d\",\"res 4,e\",\"res 4,h\",\"res 4,l\",\"res 4,(hl)\",\"res 4,a\",\"res 5,b\",\"res 5,c\",\"res 5,d\",\"res 5,e\",\"res 5,h\",\"res 5,l\",\"res 5,(hl)\",\"res 5,a\",\"res 6,b\",\"res 6,c\",\"res 6,d\",\"res 6,e\",\"res 6,h\",\"res 6,l\",\"res 6,(hl)\",\"res 6,a\",\"res 7,b\",\"res 7,c\",\"res 7,d\",\"res 7,e\",\"res 7,h\",\"res 7,l\",\"res 7,(hl)\",\"res 7,a\",\"set 0,b\",\"set 0,c\",\"set 0,d\",\"set 0,e\",\"set 0,h\",\"set 0,l\",\"set 0,(hl)\",\"set 0,a\",\"set 1,b\",\"set 1,c\",\"set 1,d\",\"set 1,e\",\"set 1,h\",\"set 1,l\",\"set 1,(hl)\",\"set 1,a\",\"set 2,b\",\"set 2,c\",\"set 2,d\",\"set 2,e\",\"set 2,h\",\"set 2,l\",\"set 2,(hl)\",\"set 2,a\",\"set 3,b\",\"set 3,c\",\"set 3,d\",\"set 3,e\",\"set 3,h\",\"set 3,l\",\"set 3,(hl)\",\"set 3,a\",\"set 4,b\",\"set 4,c\",\"set 4,d\",\"set 4,e\",\"set 4,h\",\"set 4,l\",\"set 4,(hl)\",\"set 4,a\",\"set 5,b\",\"set 5,c\",\"set 5,d\",\"set 5,e\",\"set 5,h\",\"set 5,l\",\"set 5,(hl)\",\"set 5,a\",\"set 6,b\",\"set 6,c\",\"set 6,d\",\"set 6,e\",\"set 6,h\",\"set 6,l\",\"set 6,(hl)\",\"set 6,a\",\"set 7,b\",\"set 7,c\",\"set 7,d\",\"set 7,e\",\"set 7,h\",\"set 7,l\",\"set 7,(hl)\",\"set 7,a\"];\n\nexport function disassembleZ80(pc:number, b0:number, b1:number, b2:number, b3:number) : {line:string, nbytes:number, isaddr:boolean} {\n\n var op,n,am;\n var bytes = [b0,b1,b2,b3];\n var isaddr = false;\n n=1;\n switch (b0) {\n case 0xcb:\n am = Z80_OPS_CB[b1];\n n++;\n break;\n case 0xed:\n if (b1 >= 0x40 && b1 <= 0x7f) am = Z80_OPS_ED[b1 - 0x40];\n if (b1 >= 0xa0 && b1 <= 0xbf) am = Z80_OPS_ED[b1 - 0xa0 + 0x40];\n n++;\n break;\n case 0xdd:\n case 0xfd:\n var ireg = (b0 == 0xdd) ? 'ix' : 'iy';\n if (b1 == 0xcb) {\n // swap the 3rd and 4th bytes [$dd $cb displacement opcode]\n am = Z80_OPS_CB[b3];\n bytes[2] = b3;\n bytes[3] = b2;\n n++;\n } else {\n am = Z80_OPS[b1];\n }\n am = am.replace(/[(]hl[)]/, '('+ireg+'+x)');\n am = am.replace(/\\bhl\\b/, ireg);\n n++;\n break;\n default:\n am = Z80_OPS[b0];\n break;\n }\n if (!am || !am.length) am = \"??\";\n if (/\\bxx\\b/.test(am)) {\n am = am.replace(/\\bxx\\b/,'$'+hex(bytes[n]+(bytes[n+1]<<8), 4));\n n += 2;\n isaddr = true;\n } else if (/\\bx\\b/.test(am)) {\n if (am.startsWith('j')) {\n var offset = (b1 < 0x80) ? (pc+2+b1) : (pc+2-(256-b1));\n offset &= 0xffff;\n am = am.replace(/\\bx\\b/,'$'+hex(offset, 4));\n isaddr = true;\n } else {\n am = am.replace(/\\bx\\b/,'$'+hex(bytes[n], 2));\n }\n n += 1;\n }\n return {line:am.toUpperCase(), nbytes:n, isaddr:isaddr};\n};\n", "\nimport { CpuState, EmuState } from \"./baseplatform\";\nimport { CPU, SampledAudioSink, ProbeAll, NullProbe } from \"./devices\";\nimport { EmuHalt } from \"./emu\";\n\n// WASM Support\n// TODO: detangle from c64\n\nexport abstract class BaseWASMMachine {\n prefix : string;\n instance : WebAssembly.Instance;\n exports : any;\n sys : number;\n pixel_dest : Uint32Array;\n pixel_src : Uint32Array;\n stateptr : number;\n statearr : Uint8Array;\n cpustateptr : number;\n cpustatearr : Uint8Array;\n ctrlstateptr : number;\n ctrlstatearr : Uint8Array;\n cpu : CPU;\n romptr : number;\n romlen : number;\n romarr : Uint8Array;\n biosptr : number;\n biosarr : Uint8Array;\n audio : SampledAudioSink;\n audioarr : Float32Array;\n probe : ProbeAll;\n maxROMSize : number = 0x40000;\n\n abstract getCPUState() : CpuState;\n abstract saveState() : EmuState;\n abstract loadState(state: EmuState);\n\n constructor(prefix: string) {\n this.prefix = prefix;\n var self = this;\n this.cpu = {\n getPC: self.getPC.bind(self),\n getSP: self.getSP.bind(self),\n isStable: self.isStable.bind(self),\n reset: self.reset.bind(self),\n saveState: () => {\n return self.getCPUState();\n },\n loadState: () => {\n console.log(\"loadState not implemented\")\n },\n connectMemoryBus() {\n console.log(\"connectMemoryBus not implemented\")\n },\n }\n }\n getImports(wmod: WebAssembly.Module) {\n return {};\n }\n async fetchWASM() {\n var wasmResponse = await fetch('res/'+this.prefix+'.wasm');\n if (wasmResponse.status == 200 || (wasmResponse as any as Blob).size) {\n var wasmBinary = await wasmResponse.arrayBuffer();\n var wasmCompiled = await WebAssembly.compile(wasmBinary);\n var wasmResult = await WebAssembly.instantiate(wasmCompiled, this.getImports(wasmCompiled));\n this.instance = wasmResult;\n this.exports = wasmResult.exports;\n } else throw new Error('could not load WASM file');\n }\n allocateBIOS(biosBinary: Uint8Array) {\n this.biosptr = this.exports.malloc(biosBinary.byteLength);\n this.biosarr = new Uint8Array(this.exports.memory.buffer, this.biosptr, biosBinary.byteLength);\n}\n async fetchBIOS() {\n var biosResponse = await fetch('res/'+this.prefix+'.bios');\n if (biosResponse.status == 200 || (biosResponse as any as Blob).size) {\n var biosBinary = new Uint8Array(await biosResponse.arrayBuffer());\n this.allocateBIOS(biosBinary);\n this.loadBIOS(biosBinary);\n } else throw new Error('could not load BIOS file');\n }\n async initWASM() {\n // init machine instance\n this.sys = this.exports.machine_init(this.biosptr);\n let statesize = this.exports.machine_get_state_size();\n this.stateptr = this.exports.malloc(statesize);\n let ctrlstatesize = this.exports.machine_get_controls_state_size();\n this.ctrlstateptr = this.exports.malloc(ctrlstatesize);\n let cpustatesize = this.exports.machine_get_cpu_state_size();\n this.cpustateptr = this.exports.malloc(cpustatesize);\n this.romptr = this.exports.malloc(this.maxROMSize);\n // create state buffers\n // must do this after allocating memory (and everytime we grow memory?)\n this.statearr = new Uint8Array(this.exports.memory.buffer, this.stateptr, statesize);\n this.ctrlstatearr = new Uint8Array(this.exports.memory.buffer, this.ctrlstateptr, ctrlstatesize);\n this.cpustatearr = new Uint8Array(this.exports.memory.buffer, this.cpustateptr, cpustatesize);\n // create audio buffer\n let sampbufsize = 4096*4;\n this.audioarr = new Float32Array(this.exports.memory.buffer, this.exports.machine_get_sample_buffer(), sampbufsize);\n // create ROM buffer\n this.romarr = new Uint8Array(this.exports.memory.buffer, this.romptr, this.maxROMSize);\n // enable c64 joystick map to arrow keys (TODO)\n //this.exports.c64_set_joystick_type(this.sys, 1);\n console.log('machine_init', this.sys, statesize, ctrlstatesize, cpustatesize, sampbufsize);\n }\n async loadWASM() {\n await this.fetchWASM();\n this.exports.memory.grow(96); // TODO: need more when probing?\n await this.fetchBIOS();\n await this.initWASM();\n }\n getPC() : number {\n return this.exports.machine_cpu_get_pc(this.sys);\n }\n getSP() : number {\n return this.exports.machine_cpu_get_sp(this.sys);\n }\n isStable() : boolean {\n return this.exports.machine_cpu_is_stable(this.sys);\n }\n loadROM(rom: Uint8Array) {\n if (rom.length > this.maxROMSize) throw new EmuHalt(`Rom size too big: ${rom.length} bytes`);\n this.romarr.set(rom);\n this.romlen = rom.length;\n console.log('load rom', rom.length, 'bytes');\n this.reset(); // TODO?\n }\n // TODO: can't load after machine_init\n loadBIOS(srcArray: Uint8Array) {\n this.biosarr.set(srcArray);\n }\n reset() {\n this.exports.machine_reset(this.sys);\n }\n /* TODO: we don't need this because c64_exec does this?\n pollControls() {\n this.exports.machine_start_frame(this.sys);\n }\n */\n read(address: number) : number {\n return this.exports.machine_mem_read(this.sys, address & 0xffff);\n }\n readConst(address: number) : number {\n return this.exports.machine_mem_read(this.sys, address & 0xffff);\n }\n write(address: number, value: number) : void {\n this.exports.machine_mem_write(this.sys, address & 0xffff, value & 0xff);\n }\n getAudioParams() {\n return {sampleRate:44100, stereo:false};\n }\n videoOffsetBytes = 0;\n connectVideo(pixels:Uint32Array) : void {\n this.pixel_dest = pixels;\n var pixbuf = this.exports.machine_get_pixel_buffer(this.sys); // save video pointer\n console.log('connectVideo', pixbuf, pixels.length);\n this.pixel_src = new Uint32Array(this.exports.memory.buffer, pixbuf+this.videoOffsetBytes, pixels.length);\n }\n syncVideo() {\n if (this.exports.machine_update_video) {\n this.exports.machine_update_video(this.sys);\n }\n if (this.pixel_dest != null) {\n this.pixel_dest.set(this.pixel_src);\n }\n }\n // assume controls buffer is smaller than cpu buffer\n saveControlsState() : any {\n //console.log(1, this.romptr, this.romlen, this.ctrlstateptr, this.romarr.slice(0,4), this.ctrlstatearr.slice(0,4));\n this.exports.machine_save_controls_state(this.sys, this.ctrlstateptr);\n //console.log(2, this.romptr, this.romlen, this.ctrlstateptr, this.romarr.slice(0,4), this.ctrlstatearr.slice(0,4));\n return { controls:this.ctrlstatearr.slice(0) }\n }\n loadControlsState(state) : void {\n this.ctrlstatearr.set(state.controls);\n this.exports.machine_load_controls_state(this.sys, this.ctrlstateptr);\n }\n connectAudio(audio : SampledAudioSink) : void {\n this.audio = audio;\n }\n syncAudio() {\n if (this.audio != null) {\n var n = this.exports.machine_get_sample_count();\n for (var i=0; i>1))&0x80)>>6);};\nvar setV16 = function(a,b,r) {CC |= (((a^b^r^(r>>1))&0x8000)>>14);};\nvar getD = function() {return (rA<<8)+rB;};\nvar setD = function(v) {rA = (v>>8)& 0xff;rB=v&0xff;};\nvar PUSHB = function(b) {\n byteTo(--rS, b & 0xff);\n};\nvar PUSHW = function(b) {\n byteTo(--rS, b & 0xff);\n byteTo(--rS, (b>>8) & 0xff);\n};\n\nvar PUSHBU = function(b) {\n byteTo(--rU, b & 0xff);\n};\nvar PUSHWU = function(b) {\n byteTo(--rU, b & 0xff);\n byteTo(--rU, (b>>8) & 0xff);\n};\nvar PULLB = function() {\n return byteAt(rS++);\n};\nvar PULLW = function() {\n return byteAt(rS++) * 256 + byteAt(rS++);\n};\n\nvar PULLBU = function() {\n return byteAt(rU++);\n};\nvar PULLWU = function() {\n return byteAt(rU++) * 256 + byteAt(rU++);\n};\n\nvar PSHS = function(ucTemp) {\n var i = 0;\n if (ucTemp & 0x80) {PUSHW(PC);i += 2;}\n if (ucTemp & 0x40) {PUSHW(rU);i += 2;}\n if (ucTemp & 0x20){PUSHW(rY);i += 2;}\n if (ucTemp & 0x10){PUSHW(rX);i += 2;}\n if (ucTemp & 0x8){PUSHB(DP); i++;}\n if (ucTemp & 0x4){PUSHB(rB); i++;}\n if (ucTemp & 0x2){PUSHB(rA); i++;}\n if (ucTemp & 0x1){PUSHB(CC); i++;}\n T+=i; //timing\n};\nvar PSHU = function(ucTemp) {\n var i = 0;\n if (ucTemp & 0x80) {PUSHWU(PC);i += 2;}\n if (ucTemp & 0x40) {PUSHWU(rS);i += 2;}\n if (ucTemp & 0x20){PUSHWU(rY);i += 2;}\n if (ucTemp & 0x10){PUSHWU(rX);i += 2;}\n if (ucTemp & 0x8){PUSHBU(DP); i++;}\n if (ucTemp & 0x4){PUSHBU(rB); i++;}\n if (ucTemp & 0x2){PUSHBU(rA); i++;}\n if (ucTemp & 0x1){PUSHBU(CC); i++;}\n T+=i; //timing\n};\nvar PULS = function(ucTemp) {\n var i = 0;\n if (ucTemp & 0x1){CC = PULLB(); i++;}\n if (ucTemp & 0x2){rA = PULLB(); i++;}\n if (ucTemp & 0x4){rB = PULLB(); i++;}\n if (ucTemp & 0x8){DP = PULLB(); i++;}\n if (ucTemp & 0x10){rX = PULLW();i += 2;}\n if (ucTemp & 0x20){rY = PULLW();i += 2;}\n if (ucTemp & 0x40) {rU = PULLW();i += 2;}\n if (ucTemp & 0x80) {PC = PULLW();i += 2;}\n T+=i; //timing\n};\nvar PULU = function(ucTemp) {\n var i = 0;\n if (ucTemp & 0x1){CC = PULLBU(); i++;}\n if (ucTemp & 0x2){rA = PULLBU(); i++;}\n if (ucTemp & 0x4){rB = PULLBU(); i++;}\n if (ucTemp & 0x8){DP = PULLBU(); i++;}\n if (ucTemp & 0x10){rX = PULLWU();i += 2;}\n if (ucTemp & 0x20){rY = PULLWU();i += 2;}\n if (ucTemp & 0x40) {rS = PULLWU();i += 2;}\n if (ucTemp & 0x80) {PC = PULLWU();i += 2;}\n T+=i; //timing\n};\n\n\nvar getPBR = function(ucPostByte) {\n switch(ucPostByte & 0xf) {\n case 0x00: /* D */\n return getD();\n case 0x1: /* X */\n return rX;\n case 0x2: /* Y */\n return rY;\n case 0x3: /* U */\n return rU;\n case 0x4: /* S */\n return rS;\n case 0x5: /* PC */\n return PC;\n case 0x8: /* A */\n return rA;\n case 0x9: /* B */\n return rB;\n case 0xA: /* CC */\n return CC;\n case 0xB: /* DP */\n return DP;\n default: /* illegal */\n return null;\n }\n};\nvar setPBR = function(ucPostByte, v) {\n switch(ucPostByte & 0xf) /* Get destination register */\n {\n case 0x00: /* D */\n setD(v);return;\n case 0x1: /* X */\n rX = v; return;\n case 0x2: /* Y */\n rY = v; return;\n case 0x3: /* U */\n rU = v; return;\n case 0x4: /* S */\n rS = v; return;\n case 0x5: /* PC */\n PC = v; return;\n case 0x8: /* A */\n rA = v; return;\n case 0x9: /* B */\n rB = v; return;\n case 0xA: /* CC */\n CC = v; return;\n case 0xB: /* DP */\n DP = v; return;\n default: /* illegal */\n return;\n }\n};\n\nvar TFREXG = function(ucPostByte, bExchange)\n{\n\n var ucTemp = ucPostByte & 0x88;\n if (ucTemp == 0x80 || ucTemp == 0x08)\n ucTemp = 0; /* PROBLEM! */\n\n if (bExchange)\n {\n ucTemp = getPBR(ucPostByte>>4);\n setPBR(ucPostByte>>4, getPBR(ucPostByte));\n setPBR(ucPostByte, ucTemp);\n }\n else /* Transfer */ {\n setPBR(ucPostByte, getPBR(ucPostByte>>4));\n }\n} ;\n\nvar signed = function(x) {\n return (x>127)?(x-256):x;\n};\nvar signed16 = function(x) {\n return (x>32767)?(x-65536):x;\n};\n\nvar fetch = function() {\n var v = byteAt(PC++);\n PC &= 0xffff;\n return v;\n};\nvar fetch16 = function() {\n var v1 = byteAt(PC++);\n PC &= 0xffff;\n var v2 = byteAt(PC++);\n PC &= 0xffff;\n return v1*256+v2;\n};\n\nvar ReadWord = function(addr) {\n var v1 = byteAt(addr++);\n addr &= 0xffff;\n var v2 = byteAt(addr++);\n addr &= 0xffff;\n return v1*256+v2;\n};\nvar WriteWord = function(addr,v) {\n byteTo(addr++,(v>>8)&0xff);\n addr &= 0xffff;\n byteTo(addr,v&0xff);\n};\n\nvar PostByte = function() {\n var pb = fetch();\n var preg;\n switch (pb & 0x60) {\n case 0:\n preg = rX; break;\n case 0x20:\n preg = rY; break;\n case 0x40:\n preg = rU; break;\n case 0x60:\n preg = rS; break;\n }\n\n var xchg = null;\n var addr = null;\n var sTemp;\n\n if (pb & 0x80) /* Complex stuff */\n {\n switch (pb & 0x0f)\n {\n case 0: /* EA = ,reg+ */\n addr = preg;\n xchg = preg + 1;\n T += 2;\n break;\n case 1: /* EA = ,reg++ */\n addr = preg;\n xchg = preg + 2;\n T += 3;\n break;\n case 2: /* EA = ,-reg */\n xchg = preg - 1;\n addr = xchg;\n T += 2;\n break;\n case 3: /* EA = ,--reg */\n xchg = preg - 2;\n addr = xchg;\n T += 3;\n break;\n case 4: /* EA = ,reg */\n addr = preg;\n break;\n case 5: /* EA = ,reg + B */\n //usAddr = *pReg + (signed short)(signed char)regs->ucRegB;\n addr = preg + signed(rB);\n T += 1;\n break;\n case 6: /* EA = ,reg + A */\n addr = preg + signed(rA);\n T += 1;\n break;\n case 7: /* illegal */\n addr = 0;\n break;\n case 8: /* EA = ,reg + 8-bit offset */\n addr = preg + signed(fetch());\n T += 1;\n break;\n case 9: /* EA = ,reg + 16-bit offset */\n addr = preg + signed16(fetch16());\n T += 4;\n break;\n case 0xA: /* illegal */\n addr = 0;\n break;\n case 0xB: /* EA = ,reg + D */\n T += 4;\n addr = preg + getD();\n break;\n case 0xC: /* EA = PC + 8-bit offset */\n sTemp = signed(fetch());\n addr = PC + sTemp;\n T += 1;\n break;\n case 0xD: /* EA = PC + 16-bit offset */\n sTemp = signed16(fetch16());\n addr = PC + sTemp;\n T += 5;\n break;\n case 0xe: /* Illegal */\n addr = 0;\n break;\n case 0xF: /* EA = [,address] */\n T += 5;\n addr = fetch16();\n break;\n } /* switch */\n\n addr &= 0xffff;\n\n if (pb & 0x10) /* Indirect addressing */\n {\n addr = byteAt(addr)*256+byteAt((addr+1) & 0xffff);\n T += 3;\n }\n }\n else /* Just a 5 bit signed offset + register */\n {\n var sByte = pb & 0x1f;\n if (sByte > 15) /* Two's complement 5-bit value */\n sByte -= 32;\n addr = preg + sByte;\n T += 1;\n }\n\n if (xchg!==null) {\n switch (pb & 0x60) {\n case 0:\n rX = xchg; break;\n case 0x20:\n rY = xchg; break;\n case 0x40:\n rU = xchg; break;\n case 0x60:\n rS = xchg; break;\n }\n\n }\n\n return addr & 0xffff; /* Return the effective address */\n};\n\nvar flagsNZ16 = function(word) {\n CC &= ~(F_ZERO | F_NEGATIVE);\n if (word===0) CC |= F_ZERO;\n if (word & 0x8000) CC |= F_NEGATIVE;\n};\n\n// ============= Operations\n\nvar oINC = function(b) {\n b++;\n b &= 0xff;\n CC &= ~(F_ZERO | F_OVERFLOW | F_NEGATIVE);\n CC |= flagsNZ[b];\n if (b === 0 || b == 0x80) CC |= F_OVERFLOW;\n return b;\n};\nvar oDEC = function(b) {\n b--;\n b &= 0xff;\n CC &= ~(F_ZERO | F_OVERFLOW | F_NEGATIVE);\n CC |= flagsNZ[b];\n if (b === 0x7f || b == 0xff) CC |= F_OVERFLOW;\n return b;\n};\nvar oSUB = function(b,v) {\n var temp = b-v;\n //temp &= 0xff;\n CC &= ~(F_CARRY | F_ZERO | F_OVERFLOW | F_NEGATIVE);\n CC |= flagsNZ[temp & 0xff];\n if (temp&0x100) CC|=F_CARRY;\n setV8(b,v,temp);\n return temp&0xff;\n};\nvar oSUB16 = function(b,v) {\n var temp = b-v;\n //temp &= 0xff;\n CC &= ~(F_CARRY | F_ZERO | F_OVERFLOW | F_NEGATIVE);\n if ((temp&0xffff)===0) CC|=F_ZERO;\n if (temp&0x8000) CC|=F_NEGATIVE;\n if (temp&0x10000) CC|=F_CARRY;\n setV16(b,v,temp);\n return temp&0xffff;\n};\nvar oADD = function(b,v) {\n var temp = b+v;\n //temp &= 0xff;\n CC &= ~(F_HALFCARRY | F_CARRY | F_ZERO | F_OVERFLOW | F_NEGATIVE);\n CC |= flagsNZ[temp & 0xff];\n if (temp&0x100) CC|=F_CARRY;\n setV8(b,v,temp);\n if ((temp ^ b ^ v)&0x10) CC |= F_HALFCARRY;\n return temp&0xff;\n};\nvar oADD16 = function(b,v) {\n var temp = b+v;\n //temp &= 0xff;\n CC &= ~(F_CARRY | F_ZERO | F_OVERFLOW | F_NEGATIVE);\n if ((temp&0xffff)===0) CC|=F_ZERO;\n if (temp&0x8000) CC|=F_NEGATIVE;\n if (temp&0x10000) CC|=F_CARRY;\n setV16(b,v,temp);\n return temp&0xffff;\n};\nvar oADC = function(b,v) {\n var temp = b+v+(CC & F_CARRY);\n //temp &= 0xff;\n CC &= ~(F_HALFCARRY | F_CARRY | F_ZERO | F_OVERFLOW | F_NEGATIVE);\n CC |= flagsNZ[temp & 0xff];\n if (temp&0x100) CC|=F_CARRY;\n setV8(b,v,temp);\n if ((temp ^ b ^ v)&0x10) CC |= F_HALFCARRY;\n return temp&0xff;\n};\nvar oSBC = function(b,v) {\n var temp = b-v-(CC & F_CARRY);\n //temp &= 0xff;\n CC &= ~(F_CARRY | F_ZERO | F_OVERFLOW | F_NEGATIVE);\n CC |= flagsNZ[temp & 0xff];\n if (temp&0x100) CC|=F_CARRY;\n setV8(b,v,temp);\n return temp&0xff;\n};\nvar oCMP = function(b,v) {\n var temp = b-v;\n //temp &= 0xff;\n CC &= ~(F_CARRY | F_ZERO | F_OVERFLOW | F_NEGATIVE);\n CC |= flagsNZ[temp & 0xff];\n if (temp&0x100) CC|=F_CARRY;\n setV8(b,v,temp);\n return;\n};\nvar oCMP16 = function(b,v) {\n var temp = b-v;\n //temp &= 0xff;\n CC &= ~(F_CARRY | F_ZERO | F_OVERFLOW | F_NEGATIVE);\n if ((temp&0xffff)===0) CC|=F_ZERO;\n if (temp&0x8000) CC|=F_NEGATIVE;\n if (temp&0x10000) CC|=F_CARRY;\n setV16(b,v,temp);\n return;\n};\n\nvar oNEG = function(b) {\n CC &= ~(F_CARRY | F_ZERO | F_OVERFLOW | F_NEGATIVE);\n if (b == 0x80)\n CC |= F_OVERFLOW;\n b = ((~b)&0xff) + 1;\n if (b === 0) CC |= F_ZERO;\n if (b & 0x80) CC |= F_NEGATIVE | F_CARRY;\n return b;\n};\n\nvar oLSR = function(b) {\n CC &= ~(F_ZERO | F_CARRY | F_NEGATIVE);\n if (b & 0x01) CC |= F_CARRY;\n b >>= 1;\n if (b === 0) CC |= F_ZERO;\n return b & 0xff;\n};\nvar oASR = function(b) {\n CC &= ~(F_ZERO | F_CARRY | F_NEGATIVE);\n if (b & 0x01) CC |= F_CARRY;\n b = (b & 0x80) | (b>>1);\n CC |= flagsNZ[b];\n return b;\n};\nvar oASL = function(b) {\n var temp = b;\n CC &= ~(F_ZERO | F_CARRY | F_NEGATIVE | F_OVERFLOW);\n if (b & 0x80) CC |= F_CARRY;\n b <<= 1;\n CC |= flagsNZ[b];\n if ((b ^ temp) & 0x80) CC|=F_OVERFLOW;\n return b;\n};\nvar oROL = function(b) {\n var temp = b;\n var oldc = CC&F_CARRY;\n CC &= ~(F_ZERO | F_CARRY | F_NEGATIVE | F_OVERFLOW);\n if (b & 0x80) CC |= F_CARRY;\n b = b<<1 | oldc;\n CC |= flagsNZ[b];\n if ((b ^ temp) & 0x80) CC|=F_OVERFLOW;\n return b;\n};\nvar oROR = function(b) {\n var oldc = CC&F_CARRY;\n CC &= ~(F_ZERO | F_CARRY | F_NEGATIVE);\n if (b & 0x01) CC |= F_CARRY;\n b = b>>1 | oldc<<7;\n CC |= flagsNZ[b];\n// if ((b ^ temp) & 0x80) CC|=F_OVERFLOW;\n return b;\n};\n\nvar oEOR = function(b,v) {\n CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);\n b ^= v;\n CC |= flagsNZ[b];\n return b;\n};\nvar oOR = function(b,v) {\n CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);\n b |= v;\n CC |= flagsNZ[b];\n return b;\n};\nvar oAND = function(b,v) {\n CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);\n b &= v;\n CC |= flagsNZ[b];\n return b;\n};\nvar oCOM = function(b) {\n CC &= ~(F_ZERO | F_NEGATIVE | F_OVERFLOW);\n b ^= 0xff;\n CC |= flagsNZ[b];\n CC |= F_CARRY;\n return b;\n};\n\n//----common\nvar dpadd = function() {\n //direct page + 8bit index\n return DP*256 + fetch();\n};\n\nvar step = function() {\n var oldT = T;\n\n var addr = null;\n var pb = null;\n\n var oldPC = PC;\n var opcode = fetch();\n T+=cycles[opcode];\n switch (opcode) {\n case 0x00: //NEG DP\n addr = dpadd();\n byteTo(addr, oNEG(byteAt(addr)));\n break;\n case 0x03: //COM DP\n addr = dpadd();\n byteTo(addr, oCOM(byteAt(addr)));\n break;\n case 0x04: //LSR DP\n addr = dpadd();\n byteTo(addr, oLSR(byteAt(addr)));\n break;\n case 0x06: //ROR DP\n addr = dpadd();\n byteTo(addr, oROR(byteAt(addr)));\n break;\n case 0x07: //ASR DP\n addr = dpadd();\n byteTo(addr, oASR(byteAt(addr)));\n break;\n case 0x08: //ASL DP\n addr = dpadd();\n byteTo(addr, oASL(byteAt(addr)));\n break;\n case 0x09: //ROL DP\n addr = dpadd();\n byteTo(addr, oROL(byteAt(addr)));\n break;\n\n case 0x0A: //DEC DP\n addr = dpadd();\n byteTo(addr, oDEC(byteAt(addr)));\n break;\n case 0x0C: //INC DP\n addr = dpadd();\n byteTo(addr, oINC(byteAt(addr)));\n break;\n\n case 0x0D: //TST DP\n addr = dpadd();\n pb = byteAt(addr);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[pb];\n break;\n\n case 0x0E: //JMP DP\n addr = dpadd();\n PC = addr;\n break;\n case 0x0F: //CLR DP\n addr = dpadd();\n byteTo(addr,0);\n CC&=~(F_CARRY|F_NEGATIVE|F_OVERFLOW);\n CC |= F_ZERO;\n break;\n\n case 0x12: //NOP\n break;\n case 0x13: //SYNC\n break;\n case 0x16: //LBRA relative\n addr = signed16(fetch16());\n PC += addr;\n break;\n case 0x17: //LBSR relative\n addr = signed16(fetch16());\n PUSHW(PC);\n PC += addr;\n break;\n case 0x19: //DAA\n var cf = 0;\n var nhi = rA & 0xf0, nlo = rA & 0x0f;\n if( nlo>0x09 || CC & 0x20 ) cf |= 0x06;\n if( nhi>0x80 && nlo>0x09 ) cf |= 0x60;\n if( nhi>0x90 || CC & 0x01 ) cf |= 0x60;\n addr = cf + rA;\n CC &= ~(F_CARRY | F_NEGATIVE | F_ZERO | F_OVERFLOW);\n if (addr & 0x100)\n CC |= F_CARRY;\n rA = addr & 0xff;\n CC |= flagsNZ[rA];\n break;\n case 0x1A: //ORCC\n CC |= fetch();\n break;\n case 0x1C: //ANDCC\n CC &= fetch();\n break;\n case 0x1D: //SEX\n rA = (rB & 0x80)?0xff:0;\n flagsNZ16(getD());\n CC &= ~F_OVERFLOW;\n break;\n case 0x1E: //EXG\n pb = fetch();\n TFREXG(pb,true);\n break;\n case 0x1F: //EXG\n pb = fetch();\n TFREXG(pb,false);\n break;\n\n case 0x20: //BRA\n addr = signed(fetch());\n PC += addr;\n break;\n case 0x21: //BRN\n addr = signed(fetch());\n break;\n case 0x22: //BHI\n addr = signed(fetch());\n if (!(CC&(F_CARRY | F_ZERO))) PC += addr;\n break;\n case 0x23: //BLS\n addr = signed(fetch());\n if (CC&(F_CARRY | F_ZERO)) PC += addr;\n break;\n case 0x24: //BCC\n addr = signed(fetch());\n if (!(CC&F_CARRY)) PC += addr;\n break;\n case 0x25: //BCS\n addr = signed(fetch());\n if (CC&F_CARRY) PC += addr;\n break;\n case 0x26: //BNE\n addr = signed(fetch());\n if (!(CC&F_ZERO)) PC += addr;\n break;\n case 0x27: //BEQ\n addr = signed(fetch());\n if (CC&F_ZERO) PC += addr;\n break;\n case 0x28: //BVC\n addr = signed(fetch());\n if (!(CC&F_OVERFLOW)) PC += addr;\n break;\n case 0x29: //BVS\n addr = signed(fetch());\n if (CC&F_OVERFLOW) PC += addr;\n break;\n case 0x2A: //BPL\n addr = signed(fetch());\n if (!(CC&F_NEGATIVE)) PC += addr;\n break;\n case 0x2B: //BMI\n addr = signed(fetch());\n if (CC&F_NEGATIVE) PC += addr;\n break;\n case 0x2C: //BGE\n addr = signed(fetch());\n if (!((CC&F_NEGATIVE) ^ ((CC&F_OVERFLOW)<<2))) PC += addr;\n break;\n case 0x2D: //BLT\n addr = signed(fetch());\n if ((CC&F_NEGATIVE) ^ ((CC&F_OVERFLOW)<<2)) PC += addr;\n break;\n case 0x2E: //BGT\n addr = signed(fetch());\n if (!((CC&F_NEGATIVE) ^ ((CC&F_OVERFLOW)<<2) || (CC&F_ZERO))) PC += addr;\n break;\n case 0x2F: //BLE\n addr = signed(fetch());\n if ((CC&F_NEGATIVE) ^ ((CC&F_OVERFLOW)<<2) || (CC&F_ZERO)) PC += addr;\n break;\n\n case 0x30: //LEAX\n rX = PostByte();\n if (rX===0) CC|=F_ZERO; else CC&=~F_ZERO;\n break;\n case 0x31: //LEAY\n rY = PostByte();\n if (rY===0) CC|=F_ZERO; else CC&=~F_ZERO;\n break;\n case 0x32: //LEAS\n rS = PostByte();\n break;\n case 0x33: //LEAU\n rU = PostByte();\n break;\n\n case 0x34: //PSHS\n PSHS(fetch());\n break;\n case 0x35: //PULS\n PULS(fetch());\n break;\n case 0x36: //PSHU\n PSHU(fetch());\n break;\n case 0x37: //PULU\n PULU(fetch());\n break;\n case 0x39: //RTS\n PC = PULLW();\n break;\n case 0x3A: //ABX\n rX += rB;\n break;\n case 0x3B: //RTI\n CC = PULLB();\n if (CC & F_ENTIRE) {\n T+=9;\n rA = PULLB();\n rB = PULLB();\n DP = PULLB();\n rX = PULLW();\n rY = PULLW();\n rU = PULLW();\n }\n PC = PULLW();\n break;\n case 0x3C: //CWAI **todo\n CC &= fetch();\n break;\n case 0x3D: //MUL\n addr = rA * rB;\n if (addr===0) CC|=F_ZERO; else CC&=~F_ZERO;\n if (addr&0x80) CC|=F_CARRY; else CC&=~F_CARRY;\n setD(addr);\n break;\n case 0x3F: //SWI\n CC |= F_ENTIRE;\n PUSHW(PC);\n PUSHW(rU);\n PUSHW(rY);\n PUSHW(rX);\n PUSHB(DP);\n PUSHB(rB);\n PUSHB(rA);\n PUSHB(CC);\n CC |= F_IRQMASK | F_FIRQMASK;\n PC = ReadWord(vecSWI);\n break;\n\n case 0x40:\n rA = oNEG(rA);\n break;\n case 0x43:\n rA = oCOM(rA);\n break;\n case 0x44:\n rA = oLSR(rA);\n break;\n case 0x46:\n rA = oROR(rA);\n break;\n case 0x47:\n rA = oASR(rA);\n break;\n case 0x48:\n rA = oASL(rA);\n break;\n case 0x49:\n rA = oROL(rA);\n break;\n case 0x4A:\n rA = oDEC(rA);\n break;\n case 0x4C:\n rA = oINC(rA);\n break;\n case 0x4D:\n CC &= ~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rA];\n break;\n case 0x4F:\n rA = 0;\n CC &= ~(F_NEGATIVE|F_OVERFLOW|F_CARRY);\n CC |= F_ZERO;\n break;\n\n case 0x50:\n rB = oNEG(rB);\n break;\n case 0x53:\n rB = oCOM(rB);\n break;\n case 0x54:\n rB = oLSR(rB);\n break;\n case 0x56:\n rB = oROR(rB);\n break;\n case 0x57:\n rB = oASR(rB);\n break;\n case 0x58:\n rB = oASL(rB);\n break;\n case 0x59:\n rB = oROL(rB);\n break;\n case 0x5A:\n rB = oDEC(rB);\n break;\n case 0x5C:\n rB = oINC(rB);\n break;\n case 0x5D:\n CC &= ~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rB];\n break;\n case 0x5F:\n rB = 0;\n CC &= ~(F_NEGATIVE|F_OVERFLOW|F_CARRY);\n CC |= F_ZERO;\n break;\n\n case 0x60: //NEG indexed\n addr = PostByte();\n byteTo(addr, oNEG(byteAt(addr)));\n break;\n case 0x63: //COM indexed\n addr = PostByte();\n byteTo(addr, oCOM(byteAt(addr)));\n break;\n case 0x64: //LSR indexed\n addr = PostByte();\n byteTo(addr, oLSR(byteAt(addr)));\n break;\n case 0x66: //ROR indexed\n addr = PostByte();\n byteTo(addr, oROR(byteAt(addr)));\n break;\n case 0x67: //ASR indexed\n addr = PostByte();\n byteTo(addr, oASR(byteAt(addr)));\n break;\n case 0x68: //ASL indexed\n addr = PostByte();\n byteTo(addr, oASL(byteAt(addr)));\n break;\n case 0x69: //ROL indexed\n addr = PostByte();\n byteTo(addr, oROL(byteAt(addr)));\n break;\n\n case 0x6A: //DEC indexed\n addr = PostByte();\n byteTo(addr, oDEC(byteAt(addr)));\n break;\n case 0x6C: //INC indexed\n addr = PostByte();\n byteTo(addr, oINC(byteAt(addr)));\n break;\n\n case 0x6D: //TST indexed\n addr = PostByte();\n pb = byteAt(addr);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[pb];\n break;\n\n case 0x6E: //JMP indexed\n addr = PostByte();\n PC = addr;\n break;\n case 0x6F: //CLR indexed\n addr = PostByte();\n byteTo(addr,0);\n CC&=~(F_CARRY|F_NEGATIVE|F_OVERFLOW);\n CC |= F_ZERO;\n break;\n\n\n case 0x70: //NEG extended\n addr = fetch16();\n byteTo(addr, oNEG(byteAt(addr)));\n break;\n case 0x73: //COM extended\n addr = fetch16();\n byteTo(addr, oCOM(byteAt(addr)));\n break;\n case 0x74: //LSR extended\n addr = fetch16();\n byteTo(addr, oLSR(byteAt(addr)));\n break;\n case 0x76: //ROR extended\n addr = fetch16();\n byteTo(addr, oROR(byteAt(addr)));\n break;\n case 0x77: //ASR extended\n addr = fetch16();\n byteTo(addr, oASR(byteAt(addr)));\n break;\n case 0x78: //ASL extended\n addr = fetch16();\n byteTo(addr, oASL(byteAt(addr)));\n break;\n case 0x79: //ROL extended\n addr = fetch16();\n byteTo(addr, oROL(byteAt(addr)));\n break;\n\n case 0x7A: //DEC extended\n addr = fetch16();\n byteTo(addr, oDEC(byteAt(addr)));\n break;\n case 0x7C: //INC extended\n addr = fetch16();\n byteTo(addr, oINC(byteAt(addr)));\n break;\n\n case 0x7D: //TST extended\n addr = fetch16();\n pb = byteAt(addr);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[pb];\n break;\n\n case 0x7E: //JMP extended\n addr = fetch16();\n PC = addr;\n break;\n case 0x7F: //CLR extended\n addr = fetch16();\n byteTo(addr,0);\n CC&=~(F_CARRY|F_NEGATIVE|F_OVERFLOW);\n CC |= F_ZERO;\n break;\n\n // regs A,X\n\n case 0x80: //SUBA imm\n rA = oSUB(rA, fetch());\n break;\n case 0x81: //CMPA imm\n oCMP(rA, fetch());\n break;\n case 0x82: //SBCA imm\n rA = oSBC(rA, fetch());\n break;\n case 0x83: //SUBD imm\n setD(oSUB16(getD(),fetch16()));\n break;\n case 0x84: //ANDA imm\n rA = oAND(rA, fetch());\n break;\n case 0x85: //BITA imm\n oAND(rA, fetch());\n break;\n case 0x86: //LDA imm\n rA = fetch();\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rA];\n break;\n case 0x88: //EORA imm\n rA = oEOR(rA, fetch());\n break;\n case 0x89: //ADCA imm\n rA = oADC(rA, fetch());\n break;\n case 0x8A: //ORA imm\n rA = oOR(rA, fetch());\n break;\n case 0x8B: //ADDA imm\n rA = oADD(rA, fetch());\n break;\n case 0x8C: //CMPX imm\n oCMP16(rX, fetch16());\n break;\n\n case 0x8D: //JSR imm\n addr = signed(fetch());\n PUSHW(PC);\n PC+=addr;\n break;\n case 0x8E: //LDX imm\n rX = fetch16();\n flagsNZ16(rX);\n CC&=~F_OVERFLOW;\n break;\n\n\n case 0x90: //SUBA direct\n addr = dpadd();\n rA = oSUB(rA, byteAt(addr));\n break;\n case 0x91: //CMPA direct\n addr = dpadd();\n oCMP(rA, byteAt(addr));\n break;\n case 0x92: //SBCA direct\n addr = dpadd();\n rA = oSBC(rA, byteAt(addr));\n break;\n case 0x93: //SUBD direct\n addr = dpadd();\n setD(oSUB16(getD(),ReadWord(addr)));\n break;\n case 0x94: //ANDA direct\n addr = dpadd();\n rA = oAND(rA, byteAt(addr));\n break;\n case 0x95: //BITA direct\n addr = dpadd();\n oAND(rA, byteAt(addr));\n break;\n case 0x96: //LDA direct\n addr = dpadd();\n rA = byteAt(addr);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rA];\n break;\n case 0x97: //STA direct\n addr = dpadd();\n byteTo(addr,rA);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rA];\n break;\n case 0x98: //EORA direct\n addr = dpadd();\n rA = oEOR(rA, byteAt(addr));\n break;\n case 0x99: //ADCA direct\n addr = dpadd();\n rA = oADC(rA, byteAt(addr));\n break;\n case 0x9A: //ORA direct\n addr = dpadd();\n rA = oOR(rA, byteAt(addr));\n break;\n case 0x9B: //ADDA direct\n addr = dpadd();\n rA = oADD(rA, byteAt(addr));\n break;\n case 0x9C: //CMPX direct\n addr = dpadd();\n oCMP16(rX, ReadWord(addr));\n break;\n\n case 0x9D: //JSR direct\n addr = dpadd();\n PUSHW(PC);\n PC=addr;\n break;\n case 0x9E: //LDX direct\n addr = dpadd();\n rX = ReadWord(addr);\n flagsNZ16(rX);\n CC&=~F_OVERFLOW;\n break;\n case 0x9F: //STX direct\n addr = dpadd();\n WriteWord(addr,rX);\n flagsNZ16(rX);\n CC&=~F_OVERFLOW;\n break;\n case 0xA0: //SUBA indexed\n addr = PostByte();\n rA = oSUB(rA, byteAt(addr));\n break;\n case 0xA1: //CMPA indexed\n addr = PostByte();\n oCMP(rA, byteAt(addr));\n break;\n case 0xA2: //SBCA indexed\n addr = PostByte();\n rA = oSBC(rA, byteAt(addr));\n break;\n case 0xA3: //SUBD indexed\n addr = PostByte();\n setD(oSUB16(getD(),ReadWord(addr)));\n break;\n case 0xA4: //ANDA indexed\n addr = PostByte();\n rA = oAND(rA, byteAt(addr));\n break;\n case 0xA5: //BITA indexed\n addr = PostByte();\n oAND(rA, byteAt(addr));\n break;\n case 0xA6: //LDA indexed\n addr = PostByte();\n rA = byteAt(addr);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rA];\n break;\n case 0xA7: //STA indexed\n addr = PostByte();\n byteTo(addr,rA);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rA];\n break;\n case 0xA8: //EORA indexed\n addr = PostByte();\n rA = oEOR(rA, byteAt(addr));\n break;\n case 0xA9: //ADCA indexed\n addr = PostByte();\n rA = oADC(rA, byteAt(addr));\n break;\n case 0xAA: //ORA indexed\n addr = PostByte();\n rA = oOR(rA, byteAt(addr));\n break;\n case 0xAB: //ADDA indexed\n addr = PostByte();\n rA = oADD(rA, byteAt(addr));\n break;\n case 0xAC: //CMPX indexed\n addr = PostByte();\n oCMP16(rX, ReadWord(addr));\n break;\n\n case 0xAD: //JSR indexed\n addr = PostByte();\n PUSHW(PC);\n PC=addr;\n break;\n case 0xAE: //LDX indexed\n addr = PostByte();\n rX = ReadWord(addr);\n flagsNZ16(rX);\n CC&=~F_OVERFLOW;\n break;\n case 0xAF: //STX indexed\n addr = PostByte();\n WriteWord(addr,rX);\n flagsNZ16(rX);\n CC&=~F_OVERFLOW;\n break;\n\n\n case 0xB0: //SUBA extended\n addr = fetch16();\n rA = oSUB(rA, byteAt(addr));\n break;\n case 0xB1: //CMPA extended\n addr = fetch16();\n oCMP(rA, byteAt(addr));\n break;\n case 0xB2: //SBCA extended\n addr = fetch16();\n rA = oSBC(rA, byteAt(addr));\n break;\n case 0xB3: //SUBD extended\n addr = fetch16();\n setD(oSUB16(getD(),ReadWord(addr)));\n break;\n case 0xB4: //ANDA extended\n addr = fetch16();\n rA = oAND(rA, byteAt(addr));\n break;\n case 0xB5: //BITA extended\n addr = fetch16();\n oAND(rA, byteAt(addr));\n break;\n case 0xB6: //LDA extended\n addr = fetch16();\n rA = byteAt(addr);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rA];\n break;\n case 0xB7: //STA extended\n addr = fetch16();\n byteTo(addr,rA);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rA];\n break;\n case 0xB8: //EORA extended\n addr = fetch16();\n rA = oEOR(rA, byteAt(addr));\n break;\n case 0xB9: //ADCA extended\n addr = fetch16();\n rA = oADC(rA, byteAt(addr));\n break;\n case 0xBA: //ORA extended\n addr = fetch16();\n rA = oOR(rA, byteAt(addr));\n break;\n case 0xBB: //ADDA extended\n addr = fetch16();\n rA = oADD(rA, byteAt(addr));\n break;\n case 0xBC: //CMPX extended\n addr = fetch16();\n oCMP16(rX, ReadWord(addr));\n break;\n\n case 0xBD: //JSR extended\n addr = fetch16();\n PUSHW(PC);\n PC=addr;\n break;\n case 0xBE: //LDX extended\n addr = fetch16();\n rX = ReadWord(addr);\n flagsNZ16(rX);\n CC&=~F_OVERFLOW;\n break;\n case 0xBF: //STX extended\n addr = fetch16();\n WriteWord(addr,rX);\n flagsNZ16(rX);\n CC&=~F_OVERFLOW;\n break;\n\n //Regs B, Y\n\n case 0xC0: //SUBB imm\n rB = oSUB(rB, fetch());\n break;\n case 0xC1: //CMPB imm\n oCMP(rB, fetch());\n break;\n case 0xC2: //SBCB imm\n rB = oSBC(rB, fetch());\n break;\n case 0xC3: //ADDD imm\n setD(oADD16(getD(),fetch16()));\n break;\n case 0xC4: //ANDB imm\n rB = oAND(rB, fetch());\n break;\n case 0xC5: //BITB imm\n oAND(rB, fetch());\n break;\n case 0xC6: //LDB imm\n rB = fetch();\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rB];\n break;\n case 0xC8: //EORB imm\n rB = oEOR(rB, fetch());\n break;\n case 0xC9: //ADCB imm\n rB = oADC(rB, fetch());\n break;\n case 0xCA: //ORB imm\n rB = oOR(rB, fetch());\n break;\n case 0xCB: //ADDB imm\n rB = oADD(rB, fetch());\n break;\n case 0xCC: //LDD imm\n addr = fetch16();\n setD(addr);\n flagsNZ16(addr);\n CC&=~F_OVERFLOW;\n break;\n\n case 0xCE: //LDU imm\n rU = fetch16();\n flagsNZ16(rU);\n CC&=~F_OVERFLOW;\n break;\n\n\n case 0xD0: //SUBB direct\n addr = dpadd();\n rB = oSUB(rB, byteAt(addr));\n break;\n case 0xD1: //CMPB direct\n addr = dpadd();\n oCMP(rB, byteAt(addr));\n break;\n case 0xD2: //SBCB direct\n addr = dpadd();\n rB = oSBC(rB, byteAt(addr));\n break;\n case 0xD3: //ADDD direct\n addr = dpadd();\n setD(oADD16(getD(),ReadWord(addr)));\n break;\n case 0xD4: //ANDB direct\n addr = dpadd();\n rB = oAND(rB, byteAt(addr));\n break;\n case 0xD5: //BITB direct\n addr = dpadd();\n oAND(rB, byteAt(addr));\n break;\n case 0xD6: //LDB direct\n addr = dpadd();\n rB = byteAt(addr);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rB];\n break;\n case 0xD7: //STB direct\n addr = dpadd();\n byteTo(addr,rB);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rB];\n break;\n case 0xD8: //EORB direct\n addr = dpadd();\n rB = oEOR(rB, byteAt(addr));\n break;\n case 0xD9: //ADCB direct\n addr = dpadd();\n rB = oADC(rB, byteAt(addr));\n break;\n case 0xDA: //ORB direct\n addr = dpadd();\n rB = oOR(rB, byteAt(addr));\n break;\n case 0xDB: //ADDB direct\n addr = dpadd();\n rB = oADD(rB, byteAt(addr));\n break;\n case 0xDC: //LDD direct\n addr = dpadd();\n pb = ReadWord(addr);\n setD(pb);\n flagsNZ16(pb);\n CC&=~F_OVERFLOW;\n break;\n\n case 0xDD: //STD direct\n addr = dpadd();\n WriteWord(addr, getD());\n CC&=~F_OVERFLOW;\n break;\n case 0xDE: //LDU direct\n addr = dpadd();\n rU = ReadWord(addr);\n flagsNZ16(rU);\n CC&=~F_OVERFLOW;\n break;\n case 0xDF: //STU direct\n addr = dpadd();\n WriteWord(addr,rU);\n flagsNZ16(rU);\n CC&=~F_OVERFLOW;\n break;\n case 0xE0: //SUBB indexed\n addr = PostByte();\n rB = oSUB(rB, byteAt(addr));\n break;\n case 0xE1: //CMPB indexed\n addr = PostByte();\n oCMP(rB, byteAt(addr));\n break;\n case 0xE2: //SBCB indexed\n addr = PostByte();\n rB = oSBC(rB, byteAt(addr));\n break;\n case 0xE3: //ADDD indexed\n addr = PostByte();\n setD(oADD16(getD(),ReadWord(addr)));\n break;\n case 0xE4: //ANDB indexed\n addr = PostByte();\n rB = oAND(rB, byteAt(addr));\n break;\n case 0xE5: //BITB indexed\n addr = PostByte();\n oAND(rB, byteAt(addr));\n break;\n case 0xE6: //LDB indexed\n addr = PostByte();\n rB = byteAt(addr);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rB];\n break;\n case 0xE7: //STB indexed\n addr = PostByte();\n byteTo(addr,rB);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rB];\n break;\n case 0xE8: //EORB indexed\n addr = PostByte();\n rB = oEOR(rB, byteAt(addr));\n break;\n case 0xE9: //ADCB indexed\n addr = PostByte();\n rB = oADC(rB, byteAt(addr));\n break;\n case 0xEA: //ORB indexed\n addr = PostByte();\n rB = oOR(rB, byteAt(addr));\n break;\n case 0xEB: //ADDB indexed\n addr = PostByte();\n rB = oADD(rB, byteAt(addr));\n break;\n case 0xEC: //LDD indexed\n addr = PostByte();\n pb = ReadWord(addr);\n setD(pb);\n flagsNZ16(pb);\n CC&=~F_OVERFLOW;\n break;\n\n case 0xED: //STD indexed\n addr = PostByte();\n WriteWord(addr, getD());\n CC&=~F_OVERFLOW;\n break;\n case 0xEE: //LDU indexed\n addr = PostByte();\n rU = ReadWord(addr);\n flagsNZ16(rU);\n CC&=~F_OVERFLOW;\n break;\n case 0xEF: //STU indexed\n addr = PostByte();\n WriteWord(addr,rU);\n flagsNZ16(rU);\n CC&=~F_OVERFLOW;\n break;\n\n\n case 0xF0: //SUBB extended\n addr = fetch16();\n rB = oSUB(rB, byteAt(addr));\n break;\n case 0xF1: //CMPB extended\n addr = fetch16();\n oCMP(rB, byteAt(addr));\n break;\n case 0xF2: //SBCB extended\n addr = fetch16();\n rB = oSBC(rB, byteAt(addr));\n break;\n case 0xF3: //ADDD extended\n addr = fetch16();\n setD(oADD16(getD(),ReadWord(addr)));\n break;\n case 0xF4: //ANDB extended\n addr = fetch16();\n rB = oAND(rB, byteAt(addr));\n break;\n case 0xF5: //BITB extended\n addr = fetch16();\n oAND(rB, byteAt(addr));\n break;\n case 0xF6: //LDB extended\n addr = fetch16();\n rB = byteAt(addr);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rB];\n break;\n case 0xF7: //STB extended\n addr = fetch16();\n byteTo(addr,rB);\n CC&=~(F_ZERO|F_NEGATIVE|F_OVERFLOW);\n CC |= flagsNZ[rB];\n break;\n case 0xF8: //EORB extended\n addr = fetch16();\n rB = oEOR(rB, byteAt(addr));\n break;\n case 0xF9: //ADCB extended\n addr = fetch16();\n rB = oADC(rB, byteAt(addr));\n break;\n case 0xFA: //ORB extended\n addr = fetch16();\n rB = oOR(rB, byteAt(addr));\n break;\n case 0xFB: //ADDB extended\n addr = fetch16();\n rB = oADD(rB, byteAt(addr));\n break;\n case 0xFC: //LDD extended\n addr = fetch16();\n pb = ReadWord(addr);\n setD(pb);\n flagsNZ16(pb);\n CC&=~F_OVERFLOW;\n break;\n\n case 0xFD: //STD extended\n addr = fetch16();\n WriteWord(addr, getD());\n CC&=~F_OVERFLOW;\n break;\n case 0xFE: //LDU extended\n addr = fetch16();\n rU = ReadWord(addr);\n flagsNZ16(rU);\n CC&=~F_OVERFLOW;\n break;\n case 0xFF: //STU extended\n addr = fetch16();\n WriteWord(addr,rU);\n flagsNZ16(rU);\n CC&=~F_OVERFLOW;\n break;\n\n // page 1\n case 0x10: //page 1\n {\n opcode = fetch();\n T+=cycles2[opcode];\n switch(opcode) {\n case 0x21: //BRN\n addr = signed16(fetch16());\n break;\n case 0x22: //BHI\n addr = signed16(fetch16());\n if (!(CC&(F_CARRY | F_ZERO))) PC += addr;\n break;\n case 0x23: //BLS\n addr = signed16(fetch16());\n if (CC&(F_CARRY | F_ZERO)) PC += addr;\n break;\n case 0x24: //BCC\n addr = signed16(fetch16());\n if (!(CC&F_CARRY)) PC += addr;\n break;\n case 0x25: //BCS\n addr = signed16(fetch16());\n if (CC&F_CARRY) PC += addr;\n break;\n case 0x26: //BNE\n addr = signed16(fetch16());\n if (!(CC&F_ZERO)) PC += addr;\n break;\n case 0x27: //BEQ\n addr = signed16(fetch16());\n if (CC&F_ZERO) PC += addr;\n break;\n case 0x28: //BVC\n addr = signed16(fetch16());\n if (!(CC&F_OVERFLOW)) PC += addr;\n break;\n case 0x29: //BVS\n addr = signed16(fetch16());\n if (CC&F_OVERFLOW) PC += addr;\n break;\n case 0x2A: //BPL\n addr = signed16(fetch16());\n if (!(CC&F_NEGATIVE)) PC += addr;\n break;\n case 0x2B: //BMI\n addr = signed16(fetch16());\n if (CC&F_NEGATIVE) PC += addr;\n break;\n case 0x2C: //BGE\n addr = signed16(fetch16());\n if (!((CC&F_NEGATIVE) ^ ((CC&F_OVERFLOW)<<2))) PC += addr;\n break;\n case 0x2D: //BLT\n addr = signed16(fetch16());\n if ((CC&F_NEGATIVE) ^ ((CC&F_OVERFLOW)<<2)) PC += addr;\n break;\n case 0x2E: //BGT\n addr = signed16(fetch16());\n if (!((CC&F_NEGATIVE) ^ ((CC&F_OVERFLOW)<<2) || (CC&F_ZERO))) PC += addr;\n break;\n case 0x2F: //BLE\n addr = signed16(fetch16());\n if ((CC&F_NEGATIVE) ^ ((CC&F_OVERFLOW)<<2) || (CC&F_ZERO)) PC += addr;\n break;\n case 0x3f: //SWI2\n CC |= F_ENTIRE;\n PUSHW(PC);\n PUSHW(rU);\n PUSHW(rY);\n PUSHW(rX);\n PUSHB(DP);\n PUSHB(rB);\n PUSHB(rA);\n PUSHB(CC);\n CC |= F_IRQMASK | F_FIRQMASK;\n PC = ReadWord(vecSWI2);\n break;\n case 0x83: //CMPD imm\n oCMP16(getD(),fetch16());\n break;\n case 0x8C: //CMPY imm\n oCMP16(rY,fetch16());\n break;\n case 0x8E: //LDY imm\n rY = fetch16();\n flagsNZ16(rY);\n CC&=~F_OVERFLOW;\n break;\n case 0x93: //CMPD direct\n addr = dpadd();\n oCMP16(getD(),ReadWord(addr));\n break;\n case 0x9C: //CMPY direct\n addr = dpadd();\n oCMP16(rY,ReadWord(addr));\n break;\n case 0x9E: //LDY direct\n addr = dpadd();\n rY = ReadWord(addr);\n flagsNZ16(rY);\n CC&=~F_OVERFLOW;\n break;\n case 0x9F: //STY direct\n addr = dpadd();\n WriteWord(addr,rY);\n flagsNZ16(rY);\n CC&=~F_OVERFLOW;\n break;\n case 0xA3: //CMPD indexed\n addr = PostByte();\n oCMP16(getD(),ReadWord(addr));\n break;\n case 0xAC: //CMPY indexed\n addr = PostByte();\n oCMP16(rY,ReadWord(addr));\n break;\n case 0xAE: //LDY indexed\n addr = PostByte();\n rY = ReadWord(addr);\n flagsNZ16(rY);\n CC&=~F_OVERFLOW;\n break;\n case 0xAF: //STY indexed\n addr = PostByte();\n WriteWord(addr,rY);\n flagsNZ16(rY);\n CC&=~F_OVERFLOW;\n break;\n case 0xB3: //CMPD extended\n addr = fetch16();\n oCMP16(getD(),ReadWord(addr));\n break;\n case 0xBC: //CMPY extended\n addr = fetch16();\n oCMP16(rY,ReadWord(addr));\n break;\n case 0xBE: //LDY extended\n addr = fetch16();\n rY = ReadWord(addr);\n flagsNZ16(rY);\n CC&=~F_OVERFLOW;\n break;\n case 0xBF: //STY extended\n addr = fetch16();\n WriteWord(addr,rY);\n flagsNZ16(rY);\n CC&=~F_OVERFLOW;\n break;\n case 0xCE: //LDS imm\n rS = fetch16();\n flagsNZ16(rS);\n CC&=~F_OVERFLOW;\n break;\n case 0xDE: //LDS direct\n addr = dpadd();\n rS = ReadWord(addr);\n flagsNZ16(rS);\n CC&=~F_OVERFLOW;\n break;\n case 0xDF: //STS direct\n addr = dpadd();\n WriteWord(addr,rS);\n flagsNZ16(rS);\n CC&=~F_OVERFLOW;\n break;\n case 0xEE: //LDS indexed\n addr = PostByte();\n rS = ReadWord(addr);\n flagsNZ16(rS);\n CC&=~F_OVERFLOW;\n break;\n case 0xEF: //STS indexed\n addr = PostByte();\n WriteWord(addr,rS);\n flagsNZ16(rS);\n CC&=~F_OVERFLOW;\n break;\n case 0xFE: //LDS extended\n addr = fetch16();\n rS = ReadWord(addr);\n flagsNZ16(rS);\n CC&=~F_OVERFLOW;\n break;\n case 0xFF: //STS extended\n addr = fetch16();\n WriteWord(addr,rS);\n flagsNZ16(rS);\n CC&=~F_OVERFLOW;\n break;\n }\n }\n break;\n // page 2\n case 0x11: //page 2\n {\n opcode = fetch();\n T+=cycles2[opcode];\n switch(opcode) {\n case 0x3f: //SWI3\n CC |= F_ENTIRE;\n PUSHW(PC);\n PUSHW(rU);\n PUSHW(rY);\n PUSHW(rX);\n PUSHB(DP);\n PUSHB(rB);\n PUSHB(rA);\n PUSHB(CC);\n CC |= F_IRQMASK | F_FIRQMASK;\n PC = ReadWord(vecSWI3);\n break;\n case 0x83: //CMPU imm\n oCMP16(rU, fetch16());\n break;\n case 0x8C: //CMPS imm\n oCMP16(rS, fetch16());\n break;\n case 0x93: //CMPU imm\n addr = dpadd();\n oCMP16(rU, ReadWord(addr));\n break;\n case 0x9C: //CMPS imm\n addr = dpadd();\n oCMP16(rS, ReadWord(addr));\n break;\n case 0xA3: //CMPU imm\n addr = PostByte();\n oCMP16(rU, ReadWord(addr));\n break;\n case 0xAC: //CMPS imm\n addr = PostByte();\n oCMP16(rS, ReadWord(addr));\n break;\n case 0xB3: //CMPU imm\n addr = fetch16();\n oCMP16(rU, ReadWord(addr));\n break;\n case 0xBC: //CMPS imm\n addr = fetch16();\n oCMP16(rS, ReadWord(addr));\n break;\n\n }\n }\n break;\n\n\n }\n\n rA &= 0xff;\n rB &= 0xff;\n CC &= 0xff;\n DP &= 0xff;\n rX &= 0xffff;\n rY &= 0xffff;\n rU &= 0xffff;\n rS &= 0xffff;\n PC &= 0xffff;\n return T-oldT;\n\n};\n\nvar reset = function(){\n PC = ReadWord(vecRESET);\n DP = 0;\n CC |= F_FIRQMASK | F_IRQMASK;\n T=0;\n rA=rB=DP=rX=rY=rU=rS=0;\n};\n\n//---------- Disassembler\n\n/*\nILLEGAL 0\nDIRECT 1\nINHERENT 2\nBRANCH_REL_16 3\nIMMEDIAT_8 4\nBRANCH_REL_8 5\nINDEXED 6\nEXTENDED 7\nIMMEDIAT_16 8\n\nPSHS 10\nPSHU 11\n\nEXG, TFR 20\n*/\nvar ds = [\n[2, 1,\"NEG\"],\n[1, 0,\"???\"],\n[1, 0,\"???\"],\n[2, 1,\"COM\"],\n[2, 1,\"LSR\"],\n[1, 0,\"???\"],\n[2, 1,\"ROR\"],\n[2, 1,\"ASR\"],\n[2, 1,\"LSL\"],\n[2, 1,\"ROL\"],\n[2, 1,\"DEC\"],\n[1, 0,\"???\"],\n[2, 1,\"INC\"],\n[2, 1,\"TST\"],\n[2, 1,\"JMP\"],\n[2, 1,\"CLR\"],\n[1, 0,\"Prefix\"],\n[1, 0,\"Prefix\"],\n[1, 2,\"NOP\"],\n[1, 2,\"SYNC\"],\n[1, 0,\"???\"],\n[1, 0,\"???\"],\n[3, 3,\"LBRA\"],\n[3, 3,\"LBSR\"],\n[1, 0,\"???\"],\n[1, 2,\"DAA\"],\n[2, 4,\"ORCC\"],\n[1, 0,\"???\"],\n[2, 4,\"ANDCC\"],\n[1, 2,\"SEX\"],\n[2, 20,\"EXG\"],\n[2, 20,\"TFR\"],\n[2, 5,\"BRA\"],\n[2, 5,\"BRN\"],\n[2, 5,\"BHI\"],\n[2, 5,\"BLS\"],\n[2, 5,\"BCC\"],\n[2, 5,\"BCS\"],\n[2, 5,\"BNE\"],\n[2, 5,\"BEQ\"],\n[2, 5,\"BVC\"],\n[2, 5,\"BVS\"],\n[2, 5,\"BPL\"],\n[2, 5,\"BMI\"],\n[2, 5,\"BGE\"],\n[2, 5,\"BLT\"],\n[2, 5,\"BGT\"],\n[2, 5,\"BLE\"],\n[2, 6,\"LEAX\"],\n[2, 6,\"LEAY\"],\n[2, 6,\"LEAS\"],\n[2, 6,\"LEAU\"],\n[2, 10,\"PSHS\"],\n[2, 10,\"PULS\"],\n[2, 11,\"PSHU\"],\n[2, 11,\"PULU\"],\n[1, 0,\"???\"],\n[1, 2,\"RTS\"],\n[1, 2,\"ABX\"],\n[1, 2,\"RTI\"],\n[2, 2,\"CWAI\"],\n[1, 2,\"MUL\"],\n[1, 2,\"RESET\"],\n[1, 2,\"SWI1\"],\n[1, 2,\"NEGA\"],\n[1, 0,\"???\"],\n[1, 0,\"???\"],\n[1, 2,\"COMA\"],\n[1, 2,\"LSRA\"],\n[1, 0,\"???\"],\n[1, 2,\"RORA\"],\n[1, 2,\"ASRA\"],\n[1, 2,\"ASLA\"],\n[1, 2,\"ROLA\"],\n[1, 2,\"DECA\"],\n[1, 0,\"???\"],\n[1, 2,\"INCA\"],\n[1, 2,\"TSTA\"],\n[1, 0,\"???\"],\n[1, 2,\"CLRA\"],\n[1, 2,\"NEGB\"],\n[1, 0,\"???\"],\n[1, 0,\"???\"],\n[1, 2,\"COMB\"],\n[1, 2,\"LSRB\"],\n[1, 0,\"???\"],\n[1, 2,\"RORB\"],\n[1, 2,\"ASRB\"],\n[1, 2,\"ASLB\"],\n[1, 2,\"ROLB\"],\n[1, 2,\"DECB\"],\n[1, 0,\"???\"],\n[1, 2,\"INCB\"],\n[1, 2,\"TSTB\"],\n[1, 0,\"???\"],\n[1, 2,\"CLRB\"],\n[2, 6,\"NEG\"],\n[1, 0,\"???\"],\n[1, 0,\"???\"],\n[2, 6,\"COM\"],\n[2, 6,\"LSR\"],\n[1, 0,\"???\"],\n[2, 6,\"ROR\"],\n[2, 6,\"ASR\"],\n[2, 6,\"LSL\"],\n[2, 6,\"ROL\"],\n[2, 6,\"DEC\"],\n[1, 0,\"???\"],\n[2, 6,\"INC\"],\n[2, 6,\"TST\"],\n[2, 6,\"JMP\"],\n[2, 6,\"CLR\"],\n[3, 7,\"NEG\"],\n[1, 0,\"???\"],\n[1, 0,\"???\"],\n[3, 7,\"COM\"],\n[3, 7,\"LSR\"],\n[1, 0,\"???\"],\n[3, 7,\"ROR\"],\n[3, 7,\"ASR\"],\n[3, 7,\"LSL\"],\n[3, 7,\"ROL\"],\n[3, 7,\"DEC\"],\n[1, 0,\"???\"],\n[3, 7,\"INC\"],\n[3, 7,\"TST\"],\n[3, 7,\"JMP\"],\n[3, 7,\"CLR\"],\n[2, 4,\"SUBA\"],\n[2, 4,\"CMPA\"],\n[2, 4,\"SBCA\"],\n[3, 8,\"SUBD\"],\n[2, 4,\"ANDA\"],\n[2, 4,\"BITA\"],\n[2, 4,\"LDA\"],\n[1, 0,\"???\"],\n[2, 4,\"EORA\"],\n[2, 4,\"ADCA\"],\n[2, 4,\"ORA\"],\n[2, 4,\"ADDA\"],\n[3, 8,\"CMPX\"],\n[2, 5,\"BSR\"],\n[3, 8,\"LDX\"],\n[1, 0,\"???\"],\n[2, 1,\"SUBA\"],\n[2, 1,\"CMPA\"],\n[2, 1,\"SBCA\"],\n[2, 1,\"SUBd\"],\n[2, 1,\"ANDA\"],\n[2, 1,\"BITA\"],\n[2, 1,\"LDA\"],\n[2, 1,\"STA\"],\n[2, 1,\"EORA\"],\n[2, 1,\"ADCA\"],\n[2, 1,\"ORA\"],\n[2, 1,\"ADDA\"],\n[2, 1,\"CMPX\"],\n[2, 1,\"JSR\"],\n[2, 1,\"LDX\"],\n[2, 1,\"STX\"],\n[2, 6,\"SUBA\"],\n[2, 6,\"CMPA\"],\n[2, 6,\"SBCA\"],\n[2, 6,\"SUBD\"],\n[2, 6,\"ANDA\"],\n[2, 6,\"BITA\"],\n[2, 6,\"LDA\"],\n[2, 6,\"STA\"],\n[2, 6,\"EORA\"],\n[2, 6,\"ADCA\"],\n[2, 6,\"ORA\"],\n[2, 6,\"ADDA\"],\n[2, 6,\"CMPX\"],\n[2, 6,\"JSR\"],\n[2, 6,\"LDX\"],\n[2, 6,\"STX\"],\n[3, 7,\"SUBA\"],\n[3, 7,\"CMPA\"],\n[3, 7,\"SBCA\"],\n[3, 7,\"SUBD\"],\n[3, 7,\"ANDA\"],\n[3, 7,\"BITA\"],\n[3, 7,\"LDA\"],\n[3, 7,\"STA\"],\n[3, 7,\"EORA\"],\n[3, 7,\"ADCA\"],\n[3, 7,\"ORA\"],\n[3, 7,\"ADDA\"],\n[3, 7,\"CMPX\"],\n[3, 7,\"JSR\"],\n[3, 7,\"LDX\"],\n[3, 7,\"STX\"],\n[2, 4,\"SUBB\"],\n[2, 4,\"CMPB\"],\n[2, 4,\"SBCB\"],\n[3, 8,\"ADDD\"],\n[2, 4,\"ANDB\"],\n[2, 4,\"BITB\"],\n[2, 4,\"LDB\"],\n[1, 0,\"???\"],\n[2, 4,\"EORB\"],\n[2, 4,\"ADCB\"],\n[2, 4,\"ORB\"],\n[2, 4,\"ADDB\"],\n[3, 8,\"LDD\"],\n[1, 0,\"???\"],\n[3, 8,\"LDU\"],\n[1, 0,\"???\"],\n[2, 1,\"SUBB\"],\n[2, 1,\"CMPB\"],\n[2, 1,\"SBCB\"],\n[2, 1,\"ADDD\"],\n[2, 1,\"ANDB\"],\n[2, 1,\"BITB\"],\n[2, 1,\"LDB\"],\n[2, 1,\"STB\"],\n[2, 1,\"EORB\"],\n[2, 1,\"ADCB\"],\n[2, 1,\"ORB \"],\n[2, 1,\"ADDB\"],\n[2, 1,\"LDD \"],\n[2, 1,\"STD \"],\n[2, 1,\"LDU \"],\n[2, 1,\"STU \"],\n[2, 6,\"SUBB\"],\n[2, 6,\"CMPB\"],\n[2, 6,\"SBCB\"],\n[2, 6,\"ADDD\"],\n[2, 6,\"ANDB\"],\n[2, 6,\"BITB\"],\n[2, 6,\"LDB\"],\n[2, 6,\"STB\"],\n[2, 6,\"EORB\"],\n[2, 6,\"ADCB\"],\n[2, 6,\"ORB\"],\n[2, 6,\"ADDB\"],\n[2, 6,\"LDD\"],\n[2, 6,\"STD\"],\n[2, 6,\"LDU\"],\n[2, 6,\"STU\"],\n[3, 7,\"SUBB\"],\n[3, 7,\"CMPB\"],\n[3, 7,\"SBCB\"],\n[3, 7,\"ADDD\"],\n[3, 7,\"ANDB\"],\n[3, 7,\"BITB\"],\n[3, 7,\"LDB\"],\n[3, 7,\"STB\"],\n[3, 7,\"EORB\"],\n[3, 7,\"ADCB\"],\n[3, 7,\"ORB\"],\n[3, 7,\"ADDB\"],\n[3, 7,\"LDD\"],\n[3, 7,\"STD\"],\n[3, 7,\"LDU\"],\n[3, 7,\"STU\"]\n];\n\nvar ds11 = {\n0x3F: [2,2,\"SWI3\"],\n0x83: [4,8,\"CMPU\"],\n0x8C: [4,8,\"CMPS\"],\n0x93: [3,1,\"CMPU\"],\n0x9C: [3,1,\"CMPS\"],\n0xA3: [3,6,\"CMPU\"],\n0xAC: [3,6,\"CMPS\"],\n0xB3: [4,7,\"CMPU\"],\n0xBC: [4,7,\"CMPS\"]\n};\n\nvar ds10 = {\n0x21:[5,3,\"LBRN\"],\n0x22:[5,3,\"LBHI\"],\n0x23:[5,3,\"LBLS\"],\n0x24:[5,3,\"LBCC\"],\n0x25:[5,3,\"LBCS\"],\n0x26:[5,3,\"LBNE\"],\n0x27:[5,3,\"LBEQ\"],\n0x28:[5,3,\"LBVC\"],\n0x29:[5,3,\"LBVS\"],\n0x2a:[5,3,\"LBPL\"],\n0x2b:[5,3,\"LBMI\"],\n0x2c:[5,3,\"LBGE\"],\n0x2d:[5,3,\"LBLT\"],\n0x2e:[5,3,\"LBGT\"],\n0x2f:[5,3,\"LBLE\"],\n0x3F:[2,2,\"SWI2\"],\n0x83:[4,8,\"CMPD\"],\n0x8C:[4,8,\"CMPY\"],\n0x8E:[4,8,\"LDY\"],\n0x93:[3,1,\"CMPD\"],\n0x9C:[3,1,\"CMPY\"],\n0x9E:[3,1,\"LDY\"],\n0x9F:[3,1,\"STY\"],\n0xA3:[3,6,\"CMPD\"],\n0xAC:[3,6,\"CMPY\"],\n0xAE:[3,6,\"LDY\"],\n0xAF:[3,6,\"STY\"],\n0xB3:[4,7,\"CMPD\"],\n0xBC:[4,7,\"CMPY\"],\n0xBE:[4,7,\"LDY\"],\n0xBF:[4,7,\"STY\"],\n0xCE:[4,8,\"LDS\"],\n0xDE:[3,1,\"LDS\"],\n0xDF:[3,1,\"STS\"],\n0xEE:[3,6,\"LDS\"],\n0xEF:[3,6,\"STS\"],\n0xFE:[4,7,\"LDS\"],\n0xFF:[4,7,\"STS\"]\n};\n/*\nILLEGAL 0\nDIRECT 1\nINHERENT 2\nBRANCH_REL_16 3\nIMMEDIAT_8 4\nBRANCH_REL_8 5\nINDEXED 6\nEXTENDED 7\nIMMEDIAT_16 8\n*/\n\nvar disasm = function(i,a,b,c,d,pc) {\n var toHexN = function(n,d) {\n var s = n.toString(16);\n while (s.length >5];\n if (!(pb & 0x80)) {\n //direct5\n var disp = pb & 0x1f;\n if (disp>15) disp = disp-32;\n mnemo+=disp+','+ixr;\n break;\n }\n var ind = pb & 0x10;\n var mod = pb & 0x0f;\n var ofs8 = (b>127)?(b-256):b;\n var ofs16 = ((b*256+c)>32767)?((b*256+c)-65536):(b*256+c);\n if (!ind) {\n switch (mod) {\n case 0: mnemo += \",\"+ixr+'+'; break;\n case 1: mnemo += \",\"+ixr+'++'; break;\n case 2: mnemo += \",-\"+ixr; break;\n case 3: mnemo += \",--\"+ixr; break;\n case 4: mnemo += \",\"+ixr; break;\n case 5: mnemo += \"B,\"+ixr; break;\n case 6: mnemo += \"A,\"+ixr; break;\n case 7: mnemo += \"???\"; break;\n case 8: mnemo += ofs8+\",\"+ixr; bytes++; break;\n case 9: mnemo += ofs16+\",\"+ixr; bytes+=2; break;\n case 10: mnemo += \"???\"; break;\n case 11: mnemo += \"D,\"+ixr; break;\n case 12: mnemo += ofs8+\",PC\"; bytes++; break;\n case 13: mnemo += ofs16+\",PC\"; bytes+=2; break;\n case 14: mnemo += \"???\"; break;\n case 15: mnemo += \"$\"+toHex4((b*256+c)); bytes+=2; break;\n }\n } else {\n switch (mod) {\n case 0: mnemo += \"???\"; break;\n case 1: mnemo += \"[,\"+ixr+'++]'; break;\n case 2: mnemo += \"???\"; break;\n case 3: mnemo += \"[,--\"+ixr+']'; break;\n case 4: mnemo += \"[,\"+ixr+']'; break;\n case 5: mnemo += \"[B,\"+ixr+']'; break;\n case 6: mnemo += \"[A,\"+ixr+']'; break;\n case 7: mnemo += \"???\"; break;\n case 8: mnemo += \"[\"+ofs8+\",\"+ixr+']'; bytes++; break;\n case 9: mnemo += \"[\"+ofs16+\",\"+ixr+']'; bytes+=2; break;\n case 10: mnemo += \"???\"; break;\n case 11: mnemo += \"[D,\"+ixr+']'; break;\n case 12: mnemo += \"[\"+ofs8+\",PC]\"; bytes++; break;\n case 13: mnemo += \"[\"+ofs16+\",PC]\"; bytes+=2; break;\n case 14: mnemo += \"???\"; break;\n case 15: mnemo += \"[$\"+toHex4((b*256+c))+']'; bytes+=2; break;\n }\n }\n\n break;\n case 7: //extended\n mnemo+=\"\\t$\"+toHex4(a*256+b); break;\n case 8: //imm16\n mnemo+=\"\\t#$\"+toHex4(a*256+b); break;\n\n case 10: //pshs, puls\n rx = ['PC','U','Y','X','DP','B','A','CC'];\n ro = [];\n for (j=0;j<8;j++) {\n if ((a & 1)!==0) {ro.push(rx[7-j]);}\n a>>=1;\n }\n mnemo += '\\t'+ro.join(',');\n break;\n case 11: //pshs, puls\n rx = ['PC','S','Y','X','DP','B','A','CC'];\n ro = [];\n for (j=0;j<8;j++) {\n if ((a & 1)!==0) {ro.push(rx[7-j]);}\n a>>=1;\n }\n mnemo += '\\t'+ro.join(',');\n break;\n case 20: //TFR etc\n rx = ['D','X','Y','U','S','PC','?','?','A','B','CC','DP','?','?','?','?'];\n mnemo += '\\t'+rx[a>>4]+','+rx[a&0x0f];\n break;\n }\n\n return {line:mnemo,nbytes:bytes};\n };\n\n\n//---------- Exports\n\nreturn {\n steps: function(Ts){\n //T=0;\n while (Ts>0){\n Ts-=step();\n }\n },\n runFrame: function(Tt){\n while (T>i);\n if (n===0) {f+=fx[i].toLowerCase();} else {f+=fx[i];}\n }\n return f;\n },\n disasm: disasm,\n isStable: function() { return true; }\n};\n\n};\n", "\nimport { CPU, Bus, ClockBased, SavesState, Interruptable } from \"../devices\";\n\n// Copyright 2015 by Paulo Augusto Peccin. See license.txt distributed with this file.\n\nexport var _MOS6502 = function() {\n var self = this;\n\n this.powerOn = function() {\n this.reset();\n };\n\n this.powerOff = function() {\n };\n\n this.clockPulse = function() {\n if (!RDY) return; // TODO Should be ignored in the last cycle of the instruction\n T++;\n instruction[T]();\n };\n\n this.connectBus = function(aBus) {\n bus = aBus;\n };\n\n this.setRDY = function(boo) {\n RDY = boo;\n };\n\n this.isRDY = function() {\n return RDY;\n }\n\n this.reset = function() {\n I = 1;\n T = -1;\n instruction = [ fetchOpcodeAndDecodeInstruction ]; // Bootstrap instruction\n PC = bus.read(RESET_VECTOR) | (bus.read(RESET_VECTOR + 1) << 8);\n this.setRDY(true);\n };\n\n // Interfaces\n var bus : Bus;\n var RDY : boolean = false;\n\n // Registers\n var PC : number = 0;\n var SP : number = 0;\n var A : number = 0;\n var X : number = 0;\n var Y : number = 0;\n\n // Status Bits\n var N : number = 0;\n var V : number = 0;\n var D : number = 0;\n var I : number = 0;\n var Z : number = 0;\n var C : number = 0;\n\n // Internal decoding registers\n var T : number = -1;\n var opcode : number = -1;\n var instruction : (() => void)[];\n var data : number = 0;\n var AD : number = 0;\n var BA : number = 0;\n var BALCrossed : boolean = false;\n var IA : number = 0;\n var branchOffset : number = 0;\n var branchOffsetCrossAdjust : number = 0;\n\n // Vectors\n const NMI_VECTOR = 0xfffa;\n const RESET_VECTOR = 0xfffc;\n const IRQ_VECTOR = 0xfffe;\n\n // Index registers names\n const rX = 0;\n const rY = 1;\n\n // Status bits names\n const bN = 7;\n const bV = 6;\n // const bE = 5;\t// Not used\n // const bB = 4;\t// Not used\n // const bD = 3; // Not used\n // const bI = 2; // Not used\n const bZ = 1;\n const bC = 0;\n\n // Auxiliary variables\n // TODO\n //noinspection JSUnusedGlobalSymbols\n this.debug = false;\n //noinspection JSUnusedGlobalSymbols\n this.trace = false;\n\n\n // Internal operations\n\n var fetchOpcodeAndDecodeInstruction = function() {\n opcode = bus.read(PC);\n instruction = instructions[opcode];\n T = 0;\n\n // if (self.trace) self.breakpoint(\"TRACE\");\n // console.log(\"PC: \" + PC + \", op: \" + opcode + \": \" + opcodes[opcode]);\n\n PC++;\n };\n\n var fetchNextOpcode = fetchOpcodeAndDecodeInstruction;\n\n var fetchOpcodeAndDiscard = function() {\n bus.read(PC);\n };\n\n var fetchBranchOffset = function() {\n branchOffset = bus.read(PC);\n PC++;\n };\n\n var fetchADL = function() {\n AD = bus.read(PC);\n PC++;\n };\n\n var fetchADH = function() {\n AD |= bus.read(PC) << 8;\n PC++;\n };\n\n var fetchADLFromBA = function() {\n AD = bus.read(BA);\n };\n\n var fetchADHFromBA = function() {\n AD |= bus.read(BA) << 8;\n };\n\n var fetchBAL = function() {\n BA = bus.read(PC);\n PC++;\n };\n\n var fetchBAH = function() {\n BA |= bus.read(PC) << 8;\n PC++;\n };\n\n var fetchBALFromIA = function() {\n BA = bus.read(IA);\n };\n\n var fetchBAHFromIA = function() {\n BA |= bus.read(IA) << 8;\n };\n\n var addXtoBAL = function() {\n var low = (BA & 255) + X;\n BALCrossed = low > 255;\n BA = (BA & 0xff00) | (low & 255);\n };\n\n var addYtoBAL = function() {\n var low = (BA & 255) + Y;\n BALCrossed = low > 255;\n BA = (BA & 0xff00) | (low & 255);\n };\n\n var add1toBAL = function() {\n var low = (BA & 255) + 1;\n BALCrossed = low > 255;\n BA = (BA & 0xff00) | (low & 255);\n };\n\n var add1toBAHifBALCrossed = function() {\n if (BALCrossed)\n BA = (BA + 0x0100) & 0xffff;\n };\n\n var fetchIAL = function() {\n IA = bus.read(PC);\n PC++;\n };\n\n var fetchIAH = function() {\n IA |= bus.read(PC) << 8;\n PC++;\n };\n\n var add1toIAL = function() {\n var low = (IA & 255) + 1;\n IA = (IA & 0xff00) | (low & 255);\n };\n\n var fetchDataFromImmediate = function() {\n data = bus.read(PC);\n PC++;\n };\n\n var fetchDataFromAD = function() {\n data = bus.read(AD);\n };\n\n var fetchDataFromBA = function() {\n data = bus.read(BA);\n };\n\n var writeDataToAD = function() {\n bus.write(AD, data);\n };\n\n var writeDataToBA = function() {\n bus.write(BA, data);\n };\n\n var addBranchOffsetToPCL = function() {\n var oldLow = (PC & 0x00ff);\n var newLow = (oldLow + branchOffset) & 255;\n // Negative offset?\n if (branchOffset > 127)\n branchOffsetCrossAdjust = (newLow > oldLow) ? -0x0100 : 0;\n else\n branchOffsetCrossAdjust = (newLow < oldLow) ? 0x0100 : 0;\n PC = (PC & 0xff00) | newLow;\n };\n\n var adjustPCHForBranchOffsetCross = function() {\n PC = (PC + branchOffsetCrossAdjust) & 0xffff;\n };\n\n var setZ = function(val) {\n Z = (val === 0) ? 1 : 0;\n };\n\n var setN = function(val) {\n N = (val & 0x080) ? 1 : 0;\n };\n\n var setV = function(boo) {\n V = boo ? 1 : 0;\n };\n\n var setC = function(boo) {\n C = boo ? 1 : 0;\n };\n\n var popFromStack = function() {\n SP = (SP + 1) & 255;\n return bus.read(0x0100 + SP);\n };\n\n var peekFromStack = function() {\n return bus.read(0x0100 + SP);\n };\n\n var pushToStack = function(val) {\n bus.write(0x0100 + SP, val);\n SP = (SP - 1) & 255;\n };\n\n var getStatusBits = function() {\n return N << 7 | V << 6 | 0x30 // Always push with E (bit 5) and B (bit 4) ON\n | D << 3 | I << 2 | Z << 1 | C;\n };\n\n var setStatusBits = function(val) {\n N = val >>> 7; V = val >>> 6 & 1; // E and B flags actually do not exist as real flags, so ignore\n D = val >>> 3 & 1; I = val >>> 2 & 1; Z = val >>> 1 & 1; C = val & 1;\n };\n\n var illegalOpcode = function(op) {\n if (self.debug) self.breakpoint(\"Illegal Opcode: \" + op);\n };\n\n\n // Addressing routines\n\n var implied = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchOpcodeAndDiscard,\n function() {\n operation();\n fetchNextOpcode();\n }\n ];\n };\n\n var immediateRead = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchDataFromImmediate,\n function() {\n operation();\n fetchNextOpcode();\n }\n ];\n };\n\n var zeroPageRead = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchADL, // ADH will be zero\n fetchDataFromAD,\n function() {\n operation();\n fetchNextOpcode();\n }\n ];\n };\n\n var absoluteRead = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchADL,\n fetchADH,\n fetchDataFromAD,\n function() {\n operation();\n fetchNextOpcode();\n }\n ];\n };\n\n var indirectXRead = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchBAL, // BAH will be zero\n fetchDataFromBA,\n function() {\n addXtoBAL();\n fetchADLFromBA();\n },\n function() {\n add1toBAL();\n fetchADHFromBA();\n },\n fetchDataFromAD,\n function() {\n operation();\n fetchNextOpcode();\n }\n ];\n };\n\n var absoluteIndexedRead = function(index) {\n var addIndex = index === rX ? addXtoBAL : addYtoBAL;\n return function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchBAL,\n fetchBAH,\n function() {\n addIndex();\n fetchDataFromBA();\n add1toBAHifBALCrossed();\n },\n function() {\n if (BALCrossed) {\n fetchDataFromBA();\n } else {\n operation();\n fetchNextOpcode();\n }\n },\n function() {\n operation();\n fetchNextOpcode();\n }\n ];\n };\n };\n\n var zeroPageIndexedRead = function(index) {\n var addIndex = index === rX ? addXtoBAL : addYtoBAL;\n return function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchBAL, // BAH will be zero\n fetchDataFromBA,\n function() {\n addIndex();\n fetchDataFromBA();\n },\n function() {\n operation();\n fetchNextOpcode();\n }\n ];\n };\n };\n\n var indirectYRead = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchIAL, // IAH will be zero\n fetchBALFromIA,\n function() {\n add1toIAL();\n fetchBAHFromIA();\n },\n function() {\n addYtoBAL();\n fetchDataFromBA();\n add1toBAHifBALCrossed();\n },\n function() {\n if(BALCrossed) {\n fetchDataFromBA();\n } else {\n operation();\n fetchNextOpcode();\n }\n },\n function() {\n operation();\n fetchNextOpcode();\n }\n ];\n };\n\n var zeroPageWrite = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchADL, // ADH will be zero\n function() {\n operation();\n writeDataToAD();\n },\n fetchNextOpcode\n ];\n };\n\n var absoluteWrite = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchADL,\n fetchADH,\n function() {\n operation();\n writeDataToAD();\n },\n fetchNextOpcode\n ];\n };\n\n var indirectXWrite = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchBAL, // BAH will be zero\n fetchDataFromBA,\n function() {\n addXtoBAL();\n fetchADLFromBA();\n },\n function() {\n add1toBAL();\n fetchADHFromBA();\n },\n function() {\n operation();\n writeDataToAD();\n },\n fetchNextOpcode\n ];\n };\n\n var absoluteIndexedWrite = function(index) {\n var addIndex = index === rX ? addXtoBAL : addYtoBAL;\n return function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchBAL,\n fetchBAH,\n function() {\n addIndex();\n fetchDataFromBA();\n add1toBAHifBALCrossed();\n },\n function() {\n operation();\n writeDataToBA();\n },\n fetchNextOpcode\n ];\n };\n };\n\n var zeroPageIndexedWrite = function(index) {\n var addIndex = index === rX ? addXtoBAL : addYtoBAL;\n return function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchBAL, // BAH will be zero\n fetchDataFromBA,\n function() {\n addIndex();\n operation();\n writeDataToBA();\n },\n fetchNextOpcode\n ];\n };\n };\n\n var indirectYWrite = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchIAL, // IAH will be zero\n fetchBALFromIA,\n function() {\n add1toIAL();\n fetchBAHFromIA();\n },\n function() {\n addYtoBAL();\n fetchDataFromBA();\n add1toBAHifBALCrossed();\n },\n function() {\n operation();\n writeDataToBA();\n },\n fetchNextOpcode\n ];\n };\n\n\n var zeroPageReadModifyWrite = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchADL, // ADH will be zero\n fetchDataFromAD,\n writeDataToAD,\n function() {\n operation();\n writeDataToAD();\n },\n fetchNextOpcode\n ];\n };\n\n var absoluteReadModifyWrite = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchADL,\n fetchADH,\n fetchDataFromAD,\n writeDataToAD,\n function() {\n operation();\n writeDataToAD();\n },\n fetchNextOpcode\n ];\n };\n\n var zeroPageIndexedReadModifyWrite = function(index) {\n var addIndex = index === rX ? addXtoBAL : addYtoBAL;\n return function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchBAL, // BAH will be zero\n fetchDataFromBA,\n function () {\n addIndex();\n fetchDataFromBA();\n },\n writeDataToBA,\n function () {\n operation();\n writeDataToBA();\n },\n fetchNextOpcode\n ];\n };\n };\n\n var absoluteIndexedReadModifyWrite = function(index) {\n var addIndex = index === rX ? addXtoBAL : addYtoBAL;\n return function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchBAL,\n fetchBAH,\n function () {\n addIndex();\n fetchDataFromBA();\n add1toBAHifBALCrossed();\n },\n fetchDataFromBA,\n writeDataToBA,\n function () {\n operation();\n writeDataToBA();\n },\n fetchNextOpcode\n ];\n };\n };\n\n var indirectXReadModifyWrite = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchBAL, // BAH will be zero\n fetchDataFromBA,\n function() {\n addXtoBAL();\n fetchADLFromBA();\n },\n function() {\n add1toBAL();\n fetchADHFromBA();\n },\n fetchDataFromAD,\n writeDataToAD,\n function() {\n operation();\n writeDataToAD();\n },\n fetchNextOpcode\n ];\n };\n\n var indirectYReadModifyWrite = function(operation) {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchIAL, // IAH will be zero\n fetchBALFromIA,\n function() {\n add1toIAL();\n fetchBAHFromIA();\n },\n function() {\n addYtoBAL();\n fetchDataFromBA();\n add1toBAHifBALCrossed();\n },\n fetchDataFromBA,\n writeDataToBA,\n function() {\n operation();\n writeDataToBA();\n },\n fetchNextOpcode\n ];\n };\n\n\n // Instructions ========================================================================================\n\n // Complete instruction set\n var opcodes = new Array(256);\n var instructions = new Array(256);\n\n opcodes[0x00] = \"BRK\"; instructions[0x00] = BRK();\n opcodes[0x01] = \"ORA\"; instructions[0x01] = ORA(indirectXRead);\n opcodes[0x02] = \"uKIL\"; instructions[0x02] = uKIL();\n opcodes[0x03] = \"uSLO\"; instructions[0x03] = uSLO(indirectXReadModifyWrite);\n opcodes[0x04] = \"uNOP\"; instructions[0x04] = uNOP(zeroPageRead);\n opcodes[0x05] = \"ORA\"; instructions[0x05] = ORA(zeroPageRead);\n opcodes[0x06] = \"ASL\"; instructions[0x06] = ASL(zeroPageReadModifyWrite);\n opcodes[0x07] = \"uSLO\"; instructions[0x07] = uSLO(zeroPageReadModifyWrite);\n opcodes[0x08] = \"PHP\"; instructions[0x08] = PHP();\n opcodes[0x09] = \"ORA\"; instructions[0x09] = ORA(immediateRead);\n opcodes[0x0a] = \"ASL\"; instructions[0x0a] = ASL_ACC();\n opcodes[0x0b] = \"uANC\"; instructions[0x0b] = uANC(immediateRead);\n opcodes[0x0c] = \"uNOP\"; instructions[0x0c] = uNOP(absoluteRead);\n opcodes[0x0d] = \"ORA\"; instructions[0x0d] = ORA(absoluteRead);\n opcodes[0x0e] = \"ASL\"; instructions[0x0e] = ASL(absoluteReadModifyWrite);\n opcodes[0x0f] = \"uSLO\"; instructions[0x0f] = uSLO(absoluteReadModifyWrite);\n opcodes[0x10] = \"BPL\"; instructions[0x10] = Bxx(bN, 0); // BPL\n opcodes[0x11] = \"ORA\"; instructions[0x11] = ORA(indirectYRead);\n opcodes[0x12] = \"uKIL\"; instructions[0x12] = uKIL();\n opcodes[0x13] = \"uSLO\"; instructions[0x13] = uSLO(indirectYReadModifyWrite);\n opcodes[0x14] = \"uNOP\"; instructions[0x14] = uNOP(zeroPageIndexedRead(rX));\n opcodes[0x15] = \"ORA\"; instructions[0x15] = ORA(zeroPageIndexedRead(rX));\n opcodes[0x16] = \"ASL\"; instructions[0x16] = ASL(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0x17] = \"uSLO\"; instructions[0x17] = uSLO(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0x18] = \"CLC\"; instructions[0x18] = CLC();\n opcodes[0x19] = \"ORA\"; instructions[0x19] = ORA(absoluteIndexedRead(rY));\n opcodes[0x1a] = \"uNOP\"; instructions[0x1a] = uNOP(implied);\n opcodes[0x1b] = \"uSLO\"; instructions[0x1b] = uSLO(absoluteIndexedReadModifyWrite(rY));\n opcodes[0x1c] = \"uNOP\"; instructions[0x1c] = uNOP(absoluteIndexedRead(rX));\n opcodes[0x1d] = \"ORA\"; instructions[0x1d] = ORA(absoluteIndexedRead(rX));\n opcodes[0x1e] = \"ASL\"; instructions[0x1e] = ASL(absoluteIndexedReadModifyWrite(rX));\n opcodes[0x1f] = \"uSLO\"; instructions[0x1f] = uSLO(absoluteIndexedReadModifyWrite(rX));\n opcodes[0x20] = \"JSR\"; instructions[0x20] = JSR();\n opcodes[0x21] = \"AND\"; instructions[0x21] = AND(indirectXRead);\n opcodes[0x22] = \"uKIL\"; instructions[0x22] = uKIL();\n opcodes[0x23] = \"uRLA\"; instructions[0x23] = uRLA(indirectXReadModifyWrite);\n opcodes[0x24] = \"BIT\"; instructions[0x24] = BIT(zeroPageRead);\n opcodes[0x25] = \"AND\"; instructions[0x25] = AND(zeroPageRead);\n opcodes[0x26] = \"ROL\"; instructions[0x26] = ROL(zeroPageReadModifyWrite);\n opcodes[0x27] = \"uRLA\"; instructions[0x27] = uRLA(zeroPageReadModifyWrite);\n opcodes[0x28] = \"PLP\"; instructions[0x28] = PLP();\n opcodes[0x29] = \"AND\"; instructions[0x29] = AND(immediateRead);\n opcodes[0x2a] = \"ROL\"; instructions[0x2a] = ROL_ACC();\n opcodes[0x2b] = \"uANC\"; instructions[0x2b] = uANC(immediateRead);\n opcodes[0x2c] = \"BIT\"; instructions[0x2c] = BIT(absoluteRead);\n opcodes[0x2d] = \"AND\"; instructions[0x2d] = AND(absoluteRead);\n opcodes[0x2e] = \"ROL\"; instructions[0x2e] = ROL(absoluteReadModifyWrite);\n opcodes[0x2f] = \"uRLA\"; instructions[0x2f] = uRLA(absoluteReadModifyWrite);\n opcodes[0x30] = \"BMI\"; instructions[0x30] = Bxx(bN, 1); // BMI\n opcodes[0x31] = \"AND\"; instructions[0x31] = AND(indirectYRead);\n opcodes[0x32] = \"uKIL\"; instructions[0x32] = uKIL();\n opcodes[0x33] = \"uRLA\"; instructions[0x33] = uRLA(indirectYReadModifyWrite);\n opcodes[0x34] = \"uNOP\"; instructions[0x34] = uNOP(zeroPageIndexedRead(rX));\n opcodes[0x35] = \"AND\"; instructions[0x35] = AND(zeroPageIndexedRead(rX));\n opcodes[0x36] = \"ROL\"; instructions[0x36] = ROL(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0x37] = \"uRLA\"; instructions[0x37] = uRLA(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0x38] = \"SEC\"; instructions[0x38] = SEC();\n opcodes[0x39] = \"AND\"; instructions[0x39] = AND(absoluteIndexedRead(rY));\n opcodes[0x3a] = \"uNOP\"; instructions[0x3a] = uNOP(implied);\n opcodes[0x3b] = \"uRLA\"; instructions[0x3b] = uRLA(absoluteIndexedReadModifyWrite(rY));\n opcodes[0x3c] = \"uNOP\"; instructions[0x3c] = uNOP(absoluteIndexedRead(rX));\n opcodes[0x3d] = \"AND\"; instructions[0x3d] = AND(absoluteIndexedRead(rX));\n opcodes[0x3e] = \"ROL\"; instructions[0x3e] = ROL(absoluteIndexedReadModifyWrite(rX));\n opcodes[0x3f] = \"uRLA\"; instructions[0x3f] = uRLA(absoluteIndexedReadModifyWrite(rX));\n opcodes[0x40] = \"RTI\"; instructions[0x40] = RTI();\n opcodes[0x41] = \"EOR\"; instructions[0x41] = EOR(indirectXRead);\n opcodes[0x42] = \"uKIL\"; instructions[0x42] = uKIL();\n opcodes[0x43] = \"uSRE\"; instructions[0x43] = uSRE(indirectXReadModifyWrite);\n opcodes[0x44] = \"uNOP\"; instructions[0x44] = uNOP(zeroPageRead);\n opcodes[0x45] = \"EOR\"; instructions[0x45] = EOR(zeroPageRead);\n opcodes[0x46] = \"LSR\"; instructions[0x46] = LSR(zeroPageReadModifyWrite);\n opcodes[0x47] = \"uSRE\"; instructions[0x47] = uSRE(zeroPageReadModifyWrite);\n opcodes[0x48] = \"PHA\"; instructions[0x48] = PHA();\n opcodes[0x49] = \"EOR\"; instructions[0x49] = EOR(immediateRead);\n opcodes[0x4a] = \"LSR\"; instructions[0x4a] = LSR_ACC();\n opcodes[0x4b] = \"uASR\"; instructions[0x4b] = uASR(immediateRead);\n opcodes[0x4c] = \"JMP\"; instructions[0x4c] = JMP_ABS();\n opcodes[0x4d] = \"EOR\"; instructions[0x4d] = EOR(absoluteRead);\n opcodes[0x4e] = \"LSR\"; instructions[0x4e] = LSR(absoluteReadModifyWrite);\n opcodes[0x4f] = \"uSRE\"; instructions[0x4f] = uSRE(absoluteReadModifyWrite);\n opcodes[0x50] = \"BVC\"; instructions[0x50] = Bxx(bV, 0); // BVC\n opcodes[0x51] = \"EOR\"; instructions[0x51] = EOR(indirectYRead);\n opcodes[0x52] = \"uKIL\"; instructions[0x52] = uKIL();\n opcodes[0x53] = \"uSRE\"; instructions[0x53] = uSRE(indirectYReadModifyWrite);\n opcodes[0x54] = \"uNOP\"; instructions[0x54] = uNOP(zeroPageIndexedRead(rX));\n opcodes[0x55] = \"EOR\"; instructions[0x55] = EOR(zeroPageIndexedRead(rX));\n opcodes[0x56] = \"LSR\"; instructions[0x56] = LSR(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0x57] = \"uSRE\"; instructions[0x57] = uSRE(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0x58] = \"CLI\"; instructions[0x58] = CLI();\n opcodes[0x59] = \"EOR\"; instructions[0x59] = EOR(absoluteIndexedRead(rY));\n opcodes[0x5a] = \"uNOP\"; instructions[0x5a] = uNOP(implied);\n opcodes[0x5b] = \"uSRE\"; instructions[0x5b] = uSRE(absoluteIndexedReadModifyWrite(rY));\n opcodes[0x5c] = \"uNOP\"; instructions[0x5c] = uNOP(absoluteIndexedRead(rX));\n opcodes[0x5d] = \"EOR\"; instructions[0x5d] = EOR(absoluteIndexedRead(rX));\n opcodes[0x5e] = \"LSR\"; instructions[0x5e] = LSR(absoluteIndexedReadModifyWrite(rX));\n opcodes[0x5f] = \"uSRE\"; instructions[0x5f] = uSRE(absoluteIndexedReadModifyWrite(rX));\n opcodes[0x60] = \"RTS\"; instructions[0x60] = RTS();\n opcodes[0x61] = \"ADC\"; instructions[0x61] = ADC(indirectXRead);\n opcodes[0x62] = \"uKIL\"; instructions[0x62] = uKIL();\n opcodes[0x63] = \"uRRA\"; instructions[0x63] = uRRA(indirectXReadModifyWrite);\n opcodes[0x64] = \"uNOP\"; instructions[0x64] = uNOP(zeroPageRead);\n opcodes[0x65] = \"ADC\"; instructions[0x65] = ADC(zeroPageRead);\n opcodes[0x66] = \"ROR\"; instructions[0x66] = ROR(zeroPageReadModifyWrite);\n opcodes[0x67] = \"uRRA\"; instructions[0x67] = uRRA(zeroPageReadModifyWrite);\n opcodes[0x68] = \"PLA\"; instructions[0x68] = PLA();\n opcodes[0x69] = \"ADC\"; instructions[0x69] = ADC(immediateRead);\n opcodes[0x6a] = \"ROR\"; instructions[0x6a] = ROR_ACC();\n opcodes[0x6b] = \"uARR\"; instructions[0x6b] = uARR(immediateRead);\n opcodes[0x6c] = \"JMP\"; instructions[0x6c] = JMP_IND();\n opcodes[0x6d] = \"ADC\"; instructions[0x6d] = ADC(absoluteRead);\n opcodes[0x6e] = \"ROR\"; instructions[0x6e] = ROR(absoluteReadModifyWrite);\n opcodes[0x6f] = \"uRRA\"; instructions[0x6f] = uRRA(absoluteReadModifyWrite);\n opcodes[0x70] = \"BVS\"; instructions[0x70] = Bxx(bV, 1); // BVS\n opcodes[0x71] = \"ADC\"; instructions[0x71] = ADC(indirectYRead);\n opcodes[0x72] = \"uKIL\"; instructions[0x72] = uKIL();\n opcodes[0x73] = \"uRRA\"; instructions[0x73] = uRRA(indirectYReadModifyWrite);\n opcodes[0x74] = \"uNOP\"; instructions[0x74] = uNOP(zeroPageIndexedRead(rX));\n opcodes[0x75] = \"ADC\"; instructions[0x75] = ADC(zeroPageIndexedRead(rX));\n opcodes[0x76] = \"ROR\"; instructions[0x76] = ROR(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0x77] = \"uRRA\"; instructions[0x77] = uRRA(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0x78] = \"SEI\"; instructions[0x78] = SEI();\n opcodes[0x79] = \"ADC\"; instructions[0x79] = ADC(absoluteIndexedRead(rY));\n opcodes[0x7a] = \"uNOP\"; instructions[0x7a] = uNOP(implied);\n opcodes[0x7b] = \"uRRA\"; instructions[0x7b] = uRRA(absoluteIndexedReadModifyWrite(rY));\n opcodes[0x7c] = \"uNOP\"; instructions[0x7c] = uNOP(absoluteIndexedRead(rX));\n opcodes[0x7d] = \"ADC\"; instructions[0x7d] = ADC(absoluteIndexedRead(rX));\n opcodes[0x7e] = \"ROR\"; instructions[0x7e] = ROR(absoluteIndexedReadModifyWrite(rX));\n opcodes[0x7f] = \"uRRA\"; instructions[0x7f] = uRRA(absoluteIndexedReadModifyWrite(rX));\n opcodes[0x80] = \"uNOP\"; instructions[0x80] = uNOP(immediateRead);\n opcodes[0x81] = \"STA\"; instructions[0x81] = STA(indirectXWrite);\n opcodes[0x82] = \"uNOP\"; instructions[0x82] = uNOP(immediateRead);\n opcodes[0x83] = \"uSAX\"; instructions[0x83] = uSAX(indirectXWrite);\n opcodes[0x84] = \"STY\"; instructions[0x84] = STY(zeroPageWrite);\n opcodes[0x85] = \"STA\"; instructions[0x85] = STA(zeroPageWrite);\n opcodes[0x86] = \"STX\"; instructions[0x86] = STX(zeroPageWrite);\n opcodes[0x87] = \"uSAX\"; instructions[0x87] = uSAX(zeroPageWrite);\n opcodes[0x88] = \"DEY\"; instructions[0x88] = DEY();\n opcodes[0x89] = \"uNOP\"; instructions[0x89] = uNOP(immediateRead);\n opcodes[0x8a] = \"TXA\"; instructions[0x8a] = TXA();\n opcodes[0x8b] = \"uANE\"; instructions[0x8b] = uANE(immediateRead);\n opcodes[0x8c] = \"STY\"; instructions[0x8c] = STY(absoluteWrite);\n opcodes[0x8d] = \"STA\"; instructions[0x8d] = STA(absoluteWrite);\n opcodes[0x8e] = \"STX\"; instructions[0x8e] = STX(absoluteWrite);\n opcodes[0x8f] = \"uSAX\"; instructions[0x8f] = uSAX(absoluteWrite);\n opcodes[0x90] = \"BCC\"; instructions[0x90] = Bxx(bC, 0); // BCC\n opcodes[0x91] = \"STA\"; instructions[0x91] = STA(indirectYWrite);\n opcodes[0x92] = \"uKIL\"; instructions[0x92] = uKIL();\n opcodes[0x93] = \"uSHA\"; instructions[0x93] = uSHA(indirectYWrite);\n opcodes[0x94] = \"STY\"; instructions[0x94] = STY(zeroPageIndexedWrite(rX));\n opcodes[0x95] = \"STA\"; instructions[0x95] = STA(zeroPageIndexedWrite(rX));\n opcodes[0x96] = \"STX\"; instructions[0x96] = STX(zeroPageIndexedWrite(rY));\n opcodes[0x97] = \"uSAX\"; instructions[0x97] = uSAX(zeroPageIndexedWrite(rY));\n opcodes[0x98] = \"TYA\"; instructions[0x98] = TYA();\n opcodes[0x99] = \"STA\"; instructions[0x99] = STA(absoluteIndexedWrite(rY));\n opcodes[0x9a] = \"TXS\"; instructions[0x9a] = TXS();\n opcodes[0x9b] = \"uSHS\"; instructions[0x9b] = uSHS(absoluteIndexedWrite(rY));\n opcodes[0x9c] = \"uSHY\"; instructions[0x9c] = uSHY(absoluteIndexedWrite(rX));\n opcodes[0x9d] = \"STA\"; instructions[0x9d] = STA(absoluteIndexedWrite(rX));\n opcodes[0x9e] = \"uSHX\"; instructions[0x9e] = uSHX(absoluteIndexedWrite(rY));\n opcodes[0x9f] = \"uSHA\"; instructions[0x9f] = uSHA(absoluteIndexedWrite(rY));\n opcodes[0xa0] = \"LDY\"; instructions[0xa0] = LDY(immediateRead);\n opcodes[0xa1] = \"LDA\"; instructions[0xa1] = LDA(indirectXRead);\n opcodes[0xa2] = \"LDX\"; instructions[0xa2] = LDX(immediateRead);\n opcodes[0xa3] = \"uLAX\"; instructions[0xa3] = uLAX(indirectXRead);\n opcodes[0xa4] = \"LDY\"; instructions[0xa4] = LDY(zeroPageRead);\n opcodes[0xa5] = \"LDA\"; instructions[0xa5] = LDA(zeroPageRead);\n opcodes[0xa6] = \"LDX\"; instructions[0xa6] = LDX(zeroPageRead);\n opcodes[0xa7] = \"uLAX\"; instructions[0xa7] = uLAX(zeroPageRead);\n opcodes[0xa8] = \"TAY\"; instructions[0xa8] = TAY();\n opcodes[0xa9] = \"LDA\"; instructions[0xa9] = LDA(immediateRead);\n opcodes[0xaa] = \"TAX\"; instructions[0xaa] = TAX();\n opcodes[0xab] = \"uLXA\"; instructions[0xab] = uLXA(immediateRead);\n opcodes[0xac] = \"LDY\"; instructions[0xac] = LDY(absoluteRead);\n opcodes[0xad] = \"LDA\"; instructions[0xad] = LDA(absoluteRead);\n opcodes[0xae] = \"LDX\"; instructions[0xae] = LDX(absoluteRead);\n opcodes[0xaf] = \"uLAX\"; instructions[0xaf] = uLAX(absoluteRead);\n opcodes[0xb0] = \"BCS\"; instructions[0xb0] = Bxx(bC, 1); // BCS\n opcodes[0xb1] = \"LDA\"; instructions[0xb1] = LDA(indirectYRead);\n opcodes[0xb2] = \"uKIL\"; instructions[0xb2] = uKIL();\n opcodes[0xb3] = \"uLAX\"; instructions[0xb3] = uLAX(indirectYRead);\n opcodes[0xb4] = \"LDY\"; instructions[0xb4] = LDY(zeroPageIndexedRead(rX));\n opcodes[0xb5] = \"LDA\"; instructions[0xb5] = LDA(zeroPageIndexedRead(rX));\n opcodes[0xb6] = \"LDX\"; instructions[0xb6] = LDX(zeroPageIndexedRead(rY));\n opcodes[0xb7] = \"uLAX\"; instructions[0xb7] = uLAX(zeroPageIndexedRead(rY));\n opcodes[0xb8] = \"CLV\"; instructions[0xb8] = CLV();\n opcodes[0xb9] = \"LDA\"; instructions[0xb9] = LDA(absoluteIndexedRead(rY));\n opcodes[0xba] = \"TSX\"; instructions[0xba] = TSX();\n opcodes[0xbb] = \"uLAS\"; instructions[0xbb] = uLAS(absoluteIndexedRead(rY));\n opcodes[0xbc] = \"LDY\"; instructions[0xbc] = LDY(absoluteIndexedRead(rX));\n opcodes[0xbd] = \"LDA\"; instructions[0xbd] = LDA(absoluteIndexedRead(rX));\n opcodes[0xbe] = \"LDX\"; instructions[0xbe] = LDX(absoluteIndexedRead(rY));\n opcodes[0xbf] = \"uLAX\"; instructions[0xbf] = uLAX(absoluteIndexedRead(rY));\n opcodes[0xc0] = \"CPY\"; instructions[0xc0] = CPY(immediateRead);\n opcodes[0xc1] = \"CMP\"; instructions[0xc1] = CMP(indirectXRead);\n opcodes[0xc2] = \"uNOP\"; instructions[0xc2] = uNOP(immediateRead);\n opcodes[0xc3] = \"uDCP\"; instructions[0xc3] = uDCP(indirectXReadModifyWrite);\n opcodes[0xc4] = \"CPY\"; instructions[0xc4] = CPY(zeroPageRead);\n opcodes[0xc5] = \"CMP\"; instructions[0xc5] = CMP(zeroPageRead);\n opcodes[0xc6] = \"DEC\"; instructions[0xc6] = DEC(zeroPageReadModifyWrite);\n opcodes[0xc7] = \"uDCP\"; instructions[0xc7] = uDCP(zeroPageReadModifyWrite);\n opcodes[0xc8] = \"INY\"; instructions[0xc8] = INY();\n opcodes[0xc9] = \"CMP\"; instructions[0xc9] = CMP(immediateRead);\n opcodes[0xca] = \"DEX\"; instructions[0xca] = DEX();\n opcodes[0xcb] = \"uSBX\"; instructions[0xcb] = uSBX(immediateRead);\n opcodes[0xcc] = \"CPY\"; instructions[0xcc] = CPY(absoluteRead);\n opcodes[0xcd] = \"CMP\"; instructions[0xcd] = CMP(absoluteRead);\n opcodes[0xce] = \"DEC\"; instructions[0xce] = DEC(absoluteReadModifyWrite);\n opcodes[0xcf] = \"uDCP\"; instructions[0xcf] = uDCP(absoluteReadModifyWrite);\n opcodes[0xd0] = \"BNE\"; instructions[0xd0] = Bxx(bZ, 0); // BNE\n opcodes[0xd1] = \"CMP\"; instructions[0xd1] = CMP(indirectYRead);\n opcodes[0xd2] = \"uKIL\"; instructions[0xd2] = uKIL();\n opcodes[0xd3] = \"uDCP\"; instructions[0xd3] = uDCP(indirectYReadModifyWrite);\n opcodes[0xd4] = \"uNOP\"; instructions[0xd4] = uNOP(zeroPageIndexedRead(rX));\n opcodes[0xd5] = \"CMP\"; instructions[0xd5] = CMP(zeroPageIndexedRead(rX));\n opcodes[0xd6] = \"DEC\"; instructions[0xd6] = DEC(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0xd7] = \"uDCP\"; instructions[0xd7] = uDCP(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0xd8] = \"CLD\"; instructions[0xd8] = CLD();\n opcodes[0xd9] = \"CMP\"; instructions[0xd9] = CMP(absoluteIndexedRead(rY));\n opcodes[0xda] = \"uNOP\"; instructions[0xda] = uNOP(implied);\n opcodes[0xdb] = \"uDCP\"; instructions[0xdb] = uDCP(absoluteIndexedReadModifyWrite(rY));\n opcodes[0xdc] = \"uNOP\"; instructions[0xdc] = uNOP(absoluteIndexedRead(rX));\n opcodes[0xdd] = \"CMP\"; instructions[0xdd] = CMP(absoluteIndexedRead(rX));\n opcodes[0xde] = \"DEC\"; instructions[0xde] = DEC(absoluteIndexedReadModifyWrite(rX));\n opcodes[0xdf] = \"uDCP\"; instructions[0xdf] = uDCP(absoluteIndexedReadModifyWrite(rX));\n opcodes[0xe0] = \"CPX\"; instructions[0xe0] = CPX(immediateRead);\n opcodes[0xe1] = \"SBC\"; instructions[0xe1] = SBC(indirectXRead);\n opcodes[0xe2] = \"uNOP\"; instructions[0xe2] = uNOP(immediateRead);\n opcodes[0xe3] = \"uISB\"; instructions[0xe3] = uISB(indirectXReadModifyWrite);\n opcodes[0xe4] = \"CPX\"; instructions[0xe4] = CPX(zeroPageRead);\n opcodes[0xe5] = \"SBC\"; instructions[0xe5] = SBC(zeroPageRead);\n opcodes[0xe6] = \"INC\"; instructions[0xe6] = INC(zeroPageReadModifyWrite);\n opcodes[0xe7] = \"uISB\"; instructions[0xe7] = uISB(zeroPageReadModifyWrite);\n opcodes[0xe8] = \"INX\"; instructions[0xe8] = INX();\n opcodes[0xe9] = \"SBC\"; instructions[0xe9] = SBC(immediateRead);\n opcodes[0xea] = \"NOP\"; instructions[0xea] = NOP();\n opcodes[0xeb] = \"SBC\"; instructions[0xeb] = SBC(immediateRead);\n opcodes[0xec] = \"CPX\"; instructions[0xec] = CPX(absoluteRead);\n opcodes[0xed] = \"SBC\"; instructions[0xed] = SBC(absoluteRead);\n opcodes[0xee] = \"INC\"; instructions[0xee] = INC(absoluteReadModifyWrite);\n opcodes[0xef] = \"uISB\"; instructions[0xef] = uISB(absoluteReadModifyWrite);\n opcodes[0xf0] = \"BEQ\"; instructions[0xf0] = Bxx(bZ, 1); // BEQ\n opcodes[0xf1] = \"SBC\"; instructions[0xf1] = SBC(indirectYRead);\n opcodes[0xf2] = \"uKIL\"; instructions[0xf2] = uKIL();\n opcodes[0xf3] = \"uISB\"; instructions[0xf3] = uISB(indirectYReadModifyWrite);\n opcodes[0xf4] = \"uNOP\"; instructions[0xf4] = uNOP(zeroPageIndexedRead(rX));\n opcodes[0xf5] = \"SBC\"; instructions[0xf5] = SBC(zeroPageIndexedRead(rX));\n opcodes[0xf6] = \"INC\"; instructions[0xf6] = INC(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0xf7] = \"uISB\"; instructions[0xf7] = uISB(zeroPageIndexedReadModifyWrite(rX));\n opcodes[0xf8] = \"SED\"; instructions[0xf8] = SED();\n opcodes[0xf9] = \"SBC\"; instructions[0xf9] = SBC(absoluteIndexedRead(rY));\n opcodes[0xfa] = \"uNOP\"; instructions[0xfa] = uNOP(implied);\n opcodes[0xfb] = \"uISB\"; instructions[0xfb] = uISB(absoluteIndexedReadModifyWrite(rY));\n opcodes[0xfc] = \"uNOP\"; instructions[0xfc] = uNOP(absoluteIndexedRead(rX));\n opcodes[0xfd] = \"SBC\"; instructions[0xfd] = SBC(absoluteIndexedRead(rX));\n opcodes[0xfe] = \"INC\"; instructions[0xfe] = INC(absoluteIndexedReadModifyWrite(rX));\n opcodes[0xff] = \"uISB\"; instructions[0xff] = uISB(absoluteIndexedReadModifyWrite(rX));\n\n\n // Single Byte instructions\n\n function ASL_ACC() {\n return implied(function() {\n setC(A > 127);\n A = (A << 1) & 255;\n setZ(A);\n setN(A);\n });\n }\n\n function CLC() {\n return implied(function() {\n C = 0;\n });\n }\n\n function CLD() {\n return implied(function() {\n D = 0;\n });\n }\n\n function CLI() {\n return implied(function() {\n I = 0;\n });\n }\n\n function CLV() {\n return implied(function() {\n V = 0;\n });\n }\n\n function DEX() {\n return implied(function() {\n X = (X - 1) & 255;\n setZ(X);\n setN(X);\n });\n }\n\n function DEY() {\n return implied(function() {\n Y = (Y - 1) & 255;\n setZ(Y);\n setN(Y);\n });\n }\n\n function INX() {\n return implied(function() {\n X = (X + 1) & 255;\n setZ(X);\n setN(X);\n });\n }\n\n function INY() {\n return implied(function() {\n Y = (Y + 1) & 255;\n setZ(Y);\n setN(Y);\n });\n }\n\n function LSR_ACC() {\n return implied(function() {\n C = A & 0x01;\n A >>>= 1;\n setZ(A);\n N = 0;\n });\n }\n\n function NOP() {\n return implied(function() {\n // nothing\n });\n }\n\n function ROL_ACC() {\n return implied(function() {\n var newC = A > 127;\n A = ((A << 1) | C) & 255;\n setC(newC);\n setZ(A);\n setN(A);\n });\n }\n\n function ROR_ACC() {\n return implied(function() {\n var newC = A & 0x01;\n A = (A >>> 1) | (C << 7);\n setC(newC);\n setZ(A);\n setN(A);\n });\n }\n\n function SEC() {\n return implied(function() {\n C = 1;\n });\n }\n\n function SED() {\n return implied(function() {\n D = 1;\n });\n }\n\n function SEI() {\n return implied(function() {\n I = 1;\n });\n }\n\n function TAX() {\n return implied(function() {\n X = A;\n setZ(X);\n setN(X);\n });\n }\n\n function TAY() {\n return implied(function() {\n Y = A;\n setZ(Y);\n setN(Y);\n });\n }\n\n function TSX() {\n return implied(function() {\n X = SP;\n setZ(X);\n setN(X);\n });\n }\n\n function TXA() {\n return implied(function() {\n A = X;\n setZ(A);\n setN(A);\n });\n }\n\n function TXS() {\n return implied(function() {\n SP = X;\n });\n }\n\n function TYA() {\n return implied(function() {\n A = Y;\n setZ(A);\n setN(A);\n });\n }\n\n function uKIL() {\n return [\n fetchOpcodeAndDecodeInstruction,\n function() {\n illegalOpcode(\"KIL/HLT/JAM\");\n },\n function() {\n T--; // Causes the processor to be stuck in this instruction forever\n }\n ];\n }\n\n function uNOP(addressing) {\n return addressing(function() {\n illegalOpcode(\"NOP/DOP\");\n // nothing\n });\n }\n\n\n // Internal Execution on Memory Data\n\n function ADC(addressing) {\n return addressing(function() {\n if (D) {\n var operand = data;\n var AL = (A & 15) + (operand & 15) + C;\n if (AL > 9) { AL += 6; }\n var AH = ((A >> 4) + (operand >> 4) + ((AL > 15)?1:0)) << 4;\n setZ((A + operand + C) & 255);\n setN(AH);\n setV(((A ^AH) & ~(A ^ operand)) & 128);\n if (AH > 0x9f) { AH += 0x60; }\n setC(AH > 255);\n A = (AH | (AL & 15)) & 255;\n } else {\n var add = A + data + C;\n setC(add > 255);\n setV(((A ^ add) & (data ^ add)) & 0x80);\n A = add & 255;\n setZ(A);\n setN(A);\n }\n });\n }\n\n function AND(addressing) {\n return addressing(function() {\n A &= data;\n setZ(A);\n setN(A);\n });\n }\n\n function BIT(addressing) {\n return addressing(function() {\n var par = data;\n setZ(A & par);\n setV(par & 0x40);\n setN(par);\n });\n }\n\n function CMP(addressing) {\n return addressing(function() {\n var val = (A - data) & 255;\n setC(A >= data);\n setZ(val);\n setN(val);\n });\n }\n\n function CPX(addressing) {\n return addressing(function() {\n var val = (X - data) & 255;\n setC(X >= data);\n setZ(val);\n setN(val);\n });\n }\n\n function CPY(addressing) {\n return addressing(function() {\n var val = (Y - data) & 255;\n setC(Y >= data);\n setZ(val);\n setN(val);\n });\n }\n\n function EOR(addressing) {\n return addressing(function() {\n A ^= data;\n setZ(A);\n setN(A);\n });\n }\n\n function LDA(addressing) {\n return addressing(function() {\n A = data;\n setZ(A);\n setN(A);\n });\n }\n\n function LDX(addressing) {\n return addressing(function() {\n X = data;\n setZ(X);\n setN(X);\n });\n }\n\n function LDY(addressing) {\n return addressing(function() {\n Y = data;\n setZ(Y);\n setN(Y);\n });\n }\n\n function ORA(addressing) {\n return addressing(function() {\n A |= data;\n setZ(A);\n setN(A);\n });\n }\n\n function SBC(addressing) {\n return addressing(function() {\n if (D) {\n var operand = data;\n var AL = (A & 15) - (operand & 15) - (1-C);\n var AH = (A >> 4) - (operand >> 4) - ((AL < 0)?1:0);\n if (AL < 0) { AL -= 6; }\n if (AH < 0) { AH -= 6; }\n var sub = A - operand - (1-C);\n setC(~sub & 256);\n setV(((A ^ operand) & (A ^ sub)) & 128);\n setZ(sub & 255);\n setN(sub);\n A = ((AH << 4) | (AL & 15)) & 255;\n } else {\n operand = (~data) & 255;\n sub = A + operand + C;\n setC(sub > 255);\n setV(((A ^ sub) & (operand ^ sub) & 0x80));\n A = sub & 255;\n setZ(A);\n setN(A);\n }\n });\n }\n\n function uANC(addressing) {\n return addressing(function() {\n illegalOpcode(\"ANC\");\n A &= data;\n setZ(A);\n N = C = (A & 0x080) ? 1 : 0;\n });\n }\n\n function uANE(addressing) {\n return addressing(function() {\n illegalOpcode(\"ANE\");\n // Exact operation unknown. Do nothing\n });\n }\n\n function uARR(addressing) {\n // Some sources say flags are affected per ROR, others say its more complex. The complex one is chosen\n return addressing(function() {\n illegalOpcode(\"ARR\");\n var val = A & data;\n var oldC = C ? 0x80 : 0;\n val = (val >>> 1) | oldC;\n A = val;\n setZ(val);\n setN(val);\n var comp = A & 0x60;\n if (comp == 0x60) \t\t{ C = 1; V = 0; }\n else if (comp == 0x00) \t{ C = 0; V = 0; }\n else if (comp == 0x20) \t{ C = 0; V = 1; }\n else if (comp == 0x40) \t{ C = 1; V = 1; }\n });\n }\n\n function uASR(addressing) {\n return addressing(function() {\n illegalOpcode(\"ASR\");\n var val = A & data;\n C = (val & 0x01);\t\t// bit 0\n val = val >>> 1;\n A = val;\n setZ(val);\n N = 0;\n });\n }\n\n function uLAS(addressing) {\n return addressing(function() {\n illegalOpcode(\"LAS\");\n var val = SP & data;\n A = val;\n X = val;\n SP = val;\n setZ(val);\n setN(val);\n });\n }\n\n function uLAX(addressing) {\n return addressing(function() {\n illegalOpcode(\"LAX\");\n var val = data;\n A = val;\n X = val;\n setZ(val);\n setN(val);\n });\n }\n\n function uLXA(addressing) {\n return addressing(function() {\n // Some sources say its an OR with $EE then AND with IMM, others exclude the OR,\n // others exclude both the OR and the AND. Excluding just the OR...\n illegalOpcode(\"LXA\");\n var val = A /* | 0xEE) */ & data;\n A = val;\n X = val;\n setZ(val);\n setN(val);\n });\n }\n\n function uSBX(addressing) {\n return addressing(function() {\n illegalOpcode(\"SBX\");\n var par = A & X;\n var val = data;\n var newX = (par - val) & 255;\n X = newX;\n setC(par >= val);\n setZ(newX);\n setN(newX);\n });\n }\n\n\n // Store operations\n\n function STA(addressing) {\n return addressing(function() {\n data = A;\n });\n }\n\n function STX(addressing) {\n return addressing(function() {\n data = X;\n });\n }\n\n function STY(addressing) {\n return addressing(function() {\n data = Y;\n });\n }\n\n function uSAX(addressing) {\n return addressing(function() {\n // Some sources say it would affect N and Z flags, some say it wouldn't. Chose not to affect\n illegalOpcode(\"SAX\");\n data = A & X;\n });\n }\n\n function uSHA(addressing) {\n return addressing(function() {\n illegalOpcode(\"SHA\");\n data = A & X & ((BA >>> 8) + 1) & 255; // A & X & (High byte of effective address + 1) !!!\n // data would also be stored BAH if page boundary is crossed. Unobservable, not needed here\n });\n }\n\n function uSHS(addressing) {\n return addressing(function() {\n illegalOpcode(\"SHS\");\n var val = A & X;\n SP = val;\n data = val & ((BA >>> 8) + 1) & 255; // A & X & (High byte of effective address + 1) !!!\n // data would also be stored BAH if page boundary is crossed. Unobservable, not needed here\n });\n }\n\n function uSHX(addressing) {\n return addressing(function() {\n illegalOpcode(\"SHX\");\n data = X & ((BA >>> 8) + 1) & 255; // X & (High byte of effective address + 1) !!!\n // data would also be stored BAH if page boundary is crossed. Unobservable, not needed here\n });\n }\n\n function uSHY(addressing) {\n return addressing(function() {\n illegalOpcode(\"SHY\");\n data = Y & ((BA >>> 8) + 1) & 255; // Y & (High byte of effective address + 1) !!!\n // data would also be stored BAH if page boundary is crossed. Unobservable, not needed here\n });\n }\n\n\n // Read-Modify-Write operations\n\n function ASL(addressing) {\n return addressing(function() {\n setC(data > 127);\n var par = (data << 1) & 255;\n data = par;\n setZ(par);\n setN(par);\n });\n }\n\n function DEC(addressing) {\n return addressing(function() {\n var par = (data - 1) & 255;\n data = par;\n setZ(par);\n setN(par);\n });\n }\n\n function INC(addressing) {\n return addressing(function() {\n var par = (data + 1) & 255;\n data = par;\n setZ(par);\n setN(par);\n });\n }\n\n function LSR(addressing) {\n return addressing(function() {\n C = data & 0x01;\n data >>>= 1;\n setZ(data);\n N = 0;\n });\n }\n\n function ROL(addressing) {\n return addressing(function() {\n var newC = data > 127;\n var par = ((data << 1) | C) & 255;\n data = par;\n setC(newC);\n setZ(par);\n setN(par);\n });\n }\n\n function ROR(addressing) {\n return addressing(function() {\n var newC = data & 0x01;\n var par = (data >>> 1) | (C << 7);\n data = par;\n setC(newC);\n setZ(par);\n setN(par);\n });\n }\n\n function uDCP(addressing) {\n return addressing(function() {\n illegalOpcode(\"DCP\");\n var par = (data - 1) & 255;\n data = par;\n par = A - par;\n setC(par >= 0);\n setZ(par);\n setN(par);\n });\n }\n\n function uISB(addressing) {\n return addressing(function() {\n illegalOpcode(\"ISB\");\n data = (data + 1) & 255; // ISB is the same as SBC but incs the operand first\n if (D) {\n var operand = data;\n var AL = (A & 15) - (operand & 15) - (1-C);\n var AH = (A >> 4) - (operand >> 4) - ((AL < 0)?1:0);\n if (AL < 0) { AL -= 6; }\n if (AH < 0) { AH -= 6; }\n var sub = A - operand - (1-C);\n setC(~sub & 256);\n setV(((A ^ operand) & (A ^ sub)) & 128);\n setZ(sub & 255);\n setN(sub);\n A = ((AH << 4) | (AL & 15)) & 255;\n } else {\n operand = (~data) & 255;\n sub = A + operand + C;\n setC(sub > 255);\n setV(((A ^ sub) & (operand ^ sub) & 0x80));\n A = sub & 255;\n setZ(A);\n setN(A);\n }\n });\n }\n\n function uRLA(addressing) {\n return addressing(function() {\n illegalOpcode(\"RLA\");\n var val = data;\n var oldC = C;\n setC(val & 0x80);\t\t// bit 7 was set\n val = ((val << 1) | oldC) & 255;\n data = val;\n A &= val;\n setZ(val); // TODO Verify. May be A instead of val in the flags setting\n setN(val);\n });\n }\n\n function uRRA(addressing) {\n return addressing(function() {\n illegalOpcode(\"RRA\");\n var val = data;\n var oldC = C ? 0x80 : 0;\n setC(val & 0x01);\t\t// bit 0 was set\n val = (val >>> 1) | oldC;\n data = val;\n // RRA is the same as ADC from here\n if (D) {\n var operand = data;\n var AL = (A & 15) + (operand & 15) + C;\n if (AL > 9) { AL += 6; }\n var AH = ((A >> 4) + (operand >> 4) + ((AL > 15)?1:0)) << 4;\n setZ((A + operand + C) & 255);\n setN(AH);\n setV(((A ^AH) & ~(A ^ operand)) & 128);\n if (AH > 0x9f) { AH += 0x60; }\n setC(AH > 255);\n A = (AH | (AL & 15)) & 255;\n } else {\n var add = A + data + C;\n setC(add > 255);\n setV(((A ^ add) & (data ^ add)) & 0x80);\n A = add & 255;\n setZ(A);\n setN(A);\n }\n });\n }\n\n function uSLO(addressing) {\n return addressing(function() {\n illegalOpcode(\"SLO\");\n var val = data;\n setC(val & 0x80);\t\t// bit 7 was set\n val = (val << 1) & 255;\n data = val;\n val = A | val;\n A = val;\n setZ(val);\n setN(val);\n });\n }\n\n function uSRE(addressing) {\n return addressing(function() {\n illegalOpcode(\"SRE\");\n var val = data;\n setC(val & 0x01);\t\t// bit 0 was set\n val = val >>> 1;\n data = val;\n val = (A ^ val) & 255;\n A = val;\n setZ(val);\n setN(val);\n });\n }\n\n\n // Miscellaneous operations\n\n function PHA() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchOpcodeAndDiscard,\n function() { pushToStack(A); },\n fetchNextOpcode\n ];\n }\n\n function PHP() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchOpcodeAndDiscard,\n function() { pushToStack(getStatusBits()); },\n fetchNextOpcode\n ];\n }\n\n function PLA() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchOpcodeAndDiscard,\n peekFromStack,\n function() {\n A = popFromStack();\n setZ(A);\n setN(A);\n },\n fetchNextOpcode\n ];\n }\n\n function PLP() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchOpcodeAndDiscard,\n peekFromStack,\n function() { setStatusBits(popFromStack()); },\n fetchNextOpcode\n ];\n }\n\n function JSR() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchADL,\n peekFromStack,\n function() { pushToStack((PC >>> 8) & 0xff); },\n function() { pushToStack(PC & 0xff); },\n fetchADH,\n function() { PC = AD; fetchNextOpcode(); }\n ];\n }\n\n function BRK() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchDataFromImmediate, // For debugging purposes, use operand as an arg for BRK!\n function() {\n if (self.debug) self.breakpoint(\"BRK \" + data);\n pushToStack((PC >>> 8) & 0xff);\n },\n function() { pushToStack(PC & 0xff); },\n function() { pushToStack(getStatusBits()); }, // set B flag\n function() { AD = bus.read(IRQ_VECTOR); },\n function() { AD |= bus.read(IRQ_VECTOR + 1) << 8; },\n function() { PC = AD; I = 1; fetchNextOpcode(); }\n ];\n }\n\n function IRQ() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchDataFromImmediate, // For debugging purposes, use operand as an arg for BRK!\n function() {\n if (self.debug) self.breakpoint(\"IRQ \" + data);\n pushToStack((PC >>> 8) & 0xff);\n },\n function() { pushToStack(PC & 0xff); },\n function() { pushToStack(getStatusBits() & ~0x10); }, // no BRK flag\n function() { AD = bus.read(IRQ_VECTOR); },\n function() { AD |= bus.read(IRQ_VECTOR + 1) << 8; },\n function() { PC = AD; fetchNextOpcode(); }\n ];\n }\n\n function NMI() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchDataFromImmediate,\n function() {\n if (self.debug) self.breakpoint(\"NMI \" + data);\n pushToStack((PC >>> 8) & 0xff);\n },\n function() { pushToStack(PC & 0xff); },\n function() { pushToStack(getStatusBits() & ~0x10); }, // no BRK flag\n function() { AD = bus.read(NMI_VECTOR); },\n function() { AD |= bus.read(NMI_VECTOR + 1) << 8; },\n function() { PC = AD; fetchNextOpcode(); }\n ];\n }\n\n function RTI() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchOpcodeAndDiscard,\n peekFromStack,\n function() { setStatusBits(popFromStack()); },\n function() { AD = popFromStack(); },\n function() { AD |= popFromStack() << 8; },\n function() { PC = AD; fetchNextOpcode(); }\n ];\n }\n\n function RTS() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchOpcodeAndDiscard,\n peekFromStack,\n function() { AD = popFromStack(); },\n function() { AD |= popFromStack() << 8; },\n function() { PC = AD; fetchDataFromImmediate(); },\n fetchNextOpcode\n ];\n }\n\n function JMP_ABS() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchADL,\n fetchADH,\n function() { PC = AD; fetchNextOpcode(); }\n ];\n }\n\n function JMP_IND() {\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchIAL, // IAH will be zero\n fetchIAH,\n fetchBALFromIA,\n function() {\n add1toIAL();\n fetchBAHFromIA();\n },\n function() { PC = BA; fetchNextOpcode(); }\n ];\n }\n\n function Bxx(reg, cond) {\n var branchTaken;\n if (reg === bZ) branchTaken = function() { return Z === cond; };\n else if (reg === bN) branchTaken = function() { return N === cond; };\n else if (reg === bC) branchTaken = function() { return C === cond; };\n else branchTaken = function() { return V === cond; };\n return [\n fetchOpcodeAndDecodeInstruction,\n fetchBranchOffset,\n function() {\n if (branchTaken()) {\n fetchOpcodeAndDiscard();\n addBranchOffsetToPCL();\n } else {\n fetchNextOpcode();\n }\n },\n function() {\n if(branchOffsetCrossAdjust) {\n fetchOpcodeAndDiscard();\n adjustPCHForBranchOffsetCross();\n } else {\n fetchNextOpcode();\n }\n },\n fetchNextOpcode\n ];\n }\n\n\n // Savestate -------------------------------------------\n\n this.saveState = function():MOS6502State {\n return {\n PC: (PC-1) & 0xffff,\n A: A, X: X, Y: Y, SP: SP,\n N: N, V: V, D: D, I: I, Z: Z, C: C,\n T: T, o: opcode, R: RDY?1:0,\n d: data, AD: AD, BA: BA, BC: BALCrossed?1:0, IA: IA,\n bo: branchOffset, boa: branchOffsetCrossAdjust\n };\n };\n\n this.loadState = function(state:MOS6502State) {\n PC = (state.PC+1) & 0xffff;\n A = state.A; X = state.X; Y = state.Y; SP = state.SP;\n N = state.N; V = state.V; D = state.D; I = state.I; Z = state.Z; C = state.C;\n T = state.T; opcode = state.o; RDY = !!state.R;\n data = state.d; AD = state.AD; BA = state.BA; BALCrossed = !!state.BC; IA = state.IA;\n branchOffset = state.bo; branchOffsetCrossAdjust = state.boa;\n instruction = opcode < 0 ? [ fetchOpcodeAndDecodeInstruction ] : instructions[opcode];\n };\n\n\n // Accessory methods\n\n this.toString = function() {\n return \"CPU \" +\n \" PC: \" + PC.toString(16) + \" op: \" + opcode.toString() + \" T: \" + T + \" data: \" + data + \"\\n\" +\n \" A: \" + A.toString(16) + \" X: \" + X.toString(16) + \" Y: \" + Y.toString(16) + \" SP: \" + SP.toString(16) + \" \" +\n \"N\" + N + \" \" + \"V\" + V + \" \" + \"D\" + D + \" \" + \"I\" + I + \" \" + \"Z\" + Z + \" \" + \"C\" + C + \" \";\n };\n\n this.breakpoint = function(mes) {\n //jt.Util.log(mes);\n if (this.trace) {\n var text = \"CPU Breakpoint! \" + (mes ? \"(\" + mes + \")\" : \"\") + \"\\n\\n\" + this.toString();\n //jt.Util.message(text);\n }\n };\n\n var cycletime = [\n 7, 6, 0, 8, 3, 3, 5, 5, 3, 2, 2, 2, 4, 4, 6, 6,\n 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7,\n 6, 6, 0, 8, 3, 3, 5, 5, 4, 2, 2, 2, 4, 4, 6, 6,\n 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7,\n 6, 6, 0, 8, 3, 3, 5, 5, 3, 2, 2, 2, 3, 4, 6, 6,\n 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7,\n 6, 6, 0, 8, 3, 3, 5, 5, 4, 2, 2, 2, 5, 4, 6, 6,\n 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7,\n 0, 6, 0, 6, 3, 3, 3, 3, 2, 0, 2, 0, 4, 4, 4, 4,\n 2, 6, 0, 0, 4, 4, 4, 4, 2, 5, 2, 0, 0, 5, 0, 0,\n 2, 6, 2, 6, 3, 3, 3, 3, 2, 2, 2, 0, 4, 4, 4, 4,\n 2, 5, 0, 5, 4, 4, 4, 4, 2, 4, 2, 0, 4, 4, 4, 4,\n 2, 6, 0, 8, 3, 3, 5, 5, 2, 2, 2, 2, 4, 4, 6, 6,\n 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7,\n 2, 6, 0, 8, 3, 3, 5, 5, 2, 2, 2, 0, 4, 4, 6, 6,\n 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7\n ];\n\n var extracycles = [\n 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1,\n 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1,\n 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1,\n 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1,\n 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 2, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0,\n 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 1, 1, 1, 1,\n 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1,\n 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\n 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1\n ];\n\n var insnlengths = [\n 1, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 2, 3, 3, 3, 3,\n 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3,\n 3, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 2, 3, 3, 3, 3,\n 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3,\n 1, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 2, 3, 3, 3, 3,\n 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3,\n 1, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 2, 3, 3, 3, 3,\n 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3,\n 0, 2, 0, 2, 2, 2, 2, 2, 1, 0, 1, 0, 3, 3, 3, 3,\n 2, 2, 0, 0, 2, 2, 2, 3, 1, 3, 1, 0, 0, 3, 0, 0,\n 2, 2, 2, 2, 2, 2, 2, 2, 1, 2, 1, 0, 3, 3, 3, 3,\n 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 1, 0, 3, 3, 3, 3,\n 2, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 2, 3, 3, 3, 3,\n 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3,\n 2, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 0, 3, 3, 3, 3,\n 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3\n ];\n\n var validinsns = [\n 1, 2, 0, 0, 0, 2, 2, 0, 1, 2, 1, 0, 0, 3, 3, 0,\n 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0,\n 3, 2, 0, 0, 2, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0,\n 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0,\n 1, 2, 0, 0, 0, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0,\n 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0,\n 1, 2, 0, 0, 0, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0,\n 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0,\n 0, 2, 0, 0, 2, 2, 2, 0, 1, 0, 1, 0, 3, 3, 3, 0,\n 2, 2, 0, 0, 2, 2, 2, 0, 1, 3, 1, 0, 0, 3, 0, 0,\n 2, 2, 2, 0, 2, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0,\n 2, 2, 0, 0, 2, 2, 2, 0, 1, 3, 1, 0, 3, 3, 3, 0,\n 2, 2, 0, 0, 2, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0,\n 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0,\n 2, 2, 0, 0, 2, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0,\n 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0\n ];\n\n this.getOpcodeMetadata = function(opcode, address) {\n // TODO: more intelligent maximum cycles\n //var i = instructions[opcode];\n return {\n opcode:opcode,\n mnenomic:opcodes[opcode],\n minCycles:cycletime[opcode],\n maxCycles:cycletime[opcode] + extracycles[opcode],\n insnlength:insnlengths[opcode]\n };\n }\n\n // only call when isPCStable() is true\n this.setNMI = function() {\n instruction = NMI();\n T = 1;\n PC = (PC-1) & 0xffff;\n }\n this.setIRQ = function() {\n if (!I) { // only if not disabled\n instruction = IRQ();\n T = 1;\n PC = (PC-1) & 0xffff;\n }\n }\n\n this.getSP = function() { return SP; }\n this.getPC = function() { return (PC-1) & 0xffff; }\n this.getT = function() { return T; }\n this.isHalted = function() { return opcodes[opcode] == \"uKIL\"; }\n \n this.isPCStable = function() {\n return T == 0;\n }\n};\n\nexport interface MOS6502State {\nPC : number;\nSP : number;\nA : number;\nX : number;\nY : number;\nN : number;\nV : number;\nD : number;\nI : number;\nZ : number;\nC : number;\nT : number;\no : number;\nR : number;\nd : number;\nAD : number;\nBA : number;\nBC : number;\nIA : number;\nbo : number;\nboa : number;\n}\n\nexport enum MOS6502Interrupts { None=0, NMI=1, IRQ=2 };\n\nexport class MOS6502 implements CPU, ClockBased, SavesState, Interruptable {\n\n cpu = new _MOS6502();\n interruptType : MOS6502Interrupts = MOS6502Interrupts.None;\n \n connectMemoryBus(bus:Bus) {\n this.cpu.connectBus(bus);\n }\n advanceClock() {\n if (this.interruptType && this.isStable()) {\n switch (this.interruptType) {\n case MOS6502Interrupts.NMI: this.cpu.setNMI(); break;\n case MOS6502Interrupts.IRQ: this.cpu.setIRQ(); break;\n }\n this.interruptType = 0;\n }\n this.cpu.clockPulse();\n }\n advanceInsn() {\n do {\n this.advanceClock();\n } while (!this.isStable());\n }\n reset() {\n this.cpu.reset();\n this.interruptType = 0;\n }\n interrupt(itype:number) {\n if (this.interruptType != MOS6502Interrupts.NMI) {\n this.interruptType = itype;\n }\n }\n NMI() {\n this.interrupt(MOS6502Interrupts.NMI);\n }\n IRQ() {\n this.interrupt(MOS6502Interrupts.IRQ);\n }\n getSP() {\n return this.cpu.getSP();\n }\n getPC() {\n return this.cpu.getPC();\n }\n isHalted() {\n return this.cpu.isHalted();\n }\n saveState() {\n var s = this.cpu.saveState();\n s.it = this.interruptType;\n return s;\n }\n loadState(s) {\n this.cpu.loadState(s);\n this.interruptType = s.it;\n }\n isStable() : boolean {\n return this.cpu.isPCStable();\n }\n getOpcodeMetadata(op: number) {\n return this.cpu.getOpcodeMetadata(op);\n }\n}\n", "\nimport { RasterVideo, dumpRAM, AnimationTimer, ControllerPoller, drawCrosshair } from \"./emu\";\nimport { hex, printFlags, invertMap, byteToASCII } from \"./util\";\nimport { CodeAnalyzer } from \"./analysis\";\nimport { Segment, FileData } from \"./workertypes\";\nimport { disassemble6502 } from \"./cpu/disasm6502\";\nimport { disassembleZ80 } from \"./cpu/disasmz80\";\nimport { Z80 } from \"./cpu/ZilogZ80\";\n\nimport { Bus, Resettable, FrameBased, VideoSource, SampledAudioSource, AcceptsROM, AcceptsBIOS, AcceptsKeyInput, SavesState, SavesInputState, HasCPU, HasSerialIO, SerialIOInterface, AcceptsJoyInput } from \"./devices\";\nimport { Probeable, RasterFrameBased, AcceptsPaddleInput } from \"./devices\";\nimport { SampledAudio } from \"./audio\";\nimport { ProbeRecorder } from \"./probe\";\nimport { BaseWASMMachine } from \"./wasmplatform\";\nimport { CPU6809 } from \"./cpu/6809\";\nimport { _MOS6502 } from \"./cpu/MOS6502\";\n\n///\n\nexport interface OpcodeMetadata {\n minCycles: number;\n maxCycles: number;\n insnlength: number;\n opcode: number;\n}\n\nexport interface CpuState {\n PC:number;\n EPC?:number; // effective PC (for bankswitching)\n o?:number;/*opcode*/\n SP?:number\n /*\n A:number, X:number, Y:number, SP:number, R:boolean,\n N,V,D,Z,C:boolean*/\n};\nexport interface EmuState {\n c?:CpuState,\t// CPU state\n b?:Uint8Array|number[], \t// RAM (TODO: not for vcs, support Uint8Array)\n ram?:Uint8Array,\n o?:{},\t\t\t\t// verilog\n};\nexport interface EmuControlsState {\n}\nexport type DisasmLine = {\n line:string,\n nbytes:number,\n isaddr:boolean\n};\n\nexport type SymbolMap = {[ident:string]:number};\nexport type AddrSymbolMap = {[address:number]:string};\n\nexport class DebugSymbols {\n symbolmap : SymbolMap;\t// symbol -> address\n addr2symbol : AddrSymbolMap;\t// address -> symbol\n debuginfo : {}; // extra platform-specific debug info\n\n constructor(symbolmap : SymbolMap, debuginfo : {}) {\n this.symbolmap = symbolmap;\n this.debuginfo = debuginfo;\n this.addr2symbol = invertMap(symbolmap);\n //// TODO: shouldn't be necc.\n if (!this.addr2symbol[0x0]) this.addr2symbol[0x0] = '$00'; // needed for ...\n this.addr2symbol[0x10000] = '__END__'; // ... dump memory to work\n }\n}\n\ntype MemoryMapType = \"main\" | \"vram\";\ntype MemoryMap = { [type:string] : Segment[] };\n\nexport function isDebuggable(arg:any): arg is Debuggable {\n return arg && typeof arg.getDebugCategories === 'function';\n}\n\nexport interface Debuggable {\n getDebugCategories?() : string[];\n getDebugInfo?(category:string, state:EmuState) : string;\n}\n\nexport interface Platform {\n start() : void | Promise;\n reset() : void;\n isRunning() : boolean;\n getToolForFilename(s:string) : string;\n getDefaultExtension() : string;\n getPresets?() : Preset[];\n pause() : void;\n resume() : void;\n loadROM(title:string, rom:any); // TODO: Uint8Array\n loadBIOS?(title:string, rom:Uint8Array);\n getROMExtension?(rom:FileData) : string;\n\n loadState?(state : EmuState) : void;\n saveState?() : EmuState;\n loadControlsState?(state : EmuControlsState) : void;\n saveControlsState?() : EmuControlsState;\n\n inspect?(ident:string) : string;\n disassemble?(addr:number, readfn:(addr:number)=>number) : DisasmLine;\n readAddress?(addr:number) : number;\n readVRAMAddress?(addr:number) : number;\n \n setFrameRate?(fps:number) : void;\n getFrameRate?() : number;\n\n setupDebug?(callback : BreakpointCallback) : void;\n clearDebug?() : void;\n step?() : void;\n runToVsync?() : void;\n runToPC?(pc:number) : void;\n runUntilReturn?() : void;\n stepBack?() : void;\n runEval?(evalfunc : DebugEvalCondition) : void;\n runToFrameClock?(clock : number) : void;\n stepOver?() : void;\n restartAtPC?(pc:number) : boolean;\n\n getOpcodeMetadata?(opcode:number, offset:number) : OpcodeMetadata; //TODO\n getSP?() : number;\n getPC?() : number;\n getOriginPC?() : number;\n newCodeAnalyzer?() : CodeAnalyzer;\n \n getPlatformName?() : string;\n getMemoryMap?() : MemoryMap;\n\n setRecorder?(recorder : EmuRecorder) : void;\n advance?(novideo? : boolean) : number;\n advanceFrameClock?(trap:DebugCondition, step:number) : number;\n showHelp?() : string;\n resize?() : void;\n\n getRasterScanline?() : number;\n getRasterLineClock?() : number;\n setBreakpoint?(id : string, cond : DebugCondition);\n clearBreakpoint?(id : string);\n hasBreakpoint?(id : string) : boolean;\n getCPUState?() : CpuState;\n\n debugSymbols? : DebugSymbols;\n getDebugTree?() : {};\n \n startProbing?() : ProbeRecorder;\n stopProbing?() : void;\n\n isBlocked?() : boolean; // is blocked, halted, or waiting for input?\n\n readFile?(path: string) : FileData;\n writeFile?(path: string, data: FileData) : boolean;\n sourceFileFetch?: (path:string) => FileData;\n\n getDownloadFile?() : {extension:string, blob:Blob};\n getDebugSymbolFile?() : {extension:string, blob:Blob};\n}\n\nexport interface Preset {\n id : string;\n name : string;\n chapter? : number;\n title? : string;\n category?: string;\n}\n\nexport interface MemoryBus {\n read : (address:number) => number;\n write : (address:number, value:number) => void;\n contend?: (address:number, cycles:number) => number;\n isContended?: (address:number) => boolean;\n}\n\nexport type DebugCondition = () => boolean;\nexport type DebugEvalCondition = (c:CpuState) => boolean;\nexport type BreakpointCallback = (s:EmuState, msg?:string) => void;\n// for composite breakpoints w/ single debug function\nexport class BreakpointList {\n id2bp : {[id:string] : Breakpoint} = {};\n getDebugCondition() : DebugCondition {\n if (Object.keys(this.id2bp).length == 0) {\n return null; // no breakpoints\n } else {\n // evaluate all breakpoints\n return () => {\n var result = false;\n for (var id in this.id2bp)\n if (this.id2bp[id].cond())\n result = true;\n return result;\n };\n }\n }\n}\nexport interface Breakpoint {\n cond: DebugCondition;\n};\n\nexport interface EmuRecorder {\n frameRequested() : boolean;\n recordFrame(state : EmuState);\n}\n\n/////\n\nexport abstract class BasePlatform {\n recorder : EmuRecorder = null;\n debugSymbols : DebugSymbols;\n internalFiles : {[path:string] : FileData} = {};\n\n abstract loadState(state : EmuState) : void;\n abstract saveState() : EmuState;\n abstract pause() : void;\n abstract resume() : void;\n abstract advance(novideo? : boolean) : number;\n\n setRecorder(recorder : EmuRecorder) : void {\n this.recorder = recorder;\n }\n updateRecorder() {\n // are we recording and do we need to save a frame?\n if (this.recorder && (this).isRunning() && this.recorder.frameRequested()) {\n this.recorder.recordFrame(this.saveState());\n }\n }\n inspect(sym: string) : string {\n return inspectSymbol((this as any) as Platform, sym);\n }\n getDebugTree() : {} {\n var o : any = { };\n o.state = this.saveState();\n if (this.debugSymbols?.debuginfo) o.debuginfo = this.debugSymbols.debuginfo;\n return o;\n }\n readFile(path: string) : FileData {\n return this.internalFiles[path];\n }\n writeFile(path: string, data: FileData) : boolean {\n this.internalFiles[path] = data;\n return true;\n }\n}\n\nexport abstract class BaseDebugPlatform extends BasePlatform {\n onBreakpointHit : BreakpointCallback;\n debugCallback : DebugCondition;\n debugSavedState : EmuState = null;\n debugBreakState : EmuState = null;\n debugTargetClock : number = 0;\n debugClock : number = 0;\n breakpoints : BreakpointList = new BreakpointList();\n frameCount : number = 0;\n\n abstract getCPUState() : CpuState;\n\n setBreakpoint(id : string, cond : DebugCondition) {\n if (cond) {\n this.breakpoints.id2bp[id] = {cond:cond};\n this.restartDebugging();\n } else {\n this.clearBreakpoint(id);\n }\n }\n clearBreakpoint(id : string) {\n delete this.breakpoints.id2bp[id];\n }\n hasBreakpoint(id : string) {\n return this.breakpoints.id2bp[id] != null;\n }\n getDebugCallback() : DebugCondition {\n return this.breakpoints.getDebugCondition();\n }\n setupDebug(callback : BreakpointCallback) : void {\n this.onBreakpointHit = callback;\n }\n clearDebug() {\n if (this.debugBreakState != null && this.debugSavedState != null) {\n this.loadState(this.debugSavedState);\n }\n this.debugSavedState = null;\n this.debugBreakState = null;\n this.debugTargetClock = -1;\n this.debugClock = 0;\n this.onBreakpointHit = null;\n this.clearBreakpoint('debug');\n this.frameCount = 0;\n }\n setDebugCondition(debugCond : DebugCondition) {\n this.setBreakpoint('debug', debugCond);\n }\n resetDebugging() {\n if (this.debugSavedState) {\n this.loadState(this.debugSavedState);\n } else {\n this.debugSavedState = this.saveState();\n }\n this.debugClock = 0;\n this.debugCallback = this.getDebugCallback();\n this.debugBreakState = null;\n }\n restartDebugging() {\n this.resetDebugging();\n this.resume();\n }\n preFrame() {\n // save state before frame, to record any inputs that happened pre-frame\n if (this.debugCallback && !this.debugBreakState) {\n // save state every frame and rewind debug clocks\n this.debugSavedState = this.saveState();\n this.debugTargetClock -= this.debugClock;\n this.debugClock = 0;\n }\n }\n postFrame() {\n // reload debug state at end of frame after breakpoint\n if (this.debugCallback && this.debugBreakState) {\n this.loadState(this.debugBreakState);\n }\n this.frameCount++;\n }\n pollControls() {\n }\n nextFrame(novideo : boolean) : number {\n this.pollControls();\n this.updateRecorder();\n this.preFrame();\n var steps = this.advance(novideo);\n this.postFrame();\n return steps;\n }\n // default debugging\n abstract getSP() : number;\n abstract getPC() : number;\n abstract isStable() : boolean;\n\n evalDebugCondition() {\n if (this.debugCallback && !this.debugBreakState) {\n this.debugCallback();\n }\n }\n wasBreakpointHit() : boolean {\n return this.debugBreakState != null;\n }\n breakpointHit(targetClock : number, reason? : string) {\n console.log(this.debugTargetClock, targetClock, this.debugClock, this.isStable());\n this.debugTargetClock = targetClock;\n this.debugBreakState = this.saveState();\n console.log(\"Breakpoint at clk\", this.debugClock, \"PC\", this.debugBreakState.c.PC.toString(16));\n this.pause();\n if (this.onBreakpointHit) {\n this.onBreakpointHit(this.debugBreakState, reason);\n }\n }\n haltAndCatchFire(reason : string) {\n this.breakpointHit(this.debugClock, reason);\n }\n runEval(evalfunc : DebugEvalCondition) {\n this.setDebugCondition( () => {\n if (++this.debugClock >= this.debugTargetClock && this.isStable()) {\n var cpuState = this.getCPUState();\n if (evalfunc(cpuState)) {\n this.breakpointHit(this.debugClock);\n return true;\n } else {\n return false;\n }\n }\n });\n }\n runToPC(pc: number) {\n this.debugTargetClock++;\n this.runEval((c) => {\n return c.PC == pc;\n });\n }\n runUntilReturn() {\n var SP0 = this.getSP();\n this.runEval( (c:CpuState) : boolean => {\n return c.SP > SP0; // TODO: check for RTS/RET opcode\n });\n }\n runToFrameClock(clock : number) : void {\n this.restartDebugging();\n this.debugTargetClock = clock;\n this.runEval(() : boolean => { return true; });\n }\n step() {\n this.runToFrameClock(this.debugClock+1);\n }\n stepBack() {\n var prevState;\n var prevClock;\n var clock0 = this.debugTargetClock;\n this.restartDebugging();\n this.debugTargetClock = clock0 - 25; // TODO: depends on CPU\n this.runEval( (c:CpuState) : boolean => {\n if (this.debugClock < clock0) {\n prevState = this.saveState();\n prevClock = this.debugClock;\n return false;\n } else {\n if (prevState) {\n this.loadState(prevState);\n this.debugClock = prevClock;\n }\n return true;\n }\n });\n }\n runToVsync() {\n this.restartDebugging();\n var frame0 = this.frameCount;\n this.runEval( () : boolean => {\n return this.frameCount > frame0;\n });\n }\n}\n\nexport function inspectSymbol(platform : Platform, sym : string) : string {\n if (!platform.debugSymbols) return;\n var symmap = platform.debugSymbols.symbolmap;\n var addr2sym = platform.debugSymbols.addr2symbol;\n if (!symmap || !platform.readAddress) return null;\n var addr = symmap[\"_\"+sym] || symmap[sym]; // look for C or asm symbol\n if (!(typeof addr == 'number')) return null;\n var b = platform.readAddress(addr);\n // don't show 2 bytes if there's a symbol at the next address\n if (addr2sym && addr2sym[addr+1] != null) {\n return \"$\"+hex(addr,4) + \" = $\"+hex(b,2)+\" (\"+b+\" decimal)\"; // unsigned\n } else {\n let b2 = platform.readAddress(addr+1);\n let w = b | (b2<<8);\n return \"$\"+hex(addr,4) + \" = $\"+hex(b,2)+\" $\"+hex(b2,2)+\" (\"+((w<<16)>>16)+\" decimal)\"; // signed\n }\n}\n\n////// 6502\n\nexport function getToolForFilename_6502(fn:string) : string {\n if (fn.endsWith(\"-llvm.c\")) return \"remote:llvm-mos\";\n if (fn.endsWith(\".c\")) return \"cc65\";\n if (fn.endsWith(\".h\")) return \"cc65\";\n if (fn.endsWith(\".s\")) return \"ca65\";\n if (fn.endsWith(\".ca65\")) return \"ca65\";\n if (fn.endsWith(\".dasm\")) return \"dasm\";\n if (fn.endsWith(\".acme\")) return \"acme\";\n if (fn.endsWith(\".wiz\")) return \"wiz\";\n if (fn.endsWith(\".ecs\")) return \"ecs\";\n return \"dasm\"; // .a\n}\n\n// TODO: can merge w/ Z80?\nexport abstract class Base6502Platform extends BaseDebugPlatform {\n\n // some platforms store their PC one byte before or after the first opcode\n // so we correct when saving and loading from state\n debugPCDelta = -1;\n fixPC(c) { c.PC = (c.PC + this.debugPCDelta) & 0xffff; return c; }\n unfixPC(c) { c.PC = (c.PC - this.debugPCDelta) & 0xffff; return c;}\n getSP() { return this.getCPUState().SP };\n getPC() { return this.getCPUState().PC };\n isStable() { return !this.getCPUState()['T']; }\n abstract readAddress(addr:number) : number;\n\n newCPU(membus : MemoryBus) {\n var cpu = new _MOS6502();\n cpu.connectBus(membus);\n return cpu;\n }\n\n getOpcodeMetadata(opcode, offset) {\n return getOpcodeMetadata_6502(opcode, offset);\n }\n\n getOriginPC() : number {\n return (this.readAddress(0xfffc) | (this.readAddress(0xfffd) << 8)) & 0xffff;\n }\n\n disassemble(pc:number, read:(addr:number)=>number) : DisasmLine {\n return disassemble6502(pc, read(pc), read(pc+1), read(pc+2));\n }\n getToolForFilename = getToolForFilename_6502;\n getDefaultExtension() { return \".a\"; };\n\n getDebugCategories() {\n return ['CPU','ZPRAM','Stack'];\n }\n getDebugInfo(category:string, state:EmuState) : string {\n switch (category) {\n case 'CPU': return cpuStateToLongString_6502(state.c);\n case 'ZPRAM': return dumpRAM(state.b||state.ram, 0x0, 0x100);\n case 'Stack': return dumpStackToString(this, state.b||state.ram, 0x100, 0x1ff, 0x100+state.c.SP, 0x20);\n }\n }\n}\n\nexport function cpuStateToLongString_6502(c) : string {\n function decodeFlags(c) {\n var s = \"\";\n s += c.N ? \" N\" : \" -\";\n s += c.V ? \" V\" : \" -\";\n s += c.D ? \" D\" : \" -\";\n s += c.Z ? \" Z\" : \" -\";\n s += c.C ? \" C\" : \" -\";\n s += c.I ? \" I\" : \" -\";\n return s;\n }\n return \"PC \" + hex(c.PC,4) + \" \" + decodeFlags(c) + \"\\n\"\n + \" A \" + hex(c.A) + \" \" + (c.R ? \"\" : \"BUSY\") + \"\\n\"\n + \" X \" + hex(c.X) + \"\\n\"\n + \" Y \" + hex(c.Y) + \" \" + \"SP \" + hex(c.SP) + \"\\n\";\n}\n\nvar OPMETA_6502 = {\n cycletime: [\n 7, 6, 0, 8, 3, 3, 5, 5, 3, 2, 2, 2, 4, 4, 6, 6, 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7, 6, 6, 0, 8, 3, 3, 5, 5, 4, 2, 2, 2, 4, 4, 6, 6, 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7, 6, 6, 0, 8, 3, 3, 5, 5, 3, 2, 2, 2, 3, 4, 6, 6, 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7, 6, 6, 0, 8, 3, 3, 5, 5, 4, 2, 2, 2, 5, 4, 6, 6, 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7, 0, 6, 0, 6, 3, 3, 3, 3, 2, 0, 2, 0, 4, 4, 4, 4, 2, 6, 0, 0, 4, 4, 4, 4, 2, 5, 2, 0, 0, 5, 0, 0, 2, 6, 2, 6, 3, 3, 3, 3, 2, 2, 2, 0, 4, 4, 4, 4, 2, 5, 0, 5, 4, 4, 4, 4, 2, 4, 2, 0, 4, 4, 4, 4, 2, 6, 0, 8, 3, 3, 5, 5, 2, 2, 2, 2, 4, 4, 3, 6, 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7, 2, 6, 0, 8, 3, 3, 5, 5, 2, 2, 2, 0, 4, 4, 6, 6, 2, 5, 0, 8, 4, 4, 6, 6, 2, 4, 0, 7, 4, 4, 7, 7\n ],\n extracycles: [\n 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 1, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1\n ],\n insnlengths: [\n 1, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 2, 3, 3, 3, 3, 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3, 3, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 2, 3, 3, 3, 3, 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3, 1, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 2, 3, 3, 3, 3, 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3, 1, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 2, 3, 3, 3, 3, 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3, 0, 2, 0, 2, 2, 2, 2, 2, 1, 0, 1, 0, 3, 3, 3, 3, 2, 2, 0, 0, 2, 2, 2, 3, 1, 3, 1, 0, 0, 3, 0, 0, 2, 2, 2, 2, 2, 2, 2, 2, 1, 2, 1, 0, 3, 3, 3, 3, 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 1, 0, 3, 3, 3, 3, 2, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 2, 3, 3, 3, 3, 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3, 2, 2, 0, 2, 2, 2, 2, 2, 1, 2, 1, 0, 3, 3, 3, 3, 2, 2, 0, 2, 2, 2, 2, 2, 1, 3, 0, 3, 3, 3, 3, 3\n ],\n validinsns: [\n 1, 2, 0, 0, 0, 2, 2, 0, 1, 2, 1, 0, 0, 3, 3, 0, 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0, 3, 2, 0, 0, 2, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0, 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0, 1, 2, 0, 0, 0, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0, 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0, 1, 2, 0, 0, 0, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0, 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0, 0, 2, 0, 0, 2, 2, 2, 0, 1, 0, 1, 0, 3, 3, 3, 0, 2, 2, 0, 0, 2, 2, 2, 0, 1, 3, 1, 0, 0, 3, 0, 0, 2, 2, 2, 0, 2, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0, 2, 2, 0, 0, 2, 2, 2, 0, 1, 3, 1, 0, 3, 3, 3, 0, 2, 2, 0, 0, 2, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0, 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0, 2, 2, 0, 0, 2, 2, 2, 0, 1, 2, 1, 0, 3, 3, 3, 0, 2, 2, 0, 0, 0, 2, 2, 0, 1, 3, 0, 0, 0, 3, 3, 0\n ],\n}\n\nexport function getOpcodeMetadata_6502(opcode, address) {\n // TODO: more intelligent maximum cycles\n // TODO: must always be new object, b/c we might modify it\n return {\n opcode:opcode,\n minCycles:OPMETA_6502.cycletime[opcode],\n maxCycles:OPMETA_6502.cycletime[opcode] + OPMETA_6502.extracycles[opcode],\n insnlength:OPMETA_6502.insnlengths[opcode]\n };\n}\n\n////// Z80\n\nexport function cpuStateToLongString_Z80(c) {\n function decodeFlags(flags) {\n return printFlags(flags, [\"S\",\"Z\",,\"H\",,\"V\",\"N\",\"C\"], true);\n }\n return \"PC \" + hex(c.PC,4) + \" \" + decodeFlags(c.AF) + \" \" + (c.iff1?\"I\":\"-\") + (c.iff2?\"I\":\"-\") + \"\\n\"\n + \"SP \" + hex(c.SP,4) + \" IR \" + hex(c.IR,4) + \"\\n\"\n + \"IX \" + hex(c.IX,4) + \" IY \" + hex(c.IY,4) + \"\\n\"\n + \"AF \" + hex(c.AF,4) + \" BC \" + hex(c.BC,4) + \"\\n\"\n + \"DE \" + hex(c.DE,4) + \" HL \" + hex(c.HL,4) + \"\\n\"\n ;\n}\n\nexport abstract class BaseZ80Platform extends BaseDebugPlatform {\n\n _cpu;\n waitCycles : number = 0;\n\n newCPU(membus : MemoryBus, iobus : MemoryBus) {\n this._cpu = new Z80();\n this._cpu.connectMemoryBus(membus);\n this._cpu.connectIOBus(iobus);\n return this._cpu;\n }\n\n getPC() { return this._cpu.getPC(); }\n getSP() { return this._cpu.getSP(); }\n isStable() { return true; }\n\n // TODO: refactor other parts into here\n runCPU(cpu, cycles:number) : number {\n this._cpu = cpu; // TODO?\n this.waitCycles = 0; // TODO: needs to spill over betwenn calls\n if (this.wasBreakpointHit())\n return 0;\n var debugCond = this.getDebugCallback();\n var n = 0;\n this.waitCycles += cycles;\n while (this.waitCycles > 0) {\n if (debugCond && debugCond()) {\n debugCond = null;\n break;\n }\n var cyc = cpu.advanceInsn();\n n += cyc;\n this.waitCycles -= cyc;\n }\n return n;\n }\n\n getToolForFilename = getToolForFilename_z80;\n getDefaultExtension() { return \".c\"; };\n // TODO: Z80 opcode metadata\n //this.getOpcodeMetadata = function() { }\n\n getDebugCategories() {\n return ['CPU','Stack'];\n }\n getDebugInfo(category:string, state:EmuState) : string {\n switch (category) {\n case 'CPU': return cpuStateToLongString_Z80(state.c);\n case 'Stack': {\n var sp = (state.c.SP-1) & 0xffff;\n var start = sp & 0xff00;\n var end = start + 0xff;\n if (sp == 0) sp = 0x10000;\n console.log(sp,start,end);\n return dumpStackToString(this, [], start, end, sp, 0xcd);\n }\n }\n }\n disassemble(pc:number, read:(addr:number)=>number) : DisasmLine {\n return disassembleZ80(pc, read(pc), read(pc+1), read(pc+2), read(pc+3));\n }\n}\n\nexport function getToolForFilename_z80(fn:string) : string {\n if (fn.endsWith(\".c\")) return \"sdcc\";\n if (fn.endsWith(\".h\")) return \"sdcc\";\n if (fn.endsWith(\".s\")) return \"sdasz80\";\n if (fn.endsWith(\".ns\")) return \"naken\";\n if (fn.endsWith(\".scc\")) return \"sccz80\";\n if (fn.endsWith(\".z\")) return \"zmac\";\n if (fn.endsWith(\".wiz\")) return \"wiz\";\n return \"zmac\";\n}\n\n////// 6809\n\nexport function cpuStateToLongString_6809(c) {\n function decodeFlags(flags) {\n return printFlags(flags, [\"E\",\"F\",\"H\",\"I\", \"N\",\"Z\",\"V\",\"C\"], true);\n }\n return \"PC \" + hex(c.PC,4) + \" \" + decodeFlags(c.CC) + \"\\n\"\n + \"SP \" + hex(c.SP,4) + \"\\n\"\n + \"DP \" + hex(c.DP,2) + \"\\n\"\n + \" A \" + hex(c.A,2) + \"\\n\"\n + \" B \" + hex(c.B,2) + \"\\n\"\n + \" X \" + hex(c.X,4) + \"\\n\"\n + \" Y \" + hex(c.Y,4) + \"\\n\"\n + \" U \" + hex(c.U,4) + \"\\n\"\n ;\n}\n\nexport function getToolForFilename_6809(fn:string) : string {\n if (fn.endsWith(\".c\")) return \"cmoc\";\n if (fn.endsWith(\".h\")) return \"cmoc\";\n if (fn.endsWith(\".xasm\")) return \"xasm6809\";\n if (fn.endsWith(\".lwasm\")) return \"lwasm\";\n return \"cmoc\";\n}\n\nexport abstract class Base6809Platform extends BaseZ80Platform {\n\n newCPU(membus : MemoryBus) {\n var cpu = Object.create(CPU6809());\n cpu.init(membus.write, membus.read, 0);\n return cpu;\n }\n\n cpuStateToLongString(c:CpuState) {\n return cpuStateToLongString_6809(c);\n }\n disassemble(pc:number, read:(addr:number)=>number) : DisasmLine {\n // TODO: don't create new CPU\n return Object.create(CPU6809()).disasm(read(pc), read(pc+1), read(pc+2), read(pc+3), read(pc+4), pc);\n }\n getDefaultExtension() : string { return \".asm\"; };\n //this.getOpcodeMetadata = function() { }\n getToolForFilename = getToolForFilename_6809;\n getDebugCategories() {\n return ['CPU','Stack'];\n }\n getDebugInfo(category:string, state:EmuState) : string {\n switch (category) {\n case 'CPU': return cpuStateToLongString_6809(state.c);\n default: return super.getDebugInfo(category, state);\n }\n }\n}\n\n\n//TODO: how to get stack_end?\nexport function dumpStackToString(platform:Platform, mem:Uint8Array|number[], start:number, end:number, sp:number, jsrop:number, bigendian?:boolean) : string {\n var s = \"\";\n var nraw = 0;\n //s = dumpRAM(mem.slice(start,start+end+1), start, end-start+1);\n function read(addr) {\n if (addr < mem.length) return mem[addr];\n else return platform.readAddress(addr);\n }\n while (sp < end) {\n sp++;\n // see if there's a JSR on the stack here\n // TODO: make work with roms and memory maps\n var addr = read(sp) + read(sp+1)*256;\n if (bigendian) { addr = ((addr & 0xff) << 8) | ((addr & 0xff00) >> 8) }\n var jsrofs = jsrop==0x20 ? -2 : -3; // 6502 vs Z80\n var opcode = read(addr + jsrofs); // might be out of bounds\n if (opcode == jsrop) { // JSR\n s += \"\\n$\" + hex(sp) + \": \";\n s += hex(addr,4) + \" \" + lookupSymbol(platform, addr, true);\n sp++;\n nraw = 0;\n } else {\n if (nraw == 0)\n s += \"\\n$\" + hex(sp) + \": \";\n s += hex(read(sp)) + \" \";\n if (++nraw == 8) nraw = 0;\n }\n }\n return s+\"\\n\";\n}\n\n// TODO: slow, funky, uses global\nexport function lookupSymbol(platform:Platform, addr:number, extra:boolean) {\n var start = addr;\n var addr2symbol = platform.debugSymbols && platform.debugSymbols.addr2symbol;\n while (addr2symbol && addr >= 0) {\n var sym = addr2symbol[addr];\n if (sym) { // return first symbol we find\n var sym = addr2symbol[addr];\n return extra ? (sym + \" + $\" + hex(start-addr)) : sym;\n }\n if (!extra) break;\n addr--;\n }\n return \"\";\n}\n\n/// new Machine platform adapters\n\nexport interface Machine extends Bus, Resettable, FrameBased, AcceptsROM, HasCPU, SavesState, SavesInputState {\n}\n\nexport function hasVideo(arg:any): arg is VideoSource {\n return typeof arg.connectVideo === 'function';\n}\nexport function hasAudio(arg:any): arg is SampledAudioSource {\n return typeof arg.connectAudio === 'function';\n}\nexport function hasKeyInput(arg:any): arg is AcceptsKeyInput {\n return typeof arg.setKeyInput === 'function';\n}\nexport function hasJoyInput(arg:any): arg is AcceptsJoyInput {\n return typeof arg.setJoyInput === 'function';\n}\nexport function hasPaddleInput(arg:any): arg is AcceptsPaddleInput {\n return typeof arg.setPaddleInput === 'function';\n}\nexport function isRaster(arg:any): arg is RasterFrameBased {\n return typeof arg.getRasterY === 'function';\n}\nexport function hasProbe(arg:any): arg is Probeable {\n return typeof arg.connectProbe == 'function';\n}\nexport function hasBIOS(arg:any): arg is AcceptsBIOS {\n return typeof arg.loadBIOS == 'function';\n}\nexport function hasSerialIO(arg:any): arg is HasSerialIO {\n return typeof arg.connectSerialIO === 'function';\n}\n\nexport abstract class BaseMachinePlatform extends BaseDebugPlatform implements Platform {\n machine : T;\n mainElement : HTMLElement;\n timer : AnimationTimer;\n video : RasterVideo;\n audio : SampledAudio;\n poller : ControllerPoller;\n serialIOInterface : SerialIOInterface;\n serialVisualizer : SerialIOVisualizer;\n\n probeRecorder : ProbeRecorder;\n startProbing;\n stopProbing;\n\n abstract newMachine() : T;\n abstract getToolForFilename(s:string) : string;\n abstract getDefaultExtension() : string;\n abstract getPresets() : Preset[];\n \n constructor(mainElement : HTMLElement) {\n super();\n this.mainElement = mainElement;\n }\n\n reset() {\n this.machine.reset();\n if (this.serialVisualizer != null) this.serialVisualizer.reset();\n }\n loadState(s) { this.machine.loadState(s); }\n saveState() { return this.machine.saveState(); }\n getSP() { return this.machine.cpu.getSP(); }\n getPC() { return this.machine.cpu.getPC(); }\n isStable() \t { return this.machine.cpu.isStable(); }\n getCPUState() { return this.machine.cpu.saveState(); }\n loadControlsState(s) { this.machine.loadControlsState(s); }\n saveControlsState() { return this.machine.saveControlsState(); }\n \n async start() {\n this.machine = this.newMachine();\n const m = this.machine;\n // block on WASM loading\n if (m instanceof BaseWASMMachine) {\n await m.loadWASM();\n }\n var videoFrequency;\n if (hasVideo(m)) {\n var vp = m.getVideoParams();\n this.video = new RasterVideo(this.mainElement, vp.width, vp.height, \n {overscan: !!vp.overscan,\n rotate: vp.rotate|0,\n aspect: vp.aspect});\n this.video.create();\n m.connectVideo(this.video.getFrameData());\n // TODO: support keyboard w/o video?\n if (hasKeyInput(m)) {\n this.video.setKeyboardEvents(m.setKeyInput.bind(m));\n this.poller = new ControllerPoller(m.setKeyInput.bind(m));\n }\n videoFrequency = vp.videoFrequency;\n }\n this.timer = new AnimationTimer(videoFrequency || 60, this.nextFrame.bind(this));\n if (hasAudio(m)) {\n var ap = m.getAudioParams();\n this.audio = new SampledAudio(ap.sampleRate);\n this.audio.start();\n m.connectAudio(this.audio);\n }\n if (hasPaddleInput(m)) {\n this.video.setupMouseEvents();\n }\n if (hasProbe(m)) {\n this.probeRecorder = new ProbeRecorder(m);\n this.startProbing = () => {\n m.connectProbe(this.probeRecorder);\n return this.probeRecorder;\n };\n this.stopProbing = () => {\n m.connectProbe(null);\n };\n }\n if (hasBIOS(m)) {\n this.loadBIOS = (title, data) => {\n m.loadBIOS(data, title);\n };\n }\n if (hasSerialIO(m)) {\n if (this.serialIOInterface == null) {\n this.serialVisualizer = new SerialIOVisualizer(this.mainElement, m);\n } else {\n m.connectSerialIO(this.serialIOInterface);\n }\n }\n }\n\n loadROM(title, data) {\n this.machine.loadROM(data, title);\n this.reset();\n }\n\n loadBIOS : (title, data) => void; // only set if hasBIOS() is true\n\n pollControls() {\n this.poller && this.poller.poll();\n if (hasPaddleInput(this.machine)) {\n this.machine.setPaddleInput(0, this.video.paddle_x);\n this.machine.setPaddleInput(1, this.video.paddle_y);\n }\n // TODO: put into interface\n if (this.machine['pollControls']) {\n this.machine['pollControls']();\n }\n }\n\n advance(novideo:boolean) {\n let trap = this.getDebugCallback();\n var steps = this.machine.advanceFrame(trap);\n if (!novideo && this.video) {\n this.video.updateFrame();\n this.updateVideoDebugger();\n }\n if (!novideo && this.serialVisualizer) {\n this.serialVisualizer.refresh();\n }\n return steps;\n }\n\n updateVideoDebugger() {\n if (!this.isRunning() && isRaster(this.machine) && this.machine.getRasterCanvasPosition) {\n const {x,y} = this.machine.getRasterCanvasPosition();\n if (x >= 0 || y >= 0) {\n const ctx = this.video?.getContext();\n if (ctx) {\n drawCrosshair(ctx, x, y, 1);\n }\n }\n }\n }\n\n advanceFrameClock(trap, step) {\n if (!(step > 0)) return;\n if (this.machine instanceof BaseWASMMachine) {\n return this.machine.advanceFrameClock(trap, step);\n } else {\n return this.machine.advanceFrame(() => {\n return --step <= 0;\n });\n }\n }\n\n isRunning() {\n return this.timer && this.timer.isRunning();\n }\n\n resume() {\n this.timer.start();\n this.audio && this.audio.start();\n }\n\n pause() {\n this.timer.stop();\n this.audio && this.audio.stop();\n }\n\n // so probe views stick around TODO: must be a better way?\n runToVsync() {\n this.restartDebugging();\n var flag = false;\n this.runEval( () : boolean => {\n if (this.getRasterScanline() > 0) flag = true;\n else return flag;\n });\n }\n\n // TODO: reset target clock counter\n getRasterScanline() {\n return isRaster(this.machine) && this.machine.getRasterY ? this.machine.getRasterY() : -1;\n }\n getRasterLineClock() {\n return isRaster(this.machine) && this.machine.getRasterX ? this.machine.getRasterX() : -1;\n }\n\n readAddress(addr : number) : number {\n return this.machine.read(addr);\n }\n\n getDebugCategories() {\n if (isDebuggable(this.machine))\n return this.machine.getDebugCategories();\n }\n getDebugInfo(category:string, state:EmuState) : string {\n return isDebuggable(this.machine) && this.machine.getDebugInfo(category, state);\n }\n}\n\n// TODO: move debug info into CPU?\n\nexport abstract class Base6502MachinePlatform extends BaseMachinePlatform {\n\n getOpcodeMetadata = getOpcodeMetadata_6502;\n getToolForFilename(fn) { return getToolForFilename_6502(fn); }\n\n disassemble(pc:number, read:(addr:number)=>number) : DisasmLine {\n return disassemble6502(pc, read(pc), read(pc+1), read(pc+2));\n }\n getDebugCategories() {\n if (isDebuggable(this.machine))\n return this.machine.getDebugCategories();\n else\n return ['CPU','ZPRAM','Stack'];\n }\n getDebugInfo(category:string, state:EmuState) : string {\n switch (category) {\n case 'CPU': return cpuStateToLongString_6502(state.c);\n case 'ZPRAM': return dumpRAM(state.b||state.ram, 0x0, 0x100);\n case 'Stack': return dumpStackToString(this, state.b||state.ram, 0x100, 0x1ff, 0x100+state.c.SP, 0x20);\n default: return isDebuggable(this.machine) && this.machine.getDebugInfo(category, state);\n }\n }\n}\n\nexport abstract class BaseZ80MachinePlatform extends BaseMachinePlatform {\n\n //getOpcodeMetadata = getOpcodeMetadata_z80;\n getToolForFilename = getToolForFilename_z80;\n\n getDebugCategories() {\n if (isDebuggable(this.machine))\n return this.machine.getDebugCategories();\n else\n return ['CPU','Stack'];\n }\n getDebugInfo(category:string, state:EmuState) : string {\n switch (category) {\n case 'CPU': return cpuStateToLongString_Z80(state.c);\n case 'Stack': {\n var sp = (state.c.SP-1) & 0xffff;\n var start = sp & 0xff00;\n var end = start + 0xff;\n if (sp == 0) sp = 0x10000;\n return dumpStackToString(this, [], start, end, sp, 0xcd);\n }\n default: return isDebuggable(this.machine) && this.machine.getDebugInfo(category, state);\n }\n }\n disassemble(pc:number, read:(addr:number)=>number) : DisasmLine {\n return disassembleZ80(pc, read(pc), read(pc+1), read(pc+2), read(pc+3));\n }\n\n}\n\nexport abstract class Base6809MachinePlatform extends BaseMachinePlatform {\n\n getToolForFilename = getToolForFilename_6809;\n\n getDebugCategories() {\n if (isDebuggable(this.machine))\n return this.machine.getDebugCategories();\n else\n return ['CPU','Stack'];\n }\n getDebugInfo(category:string, state:EmuState) : string {\n switch (category) {\n case 'CPU': return cpuStateToLongString_6809(state.c);\n case 'Stack': {\n var sp = (state.c.SP-1) & 0xffff;\n var start = sp & 0xff00;\n var end = start + 0xff;\n if (sp == 0) sp = 0x10000;\n return dumpStackToString(this, [], start, end, sp, 0x17, true);\n }\n default: return super.getDebugInfo(category, state);\n }\n }\n disassemble(pc:number, read:(addr:number)=>number) : DisasmLine {\n // TODO: don't create new CPU\n return Object.create(CPU6809()).disasm(read(pc), read(pc+1), read(pc+2), read(pc+3), read(pc+4), pc);\n }\n}\n\n///\n\nclass SerialIOVisualizer {\n\n textarea : HTMLTextAreaElement;\n //vlist: VirtualTextScroller;\n device: HasSerialIO;\n lastOutCount = -1;\n lastInCount = -1;\n\n constructor(parentElement: HTMLElement, device: HasSerialIO) {\n this.device = device;\n this.textarea = document.createElement(\"textarea\");\n this.textarea.classList.add('transcript');\n this.textarea.classList.add('transcript-style-2');\n this.textarea.style.display = 'none';\n parentElement.appendChild(this.textarea);\n /*\n this.vlist = new VirtualTextScroller(parentElement);\n this.vlist.create(parentElement, 1024, this.getMemoryLineAt.bind(this));\n this.vlist.maindiv.style.height = '8em';\n this.vlist.maindiv.style.overflow = 'clip';\n */\n }\n reset() {\n this.lastOutCount = 0;\n this.lastInCount = 0;\n this.textarea.style.display = 'none';\n }\n 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- "names": [] -} diff --git a/gen/chunk-DXKJC5TM.js b/gen/chunk-ADS54WVP.js similarity index 96% rename from gen/chunk-DXKJC5TM.js rename to gen/chunk-ADS54WVP.js index b14288d8..a732e70c 100644 --- a/gen/chunk-DXKJC5TM.js +++ b/gen/chunk-ADS54WVP.js @@ -1,2 +1,2 @@ -import{c as O,g as a}from"./chunk-S4FPTY4A.js";var C=!1,K=[[{N:0},{N:1}],[{N:1},{N:0}],[{V:0},{V:1}],[{V:1},{V:0}],[{C:0},{C:1}],[{C:1},{C:0}],[{Z:0},{Z:1}],[{Z:1},{Z:0}]];function L(l,e){if(l==null||e==null)return null;for(var t in l)if(e[t]!=="undefined")return l[t]==e[t];for(var t in e)if(l[t]!=="undefined")return l[t]==e[t];return null}var b=class{constructor(e){this.pc2clockrange={};this.jsrresult={};this.MAX_CYCLES=2e3;this.platform=e}getClockCountsAtPC(e){var t=this.platform.readAddress(e),r=this.platform.getOpcodeMetadata(t,e);return r}traceInstructions(e,t,r,n,u){C&&console.log("trace",a(e),t,r),u||(u={});var f=!0,g=!1;for(let d=0;f&&!g;d++){if(d>=this.MAX_CYCLES){console.log("too many cycles @",a(e),"routine",a(n));break}f=!1,this.WRAP_CLOCKS?(t=t%this.MAX_CLOCKS,r=r%this.MAX_CLOCKS,r==t-1&&(C&&console.log("0-75",a(e),t,r),t=0,r=this.MAX_CLOCKS-1)):(t=Math.min(this.MAX_CLOCKS,t),r=Math.min(this.MAX_CLOCKS,r));let s=this.getClockCountsAtPC(e),m=this.platform.readAddress(e+1),A=this.platform.readAddress(e+2),x=m+(A<<8),c=e,o=this.pc2clockrange[c];if(o==null&&(this.pc2clockrange[c]=o={minclocks:t,maxclocks:r},C&&console.log("new",a(e),a(c),a(n),t,r),f=!0),(o.minclocks!=t||o.maxclocks!=r)&&(this.WRAP_CLOCKS&&t<=r!=o.minclocks<=o.maxclocks&&(C&&console.log("wrap",a(e),a(c),a(n),t,r,o),o.minclocks=t=0,o.maxclocks=r=this.MAX_CLOCKS-1,f=!0),to.maxclocks&&(C&&console.log("max",a(e),a(c),a(n),t,r,o),o.maxclocks=r,f=!0)),!s.insnlength){console.log("Illegal instruction!",a(e),a(s.opcode),s);break}e+=s.insnlength;var S=u;u=null;let M=this.getMaxCyclesForSync(s,m,A);if(typeof M=="number")t=0,r=M,s.minCycles=s.maxCycles=0;else switch(s.opcode){case 25:case 29:case 57:case 61:case 89:case 93:case 121:case 125:case 185:case 187:case 188:case 189:case 190:case 191:case 217:case 221:case 249:case 253:m==0&&(s.maxCycles-=1);break;case 32:t+=s.minCycles,r+=s.maxCycles,this.traceInstructions(x,t,r,x,u);var i=this.jsrresult[x];i?(t=i.minclocks,r=i.maxclocks):(console.log("No JSR result!",a(e),a(x)),t=r);break;case 76:e=x;break;case 64:g=!0;break;case 96:if(n){var i=this.jsrresult[n];i?i={minclocks:Math.min(t,i.minclocks),maxclocks:Math.max(r,i.maxclocks)}:i={minclocks:t,maxclocks:r},this.jsrresult[n]=i,console.log("RTS",a(e),a(n),this.jsrresult[n])}return;case 16:case 48:case 80:case 112:case 144:case 176:case 208:case 240:var y=e+O(m),_=e>>8!=y>>8;_||s.maxCycles--;var h=K[Math.floor((s.opcode-16)/32)],T=L(S,h[0]),p=L(S,h[1]);this.traceInstructions(y,t+s.maxCycles,r+s.maxCycles,n,h[0]),p===!1&&(console.log("branch always taken",a(e),S,h[1]),g=!0),u=h[1],s.maxCycles=s.minCycles;break;case 108:console.log("Instruction not supported!",a(e),a(s.opcode),s);return}C&&console.log("add",a(e),s.minCycles,s.maxCycles),t+=s.minCycles,r+=s.maxCycles}}showLoopTimingForPC(e){this.pc2clockrange={},this.jsrresult={},this.traceInstructions(e|this.platform.getOriginPC(),this.START_CLOCKS,this.MAX_CLOCKS,0,{})}getMaxCyclesForSync(e,t,r){}},R=class extends b{constructor(e){super(e);this.MAX_CLOCKS=76,this.START_CLOCKS=0,this.WRAP_CLOCKS=!0}getMaxCyclesForSync(e,t,r){if(e.opcode==133&&t==2)return 0}},P=class extends b{constructor(e){super(e);this.MAX_CLOCKS=114,this.START_CLOCKS=0,this.WRAP_CLOCKS=!0}getMaxCyclesForSync(e,t,r){if(e.opcode==44&&t==2&&r==32)return 4}};export{R as a,P as b}; -//# sourceMappingURL=chunk-DXKJC5TM.js.map +import{c as O,g as a}from"./chunk-RXF2JDJ3.js";var C=!1,K=[[{N:0},{N:1}],[{N:1},{N:0}],[{V:0},{V:1}],[{V:1},{V:0}],[{C:0},{C:1}],[{C:1},{C:0}],[{Z:0},{Z:1}],[{Z:1},{Z:0}]];function L(l,e){if(l==null||e==null)return null;for(var t in l)if(e[t]!=="undefined")return l[t]==e[t];for(var t in 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