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https://github.com/sehugg/8bitworkshop.git
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added comments to verilog examples
This commit is contained in:
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46f8028117
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@ -2,6 +2,11 @@
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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/*
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/*
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seven_segment_decoder - Decodes a digit into 7 segments.
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segments_to_bitmap - Encodes a 7-segment bitmask into
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a 5x5 bitmap.
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Segment bit indices:
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Segment bit indices:
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6666
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6666
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@ -1,6 +1,10 @@
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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/*
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A bouncing ball using absolute coordinates.
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*/
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module ball_absolute_top(clk, reset, hsync, vsync, rgb);
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module ball_absolute_top(clk, reset, hsync, vsync, rgb);
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input clk;
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input clk;
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@ -3,6 +3,10 @@
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`include "digits10.v"
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`include "digits10.v"
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`include "scoreboard.v"
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`include "scoreboard.v"
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/*
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A brick-smashing ball-and-paddle game.
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*/
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module ball_paddle_top(clk, reset, hpaddle, hsync, vsync, rgb);
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module ball_paddle_top(clk, reset, hpaddle, hsync, vsync, rgb);
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input clk;
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input clk;
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@ -1,6 +1,11 @@
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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/*
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A bouncing ball using the "slipping counter" method, as
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used in Pong, Computer Space, and other early arcade games.
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*/
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module ball_slip_counter_top(clk, reset, hsync, vsync, rgb);
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module ball_slip_counter_top(clk, reset, hsync, vsync, rgb);
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input clk;
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input clk;
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@ -1,4 +1,9 @@
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/*
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A clock divider in Verilog, using both the cascading
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flip-flop method and the counter method.
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*/
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module clock_divider(
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module clock_divider(
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input clk,
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input clk,
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input reset,
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input reset,
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@ -8,6 +8,18 @@
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`include "sound_generator.v"
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`include "sound_generator.v"
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`include "cpu16.v"
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`include "cpu16.v"
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/*
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A full video game console, with the following components:
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64 kilobytes (32,678 16-bit words) of RAM
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16-bit CPU running at 4.857 MHz
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32x30 tile graphics with 256 x 8 tile ROM
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32 16x16 sprites per frame with sprite ROM
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16 colors (two per tile, one per sprite)
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Two game controllers (four direction switches, two buttons)
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One paddle/analog stick controller
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*/
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module cpu_platform(clk, reset, hsync, vsync,
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module cpu_platform(clk, reset, hsync, vsync,
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hpaddle, vpaddle,
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hpaddle, vpaddle,
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switches_p1, switches_p2,
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switches_p1, switches_p2,
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@ -4,6 +4,15 @@
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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/*
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ROM module with 5x5 bitmaps for the digits 0-9.
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digits10_case - Uses the case statement.
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digits10_array - Uses an array and initial block.
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These two modules are functionally equivalent.
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*/
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// module for 10-digit bitmap ROM
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// module for 10-digit bitmap ROM
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module digits10_case(digit, yofs, bits);
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module digits10_case(digit, yofs, bits);
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@ -2,6 +2,13 @@
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`ifndef HVSYNC_GENERATOR_H
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`ifndef HVSYNC_GENERATOR_H
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`define HVSYNC_GENERATOR_H
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`define HVSYNC_GENERATOR_H
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/*
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Video sync generator, used to drive a simulated CRT.
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To use:
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- Wire the hsync and vsync signals to top level outputs
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- Add a 3-bit (or more) "rgb" output to the top level
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*/
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module hvsync_generator(clk, reset, hsync, vsync, display_on, hpos, vpos);
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module hvsync_generator(clk, reset, hsync, vsync, display_on, hpos, vpos);
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input clk;
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input clk;
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@ -2,6 +2,10 @@
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`ifndef LFSR_V
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`ifndef LFSR_V
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`define LFSR_V
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`define LFSR_V
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/*
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Configurable Linear Feedback Shift Register.
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*/
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module LFSR(clk, reset, enable, lfsr);
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module LFSR(clk, reset, enable, lfsr);
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parameter TAPS = 8'b11101; // bitmask for taps
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parameter TAPS = 8'b11101; // bitmask for taps
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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/*
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Paddle demonstration.
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*/
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module paddles_top(clk, reset, hsync, vsync, hpaddle, vpaddle, rgb);
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module paddles_top(clk, reset, hsync, vsync, hpaddle, vpaddle, rgb);
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input clk, reset;
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input clk, reset;
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`include "sprite_bitmap.v"
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`include "sprite_bitmap.v"
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`include "sprite_renderer.v"
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`include "sprite_renderer.v"
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/*
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A simple racing game with two sprites and a scrolling playfield.
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This version does not use a CPU; all logic is straight Verilog.
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*/
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module racing_game_top(clk, hsync, vsync, rgb, hpaddle, vpaddle);
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module racing_game_top(clk, hsync, vsync, rgb, hpaddle, vpaddle);
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input clk;
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input clk;
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`include "sprite_renderer.v"
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`include "sprite_renderer.v"
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`include "cpu8.v"
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`include "cpu8.v"
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/*
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A simple racing game with two sprites and a scrolling playfield.
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This version uses the 8-bit CPU.
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*/
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// uncomment to see scope view
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// uncomment to see scope view
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//`define DEBUG
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//`define DEBUG
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`ifndef RAM_H
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`ifndef RAM_H
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`define RAM_H
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`define RAM_H
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/*
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RAM_sync - Synchronous RAM module.
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RAM_async - Asynchronous RAM module.
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RAM_async_tristate - Async RAM module with bidirectional data bus.
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Module parameters:
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A - number of address bits (default = 10)
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D - number of data bits (default = 8)
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*/
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module RAM_sync(clk, addr, din, dout, we);
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module RAM_sync(clk, addr, din, dout, we);
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parameter A = 10; // # of address bits
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parameter A = 10; // # of address bits
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`include "digits10.v"
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`include "digits10.v"
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`include "ram.v"
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`include "ram.v"
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/*
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Displays a grid of digits on the CRT using a RAM module.
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*/
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module test_ram1_top(clk, reset, hsync, vsync, rgb);
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module test_ram1_top(clk, reset, hsync, vsync, rgb);
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input clk, reset;
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input clk, reset;
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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`include "digits10.v"
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`include "digits10.v"
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/*
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player_stats - Holds two-digit score and one-digit lives counter.
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scoreboard_generator - Outputs video signal with score/lives digits.
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*/
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module player_stats(reset, score0, score1, lives, incscore, declives);
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module player_stats(reset, score0, score1, lives, incscore, declives);
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input reset;
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input reset;
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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`include "lfsr.v"
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`include "lfsr.v"
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/*
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Sound generator module.
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This module has a square-wave oscillator (VCO) which can
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be modulated by a low-frequency oscillator (LFO) and also
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mixed with a LFSR noise source.
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*/
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module sound_generator(clk, reset, spkr,
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module sound_generator(clk, reset, spkr,
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lfo_freq,noise_freq, vco_freq,
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lfo_freq,noise_freq, vco_freq,
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vco_select, noise_select, lfo_shift, mixer);
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vco_select, noise_select, lfo_shift, mixer);
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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/*
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Simple sprite renderer example.
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car_bitmap - ROM for a car sprite.
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sprite_bitmap_top - Example sprite rendering module.
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*/
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module car_bitmap(yofs, bits);
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module car_bitmap(yofs, bits);
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input [3:0] yofs;
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input [3:0] yofs;
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`ifndef SPRITE_RENDERER_H
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`ifndef SPRITE_RENDERER_H
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`define SPRITE_RENDERER_H
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`define SPRITE_RENDERER_H
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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`include "sprite_bitmap.v"
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`include "sprite_bitmap.v"
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/*
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Displays a 16x16 sprite (8 bits mirrored left/right).
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*/
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module sprite_renderer(clk, vstart, load, hstart, rom_addr, rom_bits,
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module sprite_renderer(clk, vstart, load, hstart, rom_addr, rom_bits,
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gfx, in_progress);
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gfx, in_progress);
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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/*
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tank_bitmap - ROM for tank bitmaps (5 different rotations)
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sprite_renderer2 - Displays a 16x16 sprite.
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tank_controller - Handles display and movement for one tank.
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*/
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module tank_bitmap(addr, bits);
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module tank_bitmap(addr, bits);
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input [7:0] addr;
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input [7:0] addr;
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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`include "ram.v"
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`include "ram.v"
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/*
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sprite_scanline_renderer - Module that renders multiple
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sprites whose attributes are fetched from shared RAM,
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and whose bitmaps are stored in ROM. Made to be paired
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with the FEMTO-16 CPU.
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*/
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module example_bitmap_rom(addr, data);
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module example_bitmap_rom(addr, data);
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input [15:0] addr;
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input [15:0] addr;
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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`include "lfsr.v"
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`include "lfsr.v"
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/*
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Scrolling starfield generator using a period (2^16-1) LFSR.
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*/
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module starfield_top(clk, reset, hsync, vsync, rgb);
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module starfield_top(clk, reset, hsync, vsync, rgb);
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input clk, reset;
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input clk, reset;
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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/*
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/*
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Switch test program.
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Player 1 Keys: arrow keys + space + shift
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Player 1 Keys: arrow keys + space + shift
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Player 2 Keys: A/D/W/S + Z + X
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Player 2 Keys: A/D/W/S + Z + X
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*/
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*/
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`include "digits10.v"
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`include "digits10.v"
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`include "sprite_rotation.v"
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`include "sprite_rotation.v"
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/*
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Tank game.
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minefield - Displays the minefield.
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playfield - Displays the playfield maze.
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tank_game_top - Runs the tank game, using two tank_controller
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modules.
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*/
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module minefield(hpos, vpos, mine_gfx);
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module minefield(hpos, vpos, mine_gfx);
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input [8:0] hpos;
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input [8:0] hpos;
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`include "hvsync_generator.v"
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`include "hvsync_generator.v"
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/*
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A simple test pattern using the hvsync_generator module.
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*/
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module test_hvsync_top(clk, reset, hsync, vsync, rgb);
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module test_hvsync_top(clk, reset, hsync, vsync, rgb);
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input clk, reset;
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input clk, reset;
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`include "font_cp437_8x8.v"
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`include "font_cp437_8x8.v"
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`include "ram.v"
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`include "ram.v"
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/*
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Displays a 32x30 grid of 8x8 tiles, whose attributes are
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fetched from RAM, and whose bitmap patterns are in ROM.
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*/
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module tile_renderer(clk, reset, hpos, vpos,
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module tile_renderer(clk, reset, hpos, vpos,
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rgb,
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rgb,
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ram_addr, ram_read, ram_busy,
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ram_addr, ram_read, ram_busy,
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