mirror of
https://github.com/sehugg/8bitworkshop.git
synced 2024-06-09 15:29:29 +00:00
zx: added crt0
This commit is contained in:
Steven Hugg
parent
101f605c6c
commit
f05fde8f47
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@ -2,18 +2,6 @@
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#include <stdio.h>
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#include "bios.h"
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#ifdef __MAIN__
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void main(void);
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void startup(void) __naked {
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__asm
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jp _main
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__endasm;
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}
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#endif
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// http://www.users.globalnet.co.uk/~jg27paw4/pourri/rom-routines.txt
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void init_stdio(void) {
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@ -9,23 +9,6 @@
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#include "bios.h"
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//#link "bios.c"
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void main(void);
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void startup(void) __naked {
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__asm
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; copy initialized data
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LD BC, #l__INITIALIZER
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LD A, B
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LD DE, #s__INITIALIZED
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LD HL, #s__INITIALIZER
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LDIR
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; disable interrupts
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DI
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; start main routine
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jp _main
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__endasm;
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}
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// type aliases for byte/signed byte/unsigned 16-bit
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typedef unsigned char byte;
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typedef signed char sbyte;
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75
src/worker/lib/zx/crt0-zx.lst
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75
src/worker/lib/zx/crt0-zx.lst
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@ -0,0 +1,75 @@
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ASxxxx Assembler V02.00 + NoICE + SDCC mods (Zilog Z80 / Hitachi HD64180), page 1.
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Hexadecimal [16-Bits]
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1 ; crt0.s for ZX Spectrum
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2
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3 .module crt0
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4 .globl _main
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5 .globl ___sdcc_call_hl
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6
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7 ; Ordering of segments for the linker - copied from sdcc crt0.s
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8 .area _CODE
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9 .area _INITIALIZER
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10 .area _HOME
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11 .area _GSINIT
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12 .area _GSFINAL
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13 .area _DATA
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14 .area _INITIALIZED
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15 .area _BSEG
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16 .area _BSS
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17 .area _HEAP
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18
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19 .area _CODE
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20
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0000 21 _Start:
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0000 F3 [ 4] 22 di
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0001 ED 56 [ 8] 23 im 1
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24 ; stack pointer already set by BIOS
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0003 CD 00 00 [17] 25 call gsinit ; Initialize global and static variables.
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0006 CD 00 00 [17] 26 call _main
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0009 C7 [11] 27 rst 0x0 ; Restart when main() returns.
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28
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29 .area _GSINIT
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0000 30 gsinit::
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31
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32 ; Implicitly zeroed global and static variables.
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0000 01 00 00 [10] 33 ld bc, #l__DATA
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0003 78 [ 4] 34 ld a, b
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0004 B1 [ 4] 35 or a, c
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0005 28 0F [12] 36 jr Z, zeroed_data
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0007 21 00 00 [10] 37 ld hl, #s__DATA
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000A 36 00 [10] 38 ld (hl), #0x00
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000C 0B [ 6] 39 dec bc
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000D 78 [ 4] 40 ld a, b
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000E B1 [ 4] 41 or a, c
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000F 28 05 [12] 42 jr Z, zeroed_data
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0011 5D [ 4] 43 ld e, l
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0012 54 [ 4] 44 ld d, h
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0013 13 [ 6] 45 inc de
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0014 ED B0 [21] 46 ldir
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0016 47 zeroed_data:
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48
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49 ; Explicitly initialized global variables.
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0016 01 00 00 [10] 50 ld bc, #l__INITIALIZER
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0019 78 [ 4] 51 ld a, b
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001A B1 [ 4] 52 or a, c
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001B 28 08 [12] 53 jr Z, gsinit_static
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001D 11 00 00 [10] 54 ld de, #s__INITIALIZED
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0020 21 00 00 [10] 55 ld hl, #s__INITIALIZER
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ASxxxx Assembler V02.00 + NoICE + SDCC mods (Zilog Z80 / Hitachi HD64180), page 2.
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Hexadecimal [16-Bits]
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0023 ED B0 [21] 56 ldir
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57
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0025 58 gsinit_static:
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59 ; Explicitly initialized static variables inserted by compiler here.
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60
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61 .area _GSFINAL
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0000 C9 [10] 62 ret
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63
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64 .area _HOME
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65
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42
src/worker/lib/zx/crt0-zx.rel
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42
src/worker/lib/zx/crt0-zx.rel
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@ -0,0 +1,42 @@
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XL2
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H A areas 9 global symbols
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M crt0
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S l__DATA Ref0000
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S _main Ref0000
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S s__DATA Ref0000
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S .__.ABS. Def0000
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S s__INITIALIZED Ref0000
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S ___sdcc_call_hl Ref0000
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S l__INITIALIZER Ref0000
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S s__INITIALIZER Ref0000
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A _CODE size A flags 0 addr 0
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A _INITIALIZER size 0 flags 0 addr 0
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A _HOME size 0 flags 0 addr 0
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A _GSINIT size 25 flags 0 addr 0
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S gsinit Def0000
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A _GSFINAL size 1 flags 0 addr 0
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A _DATA size 0 flags 0 addr 0
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A _INITIALIZED size 0 flags 0 addr 0
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A _BSEG size 0 flags 0 addr 0
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A _BSS size 0 flags 0 addr 0
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A _HEAP size 0 flags 0 addr 0
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T 00 00
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R 00 00 00 00
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T 00 00 F3 ED 56 CD 00 00 CD 00 00 C7
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R 00 00 00 00 00 06 03 00 02 09 01 00
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T 00 00
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R 00 00 03 00
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T 00 00 01 00 00 78 B1 28 0F 21 00 00 36 00 0B 78
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R 00 00 03 00 02 03 00 00 02 0A 02 00
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T 0E 00 B1 28 05 5D 54 13 ED B0
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R 00 00 03 00
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T 16 00
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R 00 00 03 00
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T 16 00 01 00 00 78 B1 28 08 11 00 00 21 00 00 ED
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R 00 00 03 00 02 03 06 00 02 0A 04 00 02 0D 07 00
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T 24 00 B0
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R 00 00 03 00
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T 25 00
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R 00 00 03 00
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T 00 00 C9
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R 00 00 04 00
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65
src/worker/lib/zx/crt0-zx.s
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65
src/worker/lib/zx/crt0-zx.s
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@ -0,0 +1,65 @@
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; crt0.s for ZX Spectrum
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.module crt0
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.globl _main
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.globl ___sdcc_call_hl
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; Ordering of segments for the linker - copied from sdcc crt0.s
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.area _CODE
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.area _INITIALIZER
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.area _HOME
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.area _GSINIT
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.area _GSFINAL
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.area _DATA
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.area _INITIALIZED
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.area _BSEG
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.area _BSS
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.area _HEAP
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.area _CODE
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_Start:
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di
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im 1
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; stack pointer already set by BIOS
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call gsinit ; Initialize global and static variables.
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call _main
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rst 0x0 ; Restart when main() returns.
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.area _GSINIT
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gsinit::
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; Implicitly zeroed global and static variables.
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ld bc, #l__DATA
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ld a, b
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or a, c
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jr Z, zeroed_data
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ld hl, #s__DATA
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ld (hl), #0x00
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dec bc
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ld a, b
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or a, c
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jr Z, zeroed_data
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ld e, l
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ld d, h
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inc de
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ldir
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zeroed_data:
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; Explicitly initialized global variables.
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ld bc, #l__INITIALIZER
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ld a, b
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or a, c
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jr Z, gsinit_static
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ld de, #s__INITIALIZED
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ld hl, #s__INITIALIZER
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ldir
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gsinit_static:
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; Explicitly initialized static variables inserted by compiler here.
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.area _GSFINAL
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ret
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.area _HOME
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27
src/worker/lib/zx/crt0-zx.sym
Normal file
27
src/worker/lib/zx/crt0-zx.sym
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@ -0,0 +1,27 @@
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ASxxxx Assembler V02.00 + NoICE + SDCC mods (Zilog Z80 / Hitachi HD64180), page 1.
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Hexadecimal [16-Bits]
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Symbol Table
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.__.$$$.= 2710 L | .__.ABS.= 0000 G | .__.CPU.= 0000 L
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.__.H$L.= 0000 L | 0 _Start 0000 R | ___sdcc_ **** GX
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_main **** GX | 3 gsinit 0000 GR | 3 gsinit_s 0025 R
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l__DATA **** GX | l__INITI **** GX | s__DATA **** GX
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s__INITI **** GX | s__INITI **** GX | 3 zeroed_d 0016 R
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ASxxxx Assembler V02.00 + NoICE + SDCC mods (Zilog Z80 / Hitachi HD64180), page 2.
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Hexadecimal [16-Bits]
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Area Table
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0 _CODE size A flags 0
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1 _INITIAL size 0 flags 0
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2 _HOME size 0 flags 0
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3 _GSINIT size 25 flags 0
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4 _GSFINAL size 1 flags 0
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5 _DATA size 0 flags 0
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6 _INITIAL size 0 flags 0
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7 _BSEG size 0 flags 0
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8 _BSS size 0 flags 0
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9 _HEAP size 0 flags 0
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@ -265,7 +265,9 @@ var PLATFORM_PARAMS = {
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data_start: 0xf000,
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data_size: 0xfe00-0xf000,
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stack_end: 0xff58,
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},
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extra_link_args: ['crt0-zx.rel'],
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extra_link_files: ['crt0-zx.rel', 'crt0-zx.lst'],
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},
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};
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PLATFORM_PARAMS['sms-sms-libcv'] = PLATFORM_PARAMS['sms-sg1000-libcv'];
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