Steven Hugg
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1cace9d35c
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more verilog unit tests; updated SDCC js/wasm
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2017-11-23 19:16:54 -05:00 |
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Steven Hugg
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aad8efcfec
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added more verilog test cases
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2017-11-22 16:51:21 -05:00 |
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Steven Hugg
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73e908256e
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started adding verilog regress tests
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2017-11-22 09:44:57 -05:00 |
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Steven Hugg
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27a9076cb5
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verilog: 2d array; digits; score; reset w/ no init; more warnings
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2017-11-19 13:26:21 -05:00 |
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Steven Hugg
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4f73cde7cc
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support `include statements in verilog; book link changes; paddle/switches; scope transitions
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2017-11-16 10:30:47 -05:00 |
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Steven Hugg
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b19ebe76df
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started on verilog scope, fixed code change, module top detect
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2017-11-14 12:03:31 -05:00 |
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Steven Hugg
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0ca9f43098
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verilog: multiple modules, sound, tables, reset, module_top detect
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2017-11-13 14:16:52 -05:00 |
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Steven Hugg
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014d659558
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started on .v files; framerate detect
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2017-11-12 11:52:17 -05:00 |
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