{
  "name":"riscv",
  "vars":{
    "reg":{"bits":5, "toks":["zero","x1","x2","x3","x4","x5","x6","x7","x8","x9","x10","x11","x12","x13","x14","x15"]},
    "brop":{"bits":3, "toks":["beq","bne","bx2","bx3","blt","bge","bltu","bgeu"]},
    "imm5":{"bits":5},
    "imm12":{"bits":12},
    "imm20":{"bits":20},
    "rel13":{"bits":13, "iprel":true, "ipofs":0, "ipmul":4},
    "rel20":{"bits":20, "iprel":true, "ipofs":0, "ipmul":4}
  },
  "rules":[
    {"fmt":"add ~reg,~reg,~reg",  "bits":["0000000",2,1,"000",0,"0110011"]},
    {"fmt":"sub ~reg,~reg,~reg",  "bits":["0100000",2,1,"000",0,"0110011"]},
    {"fmt":"xor ~reg,~reg,~reg",  "bits":["0000000",2,1,"100",0,"0110011"]},
    {"fmt":"or ~reg,~reg,~reg",   "bits":["0000000",2,1,"110",0,"0110011"]},
    {"fmt":"and ~reg,~reg,~reg",  "bits":["0000000",2,1,"111",0,"0110011"]},
    {"fmt":"sll ~reg,~reg,~reg",  "bits":["0000000",2,1,"001",0,"0110011"]},
    {"fmt":"srl ~reg,~reg,~reg",  "bits":["0000000",2,1,"101",0,"0110011"]},
    {"fmt":"sra ~reg,~reg,~reg",  "bits":["0100000",2,1,"101",0,"0110011"]},
    {"fmt":"slt ~reg,~reg,~reg",  "bits":["0000000",2,1,"010",0,"0110011"]},
    {"fmt":"sltu ~reg,~reg,~reg", "bits":["0000000",2,1,"011",0,"0110011"]},

    {"fmt":"addi ~reg,~reg,~imm12", "bits":[2,1,"000",0,"0010011"]},
    {"fmt":"xori ~reg,~reg,~imm12", "bits":[2,1,"100",0,"0010011"]},
    {"fmt":"ori ~reg,~reg,~imm12",  "bits":[2,1,"110",0,"0010011"]},
    {"fmt":"andi ~reg,~reg,~imm12", "bits":[2,1,"111",0,"0010011"]},
    {"fmt":"slli ~reg,~reg,~imm5",  "bits":["0000000",2,1,"000",0,"0010011"]},
    {"fmt":"srli ~reg,~reg,~imm5",  "bits":["0000000",2,1,"000",0,"0010011"]},
    {"fmt":"srai ~reg,~reg,~imm5",  "bits":["0100000",2,1,"000",0,"0010011"]},
    {"fmt":"slti ~reg,~reg,~imm12", "bits":[2,1,"010",0,"0010011"]},
    {"fmt":"sltiu ~reg,~reg,~imm12","bits":[2,1,"011",0,"0010011"]},

    {"fmt":"lb ~reg,~imm12(~reg)",   "bits":[1,2,"000",0,"0000011"]},
    {"fmt":"lh ~reg,~imm12(~reg)",   "bits":[1,2,"001",0,"0000011"]},
    {"fmt":"lw ~reg,~imm12(~reg)",   "bits":[1,2,"010",0,"0000011"]},
    {"fmt":"lbu ~reg,~imm12(~reg)",   "bits":[1,2,"100",0,"0000011"]},
    {"fmt":"lhu ~reg,~imm12(~reg)",   "bits":[1,2,"101",0,"0000011"]},

    {"fmt":"sb ~reg,~imm12(~reg)",   "bits":[{"a":1,"b":5,"n":7},2,0,"000",{"a":1,"b":0,"n":5},"0100011"]},
    {"fmt":"sh ~reg,~imm12(~reg)",   "bits":[{"a":1,"b":5,"n":7},2,0,"001",{"a":1,"b":0,"n":5},"0100011"]},
    {"fmt":"sw ~reg,~imm12(~reg)",   "bits":[{"a":1,"b":5,"n":7},2,0,"010",{"a":1,"b":0,"n":5},"0100011"]},

    {"fmt":"~brop ~reg,~reg,~rel13", "bits":[{"a":3,"b":12,"n":1},{"a":3,"b":5,"n":6},2,1,0,{"a":3,"b":1,"n":4},{"a":3,"b":11,"n":1},"1100011"]},

    {"fmt":"jal ~reg,~rel20",       "bits":[{"a":1,"b":20,"n":1},{"a":1,"b":1,"n":10},{"a":1,"b":11,"n":1},{"a":1,"b":12,"n":8},0,"1101111"]},
    {"fmt":"jalr ~reg,~reg,~imm12", "bits":[2,1,"000",0,"1100111"]},

    {"fmt":"lui ~reg,~imm20",   "bits":[1,0,"0110111"]},
    {"fmt":"auipc ~reg,~rel20", "bits":[1,0,"0010111"]},

    {"fmt":"brk", "bits":["0000 0000 0000 0000 0000 0000 0000 0000"]}
  ]
}