mirror of
https://github.com/sehugg/8bitworkshop.git
synced 2024-09-27 08:54:48 +00:00
66 lines
2.8 KiB
INI
66 lines
2.8 KiB
INI
SYMBOLS {
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__STACKSIZE__: type = weak, value = $0600;
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}
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MEMORY {
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# Zero Page
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ZP: file = "", start = $0040, size = $00C0, type = rw, define = yes;
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# Cartridge Header
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HEADER: file = %O, start = $0000, size = $0080, fill = yes;
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# ROM Bank
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PRG: file = %O, start = $4000, size = $4000, fill = yes, define = yes;
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# DMA/Code Banks (interleaved for 4K Holey DMA)
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CHR0: file = %O, start = $8000, size = $1000, fill = yes, define = yes;
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PRG0: file = %O, start = $9000, size = $1000, fill = yes, define = yes;
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CHR1: file = %O, start = $A000, size = $1000, fill = yes, define = yes;
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PRG1: file = %O, start = $B000, size = $1000, fill = yes, define = yes;
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CHR2: file = %O, start = $C000, size = $1000, fill = yes, define = yes;
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PRG2: file = %O, start = $D000, size = $1000, fill = yes, define = yes;
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CHR3: file = %O, start = $E000, size = $1000, fill = yes, define = yes;
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PRG3: file = %O, start = $F000, size = $0FFA, fill = yes, define = yes;
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# CPU Vectors
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VECTORS: file = %O, start = $FFFA, size = $0006, fill = yes;
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# standard 2k SRAM (-zeropage)
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RAM0: file = "", start = $1800, size = $840, define = yes;
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RAM1: file = "", start = $2200, size = __STACKSIZE__, define = yes;
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}
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SEGMENTS {
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ZEROPAGE: load = ZP, type = zp;
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HEADER: load = HEADER, type = ro;
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STARTUP: load = PRG, type = ro, define = yes;
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RODATA: load = PRG, type = ro, define = yes;
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ONCE: load = PRG, type = ro, optional = yes;
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CODE: load = PRG, type = ro, define = yes;
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DATA: load = PRG, run = RAM0, type = rw, define = yes;
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CHR0: load = CHR0, type = ro, optional = yes;
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PRG0: load = PRG0, type = ro, optional = yes;
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CHR1: load = CHR1, type = ro, optional = yes;
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PRG1: load = PRG1, type = ro, optional = yes;
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CHR2: load = CHR2, type = ro, optional = yes;
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PRG2: load = PRG2, type = ro, optional = yes;
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CHR3: load = CHR3, type = ro, optional = yes;
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PRG3: load = PRG3, type = ro, optional = yes;
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VECTORS: load = VECTORS, type = ro;
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BSS: load = RAM0, type = bss, define = yes;
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RAM1: load = RAM1, type = rw, optional = yes;
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}
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FEATURES {
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CONDES: type = constructor,
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label = __CONSTRUCTOR_TABLE__,
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count = __CONSTRUCTOR_COUNT__,
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segment = ONCE;
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CONDES: type = destructor,
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label = __DESTRUCTOR_TABLE__,
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count = __DESTRUCTOR_COUNT__,
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segment = RODATA;
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CONDES: type = interruptor,
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label = __INTERRUPTOR_TABLE__,
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count = __INTERRUPTOR_COUNT__,
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segment = RODATA,
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import = __CALLIRQ__;
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}
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