76 lines
3.2 KiB
Plaintext
76 lines
3.2 KiB
Plaintext
ASxxxx Assembler V02.00 + NoICE + SDCC mods (Zilog Z80 / Hitachi HD64180), page 1.
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Hexadecimal [16-Bits]
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1 ; crt0.s for ZX Spectrum
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2
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3 .module crt0
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4 .globl _main
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5 .globl ___sdcc_call_hl
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6
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7 ; Ordering of segments for the linker - copied from sdcc crt0.s
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8 .area _CODE
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9 .area _INITIALIZER
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10 .area _HOME
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11 .area _GSINIT
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12 .area _GSFINAL
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13 .area _DATA
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14 .area _INITIALIZED
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15 .area _BSEG
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16 .area _BSS
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17 .area _HEAP
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18
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19 .area _CODE
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20
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0000 21 _Start:
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0000 F3 [ 4] 22 di
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0001 ED 56 [ 8] 23 im 1
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24 ; stack pointer already set by BIOS
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0003 CD 00 00 [17] 25 call gsinit ; Initialize global and static variables.
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0006 CD 00 00 [17] 26 call _main
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0009 C7 [11] 27 rst 0x0 ; Restart when main() returns.
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28
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29 .area _GSINIT
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0000 30 gsinit::
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31
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32 ; Implicitly zeroed global and static variables.
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0000 01 00 00 [10] 33 ld bc, #l__DATA
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0003 78 [ 4] 34 ld a, b
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0004 B1 [ 4] 35 or a, c
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0005 28 0F [12] 36 jr Z, zeroed_data
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0007 21 00 00 [10] 37 ld hl, #s__DATA
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000A 36 00 [10] 38 ld (hl), #0x00
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000C 0B [ 6] 39 dec bc
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000D 78 [ 4] 40 ld a, b
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000E B1 [ 4] 41 or a, c
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000F 28 05 [12] 42 jr Z, zeroed_data
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0011 5D [ 4] 43 ld e, l
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0012 54 [ 4] 44 ld d, h
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0013 13 [ 6] 45 inc de
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0014 ED B0 [21] 46 ldir
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0016 47 zeroed_data:
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48
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49 ; Explicitly initialized global variables.
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0016 01 00 00 [10] 50 ld bc, #l__INITIALIZER
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0019 78 [ 4] 51 ld a, b
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001A B1 [ 4] 52 or a, c
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001B 28 08 [12] 53 jr Z, gsinit_static
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001D 11 00 00 [10] 54 ld de, #s__INITIALIZED
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0020 21 00 00 [10] 55 ld hl, #s__INITIALIZER
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ASxxxx Assembler V02.00 + NoICE + SDCC mods (Zilog Z80 / Hitachi HD64180), page 2.
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Hexadecimal [16-Bits]
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0023 ED B0 [21] 56 ldir
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57
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0025 58 gsinit_static:
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59 ; Explicitly initialized static variables inserted by compiler here.
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60
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61 .area _GSFINAL
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0000 C9 [10] 62 ret
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63
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64 .area _HOME
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65
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