mirror of
https://github.com/sehugg/8bitworkshop.git
synced 2024-11-15 14:07:16 +00:00
114 lines
4.0 KiB
Python
Executable File
114 lines
4.0 KiB
Python
Executable File
#!/usr/bin/python
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import sys,string,argparse
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#lochar = 0x20 #48
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#hichar = 0x5e #57
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parser = argparse.ArgumentParser()
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parser.add_argument('-s', '--start', type=int, default=0, help="index of first character")
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parser.add_argument('-e', '--end', type=int, default=255, help="index of last character")
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parser.add_argument('-H', '--height', type=int, default=8, help="character height")
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parser.add_argument('-i', '--invert', action="store_true", help="invert bits")
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parser.add_argument('-r', '--rotate', action="store_true", help="rotate bits")
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parser.add_argument('-f', '--flip', action="store_true", help="flip bits (vertically")
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outfmtgroup = parser.add_mutually_exclusive_group()
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outfmtgroup.add_argument("-A", "--asmhex", action="store_true", help="DASM-compatible hex")
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outfmtgroup.add_argument("-B", "--asmdb", action="store_true", help="Z80ASM-compatible hex")
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outfmtgroup.add_argument("-C", "--carray", action="store_true", help="Nested C array")
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outfmtgroup.add_argument("-F", "--flatcarray", action="store_true", help="Flat C array")
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outfmtgroup.add_argument("-V", "--verilog", action="store_true", help="Verilog-compatible hex")
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parser.add_argument('bdffile', help="BDF bitmap file")
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args = parser.parse_args()
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height = args.height
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lochar = args.start
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hichar = args.end
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invert = args.invert
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flip = args.flip
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rotate = args.rotate
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chars = {}
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inbitmap = 0
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with open(args.bdffile,'r') as f:
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lines = f.readlines()
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for l in lines:
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l = l.strip()
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toks = l.split()
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#print l,toks
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if toks[0] == 'ENCODING':
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chord = int(toks[1])
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elif toks[0] == 'BITMAP':
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inbitmap = True
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bytes = []
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elif toks[0] == 'ENDCHAR':
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inbitmap = False
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if chord >= lochar and chord <= hichar:
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while len(bytes) < height:
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bytes.insert(0,0)
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assert(len(bytes) == height)
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bytes.reverse()
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#print chord,bytes
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chars[chord] = bytes
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elif inbitmap and len(toks) == 1:
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byte = int(toks[0],16)
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bytes.append(byte)
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# output font table
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x = 0
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output = []
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revoutput = []
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rotoutput = []
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rot2output = []
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for ch in range(lochar,hichar+1):
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bytes = chars.get(ch)
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if not bytes:
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bytes = [0] * height
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if flip:
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bytes.reverse()
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if rotate:
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rotbytes = [0] * height
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for x in range(0,height):
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for y in range(0,height):
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rotbytes[-1-x] |= (((bytes[-1-y]>>x)&1)<<y)
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bytes = rotbytes
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#rotoutput[-7+x] |= (((output[-1-y]>>x)&1)<<y)
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#rotoutput[-1-x] |= (((output[-1-y]>>x)&1)<<y)
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#rot2output[-1-x] |= (((output[-7+y]>>x)&1)<<y)
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for b in bytes:
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output.append(b)
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def tohex(v):
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return '%02x'%v
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def tohex2(v):
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return '0x%02x'%v
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def tohexv(v):
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return "8'h%02x"%v
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for arr in [output]:
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if args.asmhex:
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print '\thex ' + string.join(map(tohex,arr),'')
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if args.asmdb:
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for i in range(0,len(output),height):
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print '.DB', string.join(map(tohex2,arr[i:i+height]),','), ';%d'%(i/height+lochar)
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if args.carray:
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print "static char FONT[%d][%d] = {" % (hichar-lochar+1, height)
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for i in range(0,len(output),height):
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print '{', string.join(map(tohex2,arr[i:i+height]),','), '},',
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print
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print "};"
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if args.flatcarray:
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print "static char FONT[%d] = {" % ((hichar-lochar+1) * height)
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print string.join(map(tohex2,arr),',')
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print "}";
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if args.verilog:
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j = 0
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for i in range(0,len(output),height):
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#print "rom["+str(j)+"] = 32'h" + string.join(map(tohex,arr[i:i+height/2]),'') + ";"
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#j += 1
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#print "rom["+str(j)+"] = 32'h" + string.join(map(tohex,arr[i+height/2:i+height]),'') + ";"
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#j += 1
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#print "rom["+str(j)+"] = 64'h" + string.join(map(tohex,arr[i:i+height]),'') + ";"
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print string.join(map(tohexv,arr[i:i+height]),',') + ", //%d" % (i/height)
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j += 1
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