NET "E"       CLOCK_DEDICATED_ROUTE = FALSE;
NET "clock49" CLOCK_DEDICATED_ROUTE = FALSE;

NET "clock49"    LOC="P89" | IOSTANDARD = LVCMOS33 | PERIOD = 20.35ns  ; # 49.152 MHz Oscillator

#NET "VSS"       LOC="P16" | IOSTANDARD = LVCMOS33                           ; # 6809 pin 1
NET "NMI_n"      LOC="P95" | IOSTANDARD = LVCMOS33                           ; # 6809 pin 2
NET "IRQ_n"      LOC="P18" | IOSTANDARD = LVCMOS33                           ; # 6809 pin 3
NET "FIRQ_n"     LOC="P17" | IOSTANDARD = LVCMOS33                           ; # 6809 pin 4
NET "BS"         LOC="P94" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 5
NET "BA"         LOC="P22" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 6
#NET "VCC"       LOC="P23" | IOSTANDARD = LVCMOS33                           ; # 6809 pin 7
NET "Addr<0>"    LOC="P33" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 8
NET "Addr<1>"    LOC="P32" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 9
NET "Addr<2>"    LOC="P34" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 10
NET "Addr<3>"    LOC="P40" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 11
NET "Addr<4>"    LOC="P41" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 12
NET "Addr<5>"    LOC="P36" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 13
NET "Addr<6>"    LOC="P35" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 14
NET "Addr<7>"    LOC="P53" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 15
NET "Addr<8>"    LOC="P54" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 16
NET "Addr<9>"    LOC="P57" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 17
NET "Addr<10>"   LOC="P58" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 18
NET "Addr<11>"   LOC="P60" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 19
NET "Addr<12>"   LOC="P61" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 20
NET "Addr<13>"   LOC="P67" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 21
NET "Addr<14>"   LOC="P68" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 22
NET "Addr<15>"   LOC="P70" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 23
NET "Data<7>"    LOC="P71" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 24
NET "Data<6>"    LOC="P86" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 25
NET "Data<5>"    LOC="P84" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 26
NET "Data<4>"    LOC="P83" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 27
NET "Data<3>"    LOC="P78" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 28
NET "Data<2>"    LOC="P79" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 29
NET "Data<1>"    LOC="P85" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 30
NET "Data<0>"    LOC="P92" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 31
NET "R_W_n"      LOC="P98" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 32
NET "PIN33"      LOC="P3"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 33
NET "PIN34"      LOC="P2"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 34
NET "PIN35"      LOC="P4"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 35
NET "PIN36"      LOC="P5"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 36
NET "RES_n"      LOC="P90" | IOSTANDARD = LVCMOS33                           ; # 6809 pin 37
NET "PIN38"      LOC="P9"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # 6809 pin 38
NET "PIN39"      LOC="P10" | IOSTANDARD = LVCMOS33                           ; # 6809 pin 39
NET "HALT_n"     LOC="P11" | IOSTANDARD = LVCMOS33                           ; # 6809 pin 40

# A jumper to enable 6809E mode
NET "EMode_n"    LOC="P91" | IOSTANDARD = LVCMOS33  ;

# A clock generated from the GODIL's 49.152MHz clock
NET "clock_test" LOC="P12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;

NET "led3"       LOC="P43" | IOSTANDARD = LVCMOS33                           ; # Red LED (near SW1)
NET "led6"       LOC="P25" | IOSTANDARD = LVCMOS33                           ; # Red LED (just left of FPGA)
NET "led8"       LOC="P47" | IOSTANDARD = LVCMOS33                           ; # Green LED (near SW1)
NET "sw1"        LOC="P39" | IOSTANDARD = LVCMOS33                           ; # Left Switch
NET "sw2"        LOC="P69" | IOSTANDARD = LVCMOS33 | PULLUP                  ; # Right Switch

# I/O's for test connector
#NET tvs1        LOC="P48" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # connector pin E2
#NET tvs0        LOC="P49" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # connector pin E3
NET tmosi        LOC="P27" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # connector pin E4
NET tdin         LOC="P44" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # connector pin E5
NET tcclk        LOC="P50" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # connector pin E6
#NET tm1         LOC="P42" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # connector pin E7
#NET thsw        LOC="P99" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ; # connector pin E8

NET "avr_TxD"    LOC="P26" | IOSTANDARD = LVCMOS33                           ;
NET "avr_RxD"    LOC="P15" | IOSTANDARD = LVCMOS33                           ;

NET "trig<0>"    LOC="P62" | IOSTANDARD = LVCMOS33                           ;
NET "trig<1>"    LOC="P63" | IOSTANDARD = LVCMOS33                           ;

NET "test1"      LOC="P65" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
NET "test2"      LOC="P66" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
#NET "test3"     LOC="P12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
#NET "test4"     LOC="P91" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 8 ;
