All: dropped event detection and flush command

Change-Id: I1a393adfe428e2368198b22953de4f6b3c24b957

firmware/AtomBusMon.c

@@ -46,6 +46,7 @@ char *cmdStrings[] = {
   "step",
   "regs",
   "dis",
+  "flush",
   "fill",
   "crc",
   "mem",
@@ -89,6 +90,7 @@ void (*cmdFuncs[])(char *params) = {
   doCmdStep,
   doCmdRegs,
   doCmdDis,
+  doCmdFlush,
   doCmdFill,
   doCmdCrc,
   doCmdMem,
@@ -823,14 +825,29 @@ void logTrigger(trigger_t trigger) {
 }
 
 uint8_t logDetails() {
-  addr_t i_addr = hwRead16(OFFSET_BW_IAL);
-  addr_t b_addr = hwRead16(OFFSET_BW_BAL);
-  data_t b_data = hwRead8(OFFSET_BW_BD);
-  modes_t mode  = hwRead8(OFFSET_BW_M);
-  uint8_t watch = mode & 1;
+  addr_t   i_addr = hwRead16(OFFSET_BW_IAL);
+  addr_t   b_addr = hwRead16(OFFSET_BW_BAL);
+  data_t   b_data = hwRead8(OFFSET_BW_BD);
+  modes_t    mode = hwRead8(OFFSET_BW_M);
+  uint8_t   watch = mode & 1;
+
+  // Process the dropped counter
+  uint8_t dropped = mode >> 4;
+  if (dropped) {
+    logstr("          : ");
+    if (dropped == 15) {
+      logstr(">=");
+    }
+    logint(dropped);
+    logstr(" event");
+    if (dropped > 1) {
+      logc('s');
+    }
+    logstr(" dropped\n");
+  }
 
   // Convert from 4-bit compressed to 10 bit expanded mode representation
-  mode = 1 << mode;
+  mode = 1 << (mode & 0x0f);
 
   // Update the serial console
   if (mode & W_MASK) {
@@ -1213,6 +1230,11 @@ void doCmdDis(char *params) {
   } while ((!endAddr && i < 10) || (endAddr && memAddr > startAddr && memAddr <= endAddr));
 }
 
+void doCmdFlush(char *params) {
+  logstr("Flushing Event FIFO\n");
+  hwCmd(CMD_FIFO_RST, 0);
+}
+
 void doCmdFill(char *params) {
   long i;
   addr_t start;

firmware/AtomBusMon.h

@@ -51,6 +51,7 @@ void doCmdClear(char *params);
 void doCmdContinue(char *params);
 void doCmdCrc(char *params);
 void doCmdDis(char *params);
+void doCmdFlush(char *params);
 void doCmdFill(char *params);
 void doCmdHelp(char *params);
 #if defined(COMMAND_HISTORY)

src/BusMonCore.vhd

@@ -151,6 +151,7 @@ architecture behavioral of BusMonCore is
     signal fifo_din        : std_logic_vector(fifo_width - 1 downto 0);
     signal fifo_dout       : std_logic_vector(fifo_width - 1 downto 0);
     signal fifo_empty      : std_logic;
+    signal fifo_full       : std_logic;
     signal fifo_not_empty1 : std_logic;
     signal fifo_not_empty2 : std_logic;
     signal fifo_rd         : std_logic;
@@ -176,6 +177,8 @@ architecture behavioral of BusMonCore is
 
     signal reset_counter   : std_logic_vector(9 downto 0);
 
+    signal dropped_counter : std_logic_vector(3 downto 0);
+
 begin
 
     inst_oho_dy1 : entity work.Oho_Dy1 port map (
@@ -273,7 +276,7 @@ begin
         wr_en  => fifo_wr_en,
         rd_en  => fifo_rd_en,
         dout   => fifo_dout,
-        full   => open,
+        full   => fifo_full,
         empty  => fifo_empty
     );
     fifo_wr_en <= fifo_wr and busmon_clken;
@@ -284,7 +287,27 @@ begin
     -- DataWr1 is the data being written delayed by 1 cycle
     -- DataRd is the data being read, that is already one cycle late
     -- bw_state1(1) is 1 for writes, and 0 for reads
-    fifo_din <= cycleCount_inst & "0000" & bw_status1 & Data1 & Addr1 & addr_inst;
+    fifo_din <= cycleCount_inst & dropped_counter & bw_status1 & Data1 & Addr1 & addr_inst;
+
+    -- Implement a 4-bit saturating counter of the number of dropped events
+    process (busmon_clk)
+    begin
+        if rising_edge(busmon_clk) then
+            if busmon_clken = '1' then
+                if fifo_rst = '1' then
+                    dropped_counter <= x"0";
+                elsif fifo_wr_en = '1' then
+                    if fifo_full = '1' then
+                        if dropped_counter /= x"F" then
+                            dropped_counter <= dropped_counter + 1;
+                        end if;
+                    else
+                        dropped_counter <= x"0";
+                    end if;
+                end if;
+            end if;
+        end if;
+    end process;
 
     led_trig0 <= trig(0);
     led_trig1 <= trig(1);