diff --git a/firmware/AtomBusMon.c b/firmware/AtomBusMon.c
index 81ec4d5..7a86926 100644
--- a/firmware/AtomBusMon.c
+++ b/firmware/AtomBusMon.c
@@ -7,9 +7,10 @@
 
 #define CTRL_PORT PORTB
 #define CTRL_DDR  DDRB
-#define SINGLE_MASK 0x02
 #define STEP_MASK 0x01
-#define CTRL_MASK (SINGLE_MASK | STEP_MASK)
+#define SINGLE_MASK 0x02
+#define RESET_MASK 0x04
+#define CTRL_MASK (SINGLE_MASK | STEP_MASK | RESET_MASK)
 
 #define AL_PORT PORTD
 #define AL_DIN  PIND
@@ -178,7 +179,10 @@ void doCmdStep(char *params) {
 }
 
 void doCmdReset(char *params) {
-  notImplemented();
+  log0("Resetting 6502\n");
+  CTRL_PORT |= RESET_MASK;
+  Delay_us(100);
+  CTRL_PORT &= ~RESET_MASK;
 }
 
 void doCmdBreak(char *params) {
diff --git a/src/AtomBusMon.vhd b/src/AtomBusMon.vhd
index c8d6948..4bd6039 100644
--- a/src/AtomBusMon.vhd
+++ b/src/AtomBusMon.vhd
@@ -24,7 +24,6 @@ use work.OhoPack.all ;
 
 entity AtomBusMon is
     port (clock49         : in    std_logic;
-          nreset          : in    std_logic;
           
           -- 6502 Signals
           Addr            : in    std_logic_vector(15 downto 0);
@@ -32,6 +31,7 @@ entity AtomBusMon is
           RNW             : in    std_logic;
           Sync            : in    std_logic;
           Rdy             : out   std_logic;
+          nRST            : inout std_logic;
                     
           -- HD44780 LCD
           lcd_rs          : out   std_logic;
@@ -62,10 +62,10 @@ end AtomBusMon;
 architecture behavioral of AtomBusMon is
 
     signal clock_avr   : std_logic;
+    signal nrst_avr    : std_logic;
     signal lcd_rw_int  : std_logic;
     signal lcd_db_in   : std_logic_vector(7 downto 4);
     signal lcd_db_out  : std_logic_vector(7 downto 4);
-    signal nrst        : std_logic;
     signal dy_counter  : std_logic_vector(31 downto 0);
     signal dy_data     : y2d_type ;
 
@@ -73,6 +73,7 @@ architecture behavioral of AtomBusMon is
     signal addr_inst   : std_logic_vector(15 downto 0);
 
     signal single : std_logic;
+    signal reset  : std_logic;
     signal step   : std_logic;
     signal step1  : std_logic;
     signal step2  : std_logic;
@@ -104,7 +105,7 @@ begin
     
     Inst_AVR8: entity work.AVR8 port map(
         clk16M               => clock_avr,
-        nrst                 => nrst,
+        nrst                 => nrst_avr,
 
         portain(0)           => '0',
         portain(1)           => '0',
@@ -127,7 +128,8 @@ begin
         portbin              => (others => '0'),
         portbout(0)          => step,
         portbout(1)          => single,
-        portbout(7 downto 2) => open,
+        portbout(2)          => reset,
+        portbout(7 downto 3) => open,
         
         portdin              => addr_inst(7 downto 0),
         portdout             => open,
@@ -151,7 +153,7 @@ begin
     led6 <= dy_counter(24); -- red
     led8 <= not sw1;        -- green
 
-    nrst <= nsw2;
+    nrst_avr <= nsw2;
     
     -- OHO DY1 Display for Testing
     dy_data(0) <= hex & "0000" & Addr(3 downto 0);
@@ -173,6 +175,11 @@ begin
             if (Sync = '1') then
                 addr_inst <= Addr;
             end if;
+            if (reset = '1') then
+                nRST <= '0';
+            else
+                nRST <= 'Z';
+            end if;
         end if;
     end process;
 
diff --git a/src/constraints.ucf b/src/constraints.ucf
index 11428d8..f7528c3 100644
--- a/src/constraints.ucf
+++ b/src/constraints.ucf
@@ -10,9 +10,8 @@ NET "lcd_db<6>"  LOC="P23" | IOSTANDARD = LVCMOS33 ; # 6847 pin 7
 NET "lcd_db<7>"  LOC="P33" | IOSTANDARD = LVCMOS33 ; # 6847 pin 8
 NET "avr_RxD"    LOC="P32" | IOSTANDARD = LVCMOS33 ; # 6847 pin 9
 NET "avr_TxD"    LOC="P34" | IOSTANDARD = LVCMOS33 ; # 6847 pin 10
-NET "nreset"     LOC="P40" | IOSTANDARD = LVCMOS33 ; # 6847 pin 11
-
 
+NET "nRST"       LOC="P61" | IOSTANDARD = LVCMOS33 ; # 6847 pin 20
 NET "Addr<0>"    LOC="P67" | IOSTANDARD = LVCMOS33 ; # 6847 pin 21
 NET "Addr<1>"    LOC="P68" | IOSTANDARD = LVCMOS33 ; # 6847 pin 22
 NET "Addr<2>"    LOC="P70" | IOSTANDARD = LVCMOS33 ; # 6847 pin 23
@@ -54,7 +53,7 @@ NET tcclk                     LOC=P50 | IOSTANDARD = LVCMOS33 | DRIVE=16 ;
 
 
 
-
+# NET ""  LOC="P40" | IOSTANDARD = LVCMOS33 ; # 6847 pin 11
 # NET ""  LOC="P41" | IOSTANDARD = LVCMOS33 ; # 6847 pin 12
 # NET ""  LOC="P36" | IOSTANDARD = LVCMOS33 ; # 6847 pin 13
 # NET ""  LOC="P35" | IOSTANDARD = LVCMOS33 ; # 6847 pin 14
@@ -62,7 +61,6 @@ NET tcclk                     LOC=P50 | IOSTANDARD = LVCMOS33 | DRIVE=16 ;
 # NET ""  LOC="P54" | IOSTANDARD = LVCMOS33 ; # 6847 pin 16
 # NET ""  LOC="P58" | IOSTANDARD = LVCMOS33 ; # 6847 pin 18
 # NET ""  LOC="P60" | IOSTANDARD = LVCMOS33 ; # 6847 pin 19
-# NET ""  LOC="P61" | IOSTANDARD = LVCMOS33 ; # 6847 pin 20
 
 
 # NET ""  LOC="P48" | IOSTANDARD = LVCMOS33 ; # connector pin E2