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Z80: show halted state when single stepping

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Change-Id: Iefe132a98f6b476d9ab7252f0ce551bf0435b3cd
This commit is contained in:
David Banks 2019-10-30 17:31:49 +00:00
parent b0d7418a47
commit 768863fb85
2 changed files with 7 additions and 3 deletions
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4
firmware/disz80.c
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@ -863,8 +863,10 @@ void disassem (unsigned int *ip) {
unsigned int disassemble(unsigned int addr) {
log0("%04X : ", addr);
if (PDC_DIN & 0x80) {
log0("**NMI**");
log0("**HALT**");
} else if (PDC_DIN & 0x40) {
log0("**NMI**");
} else if (PDC_DIN & 0x20) {
log0("**INT**");
} else {
disassem(&addr);

6
src/T80/T80a.vhd
View File

@ -124,6 +124,7 @@ architecture rtl of T80a is
signal Wait_s : std_logic;
signal MCycle : std_logic_vector(2 downto 0);
signal TState : std_logic_vector(2 downto 0);
signal HALT_n_int : std_logic;
begin
@ -132,6 +133,7 @@ begin
MREQ_n_i <= not MREQ or (Req_Inhibit and MReq_Inhibit);
RD_n_i <= not RD or Req_Inhibit;
WR_n_j <= WR_n_i; -- 0247a
HALT_n <= HALT_n_int;
MREQ_n <= MREQ_n_i when BUSAK_n_i = '1' else 'Z';
IORQ_n <= IORQ_n_i or IReq_Inhibit when BUSAK_n_i = '1' else 'Z'; -- 0247a
@ -162,7 +164,7 @@ begin
NoRead => NoRead,
Write => Write,
RFSH_n => RFSH_n_i,
HALT_n => HALT_n,
HALT_n => HALT_n_int,
WAIT_n => Wait_s,
INT_n => INT_n,
NMI_n => NMI_n,
@ -301,6 +303,6 @@ begin
TS <= TState;
PdcData <= (not NMICycle_n) & (not IntCycle_n) & "000000";
PdcData <= (not HALT_n_int) & (not NMICycle_n) & (not IntCycle_n) & "00000";
end;