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270 Commits

Author SHA1 Message Date
David Banks
b9577f5b01 Updated XPM_T65 to 0.998
Change-Id: I3152215ec4d3d2148c23a4ecb1a6eefcd79329af
2022-02-12 15:07:00 +00:00
David Banks
786132998a Update firmware version to 0.998
Change-Id: Ice975615820bbfae47037799865807e71144e6ab
2021-11-25 20:17:44 +00:00
David Banks
220f96bff8 6502: Treak BRK as a 2-byte opcode
Change-Id: I10251803b3d57652ffdb9684cafb3ebf38903064
2021-11-25 20:15:49 +00:00
David Banks
b96fa11de5 Update firmware version to 0.997
Change-Id: I97065b1c75499b27782de1e472d75a202bd60678
2021-11-18 15:12:32 +00:00
David Banks
08116e5f21 Routed four test signals to J5
Change-Id: Ife39830dc193486c4af66bd49bc5680cab285108
2021-11-18 15:12:12 +00:00
David Banks
3e7bda697c Replace special command with x interrupt control commands
Change-Id: I991171d6923cdc928dd9dbb9823c43aee71661be
2021-11-18 14:45:05 +00:00
David Banks
1244eaf607 .gitignore only
Change-Id: Ifb58b10773ee6a520c6c75fabc1445252761dfbf
2021-11-18 12:59:19 +00:00
David Banks
bf4bef3892 Merge branch 'z80_newcore' into dev
Change-Id: I1bb098ffba4593f048fda4a5aa97fdcc89fc6184
2021-11-18 12:58:29 +00:00
David Banks
1b0c0624ff Updated release script to include .bin files
Change-Id: Ic09c51f721a3c517a43282b053dbdf9a55fba902
2021-09-21 13:20:32 +01:00
David Banks
58978d3e05 Update build scripts to generate .bin files for programming using OpenOCD on a Pi
Change-Id: I39909acc3a1fe4504d5e4c2d20d11b23e3878058
2021-09-21 10:57:25 +01:00
David Banks
ca285abfaf Update firmware version to 0.996
Change-Id: Ibe3fb93ec5f4320c64511649ca25d847ed25fc3a
2021-07-04 19:31:53 +01:00
David Banks
78423708c5 Z80: Ignore machine state in disasseble command
Change-Id: I28b67a53ec8936bb9172aa10ca6548fe0d9e6460
2021-07-04 19:31:13 +01:00
David Banks
0d837de8a6 Z80: fix display of int/nmi/halted state
Change-Id: I3e790598d6d2f1520e1ba4df3b79beaf3c8736f2
2021-07-04 19:20:25 +01:00
David Banks
4b3ed52454 Z80: Ignore wait during internal machine cycles
Change-Id: I2fdeebe9706a868e9757089f1aed544e702146d8
2021-07-04 19:03:52 +01:00
David Banks
246cb88e72 Update firmware version to 0.994
Change-Id: I9ef936cb741d78fd57cd51a06ea7882a24185429
2021-06-30 19:45:39 +01:00
David Banks
785f15c038 Update firmware version to 0.995
Change-Id: I4f340d876b603fdc27db4b9c9c75280f122705ed
2021-06-30 19:45:39 +01:00
David Banks
db014b0e56 Eliminate a divide from hwCmd
Change-Id: I85284e3709679d66a11e7f1c00cbd8db4a25da51
2021-06-30 19:45:39 +01:00
David Banks
4ecd60065e Z80: Revert T80a wrapper to previous version
Change-Id: I856a39c51305e99c3d8b32efe5be1f8ed8b2583f
2021-06-30 19:45:39 +01:00
David Banks
e65951cfbb Z80: Daves's fixes to T80 for ICE-Z80
Change-Id: Id1530b7c3f433ff2ff2b6f7966e3c93657058761
2021-06-30 19:45:39 +01:00
David Banks
670328574b Z80: T80: whitespace
Change-Id: If8617f1a93dd9bb0fc1ff94b2d72924f6db34483
2021-06-30 19:45:39 +01:00
David Banks
8e83d6e21f Z80: Update T80 core to latest from Mister on 30/6/2021
Change-Id: I6c007617ab03796dcd864c0f84d5663e0f4bece9
2021-06-30 19:45:39 +01:00
David Banks
2773dd97b1 Update firmware version to 0.993
Change-Id: I5e261ecca2bf7c15a6fc4b05f5b90e5b5625a295
2021-04-10 16:15:39 +01:00
David Banks
944f951b18 Added timeout command to change the memory timeout
Change-Id: I1e5401356200f20be814ad58f9e7ae7b34fc0a68
2021-04-10 16:15:20 +01:00
David Banks
8f0536c2e9 Update firmware version to 0.992
Change-Id: If0a587272bd6576fc92f23178b33992ba36978bf
2021-03-21 17:44:04 +00:00
David Banks
dc2db74cc3 Z80: Sample IM2 vector at start of T3, not middle
Change-Id: I902d5993e35da092b8b702fc21b3fbcbef4cc8c3
2021-03-21 17:43:51 +00:00
David Banks
6abb27cfbe Update firmware version to 0.991
Change-Id: Id10c3abf34a83666be72d2432bfb1ac4b812b5ca
2021-03-20 17:23:30 +00:00
David Banks
a7cb67c469 Z80: Rd/Wr Mem/IO breakpoint/watchpoint sampled in middle of T3
Change-Id: I9dcca58f121da9e443bd18da8f13a099cfbc2056
2021-03-20 17:22:53 +00:00
David Banks
0e6a31360f Z80: IO Breakpoint/watchpoint mask defaults to 0xFF
Change-Id: Ifbe37871ad9cee29fedc81f967149dc058ab3648
2021-03-20 17:21:03 +00:00
David Banks
97a1e9ad74 Add std=c99 to Makefile.inc
Change-Id: I0b0f74c25117ecf18fd479d55fdf818e205d6be8
2021-03-20 17:20:23 +00:00
David Banks
d218caa40b Updated XPM_T65 to 0.990
Change-Id: Iab134b0375322c226c4d8f3f6f9a4360e933891f
2021-03-13 14:33:45 +00:00
David Banks
530f9118f8 Update firmware version to 0.990
Change-Id: Idc210b311081fa1dffaf0023e6efb0dd2cdc211f
2021-03-13 14:21:13 +00:00
David Banks
6b67360bf3 R65C02: correct cycle counts of JMP (ind) and JMP (ind,x) to 6
Change-Id: I3f7659b0db8d9c6a62577cb5b17052267a0b4154
2021-03-13 14:19:45 +00:00
David Banks
c184b6466a R65C02: fix warnings
Change-Id: I0578e4afcdc0817046bafe2b78fecbfe82102f05
2021-03-13 12:30:59 +00:00
David Banks
839d510af9 R65C02: Whitespace only
Change-Id: I19aa6962d48206dc0eb75cabfa9f230e8872822d
2021-03-13 11:23:31 +00:00
David Banks
709c73999b Updated XPM_T65 to 0.989
Change-Id: I99176656af754985e986c8b2a8bff2a509839c4a
2021-03-11 20:00:41 +00:00
David Banks
ed4d0662ba Update firmware version to 0.989
Change-Id: I2f05fbf43e9b1094f082c70aafd8f4acf30511cb
2021-03-11 19:21:42 +00:00
David Banks
340f7e33f9 65C02: Implement single cycle NOPs
Change-Id: I9e37b42dcce4ee57359e5d3298f38f2eb70663af
2021-03-11 19:02:10 +00:00
David Banks
0aa58bb25c Whitespace only
Change-Id: Ie59536f97544885673000f2a383efd1a1338792b
2021-03-11 19:01:46 +00:00
David Banks
b23bb1d9ce Update firmware version to 0.988
Change-Id: I58b3200646d0272d9f76f70ff2e9d888d6c327a9
2020-06-22 20:40:02 +01:00
David Banks
b708ec59a8 lx9_dave: update WatchEvents from 512x72 to 4096x72
Change-Id: I6b1fac95150592244cd5662c502ff34fbb885d10
2020-06-22 20:39:08 +01:00
David Banks
a2e2f7c1d1 Updated XPM_T65 to 0.987
Change-Id: I4689fa344f47b976b10e249ac0b7f908e2ff291c
2020-06-21 15:22:51 +01:00
David Banks
68b34da5ba Update firmware version to 0.987
Change-Id: I755c8cfac46978f3a2c7f061ba332f36874d0072
2020-06-21 15:08:18 +01:00
David Banks
ca40fe81b3 Extend TimerMode command with prescale and reset address
Change-Id: Ia958ea97175469b642b4a70579f080dd0ff148cc
2020-06-21 15:07:45 +01:00
David Banks
c0275ff059 Make commands 6-bits, add Special and TimerMode commands
Change-Id: I8862fba0cf4c1e54ee831a547bf3337bbe7cf973
2020-06-21 14:12:33 +01:00
David Banks
ddc2ff358c Updated XPM_T65 to 0.986
Change-Id: I8d18dae89123a84ddbbbf7fe34a5fafbddfc0142
2020-06-20 13:14:49 +01:00
David Banks
41afa8edeb Update firmware version to 0.986
Change-Id: I475d10f1481279acbdc55a69bb33ebb39a69d25b
2020-06-17 17:18:11 +01:00
David Banks
e931e93dff 6502: fix duplicate break/watchpoints when Rdy in use
Change-Id: Idc566462c4496290d4d0a8e14fe568c05907a508
2020-06-17 17:14:00 +01:00
David Banks
d38ae01d6f Update firmware version to 0.985
Change-Id: Id50f4f2b2e23cd8ab5e23862cf51e2428c56c40c
2020-06-09 19:10:28 +01:00
David Banks
b07b86195c Firmware: add optional address to next command
Change-Id: I5378e5bb8ec767f6504823d190b774c8f523c879
2020-06-09 19:10:28 +01:00
David Banks
2de5c382a7 6809: fix a bug with write watchpoints seeing data as 0xFF
Change-Id: Id5ca15ad95a5f5bbee242368ca8bb9b2c0cf7364
2020-06-09 18:55:06 +01:00
David Banks
85f52ef918 Update firmware version to 0.984
Change-Id: I2793e20f7b949c3d3c2a73d2a2a8604cc5d51391
2020-05-17 09:56:25 +01:00
David Banks
46d859f68c Firware: Fix a race condition when single stepping at slow (<= 1MHz) clock rates
Change-Id: Iee127a2765559d46f25c7fa1b2ad50cccba6cb9d
2020-05-17 09:55:56 +01:00
David Banks
ac69ecdc21 Update firmware version to 0.983
Change-Id: I4430c306cc289410bbd5b84aef936bce83d4e977
2020-01-29 14:47:33 +00:00
David Banks
9bbefbe631 65C02: BE pin now operates as DBE (works in BBC Master)
Change-Id: I85d3220158362bc304303f0a13280df38522f0a5
2020-01-29 14:47:20 +00:00
David Banks
11887e8f8c Update firmware version to 0.982
Change-Id: If646d169276662ee807d8bf6f2f91c9befae463d
2020-01-28 12:00:39 +00:00
David Banks
6ac7902449 Z80: tristate A and D when reset asserted
Change-Id: Ieeb558b5df1a7b3705874468c98a0b72ebb2d505
2020-01-28 12:00:20 +00:00
David Banks
50a86721e4 Updated XPM_T65 to 0.981
Change-Id: I0c9c2e43edd2ede2806e4795500080c2e7e013ea
2020-01-03 11:30:23 +00:00
David Banks
0f1bab1dcc Update firmware version to 0.981
Change-Id: Ie1a2c363967fdbf7cc35e530d2e2821bd7bf85c8
2019-11-15 18:13:45 +00:00
David Banks
4507d2e0bc 6502: extended mode command to beep
Change-Id: I6d43032fc4b19a869f7104ead3ba82e4cb29c258
2019-11-15 18:03:56 +00:00
David Banks
fde6be197e 6502: Added mode command (BBC Specific)
Change-Id: I67ed5ad32224d0928325b8a41f29041c2fa546cc
2019-11-15 16:10:16 +00:00
David Banks
5ac0c9b419 Update firmware version to 0.98
Change-Id: If056dd68a0ff63b28a1adaf7be0761d2ff850bed
2019-11-15 11:40:39 +00:00
David Banks
40d4c554ad Firmware: Improve missing parameter checking on commands (#7)
Change-Id: I2581bda0136386103973059545d963196d973db7
2019-11-15 11:38:55 +00:00
David Banks
8a384bcc19 6502: fix buffer overrun in disassembler
Change-Id: I12e27eb0d54d81ad98def46cf79d437376b4cc60
2019-11-15 11:36:19 +00:00
David Banks
0a339fee2a Firmware: command ? produces help for command
Change-Id: I690a0fb55f7a5b65dc36bf4fafcefd52374d0fb5
2019-11-15 10:38:03 +00:00
David Banks
9434397d32 6502: Implemented exec command
Change-Id: I6089c925c35ba6141fafc92c48fcb120019ea03d
2019-11-15 10:29:22 +00:00
David Banks
e8c34bbed7 6502: Implemented go command (#12)
Change-Id: I35f3e02c54f87f19e9479985d2783e91fc681e40
2019-11-14 18:33:02 +00:00
David Banks
0035e124cd Comments only
Change-Id: Iff4be31fbb82376ee4ef64f2655c7832dafdad12
2019-11-14 10:19:25 +00:00
David Banks
c4ec468f4a Update firmware version to 0.97
Change-Id: Ic9c2f6eaead3105417877275b621589774c87979
2019-11-13 19:20:00 +00:00
David Banks
206bc0f764 Firmware: added help for individual commands
Change-Id: I476cd6aef3a929670fe90fcdd692508b80321b7e
2019-11-13 19:19:27 +00:00
David Banks
730bacabee Firmware: implemented extended help
Change-Id: I954a73fc12cc4439be73afd2f30a8d7fea7e3a72
2019-11-13 18:54:24 +00:00
David Banks
9bf15b549d Firmware: rename rd/wr commands
Change-Id: I29863a3b4c7282dfe01ed3d9f90258d889c8b3b9
2019-11-13 17:36:42 +00:00
David Banks
6b4e936b30 Firmware: rename breakpoint/watchpoint commands
Change-Id: Id927df3647d3ca04dc397712406eccbf8cd51944
2019-11-13 17:30:47 +00:00
David Banks
c43251576c Firmware: added load and save commands (#10)
Change-Id: I2455e6f6dc5d0ecdca8cb5408f6336b1008ed4a9
2019-11-13 17:06:07 +00:00
David Banks
1bf2358b55 Firmware: added copy and compare commands (#13 and #14)
Change-Id: I22e55b860c8daf2a580760e41232be9ff9ede91a
2019-11-13 15:37:55 +00:00
David Banks
bfb4f531fe Firmware: eliminate usage of sscanf (saves 1864 bytes)
Change-Id: I67c0768bb6a3afcba45178fb971e32738c8317a4
2019-11-12 18:32:44 +00:00
David Banks
bf8688665e Firmware: whitespace only
Change-Id: Idfab542255879199ea65f9d92badfd3635d21f85
2019-11-12 18:04:00 +00:00
David Banks
9d83c99b26 Update firmware version to 0.96
Change-Id: I9f6a7008c38f00ea2a69c370087bdfadbc247cf8
2019-11-12 14:27:33 +00:00
David Banks
abebfe85ab fixup
Change-Id: I1874ecd9e8c3e8733b267e65071c1ce2b4356f04
2019-11-12 14:27:33 +00:00
David Banks
ee7d1da51c 6502: disassmbler tweaks
Change-Id: If6588f2b0af578b497d4f776f0e9dd02c51c3a37
2019-11-12 13:25:56 +00:00
David Banks
aee8bd786d Z80: disassmbler tweaks
Change-Id: I22a3d34516e46bed68eb23ffd9b31cee0a92db6d
2019-11-12 13:25:39 +00:00
David Banks
0e5258197e All: dropped event detection and flush command
Change-Id: I1a393adfe428e2368198b22953de4f6b3c24b957
2019-11-12 12:57:30 +00:00
David Banks
15c212f4b6 6809: eliminate usage of log0
Change-Id: Iddf14f72e9e848703aba07208708b55968d100af
2019-11-12 12:19:21 +00:00
David Banks
ec53c9d54f Update firmware version to 0.95
Change-Id: I171c2212ee4cc7e1c96007165f29d48280abffc4
2019-11-11 11:36:34 +00:00
David Banks
e1bc7d1efa Firmware: dis now allows an end address
Change-Id: Ie248760a48d6c7ed98770c947560961d23cfaccb
2019-11-11 11:36:34 +00:00
David Banks
849300b51c lx9_dave: Baud rate now 115200
Change-Id: I6d29b7ff143828ff78a21a717a3c638553505d81
2019-11-11 11:16:42 +00:00
David Banks
2da36ccb22 Update firmware version to 0.94
Change-Id: I271756929b4506ada9368e6a94307c70fbd669af
2019-11-11 11:15:16 +00:00
David Banks
784942cfdc Z80: improve register formatting, fix flags
Change-Id: I7a8cb0bdbac2769d24f7896dc1d6872a5df167fe
2019-11-11 10:47:24 +00:00
David Banks
c56bdc8392 Z80: eliminate usage of log0
Change-Id: I3d2a637afc68dbc69610be7df39297e7e92fb0f2
2019-11-11 10:46:49 +00:00
David Banks
396210caa8 Firmware: return now repeats last command again
Change-Id: I64fd6ffeb72d845c62ad55c5567c799b7f4690bf
2019-11-10 21:49:10 +00:00
David Banks
d786c317fd Z80: reduce usage of log0
Change-Id: Ie1935de2075c11a3aeb4f12d1253a5bbf1dc79a0
2019-11-10 21:46:27 +00:00
David Banks
76aec95c50 Firmware: removed all log0 calls from AtomBusMon.c
Change-Id: I6cdf61ae6c3c72b700493fe34128a0b21147d0e8
2019-11-10 17:47:48 +00:00
David Banks
b28e49dbd9 Firmware: cleaned up status.c
Change-Id: I59a54b89cf3eb701a10953f4a4450ee0c64b862c
2019-11-10 17:46:00 +00:00
David Banks
f841079548 Firmware: whitespace
Change-Id: Ief519cd00a575e5001a85011f6d76fbcc8518151
2019-11-10 16:39:12 +00:00
David Banks
cbab81263a Firmware: reworked status to avoid log0
Change-Id: I0d9341d31a5d3d26b8a164ca05a0c459d2505126
2019-11-10 16:32:19 +00:00
David Banks
0437543149 Firmware: reworked 65(c)02 disassembler
Change-Id: Id151d9391e774a18c4b81c377630687820ecbf41
2019-11-10 16:18:23 +00:00
David Banks
726e3f4ffa Firmware: whitespace
Change-Id: I5ac36026e9d7b872141384d79a5bff401b42dea3
2019-11-10 15:11:16 +00:00
David Banks
58406e9d1f 6502: reduce usage of log0
Change-Id: I10b5e978d018d96a8d9bf16aebe21a1cbd07217f
2019-11-10 15:06:54 +00:00
David Banks
a46db8f641 Firmware: move logging to status.c
Change-Id: Id3fada3d5902ca9e81794020b24f1f480870e986
2019-11-09 14:18:47 +00:00
David Banks
877e075b4d Update firmware version to 0.93
Change-Id: I83f9e0f8be13a8058fe4265c9a2b45abf7f40c93
2019-11-09 14:13:29 +00:00
David Banks
35e3c8f314 Firmware: Use ESC [ K to blank line
Change-Id: I055057a1b6a17644198bc3f7f3b22d9fd8f19570
2019-11-09 14:13:29 +00:00
David Banks
14a0daaffd Firmware: return inserts blank link
Change-Id: I86f943cb8cb872a25999af378aefdd4987083950
2019-11-09 12:41:19 +00:00
David Banks
10b6c6a744 Firmware: add clock/timeout error detection
Change-Id: Ice0286fb78fb13cd8eb803653b06988c66f7b44a
2019-11-09 12:35:15 +00:00
David Banks
a601d1da97 Firmware: use PROGMEM for trigger strings
Change-Id: I12c1c47c4227056ca87be7b831d5bf3be6d96896
2019-11-09 12:24:52 +00:00
David Banks
db2b33e36f Firmware: fix minor logging bug
Change-Id: I4170cb4c1313b1caabf3367a0a9aeac167e356dc
2019-11-09 11:32:36 +00:00
David Banks
336a0188c3 Firmware: fix minor logging bug
Change-Id: I4fcbd89b1b4a215a460969319d40b9853d36517a
2019-11-09 11:27:57 +00:00
David Banks
a1990490dc Firmware: use PROGMEM for mode strings
Change-Id: Ic657c063ee49844c5fdaaa2391d387242b9e7ae0
2019-11-09 11:27:03 +00:00
David Banks
9711bf3a7c Firmware: fix issue with overflowing data space using progmem strings
Change-Id: I28d37e9cc083fba0a5b988bed11e500cb082dad6
2019-11-09 11:19:16 +00:00
David Banks
76ee231cc6 Firmware: save further 196 bytes by reducing use of log0
Change-Id: I001d0bb77970c46e2856c3c5208bddfbf7f0611f
2019-11-09 10:37:11 +00:00
David Banks
87d77c1108 Firmware: save 648 bytes by reducing use of log0 (varargs)
Change-Id: I7d2fd749e090bdd2ece571bb4488fb1d08040512
2019-11-08 18:31:38 +00:00
David Banks
b8e482389f Update firmware version to 0.92
Change-Id: Ieb9a6c4c8f43ed072ebf0958fc8d690e54db4e2c
2019-11-08 10:39:57 +00:00
David Banks
06270af767 Z80: Fix timing of T80 Int Ack cycles
Change-Id: Id03770dc349f4a6bceea5875dba3f6c55315b311
2019-11-08 10:39:12 +00:00
David Banks
c8f997863e Z80: Fix timing of T80 IO cycles
Change-Id: I769dcb01b95008b62455c86151252fdbd6d0aab5
2019-11-08 09:54:07 +00:00
David Banks
38c57c75a3 Z80: Fix timing of monitor IO cycles
Change-Id: I8c6251afc2e2aaeaa6612458d872e448d6386ea8
2019-11-08 09:53:47 +00:00
David Banks
41c7216c30 Firmware: type change bug in crc command
Change-Id: I046c1e1621d4fa8482f71c8d46c91233f95a6648
2019-11-07 17:35:24 +00:00
David Banks
2a40647e22 Update firmware version to 0.91
Change-Id: I026d124c1ca1f76b4e28aef41278a54bc3eabcd4
2019-11-06 17:35:44 +00:00
David Banks
7706bc572a Firmware: added simple command history
Change-Id: Ifdf90cb1bf92b2611c0d2789a280b589424556af
2019-11-06 17:34:54 +00:00
David Banks
21a30fe9f5 Firmware: optimise type usage, saving ~400 bytes code space
Change-Id: I28b10c2090bd14b20c1542cbed1e3a73a1d648bf
2019-11-06 17:15:06 +00:00
David Banks
58613a50dd Update XPM_T65 with 65C02 0.90 version
Change-Id: I180728d6187f09b35f9509f2b4d1eb08754bb2a3
2019-11-04 20:02:19 +00:00
David Banks
c17264d573 Update firmware version to 0.90
Change-Id: Idcfc1357cbe62208fe2155406586f5d89f6c1b31
2019-11-04 15:23:04 +00:00
David Banks
08cfc81ba1 GODIL: Tidy up .ucf files, all pins 8ms drive
Change-Id: I77d82e3249993deb52151df13229850f63ebc15b
2019-11-04 15:23:04 +00:00
David Banks
41ca5fd481 Z80: fix sw_reset_cpu (sw1)
Change-Id: I75484366054a6175c246fd6bd82b3eb8b937218e
2019-11-04 13:16:36 +00:00
David Banks
25a5ffe762 Update firmware version to 0.89
Change-Id: I7ae397ab08a005ef41141087a21a6819107fcec2
2019-11-04 13:01:54 +00:00
David Banks
30cdb27f5c Z80: add 20-40ns additional address hold time (z80 co pro issue)
Change-Id: I2596b4a9d7c753f78ff6d431458da0ec9bb38a3d
2019-11-04 13:01:18 +00:00
David Banks
007ebd07c2 cosmetic
Change-Id: I072eb985b4913ebd9337f9c6db560deed7aa97ae
2019-11-04 12:30:33 +00:00
David Banks
1540f4f5fa Update firmware version to 0.88
Change-Id: I7a1b6790a122f634a0b469ce3a793516d81a1a36
2019-11-04 12:26:29 +00:00
David Banks
65648aba2b 6809: remove unnecessary step on continue
Change-Id: I6d446db172028a496f571dd01a29c461c70eb09b
2019-11-04 12:25:15 +00:00
David Banks
c3bb8d5b91 Update firmware version to 0.87
Change-Id: I3552ff15c830ef15a61bcfee8e651871a92268de
2019-11-04 11:42:30 +00:00
David Banks
dd8116b364 Firmware: remove superfluous delays
Change-Id: I5c8c5ba9ea87458c05a229973672503bd1aa6100
2019-11-04 11:38:02 +00:00
David Banks
86b8e219eb All: synchronise cpu reset generated by AVR
Change-Id: I05f78a48dda721b882c3dd20755763c94e60b194
2019-11-04 11:37:22 +00:00
David Banks
8e77183c17 65c02: correct value shown an PC
Change-Id: I46d7accb3d02d8018389c01f215a9ef912fb09bf
2019-11-04 11:36:49 +00:00
David Banks
197642d262 All: fix issues at low cpu clock speeds using proper handshaking instead of fixed delays
Change-Id: I86370255634e1919ed79eeafd2b1252c625911f9
2019-11-04 10:43:54 +00:00
David Banks
8724119101 All: rename switches to represent their real function
Change-Id: I6dd61b8b7165e617363d61df5194e35c1a9dcc92
2019-11-04 09:31:56 +00:00
David Banks
663aac5198 6809: cosmetic renaming
Change-Id: I2a6a68289f7bb30ad23387f684dfd1badd6d754c
2019-11-04 09:19:27 +00:00
David Banks
66d109494e All: refactor reset logic, add debouncing
Change-Id: Ie7b57ffcb6aa9aedd52e0b633be16775e9eca822
2019-11-04 09:18:30 +00:00
David Banks
ea39bc3ba2 Firmware: allow command to be entered when there are continuous watchpoints firing
Change-Id: I55f279c251276968de5686be5d7ea1e1044df1ba
2019-11-03 16:05:46 +00:00
David Banks
7452019cb7 Firmware: clear breakpoints on initialization
Change-Id: I893c2b10895e951c636705a0903c7a136c071942
2019-11-03 15:53:43 +00:00
David Banks
c8d084832b 6502: Make RES_n an input (it was bidirectional which is risky in some systems)
Change-Id: I91fbf429b5fb3ada181d73d7fd03ab36046657be
2019-11-03 13:59:50 +00:00
David Banks
ac6e9c1f87 6502: correctly display MSB of SP (fixes #2)
Change-Id: I0274cae032be380a5326792a7513de7b4264c5e0
2019-11-03 13:28:35 +00:00
David Banks
973047db77 6502: Remove superfluous done state
Change-Id: Ieaab323c1d2e553c6636d86ebb31dde4948a0c21
2019-11-03 13:22:25 +00:00
David Banks
bcd1937d3d BusMonCore: fix issue with memory address incrementing too soon
Change-Id: Ie961c50b6c692ecddb181697b8c9a1c37956b9ce
2019-11-03 13:05:19 +00:00
David Banks
5699d02d3d 6502: Update T65 to latest version (same as AtomFpga)
Change-Id: I580c5aff7bd4c7cd234f82c25519a081d20b239f
2019-11-03 12:14:28 +00:00
David Banks
cd89e92a16 Update firmware version to 0.86
Change-Id: Ie1ced9c4eb3be4189b607c95839d776eab157a69
2019-11-02 21:48:31 +00:00
David Banks
7cc6bd93f4 build: include icemulti in overall release package
Change-Id: Iba6962d3d25aec4b6dab080db8a607dcdc50f5f0
2019-11-02 20:09:57 +00:00
David Banks
e01ee2b010 6809: fixed some recent build errors
Change-Id: Ica0aa9de8c2c7d7d15821fa061671f8419b9fbe5
2019-11-02 20:09:19 +00:00
David Banks
2101300f17 Removed unused DCM2
Change-Id: I83a5e682987094bd2b48890fadb639f5e50e8e11
2019-11-02 19:37:57 +00:00
David Banks
fc651b7135 Firmware: removed CPU_EMBEDDED #define as obsolete
Change-Id: I18f593d2abdc44d1d7dd48c5ef0e4bc19a9a0b88
2019-11-02 19:37:15 +00:00
David Banks
3b0286f692 .xise project churn (of no consequence)
Change-Id: I2d8b2093871e594e45f870854540ef06dc98a3a3
2019-11-02 19:31:32 +00:00
David Banks
029ee57f71 BusMonCore: clean up switch/led names
Change-Id: I09e2778ba3718399c436aeb32f587a1cff4f1108
2019-11-02 19:31:32 +00:00
David Banks
c6f860ed2c 6502: seperate top level for GODIL and old LX9, rename modules for consistency
Change-Id: I6d9f390a24b63a303f4a557e49ee68109af4c76a
2019-11-02 19:31:32 +00:00
David Banks
cfce5b1bd7 Z80/6809: rename clocks for consistency
Change-Id: Iecd3ac5ede39865efc58eaa9e45f5892a44acb82
2019-11-02 19:31:32 +00:00
David Banks
e0db1ccd7c Removed ice6502mon as it's never really been used
Change-Id: I0898ea3450573c5dafc143e5589aa0a3b4a1dc6c
2019-11-02 19:31:38 +00:00
David Banks
1227d174a9 Removed ice6502fast as it's never really been used
Change-Id: I7179414838f0488b12f0cc01d51b09184d835546
2019-11-02 19:31:32 +00:00
David Banks
9c4c0837e5 6809: seperate top level for GODIL and old LX9
Change-Id: I4a7d2a67c8aeaabc25d2987edb4a9026e92b1efc
2019-11-02 15:18:33 +00:00
David Banks
29438683b2 Z80: seperate top level for GODIL and old LX9
Change-Id: I1f339996037bb8a20afb7664877e0ed1d53d3868
2019-11-02 14:50:43 +00:00
David Banks
d9f53c1f09 Z80: refactor at top level to better support tristateable outputs
Change-Id: Ic4a55eb99c85ff2032079d8d12c7d7e44803b6e2
2019-11-02 13:26:00 +00:00
David Banks
b8d08ccdaa Z80: lx9_dave add pullups to tristateable outputs
Change-Id: Ibee63f2940c921fde792ff7b63e15c2fbd4e8d32
2019-11-01 18:32:42 +00:00
David Banks
d23ebe6913 Z80: push tristating up to Z80CpuMon
Change-Id: I6fd3e0a170f908d47a7cf0a7f82ab4f74ed980d9
2019-11-01 18:31:31 +00:00
David Banks
71cb5ff561 Z80: started implementing BUSRQ/BUSAK
Change-Id: I3d5ef9842ff5346a2e5df96d69e47ef94a81d8b8
2019-11-01 17:48:17 +00:00
David Banks
0d1bd28e4b Firmware: Use unsigned char for trigger, fix bugs in trigger command
Change-Id: If6515c903e193f12fa6f98feaaaf1738368035ec
2019-10-31 16:19:52 +00:00
David Banks
74116942fc Firmware: show break/watch points when stepping (big change)
Change-Id: I106f3c6ac860d1f1bbae312b154491b5f8a0f86f
2019-10-31 15:23:34 +00:00
David Banks
c2e80e2e4c Build: simplfy makefile by outputting a .bin file
Change-Id: I85cea0011a819fff3789e121a89af05b24ddfbd7
2019-10-31 12:53:23 +00:00
David Banks
da3651abf2 Firmware: correct a superfluous warning message
Change-Id: I877fc5add297358445a5250b245660ca741c7930
2019-10-31 12:06:53 +00:00
David Banks
3b90dc82fc Firmware: allow multiple transient breakpoints
Change-Id: I7a6e929698ec395eff6e22e2aeb507b3c3146dca
2019-10-31 11:49:49 +00:00
David Banks
ceedc701ca Z80: cosmetic (remove replication of a register)
Change-Id: I9ac3bf846da6f713e12b3d336cd9a25b5b6d8c96
2019-10-30 17:41:50 +00:00
David Banks
768863fb85 Z80: show halted state when single stepping
Change-Id: Iefe132a98f6b476d9ab7252f0ce551bf0435b3cd
2019-10-30 17:31:49 +00:00
David Banks
b0d7418a47 Add pullup to ICE-Z80 Mode input on GODIL
Change-Id: I749690f5805adc34bb658f6ba9d161b240fb45a4
2019-10-30 14:29:05 +00:00
David Banks
71aa78ac76 Comment only
Change-Id: Ie75175b6ea1842bf2020149770e7572b2d944ec4
2019-10-29 16:56:49 +00:00
David Banks
8e31fac53e Update firmware version to 0.85
Change-Id: I19ca5204257434e806915831a388194e9c68f5b3
2019-10-29 16:31:19 +00:00
David Banks
ae62114b32 Firmware: better implementation of next command
Change-Id: I4643649a152987d8921af30a71d88aed48c06d0d
2019-10-29 16:30:58 +00:00
David Banks
3a5b0e46e2 Firmware: added next command (transient breakpoint)
Change-Id: Id4c04097b6021f369e9bea0d427b770d4294a125
2019-10-29 16:17:36 +00:00
David Banks
c6bc245b3d Z80: indicate NMI and INT cycles when single stepping
Change-Id: Iafef4059bd136dd9f3aebf2b03ab5ac186e035a6
2019-10-29 15:48:43 +00:00
David Banks
4818f026b2 Removed unused h44780 support (free AVR PortA)
Change-Id: Iadde3718cfd6e8be08b680796d8c9cd01016e694
2019-10-29 14:56:16 +00:00
David Banks
643afe51d3 .xise project churn (of no consequence)
Change-Id: Ibfc0d1d89ca6e83bad34388a7557171650d89c0b
2019-10-27 19:21:26 +00:00
David Banks
ee1510d069 lx9_dave: makefile fixes
Change-Id: I280b33ad597b59b0cbb55a85d919aba67136f339
2019-10-27 19:20:25 +00:00
David Banks
ff3a5143b8 lx9_dave: add build target for loader and unknown
Change-Id: Ic9099b9e4586e86260c4396ee0e64066b729a18d
2019-10-27 18:51:00 +00:00
David Banks
0f061da391 Firmware: fix build error when CPU_EMBEDDED undefined
Change-Id: I559a658cfd814fc45a5afd69150683131f155862
2019-10-27 18:49:52 +00:00
David Banks
87bf4b869b Update firmware version to 0.84
Change-Id: I50ae466b95b84bcacda58180e037c3e90de636b8
2019-10-27 17:33:19 +00:00
David Banks
b6abb6964a Z80: Update all builds to 8 comparators and 16KB code
Change-Id: I8adc986caab323de395301ba397f4c7874e50d49
2019-10-27 17:32:29 +00:00
David Banks
820ee65cee Z80: Add mode input to other icez80 builds build
Change-Id: I1b9130ec3835f08a4c3f429860aff6f09dc92d8c
2019-10-27 17:30:23 +00:00
David Banks
b9ac0628d2 lx9_dave: fix Makefile to build loader and unknown subdirs
Change-Id: I4b2f5b588dd075452226d73269400255d9046cbd
2019-10-27 17:29:21 +00:00
David Banks
0b6e686934 Z80: Disable godil_250 build (no longer fits)
Change-Id: I578f3fb6df2b36ef6a00b25a49ccc5f407bf7961
2019-10-27 17:29:21 +00:00
David Banks
ab80df2406 Z80: give a tad more address delay time (Acorn 2nd Proc issue)
Change-Id: I4872f8cc25d68978e856610ca7abaf4a12520028
2019-10-27 16:27:35 +00:00
David Banks
e76bdc6da2 Z80: Stop T80 in T3 not T2 (work in progress)
Change-Id: I19fa754cc09a068b628116b9636a995c162ad964
2019-10-27 14:52:42 +00:00
David Banks
d479dedf4b Z80: fix bug when NOP mode disbled
Change-Id: I1853967582bf241a74f8fd8687deda2d5555b153
2019-10-27 10:14:35 +00:00
David Banks
2c4ad8363b Z80: corrected watch/breakpoint when wait is being used
Change-Id: Ifb464548650e82fc655524186c07f98ed188e957
2019-10-26 17:39:56 +01:00
David Banks
c39cf8649b Z80: Added mode input to control idle mode
Change-Id: I59c4696c9921ecad62be0785764fdf35ec9d82d5
2019-10-26 15:35:53 +01:00
David Banks
26f0bea110 Z80: Output NOPs when paused (inc M1)
Change-Id: I100fac021d68662497fbd2d0c7428dcaf9ef98a3
2019-10-26 15:19:44 +01:00
David Banks
ac521aad15 Z80: support interrupt masking in hardware
Change-Id: I97683cc03e9d65e496e5f9f2ee366cc0bc18087b
2019-10-25 17:14:27 +01:00
David Banks
a29aa3015a lx9_dave z80: increase code space to 32KB
Change-Id: I7ab22f8cca51184b94e709336b661b8685d02d0b
2019-10-25 17:11:13 +01:00
David Banks
89cd34c7db T80: comments only
Change-Id: Id680066f04c3ede403eea87b6c433c6c913f09a8
2019-10-25 17:07:27 +01:00
David Banks
7bf7e9726d white space only
Change-Id: I11a30f7963f9a5c610910f5f9755e42802d0e73d
2019-10-25 11:04:08 +01:00
David Banks
58e445e10b Firmware: remove manual step in cmdContinue (no longer needed on 6502 or Z80)
Change-Id: I75cdb43b782f8a016ea8e1009cbdac1ecd67169e
2019-10-24 19:29:28 +01:00
David Banks
b80bade3f8 Firmware: rd/wr cmds now use global memAddr
Change-Id: Ia345095fa4dbc6c3d700bf5704aa20cf5bcd911b
2019-10-24 15:54:58 +01:00
David Banks
fbb611ca73 Firware: show ascii value in single location rd/wr
Change-Id: Ie927f677040fc833d43bb598399116e201983023
2019-10-24 15:25:21 +01:00
David Banks
3b4e7802c5 Kicad 6809: manufacturing files for v1.0
Change-Id: Iccc9d5314c6add4ce1db8a4003bc7f81f70e0e75
2019-10-24 14:23:09 +01:00
David Banks
c045ebd10c All 6809 designs now use MC6809CpuMonCore
Change-Id: I97ca73690c7e1258a5b359260d695af25c21ca54
2019-10-24 14:06:03 +01:00
David Banks
ec577bda83 Kicad 6502: manufacturing files for v1.1
Change-Id: I9c5a19ac39c9cb72a955f99ebef8a15e5d3e459c
2019-10-24 10:43:06 +01:00
David Banks
46b832ba62 Kicad: added PDF schematics
Change-Id: I9ea1371b15862b6ded98f4d37e33abbbcdb53a38
2019-10-23 14:19:06 +01:00
David Banks
dc5f96a00a Kicad 6809: fix SOT323; add weak pullup/downs
Change-Id: I9bffce01c26d58362b31c5cb85f868515f82cf0f
2019-10-22 15:03:09 +01:00
David Banks
a6ea45da3f kicad 6502: added weak pullups to 6502 control signals
Change-Id: Iba7afce3f12305b795a8ec8d95fa880e29d4dc03
2019-10-18 12:15:14 +01:00
David Banks
bee6a8cd87 All: Update version to 0.82
Change-Id: I590f0962a7591300747328507ba3b57524d5b3ab
2019-10-18 10:48:15 +01:00
David Banks
be8e23fdfb 6502/65C02: Add memory state machine that takes account of Rdy
Change-Id: I11ae008f630cb2803727204f5c383218656e6cfc
2019-10-18 10:47:50 +01:00
David Banks
b4402844ae 6502/65c02: Implement Rdy internally
Change-Id: I0ddc55cf7d4674c68760f7ad53fcea7d07629f8b
2019-10-17 15:55:49 +01:00
David Banks
3cc7789923 6502/65c02: Uncomment Rdy in .ucf file
Change-Id: I6ef4f92dc4e0438c169d20ab5b05f8d4162478ff
2019-10-17 14:47:08 +01:00
David Banks
9d0e74b94e 6502/65C02: Add power up reset generation (AlanD 65C02 core needs this)
Change-Id: I8e24d0f724dc353be296546815462feba8dffc4b
2019-10-17 11:25:32 +01:00
David Banks
12338bffc9 Use #if defined() everywhere for consistency
Change-Id: Ie291a7cb155b0a2244bdb4d31e91d03d29006157
2019-10-16 20:44:36 +01:00
David Banks
f4bff7757c Use CPU_65C02 for defined as CPU == 65C02 doesn't work
Change-Id: Ibedbac5941ab897f0d530dfa3d73cc516d62bd8f
2019-10-16 20:41:08 +01:00
David Banks
1c44718f91 Seperate 6502 and 65c02 builds
Change-Id: I41af27c62e61a6490bda4da01da6e4f8740121fb
2019-10-16 20:40:15 +01:00
David Banks
cc1c8ba709 Multiboot: increase cclk to 26MHz
Change-Id: I7bb6c17a582c7d283458bd7ed8a1bc2852bb73b3
2019-10-16 16:11:44 +01:00
David Banks
131312e0e9 Multiboot: initial impl
Change-Id: I7efa2cf8079b4bfc1e89c5c26ecce30dfae34782
2019-10-16 15:49:58 +01:00
David Banks
833471b31f z80: version now 0.80
Change-Id: I9b2b81f5f38fbc1da1eb5d61321512e7d7772d61
2019-10-15 18:03:43 +01:00
David Banks
ddaa266c12 z80: fix a T80 build error on Spartan 3
Change-Id: I6fca1eea44e1cc8e244d3d892ee25e0b7fea9eac
2019-10-15 16:28:55 +01:00
David Banks
f710f7a20f z80: updated T80 to version 350
Copyright (c) 2018 Sorgelig

Taken from https://github.com/EisernSchild/t80/commit/cbaa6450b

Changes I needed to make afterwards:
1. Fixup T80_Pack.vhd (missing params)
2. Replace T80a.vhd with my own version

Change-Id: I275153ffbddb0d9d5b2d8b1fdc2109468cafb256
2019-10-15 15:47:55 +01:00
David Banks
975ba22848 z80: temporarily disable IORQ_inhibit
The fixed unreliable IM2 interrupts on the Acorn Z80 Co Pro

Change-Id: Icd7e55a8a92391bd81218e9646bd243992677ce8
2019-10-15 11:48:32 +01:00
David Banks
5845409961 z80: added a resume state
This allows time for the paused instruction to be re-read

Without this, the Acorn Z80 Co Pro always seemed to be single
stepping NOP instructions.

Change-Id: I0bcb424293071efc0370b862854455a33f42faf2
2019-10-15 11:46:50 +01:00
David Banks
9bcea56588 z80: CLK_n timing constraint now 8MHz
Change-Id: Ia544905845a8b7996ff3e381a1e47184cc5dda82
2019-10-15 11:45:51 +01:00
David Banks
50658b358e z80: generate RFSH_n cycles when stopped
Change-Id: Ice9a78932bda74098cdde8d0a5571bc4bb784bb4
2019-10-14 20:26:04 +01:00
David Banks
d9d552475a z80: rework wait state / break point logic
Change-Id: I2b41c014165e8d753693d3ed7806087e85202a6e
2019-10-14 17:33:32 +01:00
David Banks
4c746994cb z80: major rewrite of memory access state machine
Change-Id: Icc5c7c991120ed155691c1e74517ac02f8ea2ada
2019-10-14 13:35:13 +01:00
David Banks
984ac1a2d3 z80: fixed an error in board.ucf in the previous commit
Change-Id: Ib83916a7e1d1dcc163001ab342e65b80858d9c29
2019-10-03 18:26:15 +01:00
David Banks
dfeaff9488 6502: minor fixes to lx9_dave, boots in beeb
Change-Id: I18c909f7586b439d52ecc938d4a9bb7a3e6d76e5
2019-10-03 13:17:18 +01:00
David Banks
c08084d703 Kicad 6809e: Initial schematic and layout
Change-Id: I1f3988a54ba62f626f5644a8ad20651948e5fbe7
2019-10-01 18:37:35 +01:00
David Banks
2a79bc6819 6809: Added special command to inhibit IRQ/FIRQ/NMI
Change-Id: I9b94fec5f464ecdb6bb0a4cd2a430401a182c929
2019-10-01 15:21:28 +01:00
David Banks
a1591e4e97 Kicad z80: added manufacturing files
Change-Id: I90ceb9f1e56ee000a9704d423b4f0298baf85de8
2019-09-22 16:01:34 +01:00
David Banks
6b2cc8c6ed Kicad 6502: added manufacturing files
Change-Id: I9ec163c55ca61acad41b0155dbb50ff9f188ccf4
2019-09-22 16:01:21 +01:00
David Banks
80a3003e86 Kicad 6502: change via sizes
Change-Id: I8dcd3cc5ac6fae908891b67d9d1c4ddfbb9d1988
2019-09-22 15:46:52 +01:00
David Banks
08aea66a31 Kicad z80: change via sizes
Change-Id: I87a36dab22496e9229797047826a10f0319e28f1
2019-09-22 15:46:43 +01:00
David Banks
cf34e40cd9 Kicad z80: add more power vias
Change-Id: If1bc8cabde72e3d8b67fdd21e4c5b55accf4307d
2019-09-22 14:34:11 +01:00
David Banks
9413f4beef Kicad 6502: add more power vias
Change-Id: I293a495840e0f96dae8bd8866a7b1adfe1f79e49
2019-09-22 13:52:25 +01:00
David Banks
675e32ca92 Kicad 6502: final tweaks
Change-Id: Id3d45fc11b7cfa304b3275ba0561da354e969d0a
2019-09-22 12:43:02 +01:00
David Banks
7d6c003f97 Kicad 6502: renamed v2 to v1
Change-Id: I493f0bce7b4e01e127eb6f59b814509261079bc2
2019-09-20 15:41:45 +01:00
David Banks
30e9db9f0a Kicad 6502: deleted old v1 design
Change-Id: I587c707cf754200da95cf51cbf9c0cd49d687b72
2019-09-20 15:41:11 +01:00
David Banks
c660ea87be Updated lx9_dave/ice6502 for active level shifter design
Change-Id: Ib2e98050d02c9c1e3dd7c9a9b63eea118b95a540
2019-09-20 15:34:44 +01:00
David Banks
a25a008ffc Updated lx9_dave/icez80 for active level shifter design
Change-Id: I546e1afc0943443f444ae7f55783bac7e3379453
2019-09-20 15:34:34 +01:00
David Banks
864bcf68df Kicad z80: added clock filtering
Change-Id: Iffb927aec6c569c380b294d3bcf015d7ca117871
2019-09-20 12:42:26 +01:00
David Banks
18556aa2f6 Kicad 6502: added clock filtering
Change-Id: Ie6bed6f3463082afe51a1fb8c050a8b091c48733
2019-09-20 12:42:18 +01:00
David Banks
9c6960cc04 ICE-6809: Added glitch filtering to E
Change-Id: Ide53c1776bc1eafc5fd746415a83a1f34f32b3a0
2019-09-17 17:36:11 +01:00
David Banks
d86d51e020 ICE-6809: Adjusted the timings slightly
Change-Id: I56ef5d22df2a329bba2853bcc7d39571492edb01
2019-09-17 16:17:36 +01:00
David Banks
b7d6ca23b3 Revert accidental change to MC6809ECpuMon
Change-Id: I7c5627b8a056bc1a784af1d8ed4cdc61862e7aa2
2019-09-17 10:31:12 +01:00
David Banks
805e8deca1 Kicad: 6502 - improve 5V feed
Change-Id: Ica39a67ed9f85275c6b1dc0a90cf37d0e31e3e30
2019-09-15 22:12:26 +01:00
David Banks
e01e5dc04b Kicad: z80 - silk screen
Change-Id: Ic8d5d61c4317fe6d5aab339d12e606a732d2d521
2019-09-15 21:55:17 +01:00
David Banks
9271f09183 Kicad: 6502 - updated references
Change-Id: I45bc5e4fd75b5cd01ca32841c63654ae4ecd3aa0
2019-09-15 21:53:40 +01:00
David Banks
bfc63310d1 Added cache.lib to .gitignore
Change-Id: Ib26cd344c22a5ebca30d61e0b7d87c4af35061ef
2019-09-15 21:37:50 +01:00
David Banks
33c166ac1c Kicad: Added Z80 adapter
Change-Id: I18a319dd64b15621c386cd75942a09155ef6ca45
2019-09-15 21:32:46 +01:00
David Banks
5b275de71f Kicad v2: added board ID inputs
Change-Id: Icd6a9a87a3867341f807e1a5e4e62fdbedf48ec2
2019-09-15 13:32:35 +01:00
David Banks
baee10c8b3 Kicad v2: added build for manufacturing files
Change-Id: I4a3f04d7ee044a9d6b395d2303a9b2331e0d8fa6
2019-09-13 17:10:34 +01:00
David Banks
2ea31b9ad9 Kicad v2: pullups now 22K
Change-Id: Ifc62323672c629df6b52f226b6476b2ad5518f38
2019-09-13 16:37:18 +01:00
David Banks
ade0278509 Kicad v2: tidy silk screen
Change-Id: If12620a298bd5fbff141099f2c71169e6e205514
2019-09-13 16:27:09 +01:00
David Banks
c176820200 Kicad v2: rename links
Change-Id: I2fc630457c3b052049f75c04c1aff412362bf5d8
2019-09-13 15:40:31 +01:00
David Banks
03347ad73c Kicad v2: tidy silk screen
Change-Id: Ibfc531d09abf424fe4ee19d3ce5bf832ba04c9d0
2019-09-13 15:37:36 +01:00
David Banks
2344540958 Kicad v2: Made U7-9 optional
Change-Id: I12321e6fa8e13fafd418168cac815ec912868499
2019-09-13 14:12:59 +01:00
David Banks
753b10e4cf Kicad v2: more tidying; add logo
Change-Id: I0f30f7ad6e5b9fd4cd53931bdb14ebcec43bfbde
2019-09-13 12:28:39 +01:00
David Banks
1c7d4a67d7 Kicad v2: tidy up silk screen
Change-Id: I896fd28673c0eb53f6806e9b0a759d7c3031513a
2019-09-13 11:39:05 +01:00
David Banks
1a69b146a5 Kicad v2: move links to bottom side
Change-Id: I33b51bece46e5740e79fb7a987f4b0b4afac2db6
2019-09-11 22:44:58 +01:00
David Banks
4b88d2aedd Kicad v2: complete routing
Change-Id: Iae7b92ccb95a640158a3a9c1239e2491624e5da2
2019-09-11 18:19:02 +01:00
David Banks
3691beed9f Kicad v2: associate 3D shapes
Change-Id: Ib7420c2c4d4255bf3a8f300c0ed9f4dc21d70a33
2019-09-10 12:37:18 +01:00
David Banks
ef13b65a05 Kicad: remove old netlist
Change-Id: I934333fc0d8f13e24efcf26b9f0b38f45037ea6b
2019-09-10 12:23:16 +01:00
David Banks
f444a1e95c Kicad: tidy up old rescue libraries
Change-Id: I7ebc1262f060e53b4b61088e066c484ba505e374
2019-09-10 12:21:58 +01:00
David Banks
53dfb4de9d Kicad: v2 of 6502 board, work in progress
Change-Id: I5d865e1926e1c646a2db54d31abfb38bb1109585
2019-09-10 11:56:15 +01:00
David Banks
16e2bcf9dd Renamed kicad to 6502/v1
Change-Id: I932c4bc803c41fe6a9090767733cd44da230f795
2019-09-10 09:51:25 +01:00
David Banks
db6b20c696 Updated to kicad 5.1.4
Change-Id: Ie4dcf4e2a2838c19be82e0fb09b6ff49b04564ac
2019-09-10 09:49:25 +01:00
David Banks
e66b0b51c2 Z80: remove special command as it caused code overflow
Change-Id: If3a71ea55503ac0edb8d476c05f4f909f0e3c605
2019-08-20 09:39:49 +01:00
David Banks
efdd41a239 6502: Added special command to inhibit IRQ/NMI
Change-Id: I6ba8a1b3b92e5852382d35eee7a59b6a9d7e63e8
2019-06-15 17:50:29 +01:00
David Banks
e9d4e98b96 LX9 6502: Move fakeTube input to p112 (next to a GND)
Change-Id: Ib52362ed12ddc885025f1e098f864fdb313b795d
2018-12-21 17:45:22 +00:00
David Banks
285697d175 6502: remove 40ns skew between phi1/phi2 outputs, as this erodes address hold time time from phi1
Change-Id: Idd2b1418a18f6bb5cf2b553b6a069c42a0e64b97
2018-12-21 17:25:37 +00:00
David Banks
1dcf9fa247 Updated lx9_dave/ice6502 with correct .ucf file and a new top-level design
Change-Id: Ic67e37fb876322983a44c35e9db08b1b8371aea2
2018-11-20 17:32:02 +00:00
David Banks
a277222012 PCB: Migrated to KiCad 5.0
Change-Id: Ib035c47ddc7768d46feebc4e1ea05c04dbd125a6
2018-11-20 12:06:06 +00:00
David Banks
b9d6359be4 Checked in initial work on lx9_dave target (see full comment)
The .ucf files look like they are for a completely different board
(the lx9 starter board, not the epizza board). So these need to be
reworked completely.

Also, the following signals needs adding to the top level 6502 design:
- OEAH (output)
- OEAL (output)
- OED  (output)
- ML   (output)
- VP   (output)
- BE   (input)

The system will not work without some attention to these.

Minimally, in the FPGA design we can tie them as follows:
- OEAH (output) - set to 0 (address bus always enabled)
- OEAL (output) - set to 0 (ditto)
- OED  (output) - set to !phi2 (data bus driven in second half of clock)
- ML   (output) - set output to 1 (and fit P3 link between pins 2 and 3)
- VP   (output) - set output to 1 (and don't fit P4 link)
- BE   (input)  - ignore input

The current adapter design does not fully support the implementation of BE
as it does not provide a way to tristate RNW. That would require the addition
of a seperate level shifter, e.g. a 74LVC1G125

Change-Id: I1bf11c5ef8318c5ebfa942cb4bd07f750d0b370d
2018-11-20 09:42:58 +00:00
David Banks
c1b0902f96 6502: Change din sampling from Phi0_b to Phi0_a
Change-Id: Id1cf604cfa61dba7aae8da670a38e460a059e7bb
2018-02-15 13:06:25 +00:00
David Banks
40cac3c401 Updated Makefile for 64-bit build
Change-Id: Ieaa309d30463209cd0e9c1aa6e6b23cbec8e92b0
2018-02-15 13:05:49 +00:00
243 changed files with 145369 additions and 25055 deletions

1
.gitignore vendored
View File

@ -8,6 +8,7 @@ nohup.out
target/**/*.o
target/**/*.bit
target/**/*.mcs
target/**/*.bin
target/**/avr_progmem.*
target/*/ipcore/WatchEvents.asy
target/*/ipcore/WatchEvents.gise

File diff suppressed because it is too large Load Diff

View File

@ -1,13 +1,20 @@
#ifndef __ATOMBUSMON_DEFINES__
#define __ATOMBUSMON_DEFINES__
#include <stdio.h>
typedef uint8_t data_t;
typedef uint16_t addr_t;
typedef uint8_t offset_t;
typedef uint16_t modes_t;
typedef uint8_t trigger_t;
typedef uint16_t cmd_t;
typedef uint16_t param_t;
typedef int16_t bknum_t;
#include "status.h"
#include "dis.h"
#ifdef LCD
#include "hd44780.h"
#endif
// The Atom CRC Polynomial
#define CRC_POLY 0x002d
@ -21,42 +28,56 @@
__builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000.0 * __ms)+1);\
else __builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000.0 * __ms))
unsigned int hwRead8(unsigned int offset);
unsigned int hwRead16(unsigned int offset);
#ifdef CPUEMBEDDED
unsigned int disMem(unsigned int addr);
void loadData(unsigned int data);
void loadAddr(unsigned int addr);
unsigned int readMemByte();
unsigned int readMemByteInc();
uint8_t hwRead8(offset_t offset);
uint16_t hwRead16(offset_t offset);
addr_t disMem(addr_t addr);
void loadData(data_t data);
void loadAddr(addr_t addr);
data_t readMemByte();
data_t readMemByteInc();
void writeMemByte();
void writeMemByteInc();
unsigned int disMem(unsigned int addr);
#endif
addr_t disMem(addr_t addr);
void doCmdBreak(char *params, unsigned int mode);
void doCmdBreak(char *params, modes_t mode);
void doCmdBreakI(char *params);
void doCmdBreakRdIO(char *params);
void doCmdBreakRdMem(char *params);
void doCmdBreakWrIO(char *params);
void doCmdBreakWrMem(char *params);
void doCmdClear(char *params);
void doCmdCompare(char *params);
void doCmdContinue(char *params);
void doCmdCopy(char *params);
void doCmdCrc(char *params);
void doCmdDis(char *params);
void doCmdExec(char *params);
void doCmdFlush(char *params);
void doCmdFill(char *params);
void doCmdGo(char *params);
void doCmdHelp(char *params);
#if defined(COMMAND_HISTORY)
void doCmdHistory(char *params);
void helpForCommand(uint8_t i);
#endif
void doCmdIO(char *params);
void doCmdList(char *params);
void doCmdLoad(char *params);
void doCmdMem(char *params);
void doCmdMode(char *params);
void doCmdNext(char *params);
void doCmdReadIO(char *params);
void doCmdReadMem(char *params);
void doCmdRegs(char *params);
void doCmdReset(char *params);
void doCmdStep(char *params);
void doCmdTest(char *params);
void doCmdSave(char *params);
void doCmdSRec(char *params);
void doCmdTimerMode(char *params);
void doCmdTimeout(char *params);
void doCmdTrace(char *params);
void doCmdTrigger(char *params);
void doCmdWatchI(char *params);
@ -66,5 +87,9 @@ void doCmdWatchWrIO(char *params);
void doCmdWatchWrMem(char *params);
void doCmdWriteIO(char *params);
void doCmdWriteMem(char *params);
void doCmdXCmd0(char *params);
void doCmdXCmd1(char *params);
void doCmdXCmd2(char *params);
void doCmdXCmd3(char *params);
#endif

View File

@ -1,6 +1,15 @@
#ifndef __DIS_DEFINES__
#define __DIS_DEFINES__
unsigned int disassemble(unsigned int addr);
// The processor dependent config/status port
#define PDC_PORT PORTA
#define PDC_DDR DDRA
#define PDC_DIN PINA
#define MODE_NORMAL 0
#define MODE_DIS_CMD 1
addr_t disassemble(addr_t addr, uint8_t m);
#endif

View File

@ -2,9 +2,9 @@
#include "AtomBusMon.h"
enum
{
IMP, IMPA, MARK2, BRA, IMM, ZP, ZPX, ZPY, INDX, INDY, IND, MARK3, ABS, ABSX, ABSY, IND16, IND1X
};
{
IMP, IMPA, MARK2, BRA, IMM, ZP, ZPX, ZPY, INDX, INDY, MARK3, ABS, ABSX, ABSY, IND16
};
enum
{
@ -18,7 +18,6 @@ enum
I_BMI,
I_BNE,
I_BPL,
I_BRA,
I_BRK,
I_BVC,
I_BVS,
@ -46,12 +45,8 @@ enum
I_ORA,
I_PHA,
I_PHP,
I_PHX,
I_PHY,
I_PLA,
I_PLP,
I_PLX,
I_PLY,
I_ROL,
I_ROR,
I_RTI,
@ -61,19 +56,14 @@ enum
I_SED,
I_SEI,
I_STA,
I_STP,
I_STX,
I_STY,
I_STZ,
I_TAX,
I_TAY,
I_TRB,
I_TSB,
I_TSX,
I_TXA,
I_TXS,
I_TYA,
I_WAI,
I_XXX
};
@ -88,7 +78,6 @@ BIT\
BMI\
BNE\
BPL\
BRA\
BRK\
BVC\
BVS\
@ -116,12 +105,8 @@ NOP\
ORA\
PHA\
PHP\
PHX\
PHY\
PLA\
PLP\
PLX\
PLY\
ROL\
ROR\
RTI\
@ -131,141 +116,177 @@ SEC\
SED\
SEI\
STA\
STP\
STX\
STY\
STZ\
TAX\
TAY\
TRB\
TSB\
TSX\
TXA\
TXS\
TYA\
WAI\
---\
";
static const unsigned char dopname[256] PROGMEM =
{
/*00*/ I_BRK, I_ORA, I_XXX, I_XXX, I_TSB, I_ORA, I_ASL, I_XXX, I_PHP, I_ORA, I_ASL, I_XXX, I_TSB, I_ORA, I_ASL, I_XXX,
/*10*/ I_BPL, I_ORA, I_ORA, I_XXX, I_TRB, I_ORA, I_ASL, I_XXX, I_CLC, I_ORA, I_INC, I_XXX, I_TRB, I_ORA, I_ASL, I_XXX,
/*00*/ I_BRK, I_ORA, I_XXX, I_XXX, I_XXX, I_ORA, I_ASL, I_XXX, I_PHP, I_ORA, I_ASL, I_XXX, I_XXX, I_ORA, I_ASL, I_XXX,
/*10*/ I_BPL, I_ORA, I_XXX, I_XXX, I_XXX, I_ORA, I_ASL, I_XXX, I_CLC, I_ORA, I_XXX, I_XXX, I_XXX, I_ORA, I_ASL, I_XXX,
/*20*/ I_JSR, I_AND, I_XXX, I_XXX, I_BIT, I_AND, I_ROL, I_XXX, I_PLP, I_AND, I_ROL, I_XXX, I_BIT, I_AND, I_ROL, I_XXX,
/*30*/ I_BMI, I_AND, I_AND, I_XXX, I_BIT, I_AND, I_ROL, I_XXX, I_SEC, I_AND, I_DEC, I_XXX, I_BIT, I_AND, I_ROL, I_XXX,
/*30*/ I_BMI, I_AND, I_XXX, I_XXX, I_XXX, I_AND, I_ROL, I_XXX, I_SEC, I_AND, I_XXX, I_XXX, I_XXX, I_AND, I_ROL, I_XXX,
/*40*/ I_RTI, I_EOR, I_XXX, I_XXX, I_XXX, I_EOR, I_LSR, I_XXX, I_PHA, I_EOR, I_LSR, I_XXX, I_JMP, I_EOR, I_LSR, I_XXX,
/*50*/ I_BVC, I_EOR, I_EOR, I_XXX, I_XXX, I_EOR, I_LSR, I_XXX, I_CLI, I_EOR, I_PHY, I_XXX, I_XXX, I_EOR, I_LSR, I_XXX,
/*60*/ I_RTS, I_ADC, I_XXX, I_XXX, I_STZ, I_ADC, I_ROR, I_XXX, I_PLA, I_ADC, I_ROR, I_XXX, I_JMP, I_ADC, I_ROR, I_XXX,
/*70*/ I_BVS, I_ADC, I_ADC, I_XXX, I_STZ, I_ADC, I_ROR, I_XXX, I_SEI, I_ADC, I_PLY, I_XXX, I_JMP, I_ADC, I_ROR, I_XXX,
/*80*/ I_BRA, I_STA, I_XXX, I_XXX, I_STY, I_STA, I_STX, I_XXX, I_DEY, I_BIT, I_TXA, I_XXX, I_STY, I_STA, I_STX, I_XXX,
/*90*/ I_BCC, I_STA, I_STA, I_XXX, I_STY, I_STA, I_STX, I_XXX, I_TYA, I_STA, I_TXS, I_XXX, I_STZ, I_STA, I_STZ, I_XXX,
/*50*/ I_BVC, I_EOR, I_XXX, I_XXX, I_XXX, I_EOR, I_LSR, I_XXX, I_CLI, I_EOR, I_XXX, I_XXX, I_XXX, I_EOR, I_LSR, I_XXX,
/*60*/ I_RTS, I_ADC, I_XXX, I_XXX, I_XXX, I_ADC, I_ROR, I_XXX, I_PLA, I_ADC, I_ROR, I_XXX, I_JMP, I_ADC, I_ROR, I_XXX,
/*70*/ I_BVS, I_ADC, I_XXX, I_XXX, I_XXX, I_ADC, I_ROR, I_XXX, I_SEI, I_ADC, I_XXX, I_XXX, I_XXX, I_ADC, I_ROR, I_XXX,
/*80*/ I_XXX, I_STA, I_XXX, I_XXX, I_STY, I_STA, I_STX, I_XXX, I_DEY, I_XXX, I_TXA, I_XXX, I_STY, I_STA, I_STX, I_XXX,
/*90*/ I_BCC, I_STA, I_XXX, I_XXX, I_STY, I_STA, I_STX, I_XXX, I_TYA, I_STA, I_TXS, I_XXX, I_XXX, I_STA, I_XXX, I_XXX,
/*A0*/ I_LDY, I_LDA, I_LDX, I_XXX, I_LDY, I_LDA, I_LDX, I_XXX, I_TAY, I_LDA, I_TAX, I_XXX, I_LDY, I_LDA, I_LDX, I_XXX,
/*B0*/ I_BCS, I_LDA, I_LDA, I_XXX, I_LDY, I_LDA, I_LDX, I_XXX, I_CLV, I_LDA, I_TSX, I_XXX, I_LDY, I_LDA, I_LDX, I_XXX,
/*C0*/ I_CPY, I_CMP, I_XXX, I_XXX, I_CPY, I_CMP, I_DEC, I_XXX, I_INY, I_CMP, I_DEX, I_WAI, I_CPY, I_CMP, I_DEC, I_XXX,
/*D0*/ I_BNE, I_CMP, I_CMP, I_XXX, I_XXX, I_CMP, I_DEC, I_XXX, I_CLD, I_CMP, I_PHX, I_STP, I_XXX, I_CMP, I_DEC, I_XXX,
/*B0*/ I_BCS, I_LDA, I_XXX, I_XXX, I_LDY, I_LDA, I_LDX, I_XXX, I_CLV, I_LDA, I_TSX, I_XXX, I_LDY, I_LDA, I_LDX, I_XXX,
/*C0*/ I_CPY, I_CMP, I_XXX, I_XXX, I_CPY, I_CMP, I_DEC, I_XXX, I_INY, I_CMP, I_DEX, I_XXX, I_CPY, I_CMP, I_DEC, I_XXX,
/*D0*/ I_BNE, I_CMP, I_XXX, I_XXX, I_XXX, I_CMP, I_DEC, I_XXX, I_CLD, I_CMP, I_XXX, I_XXX, I_XXX, I_CMP, I_DEC, I_XXX,
/*E0*/ I_CPX, I_SBC, I_XXX, I_XXX, I_CPX, I_SBC, I_INC, I_XXX, I_INX, I_SBC, I_NOP, I_XXX, I_CPX, I_SBC, I_INC, I_XXX,
/*F0*/ I_BEQ, I_SBC, I_SBC, I_XXX, I_XXX, I_SBC, I_INC, I_XXX, I_SED, I_SBC, I_PLX, I_XXX, I_XXX, I_SBC, I_INC, I_XXX
/*F0*/ I_BEQ, I_SBC, I_XXX, I_XXX, I_XXX, I_SBC, I_INC, I_XXX, I_SED, I_SBC, I_XXX, I_XXX, I_XXX, I_SBC, I_INC, I_XXX
};
static const unsigned char dopaddr[256] PROGMEM =
{
/*00*/ IMP, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, ABS, ABS, ABS, IMP,
/*10*/ BRA, INDY, IND, IMP, ZP, ZPX, ZPX, IMP, IMP, ABSY, IMPA, IMP, ABS, ABSX, ABSX, IMP,
/*20*/ ABS, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, ABS, ABS, ABS, IMP,
/*30*/ BRA, INDY, IND, IMP, ZPX, ZPX, ZPX, IMP, IMP, ABSY, IMPA, IMP, ABSX, ABSX, ABSX, IMP,
/*40*/ IMP, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, ABS, ABS, ABS, IMP,
/*50*/ BRA, INDY, IND, IMP, ZP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, ABS, ABSX, ABSX, IMP,
/*60*/ IMP, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, IND16, ABS, ABS, IMP,
/*70*/ BRA, INDY, IND, IMP, ZPX, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, IND1X, ABSX, ABSX, IMP,
/*80*/ BRA, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
/*90*/ BRA, INDY, IND, IMP, ZPX, ZPX, ZPY, IMP, IMP, ABSY, IMP, IMP, ABS, ABSX, ABSX, IMP,
/*A0*/ IMM, INDX, IMM, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
/*B0*/ BRA, INDY, IND, IMP, ZPX, ZPX, ZPY, IMP, IMP, ABSY, IMP, IMP, ABSX, ABSX, ABSY, IMP,
/*C0*/ IMM, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
/*D0*/ BRA, INDY, IND, IMP, ZP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, ABS, ABSX, ABSX, IMP,
/*E0*/ IMM, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
/*F0*/ BRA, INDY, IND, IMP, ZP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, ABS, ABSX, ABSX, IMP
/*00*/ IMM, INDX, IMP, IMP, IMP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, IMP, ABS, ABS, IMP,
/*10*/ BRA, INDY, IMP, IMP, IMP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, IMP, ABSX, ABSX, IMP,
/*20*/ ABS, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, ABS, ABS, ABS, IMP,
/*30*/ BRA, INDY, IMP, IMP, IMP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, IMP, ABSX, ABSX, IMP,
/*40*/ IMP, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, ABS, ABS, ABS, IMP,
/*50*/ BRA, INDY, IMP, IMP, ZP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, ABS, ABSX, ABSX, IMP,
/*60*/ IMP, INDX, IMP, IMP, IMP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, IND16, ABS, ABS, IMP,
/*70*/ BRA, INDY, IMP, IMP, IMP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, IMP, ABSX, ABSX, IMP,
/*80*/ IMP, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMP, IMP, IMP, ABS, ABS, ABS, IMP,
/*90*/ BRA, INDY, IMP, IMP, ZPX, ZPX, ZPY, IMP, IMP, ABSY, IMP, IMP, IMP, ABSX, IMP, IMP,
/*A0*/ IMM, INDX, IMM, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
/*B0*/ BRA, INDY, IMP, IMP, ZPX, ZPX, ZPY, IMP, IMP, ABSY, IMP, IMP, ABSX, ABSX, ABSY, IMP,
/*C0*/ IMM, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
/*D0*/ BRA, INDY, IMP, IMP, ZP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, ABS, ABSX, ABSX, IMP,
/*E0*/ IMM, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
/*F0*/ BRA, INDY, IMP, IMP, ZP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, ABS, ABSX, ABSX, IMP
};
unsigned int disassemble(unsigned int addr)
addr_t disassemble(addr_t addr, uint8_t m)
{
unsigned int temp;
unsigned int op = readMemByteInc();
int mode = pgm_read_byte(dopaddr + op);
unsigned int p1 = (mode > MARK2) ? readMemByteInc() : 0;
unsigned int p2 = (mode > MARK3) ? readMemByteInc() : 0;
int opIndex = pgm_read_byte(dopname + op) * 3;
log0("%04X : ", addr);
for (temp = 0; temp < 3; temp++) {
log0("%c", pgm_read_byte(opString + opIndex + temp));
}
log0(" ");
char buffer[40];
uint8_t temp;
data_t op = readMemByteInc();
data_t p1 = 0;
data_t p2 = 0;
uint8_t mode = pgm_read_byte(dopaddr + op);
char *ptr;
switch (mode)
{
case IMP:
log0(" ");
break;
case IMPA:
log0("A ");
break;
case BRA:
temp = addr + 2 + (signed char)p1;
log0("%04X ", temp);
addr++;
break;
case IMM:
log0("#%02X ", p1);
addr++;
break;
case ZP:
log0("%02X ", p1);
addr++;
break;
case ZPX:
log0("%02X,X ", p1);
addr++;
break;
case ZPY:
log0("%02X,Y ", p1);
addr++;
break;
case IND:
log0("(%02X) ", p1);
addr++;
break;
case INDX:
log0("(%02X,X) ", p1);
addr++;
break;
case INDY:
log0("(%02X),Y ", p1);
addr++;
break;
case ABS:
log0("%02X%02X ", p2, p1);
addr += 2;
break;
case ABSX:
log0("%02X%02X,X ", p2, p1);
addr += 2;
break;
case ABSY:
log0("%02X%02X,Y ", p2, p1);
addr += 2;
break;
case IND16:
log0("(%02X%02X) ", p2, p1);
addr += 2;
break;
case IND1X:
log0("(%02X%02X,X)", p2, p1);
addr += 2;
break;
}
log0("\n");
addr++;
return addr;
// 012345678901234567890123456789
// AAAA : 11 22 33 : III MMMMMMMM
// Template
strfill(buffer, ' ', sizeof(buffer));
buffer[5] = ':';
buffer[16] = ':';
// Address
strhex4(buffer, addr++);
// Hex
strhex2(buffer + 7, op);
if (mode > MARK2) {
p1 = readMemByteInc();
strhex2(buffer + 10, p1);
addr++;
}
if (mode > MARK3) {
p2 = readMemByteInc();
strhex2(buffer + 13, p2);
addr++;
}
uint16_t opIndex = pgm_read_byte(dopname + op) * 3;
ptr = buffer + 18;
for (temp = 0; temp < 3; temp++) {
*ptr++ = pgm_read_byte(opString + opIndex + temp);
}
ptr++;
switch (mode)
{
case IMP:
break;
case IMPA:
*ptr++ = 'A';
break;
case BRA:
*ptr++ = '$';
ptr = strhex4(ptr, addr + (int8_t)p1);
break;
case IMM:
*ptr++ = '#';
// Fall through to
case ZP:
*ptr++ = '$';
ptr = strhex2(ptr, p1);
break;
case ZPX:
*ptr++ = '$';
ptr = strhex2(ptr, p1);
*ptr++ = ',';
*ptr++ = 'X';
break;
case ZPY:
*ptr++ = '$';
ptr = strhex2(ptr, p1);
*ptr++ = ',';
*ptr++ = 'Y';
break;
case INDX:
*ptr++ = '(';
*ptr++ = '$';
ptr = strhex2(ptr, p1);
*ptr++ = ',';
*ptr++ = 'X';
*ptr++ = ')';
break;
case INDY:
*ptr++ = '(';
*ptr++ = '$';
ptr = strhex2(ptr, p1);
*ptr++ = ')';
*ptr++ = ',';
*ptr++ = 'Y';
break;
case ABS:
*ptr++ = '$';
ptr = strhex2(ptr, p2);
ptr = strhex2(ptr, p1);
break;
case ABSX:
*ptr++ = '$';
ptr = strhex2(ptr, p2);
ptr = strhex2(ptr, p1);
*ptr++ = ',';
*ptr++ = 'X';
break;
case ABSY:
*ptr++ = '$';
ptr = strhex2(ptr, p2);
ptr = strhex2(ptr, p1);
*ptr++ = ',';
*ptr++ = 'Y';
break;
case IND16:
*ptr++ = '(';
*ptr++ = '$';
ptr = strhex2(ptr, p2);
ptr = strhex2(ptr, p1);
*ptr++ = ')';
break;
}
*ptr++ = '\n';
*ptr++ = '\0';
logs(buffer);
return addr;
}

327
firmware/dis65c02.c Normal file
View File

@ -0,0 +1,327 @@
#include <avr/pgmspace.h>
#include "AtomBusMon.h"
enum
{
IMP, IMPA, MARK2, BRA, IMM, ZP, ZPX, ZPY, INDX, INDY, IND, MARK3, ABS, ABSX, ABSY, IND16, IND1X
};
enum
{
I_ADC,
I_AND,
I_ASL,
I_BCC,
I_BCS,
I_BEQ,
I_BIT,
I_BMI,
I_BNE,
I_BPL,
I_BRA,
I_BRK,
I_BVC,
I_BVS,
I_CLC,
I_CLD,
I_CLI,
I_CLV,
I_CMP,
I_CPX,
I_CPY,
I_DEC,
I_DEX,
I_DEY,
I_EOR,
I_INC,
I_INX,
I_INY,
I_JMP,
I_JSR,
I_LDA,
I_LDX,
I_LDY,
I_LSR,
I_NOP,
I_ORA,
I_PHA,
I_PHP,
I_PHX,
I_PHY,
I_PLA,
I_PLP,
I_PLX,
I_PLY,
I_ROL,
I_ROR,
I_RTI,
I_RTS,
I_SBC,
I_SEC,
I_SED,
I_SEI,
I_STA,
I_STP,
I_STX,
I_STY,
I_STZ,
I_TAX,
I_TAY,
I_TRB,
I_TSB,
I_TSX,
I_TXA,
I_TXS,
I_TYA,
I_WAI,
I_XXX
};
static const char opString[] PROGMEM = "\
ADC\
AND\
ASL\
BCC\
BCS\
BEQ\
BIT\
BMI\
BNE\
BPL\
BRA\
BRK\
BVC\
BVS\
CLC\
CLD\
CLI\
CLV\
CMP\
CPX\
CPY\
DEC\
DEX\
DEY\
EOR\
INC\
INX\
INY\
JMP\
JSR\
LDA\
LDX\
LDY\
LSR\
NOP\
ORA\
PHA\
PHP\
PHX\
PHY\
PLA\
PLP\
PLX\
PLY\
ROL\
ROR\
RTI\
RTS\
SBC\
SEC\
SED\
SEI\
STA\
STP\
STX\
STY\
STZ\
TAX\
TAY\
TRB\
TSB\
TSX\
TXA\
TXS\
TYA\
WAI\
---\
";
static const unsigned char dopname[256] PROGMEM =
{
/*00*/ I_BRK, I_ORA, I_XXX, I_XXX, I_TSB, I_ORA, I_ASL, I_XXX, I_PHP, I_ORA, I_ASL, I_XXX, I_TSB, I_ORA, I_ASL, I_XXX,
/*10*/ I_BPL, I_ORA, I_ORA, I_XXX, I_TRB, I_ORA, I_ASL, I_XXX, I_CLC, I_ORA, I_INC, I_XXX, I_TRB, I_ORA, I_ASL, I_XXX,
/*20*/ I_JSR, I_AND, I_XXX, I_XXX, I_BIT, I_AND, I_ROL, I_XXX, I_PLP, I_AND, I_ROL, I_XXX, I_BIT, I_AND, I_ROL, I_XXX,
/*30*/ I_BMI, I_AND, I_AND, I_XXX, I_BIT, I_AND, I_ROL, I_XXX, I_SEC, I_AND, I_DEC, I_XXX, I_BIT, I_AND, I_ROL, I_XXX,
/*40*/ I_RTI, I_EOR, I_XXX, I_XXX, I_XXX, I_EOR, I_LSR, I_XXX, I_PHA, I_EOR, I_LSR, I_XXX, I_JMP, I_EOR, I_LSR, I_XXX,
/*50*/ I_BVC, I_EOR, I_EOR, I_XXX, I_XXX, I_EOR, I_LSR, I_XXX, I_CLI, I_EOR, I_PHY, I_XXX, I_XXX, I_EOR, I_LSR, I_XXX,
/*60*/ I_RTS, I_ADC, I_XXX, I_XXX, I_STZ, I_ADC, I_ROR, I_XXX, I_PLA, I_ADC, I_ROR, I_XXX, I_JMP, I_ADC, I_ROR, I_XXX,
/*70*/ I_BVS, I_ADC, I_ADC, I_XXX, I_STZ, I_ADC, I_ROR, I_XXX, I_SEI, I_ADC, I_PLY, I_XXX, I_JMP, I_ADC, I_ROR, I_XXX,
/*80*/ I_BRA, I_STA, I_XXX, I_XXX, I_STY, I_STA, I_STX, I_XXX, I_DEY, I_BIT, I_TXA, I_XXX, I_STY, I_STA, I_STX, I_XXX,
/*90*/ I_BCC, I_STA, I_STA, I_XXX, I_STY, I_STA, I_STX, I_XXX, I_TYA, I_STA, I_TXS, I_XXX, I_STZ, I_STA, I_STZ, I_XXX,
/*A0*/ I_LDY, I_LDA, I_LDX, I_XXX, I_LDY, I_LDA, I_LDX, I_XXX, I_TAY, I_LDA, I_TAX, I_XXX, I_LDY, I_LDA, I_LDX, I_XXX,
/*B0*/ I_BCS, I_LDA, I_LDA, I_XXX, I_LDY, I_LDA, I_LDX, I_XXX, I_CLV, I_LDA, I_TSX, I_XXX, I_LDY, I_LDA, I_LDX, I_XXX,
/*C0*/ I_CPY, I_CMP, I_XXX, I_XXX, I_CPY, I_CMP, I_DEC, I_XXX, I_INY, I_CMP, I_DEX, I_WAI, I_CPY, I_CMP, I_DEC, I_XXX,
/*D0*/ I_BNE, I_CMP, I_CMP, I_XXX, I_XXX, I_CMP, I_DEC, I_XXX, I_CLD, I_CMP, I_PHX, I_STP, I_XXX, I_CMP, I_DEC, I_XXX,
/*E0*/ I_CPX, I_SBC, I_XXX, I_XXX, I_CPX, I_SBC, I_INC, I_XXX, I_INX, I_SBC, I_NOP, I_XXX, I_CPX, I_SBC, I_INC, I_XXX,
/*F0*/ I_BEQ, I_SBC, I_SBC, I_XXX, I_XXX, I_SBC, I_INC, I_XXX, I_SED, I_SBC, I_PLX, I_XXX, I_XXX, I_SBC, I_INC, I_XXX
};
static const unsigned char dopaddr[256] PROGMEM =
{
/*00*/ IMM, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, ABS, ABS, ABS, IMP,
/*10*/ BRA, INDY, IND, IMP, ZP, ZPX, ZPX, IMP, IMP, ABSY, IMPA, IMP, ABS, ABSX, ABSX, IMP,
/*20*/ ABS, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, ABS, ABS, ABS, IMP,
/*30*/ BRA, INDY, IND, IMP, ZPX, ZPX, ZPX, IMP, IMP, ABSY, IMPA, IMP, ABSX, ABSX, ABSX, IMP,
/*40*/ IMP, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, ABS, ABS, ABS, IMP,
/*50*/ BRA, INDY, IND, IMP, ZP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, ABS, ABSX, ABSX, IMP,
/*60*/ IMP, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMPA, IMP, IND16, ABS, ABS, IMP,
/*70*/ BRA, INDY, IND, IMP, ZPX, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, IND1X, ABSX, ABSX, IMP,
/*80*/ BRA, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
/*90*/ BRA, INDY, IND, IMP, ZPX, ZPX, ZPY, IMP, IMP, ABSY, IMP, IMP, ABS, ABSX, ABSX, IMP,
/*A0*/ IMM, INDX, IMM, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
/*B0*/ BRA, INDY, IND, IMP, ZPX, ZPX, ZPY, IMP, IMP, ABSY, IMP, IMP, ABSX, ABSX, ABSY, IMP,
/*C0*/ IMM, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
/*D0*/ BRA, INDY, IND, IMP, ZP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, ABS, ABSX, ABSX, IMP,
/*E0*/ IMM, INDX, IMP, IMP, ZP, ZP, ZP, IMP, IMP, IMM, IMP, IMP, ABS, ABS, ABS, IMP,
/*F0*/ BRA, INDY, IND, IMP, ZP, ZPX, ZPX, IMP, IMP, ABSY, IMP, IMP, ABS, ABSX, ABSX, IMP
};
addr_t disassemble(addr_t addr, uint8_t m)
{
char buffer[40];
uint8_t temp;
data_t op = readMemByteInc();
data_t p1 = 0;
data_t p2 = 0;
uint8_t mode = pgm_read_byte(dopaddr + op);
char *ptr;
// 012345678901234567890123456789
// AAAA : 11 22 33 : III MMMMMMMM
// Template
strfill(buffer, ' ', sizeof(buffer));
buffer[5] = ':';
buffer[16] = ':';
// Address
strhex4(buffer, addr++);
// Hex
strhex2(buffer + 7, op);
if (mode > MARK2) {
p1 = readMemByteInc();
strhex2(buffer + 10, p1);
addr++;
}
if (mode > MARK3) {
p2 = readMemByteInc();
strhex2(buffer + 13, p2);
addr++;
}
uint16_t opIndex = pgm_read_byte(dopname + op) * 3;
ptr = buffer + 18;
for (temp = 0; temp < 3; temp++) {
*ptr++ = pgm_read_byte(opString + opIndex + temp);
}
ptr++;
switch (mode)
{
case IMP:
break;
case IMPA:
*ptr++ = 'A';
break;
case BRA:
*ptr++ = '$';
ptr = strhex4(ptr, addr + (int8_t)p1);
break;
case IMM:
*ptr++ = '#';
// Fall through to
case ZP:
*ptr++ = '$';
ptr = strhex2(ptr, p1);
break;
case ZPX:
*ptr++ = '$';
ptr = strhex2(ptr, p1);
*ptr++ = ',';
*ptr++ = 'X';
break;
case ZPY:
*ptr++ = '$';
ptr = strhex2(ptr, p1);
*ptr++ = ',';
*ptr++ = 'Y';
break;
case IND:
*ptr++ = '(';
*ptr++ = '$';
ptr = strhex2(ptr, p1);
*ptr++ = ')';
break;
case INDX:
*ptr++ = '(';
*ptr++ = '$';
ptr = strhex2(ptr, p1);
*ptr++ = ',';
*ptr++ = 'X';
*ptr++ = ')';
break;
case INDY:
*ptr++ = '(';
*ptr++ = '$';
ptr = strhex2(ptr, p1);
*ptr++ = ')';
*ptr++ = ',';
*ptr++ = 'Y';
break;
case ABS:
*ptr++ = '$';
ptr = strhex2(ptr, p2);
ptr = strhex2(ptr, p1);
break;
case ABSX:
*ptr++ = '$';
ptr = strhex2(ptr, p2);
ptr = strhex2(ptr, p1);
*ptr++ = ',';
*ptr++ = 'X';
break;
case ABSY:
*ptr++ = '$';
ptr = strhex2(ptr, p2);
ptr = strhex2(ptr, p1);
*ptr++ = ',';
*ptr++ = 'Y';
break;
case IND16:
*ptr++ = '(';
*ptr++ = '$';
ptr = strhex2(ptr, p2);
ptr = strhex2(ptr, p1);
*ptr++ = ')';
break;
case IND1X:
*ptr++ = '(';
*ptr++ = '$';
ptr = strhex2(ptr, p2);
ptr = strhex2(ptr, p1);
*ptr++ = ',';
*ptr++ = 'X';
*ptr++ = ')';
break;
}
*ptr++ = '\n';
*ptr++ = '\0';
logs(buffer);
return addr;
}

View File

@ -18,24 +18,6 @@
#include <avr/pgmspace.h>
#include "AtomBusMon.h"
unsigned char get_memb(unsigned int addr) {
loadAddr(addr);
return readMemByteInc();
}
#include <stdio.h>
typedef unsigned char tt_u8;
typedef signed char tt_s8;
typedef unsigned short tt_u16;
typedef signed short tt_s16;
unsigned int get_memw(unsigned int addr) {
loadAddr(addr);
return (readMemByteInc() << 8) + readMemByteInc();
}
enum opcodes {
OP_UU ,
OP_XX ,
@ -312,15 +294,15 @@ TSTB";
// The first byte is the opcode index
// The second byte is <length><mode>
// modes:
// 1 immediate
// 2 direct
// 3 indexed
// 4 extended
// 5 inherent
// 6 relative
// modes:
// 1 immediate
// 2 direct
// 3 indexed
// 4 extended
// 5 inherent
// 6 relative
static const unsigned char map0[] PROGMEM = {
static const uint8_t map0[] PROGMEM = {
OP_NEG , 0x22,
OP_XX , 0x22,
OP_XX , 0x12,
@ -579,142 +561,110 @@ static const unsigned char map0[] PROGMEM = {
OP_STU , 0x34,
};
static const unsigned char map1[] PROGMEM = {
33, OP_LBRN, 0x46,
34, OP_LBHI, 0x46,
35, OP_LBLS, 0x46,
36, OP_LBCC, 0x46,
37, OP_LBLO, 0x46,
38, OP_LBNE, 0x46,
39, OP_LBEQ, 0x46,
40, OP_LBVC, 0x46,
41, OP_LBVS, 0x46,
42, OP_LBPL, 0x46,
43, OP_LBMI, 0x46,
44, OP_LBGE, 0x46,
45, OP_LBLT, 0x46,
46, OP_LBGT, 0x46,
47, OP_LBLE, 0x46,
63, OP_SWI2, 0x25,
131, OP_CMPD, 0x41,
140, OP_CMPY, 0x41,
142, OP_LDY , 0x41,
147, OP_CMPD, 0x32,
156, OP_CMPY, 0x32,
158, OP_LDY , 0x32,
159, OP_STY , 0x32,
163, OP_CMPD, 0x33,
172, OP_CMPY, 0x33,
174, OP_LDY , 0x33,
175, OP_STY , 0x33,
179, OP_CMPD, 0x44,
188, OP_CMPY, 0x44,
190, OP_LDY , 0x44,
191, OP_STY , 0x44,
206, OP_LDS , 0x41,
222, OP_LDS , 0x32,
223, OP_STS , 0x32,
238, OP_LDS , 0x33,
239, OP_STS , 0x33,
254, OP_LDS , 0x44,
255, OP_STS , 0x44,
static const uint8_t map1[] PROGMEM = {
33, OP_LBRN, 0x46,
34, OP_LBHI, 0x46,
35, OP_LBLS, 0x46,
36, OP_LBCC, 0x46,
37, OP_LBLO, 0x46,
38, OP_LBNE, 0x46,
39, OP_LBEQ, 0x46,
40, OP_LBVC, 0x46,
41, OP_LBVS, 0x46,
42, OP_LBPL, 0x46,
43, OP_LBMI, 0x46,
44, OP_LBGE, 0x46,
45, OP_LBLT, 0x46,
46, OP_LBGT, 0x46,
47, OP_LBLE, 0x46,
63, OP_SWI2, 0x25,
131, OP_CMPD, 0x41,
140, OP_CMPY, 0x41,
142, OP_LDY , 0x41,
147, OP_CMPD, 0x32,
156, OP_CMPY, 0x32,
158, OP_LDY , 0x32,
159, OP_STY , 0x32,
163, OP_CMPD, 0x33,
172, OP_CMPY, 0x33,
174, OP_LDY , 0x33,
175, OP_STY , 0x33,
179, OP_CMPD, 0x44,
188, OP_CMPY, 0x44,
190, OP_LDY , 0x44,
191, OP_STY , 0x44,
206, OP_LDS , 0x41,
222, OP_LDS , 0x32,
223, OP_STS , 0x32,
238, OP_LDS , 0x33,
239, OP_STS , 0x33,
254, OP_LDS , 0x44,
255, OP_STS , 0x44,
};
static const unsigned char map2[] PROGMEM = {
63, OP_SWI3, 0x25,
131, OP_CMPU, 0x41,
140, OP_CMPS, 0x41,
147, OP_CMPU, 0x32,
156, OP_CMPS, 0x32,
163, OP_CMPU, 0x33,
172, OP_CMPS, 0x33,
179, OP_CMPU, 0x44,
188, OP_CMPS, 0x44,
static const uint8_t map2[] PROGMEM = {
63, OP_SWI3, 0x25,
131, OP_CMPU, 0x41,
140, OP_CMPS, 0x41,
147, OP_CMPU, 0x32,
156, OP_CMPS, 0x32,
163, OP_CMPU, 0x33,
172, OP_CMPS, 0x33,
179, OP_CMPU, 0x44,
188, OP_CMPS, 0x44,
255, OP_XX , 0x10
};
static const char regi[] = { 'X', 'Y', 'U', 'S' };
static const char *exgi[] = { "D", "X", "Y", "U", "S", "PC", "??", "??", "A",
"B", "CC", "DP", "??", "??", "??", "??" };
"B", "CC", "DP", "??", "??", "??", "??" };
static const char *pshsregi[] = { "PC", "U", "Y", "X", "DP", "B", "A", "CC" };
static const char *pshuregi[] = { "PC", "S", "Y", "X", "DP", "B", "A", "CC" };
/* disassemble one instruction at adress adr and return its size */
extern const char statusString[];
char hexdigit(tt_u16 v)
{
v &= 0xf;
if (v <= 9)
return '0' + v;
else
return 'A' - 10 + v;
static uint8_t get_memb(addr_t addr) {
loadAddr(addr);
return readMemByteInc();
}
char *hex8str(tt_u8 v)
{
static char tmpbuf[3] = " ";
tmpbuf[1] = hexdigit(v);
tmpbuf[0] = hexdigit(v >> 4);
return tmpbuf;
static uint16_t get_memw(addr_t addr) {
loadAddr(addr);
return (readMemByteInc() << 8) + readMemByteInc();
}
char *hex16str(tt_u16 v)
{
static char tmpbuf[5] = " ";
tmpbuf[3] = hexdigit(v);
v >>= 4;
tmpbuf[2] = hexdigit(v);
v >>= 4;
tmpbuf[1] = hexdigit(v);
v >>= 4;
tmpbuf[0] = hexdigit(v);
return tmpbuf;
}
extern char *statusString;
char *ccstr(tt_u8 val)
{
static char tempbuf[9] = " ";
int i;
static char *strcc(char *ptr, uint8_t val) {
uint8_t i;
for (i = 0; i < 8; i++) {
if (val & 0x80)
tempbuf[i] = statusString[i];
else
tempbuf[i] = '.';
*ptr++ = (val & 0x80) ? statusString[i] : '.';
val <<= 1;
}
return tempbuf;
return ptr;
}
unsigned int disassemble(unsigned int addr)
{
int d = get_memb(addr);
int s, i;
tt_u8 pb;
/* disassemble one instruction at address addr and return the address of the next instruction */
addr_t disassemble(addr_t addr, uint8_t m) {
uint8_t d = get_memb(addr);
uint8_t s;
int8_t i;
uint8_t pb;
char reg;
const unsigned char *map = NULL;
char *ptr;
static char buffer[64];
const uint8_t *map = NULL;
// Default for most undefined opcodes
unsigned char sm = 0x10; // size_mode byte
unsigned char oi = OP_XX; // opcode index
FILE *stream = &ser0stream;
if (d == 0x10) {
d = get_memb(addr + 1);
d = get_memb(addr + 1);
map = map1;
}
if (d == 0x11) {
} else if (d == 0x11) {
d = get_memb(addr + 1);
map = map2;
}
@ -724,12 +674,13 @@ unsigned int disassemble(unsigned int addr)
map -= 3;
do {
map += 3;
if (pgm_read_byte(map) == d) {
oi = pgm_read_byte(++map);
sm = pgm_read_byte(++map);
break;
s = pgm_read_byte(map);
if (s == d) {
oi = pgm_read_byte(++map);
sm = pgm_read_byte(++map);
break;
}
} while (*map < 255);
} while (s < 255);
} else {
// Lookup directly in map0
map = map0 + 2 * d;
@ -739,187 +690,258 @@ unsigned int disassemble(unsigned int addr)
s = sm >> 4;
fprintf(stream, "%04X ", addr);
// 0123456789012345678901234567890123456789
// AAAA : HH HH HH HH : OOOO AAAAAAAAA
strfill(buffer, ' ', sizeof(buffer));
buffer[5] = ':';
buffer[19] = ':';
// Address
strhex4(buffer, addr);
// Hex
ptr = buffer + 7;
for (i = 0; i < s; i++) {
fputs(hex8str(get_memb(addr + i)), stream);
fputc(' ', stream);
}
for (i = s; i < 4; i++) {
fputs(" ", stream);
strhex2(ptr, get_memb(addr + i));
ptr += 3;
}
const char *ip = inst + oi * 4;
for (i = 0; i < 4; i++)
fputc(pgm_read_byte(ip++), stream);
// Opcode
ptr = buffer + 21;
const char *ip = inst + oi * 4;
for (i = 0; i < 4; i++) {
*ptr++ = pgm_read_byte(ip++);
}
ptr++;
fputs(" ", stream);
switch(sm & 15) {
case 1: /* immediate */
fputs("#$", stream);
if (s == 2)
fputs(hex8str(get_memb(addr + 1)), stream);
else
fputs(hex16str(get_memw(addr + s - 2)), stream);
*ptr++ = '#';
*ptr++ = '$';
if (s == 2) {
ptr = strhex2(ptr, get_memb(addr + 1));
} else {
ptr = strhex4(ptr, get_memw(addr + s - 2));
}
break;
case 2: /* direct */
fputs("$", stream);
fputs(hex8str(get_memb(addr + s - 1)), stream);
*ptr++ = '$';
ptr = strhex2(ptr, get_memb(addr + s - 1));
break;
case 3: /* indexed */
pb = get_memb(addr + s - 1);
reg = regi[(pb >> 5) & 0x03];
if (!(pb & 0x80)) { /* n4,R */
if (pb & 0x10)
fprintf(stream, "-$%s,%c", hex8str(((pb & 0x0f) ^ 0x0f) + 1), reg);
else
fprintf(stream, "$%s,%c", hex8str(pb & 0x0f), reg);
}
else {
if (pb & 0x10)
fputc('[', stream);
if (pb & 0x10) {
*ptr++ = '-';
*ptr++ = '$';
ptr = strhex2(ptr, ((pb & 0x0f) ^ 0x0f) + 1);
} else {
*ptr++ = '$';
ptr = strhex2(ptr, pb & 0x0f);
}
*ptr++ = ',';
*ptr++ = reg;
} else {
if (pb & 0x10) {
*ptr++ = '[';
}
switch (pb & 0x0f) {
case 0: /* ,R+ */
fprintf(stream, ",%c+", reg);
break;
*ptr++ = ',';
*ptr++ = reg;
*ptr++ = '+';
break;
case 1: /* ,R++ */
fprintf(stream, ",%c++", reg);
break;
*ptr++ = ',';
*ptr++ = reg;
*ptr++ = '+';
*ptr++ = '+';
break;
case 2: /* ,-R */
fprintf(stream, ",-%c", reg);
break;
*ptr++ = ',';
*ptr++ = '-';
*ptr++ = reg;
break;
case 3: /* ,--R */
fprintf(stream, ",--%c", reg);
break;
*ptr++ = ',';
*ptr++ = '-';
*ptr++ = '-';
*ptr++ = reg;
break;
case 4: /* ,R */
fprintf(stream, ",%c", reg);
break;
*ptr++ = ',';
*ptr++ = reg;
break;
case 5: /* B,R */
fprintf(stream, "B,%c", reg);
break;
*ptr++ = 'B';
*ptr++ = ',';
*ptr++ = reg;
break;
case 6: /* A,R */
fprintf(stream, "A,%c", reg);
break;
*ptr++ = 'A';
*ptr++ = ',';
*ptr++ = reg;
break;
case 8: /* n7,R */
s += 1;
fprintf(stream, "$%s,%c", hex8str(get_memb(addr + s - 1)), reg);
break;
s += 1;
*ptr++ = '$';
ptr = strhex2(ptr, get_memb(addr + s - 1));
*ptr++ = ',';
*ptr++ = reg;
break;
case 9: /* n15,R */
s += 2;
fprintf(stream, "$%s,%c", hex16str(get_memw(addr + s - 2)), reg);
break;
s += 2;
*ptr++ = '$';
ptr = strhex4(ptr, get_memw(addr + s - 2));
*ptr++ = ',';
*ptr++ = reg;
break;
case 11: /* D,R */
fprintf(stream, "D,%c", reg);
break;
*ptr++ = 'D';
*ptr++ = ',';
*ptr++ = reg;
break;
case 12: /* n7,PCR */
s += 1;
fprintf(stream, "$%s,PCR", hex8str(get_memb(addr + s - 1)));
break;
s += 1;
*ptr++ = '$';
ptr = strhex2(ptr, get_memb(addr + s - 1));
*ptr++ = ',';
*ptr++ = 'P';
*ptr++ = 'C';
*ptr++ = 'R';
break;
case 13: /* n15,PCR */
s += 2;
fprintf(stream, "$%s,PCR", hex16str(get_memw(addr + s - 2)));
break;
s += 2;
*ptr++ = '$';
ptr = strhex4(ptr, get_memw(addr + s - 2));
*ptr++ = ',';
*ptr++ = 'P';
*ptr++ = 'C';
*ptr++ = 'R';
break;
case 15: /* [n] */
s += 2;
fprintf(stream, "$%s", hex16str(get_memw(addr + s - 2)));
break;
s += 2;
*ptr++ = '$';
ptr = strhex4(ptr, get_memw(addr + s - 2));
break;
default:
fputs("??", stream);
break; }
if (pb & 0x10)
fputc(']', stream);
*ptr++ = '?';
*ptr++ = '?';
break;
}
if (pb & 0x10) {
*ptr++ = ']';
}
}
break;
case 4: /* extended */
fprintf(stream, "$%s", hex16str(get_memw(addr + s - 2)));
*ptr++ = '$';
ptr = strhex4(ptr, get_memw(addr + s - 2));
break;
case 5: /* inherent */
pb = get_memb(addr + 1);
switch (d) {
case 0x1e: case 0x1f: /* exg tfr */
fprintf(stream, "%s,%s", exgi[(pb >> 4) & 0x0f], exgi[pb & 0x0f]);
break;
ptr = strinsert(ptr, exgi[(pb >> 4) & 0x0f]);
*ptr++ = ',';
ptr = strinsert(ptr, exgi[pb & 0x0f]);
break;
case 0x1a: case 0x1c: case 0x3c: /* orcc andcc cwai */
fprintf(stream, "#$%s=%s", hex8str(pb), ccstr(pb));
*ptr++ = '#';
*ptr++ = '$';
ptr = strhex2(ptr, pb);
*ptr++ = '=';
ptr = strcc(ptr, pb);
break;
case 0x34: /* pshs */
{
int p = 0;
for (i = 0; i < 8; i++) {
if (pb & 0x80) {
if (p)
fputc(',', stream);
fputs(pshsregi[i], stream);
p = 1;
}
pb <<= 1;
}
int p = 0;
for (i = 0; i < 8; i++) {
if (pb & 0x80) {
if (p) {
*ptr++ = ',';
}
ptr = strinsert(ptr, pshsregi[i]);
p = 1;
}
pb <<= 1;
}
}
break;
case 0x35: /* puls */
{
int p = 0;
for (i = 7; i >= 0; i--) {
if (pb & 0x01) {
if (p)
fputc(',', stream);
fputs(pshsregi[i], stream);
p = 1;
}
pb >>= 1;
}
int p = 0;
for (i = 7; i >= 0; i--) {
if (pb & 0x01) {
if (p) {
*ptr++ = ',';
}
ptr = strinsert(ptr, pshsregi[i]);
p = 1;
}
pb >>= 1;
}
}
break;
case 0x36: /* pshu */
{
int p = 0;
for (i = 0; i < 8; i++) {
if (pb & 0x80) {
if (p)
fputc(',', stream);
fputs(pshuregi[i], stream);
p = 1;
}
pb <<= 1;
}
int p = 0;
for (i = 0; i < 8; i++) {
if (pb & 0x80) {
if (p) {
*ptr++ = ',';
}
ptr = strinsert(ptr, pshuregi[i]);
p = 1;
}
pb <<= 1;
}
}
break;
case 0x37: /* pulu */
{
int p = 0;
for (i = 7; i >= 0; i--) {
if (pb & 0x01) {
if (p)
fputc(',', stream);
fputs(pshuregi[i], stream);
p = 1;
}
pb >>= 1;
}
int p = 0;
for (i = 7; i >= 0; i--) {
if (pb & 0x01) {
if (p) {
*ptr++ = ',';
}
ptr = strinsert(ptr, pshuregi[i]);
p = 1;
}
pb >>= 1;
}
}
break;
}
break;
break;
case 6: /* relative */
{
tt_s16 v;
if (s == 2)
v = (tt_s16)(tt_s8)get_memb(addr + 1);
else
v = (tt_s16)get_memw(addr + s - 2);
fprintf(stream, "$%s", hex16str(addr + (tt_u16)s + v));
break;
}
int16_t v;
if (s == 2) {
v = (int16_t)(int8_t)get_memb(addr + 1);
} else {
v = (int16_t)get_memw(addr + s - 2);
}
*ptr++ = '$';
ptr = strhex4(ptr, addr + (uint16_t)s + v);
}
break;
}
fputc('\n', stream);
// Get rid of trailing white space
while (*(--ptr) == ' ');
ptr++;
// Add a newline and terminate the string
*ptr++ = '\n';
*ptr++ = '\0';
// Log using the normal (data memory) string logger
logs(buffer);
// Return the address of the next instruction
return addr + s;
}

View File

@ -1,11 +1,11 @@
/* Z80 disassembler
*** Copyright: 1994-1996 Günter Woigk
mailto:kio@little-bat.de
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Permission to use, copy, modify, distribute, and sell this software and
its documentation for any purpose is hereby granted without fee, provided
@ -59,16 +59,16 @@ PERFORMANCE OF THIS SOFTWARE.
// ---- opcode definitions ------------------------------------------------------------------
enum {
NIX, NOP, LD, INC, DEC, RLCA, EX, ADD,
NIX, NOP, LD, INC, DEC, RLCA, EX, ADD,
RRCA, DJNZ, RLA, JR, RRA, DAA, CPL, HALT,
SCF, CCF, RLC, RRC, RL, RR, SLA, SRA,
SCF, CCF, RLC, RRC, RL, RR, SLA, SRA,
SLL, SRL, IN, OUT, SBC, NEG, RETN, IM,
ADC, RETI, RRD, RLD, SUB, AND, XOR,
OR, CP, BIT, RES, SET, LDI, CPI, INI,
OUTI, LDD, CPD, IND, OUTD, LDIR, CPIR, INIR,
OTIR, LDDR, CPDR, INDR, OTDR, RET, POP, JP,
CALL, PUSH, RST, PFX, EXX, DI, EI,
BC, DE, HL, IX, IY, SP, AF, AF2,
ADC, RETI, RRD, RLD, SUB, AND, XOR,
OR, CP, BIT, RES, SET, LDI, CPI, INI,
OUTI, LDD, CPD, IND, OUTD, LDIR, CPIR, INIR,
OTIR, LDDR, CPDR, INDR, OTDR, RET, POP, JP,
CALL, PUSH, RST, PFX, EXX, DI, EI,
BC, DE, HL, IX, IY, SP, AF, AF2,
B, C, D, E, H, L, XHL, A, // <- KEEP THIS ORDER!
XBC, XDE, R, I, XC, XSP, PC, F,
N0, N1, N2, N3, N4, N5, N6, N7,
@ -77,7 +77,7 @@ enum {
XH, XL, YH, YL, XIX, XIY
};
static const char word_NIX[] PROGMEM = "";
static const char word_NIX[] PROGMEM = "";
static const char word_NOP[] PROGMEM = "NOP";
static const char word_LD[] PROGMEM = "LD";
static const char word_INC[] PROGMEM = "INC";
@ -200,7 +200,7 @@ static const char word_YL[] PROGMEM = "YL";
static const char word_XIX[] PROGMEM = "DIS(IX)";
static const char word_XIY[] PROGMEM = "DIS(IY)";
static const char * const word[] PROGMEM =
static const char * const word[] PROGMEM =
{
word_NIX,
word_NOP,
@ -325,224 +325,225 @@ static const char * const word[] PROGMEM =
word_XIX,
word_XIY
};
static const unsigned char cmd_00[192] PROGMEM =
static const unsigned char cmd_00[192] PROGMEM =
{
NOP,0,0,
LD,BC,NN,
LD,XBC,A,
INC,BC,0,
INC,B,0,
DEC,B,0,
LD,B,N,
NOP,0,0,
LD,BC,NN,
LD,XBC,A,
INC,BC,0,
INC,B,0,
DEC,B,0,
LD,B,N,
RLCA,0,0,
EX,AF,AF2,
ADD,HL,BC,
LD,A,XBC,
DEC,BC,0,
INC,C,0,
DEC,C,0,
LD,C,N,
EX,AF,AF2,
ADD,HL,BC,
LD,A,XBC,
DEC,BC,0,
INC,C,0,
DEC,C,0,
LD,C,N,
RRCA,0,0,
DJNZ,DIS,0,
LD,DE,NN,
LD,XDE,A,
INC,DE,0,
INC,D,0,
DEC,D,0,
LD,D,N,
DJNZ,DIS,0,
LD,DE,NN,
LD,XDE,A,
INC,DE,0,
INC,D,0,
DEC,D,0,
LD,D,N,
RLA,0,0,
JR,DIS,0,
ADD,HL,DE,
LD,A,XDE,
DEC,DE,0,
INC,E,0,
DEC,E,0,
LD,E,N,
JR,DIS,0,
ADD,HL,DE,
LD,A,XDE,
DEC,DE,0,
INC,E,0,
DEC,E,0,
LD,E,N,
RRA,0,0,
JR,NZ,DIS,
LD,HL,NN,
LD,XNN,HL,
INC,HL,0,
INC,H,0,
DEC,H,0,
LD,H,N,
JR,NZ,DIS,
LD,HL,NN,
LD,XNN,HL,
INC,HL,0,
INC,H,0,
DEC,H,0,
LD,H,N,
DAA,0,0,
JR,Z,DIS,
ADD,HL,HL,
LD,HL,XNN,
DEC,HL,0,
INC,L,0,
DEC,L,0,
LD,L,N,
JR,Z,DIS,
ADD,HL,HL,
LD,HL,XNN,
DEC,HL,0,
INC,L,0,
DEC,L,0,
LD,L,N,
CPL,0,0,
JR,NC,DIS,
LD,SP,NN,
LD,XNN,A,
INC,SP,0,
INC,XHL,0,
DEC,XHL,0,
LD,XHL,N,
JR,NC,DIS,
LD,SP,NN,
LD,XNN,A,
INC,SP,0,
INC,XHL,0,
DEC,XHL,0,
LD,XHL,N,
SCF,0,0,
JR,C,N,
ADD,HL,SP,
LD,A,XNN,
DEC,SP,0,
INC,A,0,
DEC,A,0,
LD,A,N,
JR,C,N,
ADD,HL,SP,
LD,A,XNN,
DEC,SP,0,
INC,A,0,
DEC,A,0,
LD,A,N,
CCF,0,0
};
static const unsigned char cmd_C0[192] PROGMEM = {
RET,NZ,0,
POP,BC,0,
JP,NZ,NN,
JP,NN,0,
CALL,NZ,NN,
PUSH,BC,0,
ADD,A,N,
static const unsigned char cmd_C0[192] PROGMEM = {
RET,NZ,0,
POP,BC,0,
JP,NZ,NN,
JP,NN,0,
CALL,NZ,NN,
PUSH,BC,0,
ADD,A,N,
RST,N0,0,
RET,Z,0,
RET,0,0,
JP,Z,NN,
PFX,CB,0,
CALL,Z,NN,
CALL,NN,0,
ADC,A,N,
RET,Z,0,
RET,0,0,
JP,Z,NN,
PFX,CB,0,
CALL,Z,NN,
CALL,NN,0,
ADC,A,N,
RST,N1,0,
RET,NC,0,
POP,DE,0,
JP,NC,NN,
OUT,XN,A,
CALL,NC,NN,
PUSH,DE,0,
SUB,A,N,
RET,NC,0,
POP,DE,0,
JP,NC,NN,
OUT,XN,A,
CALL,NC,NN,
PUSH,DE,0,
SUB,A,N,
RST,N2,0,
RET,C,0,
EXX,0,0,
JP,C,NN,
IN,A,XN,
CALL,C,NN,
PFX,IX,0,
SBC,A,N,
RET,C,0,
EXX,0,0,
JP,C,NN,
IN,A,XN,
CALL,C,NN,
PFX,IX,0,
SBC,A,N,
RST,N3,0,
RET,PO,0,
POP,HL,0,
JP,PO,NN,
EX,HL,XSP,
CALL,PO,NN,
PUSH,HL,0,
AND,A,N,
RET,PO,0,
POP,HL,0,
JP,PO,NN,
EX,HL,XSP,
CALL,PO,NN,
PUSH,HL,0,
AND,A,N,
RST,N4,0,
RET,PE,0,
LD,PC,HL,
JP,PE,NN,
EX,DE,HL,
CALL,PE,NN,
PFX,ED,0,
XOR,A,N,
RET,PE,0,
LD,PC,HL,
JP,PE,NN,
EX,DE,HL,
CALL,PE,NN,
PFX,ED,0,
XOR,A,N,
RST,N5,0,
RET,P,0,
POP,AF,0,
JP,P,NN,
DI,0,0,
CALL,P,NN,
PUSH,AF,0,
OR,A,N,
RET,P,0,
POP,AF,0,
JP,P,NN,
DI,0,0,
CALL,P,NN,
PUSH,AF,0,
OR,A,N,
RST,N6,0,
RET,M,0,
LD,SP,HL,
JP,M,NN,
EI,0,0,
CALL,M,NN,
PFX,IY,0,
CP,A,N,
RET,M,0,
LD,SP,HL,
JP,M,NN,
EI,0,0,
CALL,M,NN,
PFX,IY,0,
CP,A,N,
RST,N7,0
};
static const unsigned char cmd_ED40[192] PROGMEM = {
IN,B,XC,
OUT,XC,B,
SBC,HL,BC,
LD,XNN,BC,
NEG,0,0,
RETN,0,0,
IM,N0,0,
IN,B,XC,
OUT,XC,B,
SBC,HL,BC,
LD,XNN,BC,
NEG,0,0,
RETN,0,0,
IM,N0,0,
LD,I,A,
IN,C,XC,
OUT,XC,C,
ADC,HL,BC,
LD,BC,XNN,
NEG,0,0,
RETI,0,0,
IM,N0,0,
IN,C,XC,
OUT,XC,C,
ADC,HL,BC,
LD,BC,XNN,
NEG,0,0,
RETI,0,0,
IM,N0,0,
LD,R,A,
IN,D,XC,
OUT,XC,D,
SBC,HL,DE,
LD,XNN,DE,
NEG,0,0,
RETN,0,0,
IM,N1,0,
IN,D,XC,
OUT,XC,D,
SBC,HL,DE,
LD,XNN,DE,
NEG,0,0,
RETN,0,0,
IM,N1,0,
LD,A,I,
IN,E,XC,
OUT,XC,E,
ADC,HL,DE,
LD,DE,XNN,
NEG,0,0,
RETI,0,0,
IM,N2,0,
IN,E,XC,
OUT,XC,E,
ADC,HL,DE,
LD,DE,XNN,
NEG,0,0,
RETI,0,0,
IM,N2,0,
LD,A,R,
IN,H,XC,
OUT,XC,H,
SBC,HL,HL,
LD,XNN,HL,
NEG,0,0,
RETN,0,0,
IM,N0,0,
IN,H,XC,
OUT,XC,H,
SBC,HL,HL,
LD,XNN,HL,
NEG,0,0,
RETN,0,0,
IM,N0,0,
RRD,0,0,
IN,L,XC,
OUT,XC,L,
ADC,HL,HL,
LD,HL,XNN,
NEG,0,0,
RETI,0,0,
IM,N0,0,
IN,L,XC,
OUT,XC,L,
ADC,HL,HL,
LD,HL,XNN,
NEG,0,0,
RETI,0,0,
IM,N0,0,
RLD,0,0,
IN,F,XC,
OUT,XC,N0,
SBC,HL,SP,
LD,XNN,SP,
NEG,0,0,
RETN,0,0,
IM,N1,0,
IN,F,XC,
OUT,XC,N0,
SBC,HL,SP,
LD,XNN,SP,
NEG,0,0,
RETN,0,0,
IM,N1,0,
NOP,0,0,
IN,A,XC,
OUT,XC,A,
ADC,HL,SP,
LD,SP,XNN,
NEG,0,0,
RETI,0,0,
IM,N2,0,
NOP,0,0
IN,A,XC,
OUT,XC,A,
ADC,HL,SP,
LD,SP,XNN,
NEG,0,0,
RETI,0,0,
IM,N2,0,
NOP,0,0
};
static const char msg_HALT[] PROGMEM = "**HALT**\n";
static const char msg_INT[] PROGMEM = "**INT**\n";
static const char msg_NMI[] PROGMEM = "**NMI**\n";
unsigned char cmd_halt[] = { HALT,0,0 };
unsigned char cmd_nop[] = { NOP,0,0 };
unsigned char c_ari[] = { ADD,ADC,SUB,SBC,AND,XOR,OR,CP };
unsigned char c_blk[] = { LDI,CPI,INI,OUTI,0,0,0,0,LDD,CPD,IND,OUTD,0,0,0,0,
LDIR,CPIR,INIR,OTIR,0,0,0,0,LDDR,CPDR,INDR,OTDR };
LDIR,CPIR,INIR,OTIR,0,0,0,0,LDDR,CPDR,INDR,OTDR };
unsigned char c_sh[] = { RLC,RRC,RL,RR,SLA,SRA,SLL,SRL };
char buffer[10];
// ============================================================================================
@ -570,11 +571,11 @@ const unsigned char* mnemo(unsigned char op) {
{
case 0: return copyFromPgmMem(cmd_00 + op * 3);
case 1: if (op==0x76) return cmd_halt;
cl[1] = B + ((op>>3)&0x07);
cl[2] = B + (op&0x07);
cl[1] = B + ((op>>3)&0x07);
cl[2] = B + (op&0x07);
return cl;
case 2: ca[0] = c_ari[(op>>3)&0x07];
ca[2] = B + (op&0x07);
ca[2] = B + (op&0x07);
return ca;
case 3: return copyFromPgmMem(cmd_C0 + (op&0x3f) * 3);
}
@ -598,7 +599,7 @@ unsigned char* mnemoCB(unsigned char op) {
case 3: cmd[0] = SET; break;
}
cmd[1] = N0 + ((op>>3)&0x07);
cmd[2] = B + (op&0x07);
cmd[2] = B + (op&0x07);
return cmd;
}
@ -633,14 +634,14 @@ const unsigned char* mnemoED(unsigned char op) {
static unsigned char cmd[3]={0,0,0};
if (op<0x40) return cmd_nop;
if (op>=0x080)
if (op>=0x080)
{ if ((op&0xE4)!=0xA0) return cmd_nop;
cmd[0] = c_blk[op&0x1B];
return cmd;
};
return copyFromPgmMem(cmd_ED40 + (op-0x40) * 3);
return copyFromPgmMem(cmd_ED40 + (op-0x40) * 3);
}
@ -648,7 +649,7 @@ const unsigned char* mnemoED(unsigned char op) {
// note: for immediate use only!
unsigned char* mnemoIX (unsigned char op) {
static unsigned char cmd[3];
memcpy (cmd, mnemo(op), 3);
if (cmd[1]==XHL) { cmd[1]=XIX; return cmd; }
@ -667,7 +668,7 @@ unsigned char* mnemoIX (unsigned char op) {
// note: for immediate use only!
unsigned char* mnemoIY (unsigned char op) {
static unsigned char cmd[3];
memcpy (cmd, mnemo(op), 3);
if (cmd[1]==XHL) { cmd[1]=XIY; return cmd; }
@ -693,13 +694,13 @@ int IllegalCB (unsigned char op) {
// instructions using IX are legal except: sll is illegal
int IllegalXXCB (unsigned char op) {
if ((op&0x07)!=6) return weird;
return op>=0x30 && op<0x38 ? illegal : legal;
return op>=0x30 && op<0x38 ? illegal : legal;
}
// ---- get legal state of ED instruction --------------------------------------
// 0x00-0x3F and 0x80-0xFF weird except block instructions
// 0x40-0x7F legal or weird
// 0x40-0x7F legal or weird
// in f,(c) is legal; out (c),0 is weird
int IllegalED (unsigned char op) {
char *il = "1111111111110101111100111111001111110001111100011011000011110000";
@ -715,7 +716,7 @@ int IllegalED (unsigned char op) {
// prefixes are legal
int IllegalXX (unsigned char op) {
const unsigned char *c;
c = mnemo(op);
if (*c==PFX || c[1]==XHL || c[2]==XHL) return legal;
@ -742,127 +743,192 @@ int OpcodeLength (unsigned char op1, unsigned char op2) {
{
case 0xcb: return 2;
case 0xed: if (/* op2<0x40 || op2>=0x80 || ((op2&7)!=3) */ (op2&0xc7)!=0x43) return 2; else return 4;
case 0xdd:
case 0xdd:
case 0xfd:
switch (op2>>6)
switch (op2>>6)
{
case 0: return len0[op2]-'0'+1 + (op2>=0x34&&op2<=0x36); // inc(hl); dec(hl); ld(hl),N: add displacement
case 1:
case 1:
case 2: if (((op2&0x07)==6) == ((op2&0x0F8)==0x70)) return 2; else return 3;
}
if (op2==0xcb) return 4;
return len3[op2&0x3F]-'0'+1; // note: entries for prefixes are 0 giving a total of 1, just to skip the useless prefix
}
return len3[op1&0x3F]-'0'; // 0xC0 - 0xFF: no prefix: various length
}
// ===================================================================================
void xword (unsigned char n, unsigned int *ip) {
char * xword (char *ptr, unsigned char n, unsigned int *ip) {
unsigned int nn;
// TODO: Replace switch with a more intelligent case
switch (n)
{
case DIS:
n = Peek((*ip)++);
log0("$%04X", *ip+(char)n,4); // branch destination
*ptr++ = '$';
ptr = strhex4(ptr, *ip+(char)n); // branch destination
break;
case N:
case N:
n = Peek((*ip)++);
log0("$%02X", n);
*ptr++ = '$';
ptr = strhex2(ptr, n);
break;
case NN:
n = Peek((*ip)++);
nn = n+256*Peek((*ip)++);
log0("$%04X", nn);
*ptr++ = '$';
ptr = strhex4(ptr, nn);
break;
case XNN:
n = Peek((*ip)++);
nn = n+256*Peek((*ip)++);
log0("($%04X)", nn);
*ptr++ = '(';
*ptr++ = '$';
ptr = strhex4(ptr, nn);
*ptr++ = ')';
break;
case XN:
n = Peek((*ip)++);
log0("($%02X)", n);
*ptr++ = '(';
*ptr++ = '$';
ptr = strhex2(ptr, n);
*ptr++ = ')';
break;
case XIX:
n = Peek((*ip)++);
*ptr++ = '(';
*ptr++ = 'I';
*ptr++ = 'X';
if (n&0x80) {
log0("(IX-$%02X)", 256-n);
*ptr++ = '-';
ptr = strhex2(ptr, 256 - n);
} else {
log0("(IX+$%02X)", n);
*ptr++ = '+';
ptr = strhex2(ptr, n);
}
*ptr++ = ')';
break;
case XIY:
n = Peek((*ip)++);
*ptr++ = '(';
*ptr++ = 'I';
*ptr++ = 'Y';
if (n&0x80) {
log0("(IY-$%02X)", 256-n);
*ptr++ = '-';
ptr = strhex2(ptr, 256 - n);
} else {
log0("(IY+$%02X)", n);
*ptr++ = '+';
ptr = strhex2(ptr, n);
}
*ptr++ = ')';
break;
default:
strcpy_P(buffer, (PGM_P)pgm_read_word(&(word[n])));
log0("%s", buffer);
strcpy_P(ptr, (PGM_P)pgm_read_word(&(word[n])));
ptr += strlen(ptr);
break;
}
return ptr;
}
// ---- expand 3-char descriptor m[3] to mnemonic with arguments via pc
void disass (const unsigned char *m, unsigned int *ip) {
strcpy_P(buffer, (PGM_P)pgm_read_word(&(word[*m++])));
log0("%-5s", buffer);
char *disass (char *ptr, const unsigned char *m, unsigned int *ip) {
strcpy_P(ptr, (PGM_P)pgm_read_word(&(word[*m++])));
*(ptr + strlen(ptr)) = ' ';
ptr += 5;
if (*m) {
xword(*m++,ip);
ptr = xword(ptr, *m++,ip);
}
if (*m) {
log0(",");
xword(*m,ip);
*ptr++ = ',';
ptr = xword(ptr, *m,ip);
}
return ptr;
}
void disassem (unsigned int *ip) {
char * disassem (char *ptr, unsigned int *ip) {
unsigned char op;
op = Peek((*ip)++);
switch (op)
{
case 0xcb:
disass (mnemoCB(Peek((*ip)++)), ip);
ptr = disass(ptr, mnemoCB(Peek((*ip)++)), ip);
break;
case 0xed:
disass (mnemoED(Peek((*ip)++)), ip);
ptr = disass(ptr, mnemoED(Peek((*ip)++)), ip);
break;
case 0xdd:
op = Peek((*ip)++);
if (op!=0xCB) {
disass (mnemoIX(op), ip);
ptr = disass(ptr, mnemoIX(op), ip);
} else {
disass (mnemoIXCB(Peek((*ip)+1)), ip);
(*ip)++;
ptr = disass(ptr, mnemoIXCB(Peek((*ip)+1)), ip);
(*ip)++;
}
break;
case 0xfd:
op = Peek((*ip)++);
if (op!=0xCB) {
disass (mnemoIY(op), ip);
ptr = disass(ptr, mnemoIY(op), ip);
} else {
disass (mnemoIYCB(Peek((*ip)+1)), ip);
(*ip)++;
ptr = disass(ptr, mnemoIYCB(Peek((*ip)+1)), ip);
(*ip)++;
}
break;
default:
disass (mnemo(op),ip);
ptr = disass(ptr, mnemo(op),ip);
break;
}
return ptr;
}
unsigned int disassemble(unsigned int addr) {
log0("%04X : ", addr);
disassem(&addr);
log0("\n");
addr_t disassemble(addr_t addr, uint8_t m) {
static char buffer[64];
char *ptr;
addr_t addr2 = addr;
// Ignore the current CPU state in the disassemble connamd
uint8_t pdc = (m == MODE_DIS_CMD) ? 0 : PDC_DIN;
// 0123456789012345678901234567890123456789
// AAAA : HH HH HH HH : LD RR,($XXXX)
strfill(buffer, ' ', sizeof(buffer));
buffer[5] = ':';
buffer[19] = ':';
// Address
strhex4(buffer, addr);
// Opcode
ptr = buffer + 21;
if (pdc & 0x80) {
strcpy_P(ptr, msg_HALT);
} else if (pdc & 0x40) {
strcpy(ptr, msg_NMI);
} else if (pdc & 0x20) {
strcpy(ptr, msg_INT);
} else {
ptr = disassem(ptr, &addr2);
*ptr++ = '\n';
*ptr++ = '\0';
}
// Hex
loadAddr(addr);
ptr = buffer + 7;
while (addr < addr2) {
strhex2(ptr, readMemByteInc());
ptr += 3;
addr++;
}
logs(buffer);
return addr;
}

View File

@ -1,716 +0,0 @@
/*****************************************************************************
Title : HD44780 Library
Author : SA Development
Version: 1.11
*****************************************************************************/
#include "avr/pgmspace.h"
#include "hd44780.h"
#include "avr/sfr_defs.h"
#if (USE_ADELAY_LIBRARY==1)
#include "adelay.h"
#else
#define Delay_ns(__ns) \
if((unsigned long) (F_CPU/1000000000.0 * __ns) != F_CPU/1000000000.0 * __ns)\
__builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000000000.0 * __ns)+1);\
else __builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000000000.0 * __ns))
#define Delay_us(__us) \
if((unsigned long) (F_CPU/1000000.0 * __us) != F_CPU/1000000.0 * __us)\
__builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000000.0 * __us)+1);\
else __builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000000.0 * __us))
#define Delay_ms(__ms) \
if((unsigned long) (F_CPU/1000.0 * __ms) != F_CPU/1000.0 * __ms)\
__builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000.0 * __ms)+1);\
else __builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000.0 * __ms))
#define Delay_s(__s) \
if((unsigned long) (F_CPU/1.0 * __s) != F_CPU/1.0 * __s)\
__builtin_avr_delay_cycles((unsigned long) ( F_CPU/1.0 * __s)+1);\
else __builtin_avr_delay_cycles((unsigned long) ( F_CPU/1.0 * __s))
#endif
#if !defined(LCD_BITS) || (LCD_BITS!=4 && LCD_BITS!=8)
#error LCD_BITS is not defined or not valid.
#endif
#if !defined(WAIT_MODE) || (WAIT_MODE!=0 && WAIT_MODE!=1)
#error WAIT_MODE is not defined or not valid.
#endif
#if !defined(RW_LINE_IMPLEMENTED) || (RW_LINE_IMPLEMENTED!=0 && RW_LINE_IMPLEMENTED!=1)
#error RW_LINE_IMPLEMENTED is not defined or not valid.
#endif
#if (WAIT_MODE==1 && RW_LINE_IMPLEMENTED!=1)
#error WAIT_MODE=1 requires RW_LINE_IMPLEMENTED=1.
#endif
#if !defined(LCD_DISPLAYS) || (LCD_DISPLAYS<1) || (LCD_DISPLAYS>4)
#error LCD_DISPLAYS is not defined or not valid.
#endif
// Constants/Macros
#define PIN(x) (*(&x - 2)) // Address of Data Direction Register of Port X
#define DDR(x) (*(&x - 1)) // Address of Input Register of Port X
//PORT defines
#define lcd_rs_port_low() LCD_RS_PORT&=~_BV(LCD_RS_PIN)
#if RW_LINE_IMPLEMENTED==1
#define lcd_rw_port_low() LCD_RW_PORT&=~_BV(LCD_RW_PIN)
#endif
#define lcd_db0_port_low() LCD_DB0_PORT&=~_BV(LCD_DB0_PIN)
#define lcd_db1_port_low() LCD_DB1_PORT&=~_BV(LCD_DB1_PIN)
#define lcd_db2_port_low() LCD_DB2_PORT&=~_BV(LCD_DB2_PIN)
#define lcd_db3_port_low() LCD_DB3_PORT&=~_BV(LCD_DB3_PIN)
#define lcd_db4_port_low() LCD_DB4_PORT&=~_BV(LCD_DB4_PIN)
#define lcd_db5_port_low() LCD_DB5_PORT&=~_BV(LCD_DB5_PIN)
#define lcd_db6_port_low() LCD_DB6_PORT&=~_BV(LCD_DB6_PIN)
#define lcd_db7_port_low() LCD_DB7_PORT&=~_BV(LCD_DB7_PIN)
#define lcd_rs_port_high() LCD_RS_PORT|=_BV(LCD_RS_PIN)
#if RW_LINE_IMPLEMENTED==1
#define lcd_rw_port_high() LCD_RW_PORT|=_BV(LCD_RW_PIN)
#endif
#define lcd_db0_port_high() LCD_DB0_PORT|=_BV(LCD_DB0_PIN)
#define lcd_db1_port_high() LCD_DB1_PORT|=_BV(LCD_DB1_PIN)
#define lcd_db2_port_high() LCD_DB2_PORT|=_BV(LCD_DB2_PIN)
#define lcd_db3_port_high() LCD_DB3_PORT|=_BV(LCD_DB3_PIN)
#define lcd_db4_port_high() LCD_DB4_PORT|=_BV(LCD_DB4_PIN)
#define lcd_db5_port_high() LCD_DB5_PORT|=_BV(LCD_DB5_PIN)
#define lcd_db6_port_high() LCD_DB6_PORT|=_BV(LCD_DB6_PIN)
#define lcd_db7_port_high() LCD_DB7_PORT|=_BV(LCD_DB7_PIN)
#define lcd_rs_port_set(value) if (value) lcd_rs_port_high(); else lcd_rs_port_low();
#if RW_LINE_IMPLEMENTED==1
#define lcd_rw_port_set(value) if (value) lcd_rw_port_high(); else lcd_rw_port_low();
#endif
#define lcd_db0_port_set(value) if (value) lcd_db0_port_high(); else lcd_db0_port_low();
#define lcd_db1_port_set(value) if (value) lcd_db1_port_high(); else lcd_db1_port_low();
#define lcd_db2_port_set(value) if (value) lcd_db2_port_high(); else lcd_db2_port_low();
#define lcd_db3_port_set(value) if (value) lcd_db3_port_high(); else lcd_db3_port_low();
#define lcd_db4_port_set(value) if (value) lcd_db4_port_high(); else lcd_db4_port_low();
#define lcd_db5_port_set(value) if (value) lcd_db5_port_high(); else lcd_db5_port_low();
#define lcd_db6_port_set(value) if (value) lcd_db6_port_high(); else lcd_db6_port_low();
#define lcd_db7_port_set(value) if (value) lcd_db7_port_high(); else lcd_db7_port_low();
//PIN defines
#define lcd_db0_pin_get() (((PIN(LCD_DB0_PORT) & _BV(LCD_DB0_PIN))==0)?0:1)
#define lcd_db1_pin_get() (((PIN(LCD_DB1_PORT) & _BV(LCD_DB1_PIN))==0)?0:1)
#define lcd_db2_pin_get() (((PIN(LCD_DB2_PORT) & _BV(LCD_DB2_PIN))==0)?0:1)
#define lcd_db3_pin_get() (((PIN(LCD_DB3_PORT) & _BV(LCD_DB3_PIN))==0)?0:1)
#define lcd_db4_pin_get() (((PIN(LCD_DB4_PORT) & _BV(LCD_DB4_PIN))==0)?0:1)
#define lcd_db5_pin_get() (((PIN(LCD_DB5_PORT) & _BV(LCD_DB5_PIN))==0)?0:1)
#define lcd_db6_pin_get() (((PIN(LCD_DB6_PORT) & _BV(LCD_DB6_PIN))==0)?0:1)
#define lcd_db7_pin_get() (((PIN(LCD_DB7_PORT) & _BV(LCD_DB7_PIN))==0)?0:1)
//DDR defines
#define lcd_rs_ddr_low() DDR(LCD_RS_PORT)&=~_BV(LCD_RS_PIN)
#if RW_LINE_IMPLEMENTED==1
#define lcd_rw_ddr_low() DDR(LCD_RW_PORT)&=~_BV(LCD_RW_PIN)
#endif
#define lcd_db0_ddr_low() DDR(LCD_DB0_PORT)&=~_BV(LCD_DB0_PIN)
#define lcd_db1_ddr_low() DDR(LCD_DB1_PORT)&=~_BV(LCD_DB1_PIN)
#define lcd_db2_ddr_low() DDR(LCD_DB2_PORT)&=~_BV(LCD_DB2_PIN)
#define lcd_db3_ddr_low() DDR(LCD_DB3_PORT)&=~_BV(LCD_DB3_PIN)
#define lcd_db4_ddr_low() DDR(LCD_DB4_PORT)&=~_BV(LCD_DB4_PIN)
#define lcd_db5_ddr_low() DDR(LCD_DB5_PORT)&=~_BV(LCD_DB5_PIN)
#define lcd_db6_ddr_low() DDR(LCD_DB6_PORT)&=~_BV(LCD_DB6_PIN)
#define lcd_db7_ddr_low() DDR(LCD_DB7_PORT)&=~_BV(LCD_DB7_PIN)
#define lcd_rs_ddr_high() DDR(LCD_RS_PORT)|=_BV(LCD_RS_PIN)
#if RW_LINE_IMPLEMENTED==1
#define lcd_rw_ddr_high() DDR(LCD_RW_PORT)|=_BV(LCD_RW_PIN)
#endif
#define lcd_db0_ddr_high() DDR(LCD_DB0_PORT)|=_BV(LCD_DB0_PIN)
#define lcd_db1_ddr_high() DDR(LCD_DB1_PORT)|=_BV(LCD_DB1_PIN)
#define lcd_db2_ddr_high() DDR(LCD_DB2_PORT)|=_BV(LCD_DB2_PIN)
#define lcd_db3_ddr_high() DDR(LCD_DB3_PORT)|=_BV(LCD_DB3_PIN)
#define lcd_db4_ddr_high() DDR(LCD_DB4_PORT)|=_BV(LCD_DB4_PIN)
#define lcd_db5_ddr_high() DDR(LCD_DB5_PORT)|=_BV(LCD_DB5_PIN)
#define lcd_db6_ddr_high() DDR(LCD_DB6_PORT)|=_BV(LCD_DB6_PIN)
#define lcd_db7_ddr_high() DDR(LCD_DB7_PORT)|=_BV(LCD_DB7_PIN)
#define lcd_rs_ddr_set(value) if (value) lcd_rs_ddr_high(); else lcd_rs_ddr_low();
#if RW_LINE_IMPLEMENTED==1
#define lcd_rw_ddr_set(value) if (value) lcd_rw_ddr_high(); else lcd_rw_ddr_low();
#endif
#define lcd_db0_ddr_set(value) if (value) lcd_db0_ddr_high(); else lcd_db0_ddr_low();
#define lcd_db1_ddr_set(value) if (value) lcd_db1_ddr_high(); else lcd_db1_ddr_low();
#define lcd_db2_ddr_set(value) if (value) lcd_db2_ddr_high(); else lcd_db2_ddr_low();
#define lcd_db3_ddr_set(value) if (value) lcd_db3_ddr_high(); else lcd_db3_ddr_low();
#define lcd_db4_ddr_set(value) if (value) lcd_db4_ddr_high(); else lcd_db4_ddr_low();
#define lcd_db5_ddr_set(value) if (value) lcd_db5_ddr_high(); else lcd_db5_ddr_low();
#define lcd_db6_ddr_set(value) if (value) lcd_db6_ddr_high(); else lcd_db6_ddr_low();
#define lcd_db7_ddr_set(value) if (value) lcd_db7_ddr_high(); else lcd_db7_ddr_low();
#if (WAIT_MODE==1 && RW_LINE_IMPLEMENTED==1)
static unsigned char PrevCmdInvolvedAddressCounter=0;
#endif
#if (LCD_DISPLAYS>1)
static unsigned char ActiveDisplay=1;
#endif
static inline void lcd_e_port_low()
{
#if (LCD_DISPLAYS>1)
switch (ActiveDisplay)
{
case 2 : LCD_E2_PORT&=~_BV(LCD_E2_PIN);
break;
#if (LCD_DISPLAYS>=3)
case 3 : LCD_E3_PORT&=~_BV(LCD_E3_PIN);
break;
#endif
#if (LCD_DISPLAYS==4)
case 4 : LCD_E4_PORT&=~_BV(LCD_E4_PIN);
break;
#endif
default :
#endif
LCD_E_PORT&=~_BV(LCD_E_PIN);
#if (LCD_DISPLAYS>1)
}
#endif
}
static inline void lcd_e_port_high()
{
#if (LCD_DISPLAYS>1)
switch (ActiveDisplay)
{
case 2 : LCD_E2_PORT|=_BV(LCD_E2_PIN);
break;
#if (LCD_DISPLAYS>=3)
case 3 : LCD_E3_PORT|=_BV(LCD_E3_PIN);
break;
#endif
#if (LCD_DISPLAYS==4)
case 4 : LCD_E4_PORT|=_BV(LCD_E4_PIN);
break;
#endif
default :
#endif
LCD_E_PORT|=_BV(LCD_E_PIN);
#if (LCD_DISPLAYS>1)
}
#endif
}
static inline void lcd_e_ddr_low()
{
#if (LCD_DISPLAYS>1)
switch (ActiveDisplay)
{
case 2 : DDR(LCD_E2_PORT)&=~_BV(LCD_E2_PIN);
break;
#if (LCD_DISPLAYS>=3)
case 3 : DDR(LCD_E3_PORT)&=~_BV(LCD_E3_PIN);
break;
#endif
#if (LCD_DISPLAYS==4)
case 4 : DDR(LCD_E4_PORT)&=~_BV(LCD_E4_PIN);
break;
#endif
default :
#endif
DDR(LCD_E_PORT)&=~_BV(LCD_E_PIN);
#if (LCD_DISPLAYS>1)
}
#endif
}
static inline void lcd_e_ddr_high()
{
#if (LCD_DISPLAYS>1)
switch (ActiveDisplay)
{
case 2 : DDR(LCD_E2_PORT)|=_BV(LCD_E2_PIN);
break;
#if (LCD_DISPLAYS>=3)
case 3 : DDR(LCD_E3_PORT)|=_BV(LCD_E3_PIN);
break;
#endif
#if (LCD_DISPLAYS==4)
case 4 : DDR(LCD_E4_PORT)|=_BV(LCD_E4_PIN);
break;
#endif
default :
#endif
DDR(LCD_E_PORT)|=_BV(LCD_E_PIN);
#if (LCD_DISPLAYS>1)
}
#endif
}
/*************************************************************************
loops while lcd is busy, returns address counter
*************************************************************************/
#if (WAIT_MODE==1 && RW_LINE_IMPLEMENTED==1)
static uint8_t lcd_read(uint8_t rs);
static void lcd_waitbusy(void)
{
register uint8_t c;
unsigned int ul1=0;
while ( ((c=lcd_read(0)) & (1<<LCD_BUSY)) && ul1<((F_CPU/16384>=16)?F_CPU/16384:16)) // Wait Until Busy Flag is Cleared
ul1++;
}
#endif
/*************************************************************************
Low-level function to read byte from LCD controller
Input: rs 1: read data
0: read busy flag / address counter
Returns: byte read from LCD controller
*************************************************************************/
#if RW_LINE_IMPLEMENTED==1
static uint8_t lcd_read(uint8_t rs)
{
uint8_t data;
#if (WAIT_MODE==1 && RW_LINE_IMPLEMENTED==1)
if (rs)
lcd_waitbusy();
if (PrevCmdInvolvedAddressCounter)
{
Delay_us(5);
PrevCmdInvolvedAddressCounter=0;
}
#endif
if (rs)
{
lcd_rs_port_high(); // RS=1: Read Data
#if (WAIT_MODE==1 && RW_LINE_IMPLEMENTED==1)
PrevCmdInvolvedAddressCounter=1;
#endif
}
else lcd_rs_port_low(); // RS=0: Read Busy Flag
lcd_rw_port_high(); // RW=1: Read Mode
#if LCD_BITS==4
lcd_db7_ddr_low(); // Configure Data Pins as Input
lcd_db6_ddr_low();
lcd_db5_ddr_low();
lcd_db4_ddr_low();
lcd_e_port_high(); // Read High Nibble First
Delay_ns(500);
data=lcd_db4_pin_get() << 4 | lcd_db5_pin_get() << 5 |
lcd_db6_pin_get() << 6 | lcd_db7_pin_get() << 7;
lcd_e_port_low();
Delay_ns(500);
lcd_e_port_high(); // Read Low Nibble
Delay_ns(500);
data|=lcd_db4_pin_get() << 0 | lcd_db5_pin_get() << 1 |
lcd_db6_pin_get() << 2 | lcd_db7_pin_get() << 3;
lcd_e_port_low();
lcd_db7_ddr_high(); // Configure Data Pins as Output
lcd_db6_ddr_high();
lcd_db5_ddr_high();
lcd_db4_ddr_high();
lcd_db7_port_high(); // Pins High (Inactive)
lcd_db6_port_high();
lcd_db5_port_high();
lcd_db4_port_high();
#else //using 8-Bit-Mode
lcd_db7_ddr_low(); // Configure Data Pins as Input
lcd_db6_ddr_low();
lcd_db5_ddr_low();
lcd_db4_ddr_low();
lcd_db3_ddr_low();
lcd_db2_ddr_low();
lcd_db1_ddr_low();
lcd_db0_ddr_low();
lcd_e_port_high();
Delay_ns(500);
data=lcd_db7_pin_get() << 7 | lcd_db6_pin_get() << 6 |
lcd_db5_pin_get() << 5 | lcd_db4_pin_get() << 4 |
lcd_db3_pin_get() << 3 | lcd_db2_pin_get() << 2 |
lcd_db1_pin_get() << 1 | lcd_db0_pin_get();
lcd_e_port_low();
lcd_db7_ddr_high(); // Configure Data Pins as Output
lcd_db6_ddr_high();
lcd_db5_ddr_high();
lcd_db4_ddr_high();
lcd_db3_ddr_high();
lcd_db2_ddr_high();
lcd_db1_ddr_high();
lcd_db0_ddr_high();
lcd_db7_port_high(); // Pins High (Inactive)
lcd_db6_port_high();
lcd_db5_port_high();
lcd_db4_port_high();
lcd_db3_port_high();
lcd_db2_port_high();
lcd_db1_port_high();
lcd_db0_port_high();
#endif
lcd_rw_port_low();
#if (WAIT_MODE==0 || RW_LINE_IMPLEMENTED==0)
if (rs)
Delay_us(40);
else Delay_us(1);
#endif
return data;
}
uint8_t lcd_getc()
{
return lcd_read(1);
}
#endif
/*************************************************************************
Low-level function to write byte to LCD controller
Input: data byte to write to LCD
rs 1: write data
0: write instruction
Returns: none
*************************************************************************/
static void lcd_write(uint8_t data,uint8_t rs)
{
#if (WAIT_MODE==1 && RW_LINE_IMPLEMENTED==1)
lcd_waitbusy();
if (PrevCmdInvolvedAddressCounter)
{
Delay_us(5);
PrevCmdInvolvedAddressCounter=0;
}
#endif
if (rs)
{
lcd_rs_port_high(); // RS=1: Write Character
#if (WAIT_MODE==1 && RW_LINE_IMPLEMENTED==1)
PrevCmdInvolvedAddressCounter=1;
#endif
}
else
{
lcd_rs_port_low(); // RS=0: Write Command
#if (WAIT_MODE==1 && RW_LINE_IMPLEMENTED==1)
PrevCmdInvolvedAddressCounter=0;
#endif
}
#if LCD_BITS==4
lcd_db7_port_set(data&_BV(7)); //Output High Nibble
lcd_db6_port_set(data&_BV(6));
lcd_db5_port_set(data&_BV(5));
lcd_db4_port_set(data&_BV(4));
Delay_ns(100);
lcd_e_port_high();
Delay_ns(500);
lcd_e_port_low();
lcd_db7_port_set(data&_BV(3)); //Output High Nibble
lcd_db6_port_set(data&_BV(2));
lcd_db5_port_set(data&_BV(1));
lcd_db4_port_set(data&_BV(0));
Delay_ns(100);
lcd_e_port_high();
Delay_ns(500);
lcd_e_port_low();
lcd_db7_port_high(); // All Data Pins High (Inactive)
lcd_db6_port_high();
lcd_db5_port_high();
lcd_db4_port_high();
#else //using 8-Bit_Mode
lcd_db7_port_set(data&_BV(7)); //Output High Nibble
lcd_db6_port_set(data&_BV(6));
lcd_db5_port_set(data&_BV(5));
lcd_db4_port_set(data&_BV(4));
lcd_db3_port_set(data&_BV(3)); //Output High Nibble
lcd_db2_port_set(data&_BV(2));
lcd_db1_port_set(data&_BV(1));
lcd_db0_port_set(data&_BV(0));
Delay_ns(100);
lcd_e_port_high();
Delay_ns(500);
lcd_e_port_low();
lcd_db7_port_high(); // All Data Pins High (Inactive)
lcd_db6_port_high();
lcd_db5_port_high();
lcd_db4_port_high();
lcd_db3_port_high();
lcd_db2_port_high();
lcd_db1_port_high();
lcd_db0_port_high();
#endif
#if (WAIT_MODE==0 || RW_LINE_IMPLEMENTED==0)
if (!rs && data<=((1<<LCD_CLR) | (1<<LCD_HOME))) // Is command clrscr or home?
Delay_us(1640);
else Delay_us(40);
#endif
}
/*************************************************************************
Send LCD controller instruction command
Input: instruction to send to LCD controller, see HD44780 data sheet
Returns: none
*************************************************************************/
void lcd_command(uint8_t cmd)
{
lcd_write(cmd,0);
}
/*************************************************************************
Set cursor to specified position
Input: pos position
Returns: none
*************************************************************************/
void lcd_goto(uint8_t pos)
{
lcd_command((1<<LCD_DDRAM)+pos);
}
/*************************************************************************
Clear screen
Input: none
Returns: none
*************************************************************************/
void lcd_clrscr()
{
lcd_command(1<<LCD_CLR);
}
/*************************************************************************
Return home
Input: none
Returns: none
*************************************************************************/
void lcd_home()
{
lcd_command(1<<LCD_HOME);
}
/*************************************************************************
Display character
Input: character to be displayed
Returns: none
*************************************************************************/
void lcd_putc(char c)
{
lcd_write(c,1);
}
/*************************************************************************
Display string
Input: string to be displayed
Returns: none
*************************************************************************/
void lcd_puts(const char *s)
{
register char c;
while ((c=*s++))
lcd_putc(c);
}
/*************************************************************************
Display string from flash
Input: string to be displayed
Returns: none
*************************************************************************/
void lcd_puts_P(const char *progmem_s)
{
register char c;
while ((c=pgm_read_byte(progmem_s++)))
lcd_putc(c);
}
/*************************************************************************
Initialize display
Input: none
Returns: none
*************************************************************************/
void lcd_init()
{
//Set All Pins as Output
lcd_e_ddr_high();
lcd_rs_ddr_high();
#if RW_LINE_IMPLEMENTED==1
lcd_rw_ddr_high();
#endif
lcd_db7_ddr_high();
lcd_db6_ddr_high();
lcd_db5_ddr_high();
lcd_db4_ddr_high();
#if LCD_BITS==8
lcd_db3_ddr_high();
lcd_db2_ddr_high();
lcd_db1_ddr_high();
lcd_db0_ddr_high();
#endif
//Set All Control Lines Low
lcd_e_port_low();
lcd_rs_port_low();
#if RW_LINE_IMPLEMENTED==1
lcd_rw_port_low();
#endif
//Set All Data Lines High
lcd_db7_port_high();
lcd_db6_port_high();
lcd_db5_port_high();
lcd_db4_port_high();
#if LCD_BITS==8
lcd_db3_port_high();
lcd_db2_port_high();
lcd_db1_port_high();
lcd_db0_port_high();
#endif
//Startup Delay
Delay_ms(DELAY_RESET);
//Initialize Display
lcd_db7_port_low();
lcd_db6_port_low();
Delay_ns(100);
lcd_e_port_high();
Delay_ns(500);
lcd_e_port_low();
Delay_us(4100);
lcd_e_port_high();
Delay_ns(500);
lcd_e_port_low();
Delay_us(100);
lcd_e_port_high();
Delay_ns(500);
lcd_e_port_low();
Delay_us(40);
//Init differs between 4-bit and 8-bit from here
#if (LCD_BITS==4)
lcd_db4_port_low();
Delay_ns(100);
lcd_e_port_high();
Delay_ns(500);
lcd_e_port_low();
Delay_us(40);
lcd_db4_port_low();
Delay_ns(100);
lcd_e_port_high();
Delay_ns(500);
lcd_e_port_low();
Delay_ns(500);
#if (LCD_DISPLAYS==1)
if (LCD_DISPLAY_LINES>1)
lcd_db7_port_high();
#else
unsigned char c;
switch (ActiveDisplay)
{
case 1 : c=LCD_DISPLAY_LINES; break;
case 2 : c=LCD_DISPLAY2_LINES; break;
#if (LCD_DISPLAYS>=3)
case 3 : c=LCD_DISPLAY3_LINES; break;
#endif
#if (LCD_DISPLAYS==4)
case 4 : c=LCD_DISPLAY4_LINES; break;
#endif
}
if (c>1)
lcd_db7_port_high();
#endif
Delay_ns(100);
lcd_e_port_high();
Delay_ns(500);
lcd_e_port_low();
Delay_us(40);
#else
#if (LCD_DISPLAYS==1)
if (LCD_DISPLAY_LINES<2)
lcd_db3_port_low();
#else
unsigned char c;
switch (ActiveDisplay)
{
case 1 : c=LCD_DISPLAY_LINES; break;
case 2 : c=LCD_DISPLAY2_LINES; break;
#if (LCD_DISPLAYS>=3)
case 3 : c=LCD_DISPLAY3_LINES; break;
#endif
#if (LCD_DISPLAYS==4)
case 4 : c=LCD_DISPLAY4_LINES; break;
#endif
}
if (c<2)
lcd_db3_port_low();
#endif
lcd_db2_port_low();
Delay_ns(100);
lcd_e_port_high();
Delay_ns(500);
lcd_e_port_low();
Delay_us(40);
#endif
//Display Off
lcd_command(_BV(LCD_DISPLAYMODE));
//Display Clear
lcd_clrscr();
//Entry Mode Set
lcd_command(_BV(LCD_ENTRY_MODE) | _BV(LCD_ENTRY_INC));
//Display On
lcd_command(_BV(LCD_DISPLAYMODE) | _BV(LCD_DISPLAYMODE_ON));
}
#if (LCD_DISPLAYS>1)
void lcd_use_display(int ADisplay)
{
if (ADisplay>=1 && ADisplay<=LCD_DISPLAYS)
ActiveDisplay=ADisplay;
}
#endif

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@ -1,61 +0,0 @@
/*****************************************************************************
Title : HD44780 Library
Author : SA Development
Version: 1.11
*****************************************************************************/
#ifndef HD44780_H
#define HD44780_H
#include "hd44780_settings.h"
#include "inttypes.h"
//LCD Constants for HD44780
#define LCD_CLR 0 // DB0: clear display
#define LCD_HOME 1 // DB1: return to home position
#define LCD_ENTRY_MODE 2 // DB2: set entry mode
#define LCD_ENTRY_INC 1 // DB1: 1=increment, 0=decrement
#define LCD_ENTRY_SHIFT 0 // DB0: 1=display shift on
#define LCD_DISPLAYMODE 3 // DB3: turn lcd/cursor on
#define LCD_DISPLAYMODE_ON 2 // DB2: turn display on
#define LCD_DISPLAYMODE_CURSOR 1 // DB1: turn cursor on
#define LCD_DISPLAYMODE_BLINK 0 // DB0: blinking cursor
#define LCD_MOVE 4 // DB4: move cursor/display
#define LCD_MOVE_DISP 3 // DB3: move display (0-> cursor)
#define LCD_MOVE_RIGHT 2 // DB2: move right (0-> left)
#define LCD_FUNCTION 5 // DB5: function set
#define LCD_FUNCTION_8BIT 4 // DB4: set 8BIT mode (0->4BIT mode)
#define LCD_FUNCTION_2LINES 3 // DB3: two lines (0->one line)
#define LCD_FUNCTION_10DOTS 2 // DB2: 5x10 font (0->5x7 font)
#define LCD_CGRAM 6 // DB6: set CG RAM address
#define LCD_DDRAM 7 // DB7: set DD RAM address
#define LCD_BUSY 7 // DB7: LCD is busy
void lcd_init();
void lcd_command(uint8_t cmd);
void lcd_clrscr();
void lcd_home();
void lcd_goto(uint8_t pos);
#if RW_LINE_IMPLEMENTED==1
uint8_t lcd_getc();
#endif
void lcd_putc(char c);
void lcd_puts(const char *s);
void lcd_puts_P(const char *progmem_s);
#if (LCD_DISPLAYS>1)
void lcd_use_display(int ADisplay);
#endif
#endif

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@ -1,155 +0,0 @@
Title : HD44780 Library
Author : SA Development
Version: 1.11
Parts of this code have been created or modified by Peter Fleury, Martin Thomas, and Andreas Heinzen as well. I went through it line by line and modified or improved it as necessary. This library has been cut down to only what was necessary to communicate with the LCD and does not include scrolling or wrapping features. See the libraries for the mentioned authors to get those features if you need them.
INSTALLATION:
-------------
Three files are provided:
hd44780.c - Main code file, you must add this to your project under "Source Files".
hd44780.h - Main include file, you must include this in any files you wish to use the library.
hd44780_settings_example.h - This is an example of the hd44780_settings.h file that the library requires (and will try to include). The settings that are intended to be customized for each project are located in this file.
The advantage to this is that the main C/H files are unmodified and can be updated to a new version without losing custom per project settings. Another advantage is that since they are unmodified, you can put them in a shared or library directory and use them in multiple separate projects. Then you only have one place to update them instead of multiple project directories.
Two ways you can implement this:
Non-shared method:
1. Copy these files into your project directory.
2. Rename "hd44780_settings_example.h" to "hd44780_settings.h".
3. Set the values appropriate to your project in "hd44780_settings.h".
4. Add the hd44780.c to your project.
5. Put "#include "hd44780.h" in any of your C files that need to use the functions.
Shared method:
1. Create a shared directory.
2. Copy these files into this directory.
To use it with a project:
1. Copy "hd44780_settings_example.h" to your project directory as "hd44780_settings.h". NOTE THE "_example" was dropped from the filename.
2. Set the values appropriate to your project in "hd44780_settings.h".
3. Add the hd44780.c to your project.
4. Put "#include "..\shared\hd44780.h" in any of your C files that need to use the functions. You may have to modify this to point to your shared directory.
5. Project -> Configuration Options -> Include Directories -> New -> Add your project directory. It should put a ".\" in the list. This step is necessary because when the library tries to include "hd44780_settings.h", it will look in your project directory and grab the one customized for that particular project. This is why it is important NOT to have a hd44780_settings.h in your shared directory and why I have this file named hd44780_settings_example.h instead. You can leave the example file in the shared directory as a file to copy and rename when starting a new project.
This library will work with my Advanced Delay Library as well by changing the USE_ADELAY_LIBRARY value from 0 to 1. By default it will use the __builtin_avr_delay_cycles function. My only gripe about this built in function is that if you are debugging at the assembly level it does not match C code lines to the assembly lines properly. Other than this it is exceptional. My Advanced Delay Library accomplishes the same thing while also adding additional delay functions that can expect a variable instead of a constant to be supplied and they don't suffer the C to assembly alignment bug that the built in ones do.
HOW TO USE:
-----------
Supports LCD communications on as few as 6 pins or as many as 11 pins depending on configuration.
The first choice you must make is whether you want to use 4 bit or 8 bit mode. Honestly this isn't a hard choice as I've tested both on my scope to see how the performance differed and both were very close to the same under all clock speeds I tested (16khz to 16mhz). I don't see the point in wasting 4 uC pins for 8 bit mode as it seems to have no advantage. Use the LCD_BITS parameter to set this:
LCD_BITS=4 // 4 for 4 Bit I/O Mode
LCD_BITS=8 // 8 for 8 Bit I/O Mode
The next choice is whether to implement a RW signal or not. If you don't need to read anything back from the LCD, then you can skip implementing it and simply connect the RW signal to ground. This is nice because it doesn't take up a uC pin this way. If however, you need to read something back from the LCD, you will need to implement RW. Use the RW_LINE_IMPLEMENTED parameter to set this:
RW_LINE_IMPLEMENTED=0 //0 for no RW line (RW on LCD tied to ground)
RW_LINE_IMPLEMENTED=1 //1 for RW line present
The last big decision is which WAIT_MODE to use. You can select between Delay Mode or Check Busy Mode. Delay Mode will delay after each LCD command to make sure that there is time for the LCD to execute the command before the next one can be issued. Check Busy Mode will read the check busy flag from the LCD to see if the LCD is still busy or ready for the next command. Check Busy Mode requires the RW line to be implemented, however you can implement an RW line (RW_LINE_IMPLEMENTED=1) and use Delay Mode (WAIT_MODE=0). You might think that the Check Busy Mode technique would be faster, but it is actually slower when running a clock below 10Mhz. This is because the extra code is takes to check it takes up more time that the Delay Mode would have. At 10Mhz or above, Check Busy Mode will be faster. At 16Mhz, it was 20% faster than Delay Mode, but at 8Mhz Delay Mode was 10% faster. Use the WAIT_MODE parameter to set this:
WAIT_MODE=0 // 0=Use Delay Method (Faster if running <10Mhz)
WAIT_MODE=1 // 1=Use Check Busy Flag (Faster if running >10Mhz) ***Requires RW Line***
This version implements multiple LCD display support for up to 4 devices. All devices will share their data/RS/RW(if implemented) pins. Each device will have its own E(enable) pin. You can use the command lcd_use_display(x) to choose which display commands will execute on. You will need to lcd_init() each one individually. This not only allows you to run 4 independent LCD display, but some displays like the 40 character x 4 line display are actually implemented with 2 lcd controllers. They will have an E and E2 pin so you will need this multiple display functionallity to use a display like this.
To init the display, clear the screen, and output "Hello World...":
lcd_init();
lcd_clrscr();
lcd_puts("Hello World...");
To put a character:
lcd_putc('A');
To turn off the display:
lcd_command(_BV(LCD_DISPLAYMODE));
To turn on the display:
lcd_command(_BV(LCD_DISPLAYMODE) | _BV(LCD_DISPLAYMODE_ON));
To turn on the display AND display an underline cursor:
lcd_command(_BV(LCD_DISPLAYMODE) | _BV(LCD_DISPLAYMODE_ON) | _BV(LCD_DISPLAYMODE_CURSOR));
To turn on the display AND display a blinking cursor:
lcd_command(_BV(LCD_DISPLAYMODE) | _BV(LCD_DISPLAYMODE_ON) | _BV(LCD_DISPLAYMODE_BLINK));
To move the cursor to the left:
lcd_command(_BV(LCD_MOVE));
To move the cursor to the right:
lcd_command(_BV(LCD_MOVE) | _BV(LCD_MOVE_RIGHT));
To move the cursor to a specific location:
lcd_goto(0x40); //0x40 is often the beginning of the second line
//each LCD display will have its memory mapped
//differently
To create a custom character:
lcd_command(_BV(LCD_CGRAM)+0*8); //The 0 on this line may be 0-7
lcd_putc(0b00000); //5x8 bitmap of character, in this example a backslash
lcd_putc(0b10000);
lcd_putc(0b01000);
lcd_putc(0b00100);
lcd_putc(0b00010);
lcd_putc(0b00001);
lcd_putc(0b00000);
lcd_putc(0b00000);
lcd_goto(0); //DO NOT FORGET to issue a GOTO command to go back to writing to the LCD
//ddram OR you will spend hours like me thinking the LCD is locked up
//when it working just fine and you are outputting to cgram instead of
//ddram!
To display this custom character:
lcd_putc(0); //Displays custom character 0
To shift the display so that the characters on screen are pushed to the left:
lcd_command(_BV(LCD_MOVE) | _BV(LCD_MOVE_DISP));
To shift the display so that the characters on screen are pushed to the left:
lcd_command(_BV(LCD_MOVE) | _BV(LCD_MOVE_DISP) | _BV(LCD_MOVE_RIGHT));
VERSION HISTORY:
----------------
1.00 - Initial version.
1.02 - Delay_ns, Delay_us, and Delay_ms added via a new included file "delay.h". All of these functions support values from 1-65535 so you can delay 65.535 seconds using Delay_ms, or Delay_ns(1) to delay 1ns. Realize that a delay of 1ns would only be possible if you were running at 1ghz, but asking for 1ns delay will get you a single clock delay. At 8mhz this is 125ns. The delays will get you "at least" what you ask for with as little more as possible. The reason the delay functions were added is because the LCD library I based this on "assumed" that 2 clocks were enough for a 500ns wait. This is TRUE if you are running at less than 2mhz, but not true if you are running faster. I modified these functions to use the new Delay_ns function above so it will ALWAYS wait 500ns on the enable line now.
1.03 - No longer includes my delay functions, but instead uses the internal builtin_avr_delay_cycles instead. You can still use it with my Advanced Delay Library, check the C file for info. This version also adds a clrscr in the init function. I was experiencing issues where a reset would corrupt part of the screen so this was necessary to make sure it starts clear.
1.05 - Reorganized all code to follow the standard C and H file techniques.
1.10 - Multiple LCD display support (Up to 4) added.
Bugs in the read command and 8 bit modes fixed and tested.
You are now able to put any pins on any pin and port. The data pins are no longer required to be on 0-3 or 0-7. This gives you full freedom to put these pins anywhere.
All pin changes are now done through SBI CBI instructions meaning there will be zero problems with interrupts of other things occuring on pins of the same port as the LCD pins.
Checkbusy used to end up in an infinite loop if the LCD didn't response with "not busy". I have put a 3ms maximum time on it (or 16 attempts minimum). Since all LCD commands should run with 1.64ms, this should be more than enough and will allow the processor to continue on instead of being permanently stuck. The delay however at 3ms everytime a call is made to the LCD will probably slow things down too much anyway, but I figured having this limit was better than nothing.
1.11 - A big issue in the LCD init code has been corrected which will now allow 4-bit mode to work properly below 2mhz. I've tested both 4-bit and 8-bit modes from 16khz to 16mhz with no issues.
Many commands have been marked as static if you don't need to access them, the only change is that lcd_read(x) is no longer available. You must use lcd_getc() instead.
RW_LINE_IMPLEMENTED has been added which allows you to indicate whether you are implementing the RW line or not. This used to be part of the WAIT_MODE, but having this option now allows you to implement the RW line so you can read from the LCD, but still use WAIT_MODE=0 for delays instead of using the check busy flag.
Check Busy has had an additional 6us delay added to it when the previous command involved a read or write that changes the address pointer. This is due to the check busy flag going low before this pointer is updated and is to ensure the LCD is ready for another command.

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@ -1,49 +0,0 @@
#ifndef HD44780_SETTINGS_H
#define HD44780_SETTINGS_H
// This is done in the makefile
// #define F_CPU 15855484 // Set Clock Frequency
#define USE_ADELAY_LIBRARY 0 // Set to 1 to use my ADELAY library, 0 to use internal delay functions
#define LCD_BITS 4 // 4 for 4 Bit I/O Mode, 8 for 8 Bit I/O Mode
#define RW_LINE_IMPLEMENTED 1 // 0 for no RW line (RW on LCD tied to ground), 1 for RW line present
#define WAIT_MODE 1 // 0=Use Delay Method (Faster if running <10Mhz)
// 1=Use Check Busy Flag (Faster if running >10Mhz) ***Requires RW Line***
#define DELAY_RESET 15 // in mS
#if (LCD_BITS==8) // If using 8 bit mode, you must configure DB0-DB7
#define LCD_DB0_PORT PORTA
#define LCD_DB0_PIN 0
#define LCD_DB1_PORT PORTA
#define LCD_DB1_PIN 1
#define LCD_DB2_PORT PORTA
#define LCD_DB2_PIN 2
#define LCD_DB3_PORT PORTA
#define LCD_DB3_PIN 3
#endif
#define LCD_DB4_PORT PORTA // If using 4 bit omde, yo umust configure DB4-DB7
#define LCD_DB4_PIN 4
#define LCD_DB5_PORT PORTA
#define LCD_DB5_PIN 5
#define LCD_DB6_PORT PORTA
#define LCD_DB6_PIN 6
#define LCD_DB7_PORT PORTA
#define LCD_DB7_PIN 7
#define LCD_RS_PORT PORTA // Port for RS line
#define LCD_RS_PIN 0 // Pin for RS line
#define LCD_RW_PORT PORTA // Port for RW line (ONLY used if RW_LINE_IMPLEMENTED=1)
#define LCD_RW_PIN 1 // Pin for RW line (ONLY used if RW_LINE_IMPLEMENTED=1)
#define LCD_DISPLAYS 1 // Up to 4 LCD displays can be used at one time
// All pins are shared between displays except for the E
// pin which each display will have its own
// Display 1 Settings - if you only have 1 display, YOU MUST SET THESE
#define LCD_DISPLAY_LINES 1 // Number of Lines, Only Used for Set I/O Mode Command
#define LCD_E_PORT PORTA // Port for E line
#define LCD_E_PIN 2 // Pin for E line
#endif

View File

@ -12,18 +12,23 @@ char statusString[8] = "NV-BDIZC";
void doCmdRegs(char *params) {
int i;
unsigned int p = hwRead8(OFFSET_REG_P);
log0("6502 Registers:\n A=%02X X=%02X Y=%02X SP=%04X PC=%04X\n",
hwRead8(OFFSET_REG_A),
hwRead8(OFFSET_REG_X),
hwRead8(OFFSET_REG_Y),
hwRead16(OFFSET_REG_SP),
hwRead16(OFFSET_REG_PC));
logstr("6502 Registers:\n A=");
loghex2(hwRead8(OFFSET_REG_A));
logstr(" X=");
loghex2(hwRead8(OFFSET_REG_X));
logstr(" Y=");
loghex2(hwRead8(OFFSET_REG_Y));
logstr(" SP=01");
loghex2(hwRead8(OFFSET_REG_SP));
logstr(" PC=");
loghex4(hwRead16(OFFSET_REG_PC));
logc('\n');
char *sp = statusString;
log0(" Status: ");
logstr(" Status: ");
for (i = 0; i <= 7; i++) {
log0("%c", ((p & 128) ? (*sp) : '-'));
logc(((p & 128) ? (*sp) : '-'));
p <<= 1;
sp++;
}
log0("\n");
logc('\n');
}

View File

@ -10,28 +10,35 @@
#define OFFSET_REG_D 44
#define OFFSET_REG_CC 45
char statusString[8] = "EFHINZVC";
const char statusString[8] = "EFHINZVC";
void doCmdRegs(char *params) {
int i;
unsigned int p = hwRead8(OFFSET_REG_CC);
log0("6809 Registers:\n A=%02X B=%02X X=%04X Y=%04X\n",
hwRead8(OFFSET_REG_A),
hwRead8(OFFSET_REG_B),
hwRead16(OFFSET_REG_X),
hwRead16(OFFSET_REG_Y));
log0(" CC=%02X D=%02X U=%04X S=%04X PC=%04X\n",
p,
hwRead8(OFFSET_REG_D),
hwRead16(OFFSET_REG_U),
hwRead16(OFFSET_REG_S),
hwRead16(OFFSET_REG_PC));
char *sp = statusString;
log0(" Status: ");
uint16_t i;
uint8_t p = hwRead8(OFFSET_REG_CC);
const char *sp = statusString;
logstr("6809 Registers:\n A=");
loghex2(hwRead8(OFFSET_REG_A));
logstr(" B=");
loghex2(hwRead8(OFFSET_REG_B));
logstr(" X=");
loghex4(hwRead16(OFFSET_REG_X));
logstr(" Y=");
loghex4(hwRead16(OFFSET_REG_Y));
logstr("\n CC=");
loghex2(p);
logstr(" D=");
loghex2(hwRead8(OFFSET_REG_D));
logstr(" U=");
loghex4(hwRead16(OFFSET_REG_U));
logstr(" S=");
loghex4(hwRead16(OFFSET_REG_S));
logstr(" PC=");
loghex4(hwRead16(OFFSET_REG_PC));
logstr("\n Status: ");
for (i = 0; i <= 7; i++) {
log0("%c", ((p & 128) ? (*sp) : '-'));
logc(((p & 128) ? (*sp) : '-'));
p <<= 1;
sp++;
}
log0("\n");
logc('\n');
}

View File

@ -1,51 +1,72 @@
#include "AtomBusMon.h"
#define OFFSET_REG_BC 32
#define OFFSET_REG_DE 34
#define OFFSET_REG_HL 36
#define OFFSET_REG_IX 38
#define OFFSET_REG_BCp 40
#define OFFSET_REG_DEp 42
#define OFFSET_REG_HLp 44
#define OFFSET_REG_IY 46
#define OFFSET_REG_AF 48
#define OFFSET_REG_AFp 50
#define OFFSET_REG_SP 52
#define OFFSET_REG_PC 54
#define OFFSET_REG_I 56
#define OFFSET_REG_R 57
#define OFFSET_REG_IFF 58
// Version 350 of T80 exposes the registers in this order (bit 211..bit 0):
// IFF2, IFF1, IM, IY, HL', DE', BC', IX, HL, DE, BC, PC, SP, R, I, F', A', F, A
char statusString[8] = "SZIH-P-C";
#define OFFSET_REG_AF (32 + 0)
#define OFFSET_REG_AFp (32 + 2)
#define OFFSET_REG_I (32 + 4)
#define OFFSET_REG_R (32 + 5)
#define OFFSET_REG_SP (32 + 6)
#define OFFSET_REG_PC (32 + 8)
#define OFFSET_REG_BCDEHL (32 + 10)
#define OFFSET_REG_IX (32 + 16)
#define OFFSET_REG_BCDEHLp (32 + 18)
#define OFFSET_REG_IY (32 + 24)
#define OFFSET_REG_IFF (32 + 26)
void doCmdRegs(char *params) {
int i;
unsigned int p = hwRead16(OFFSET_REG_AF);
log0("Z80 Registers:\n");
log0(" AF=%04X BC=%04X DE=%04X HL=%04X\n",
p,
hwRead16(OFFSET_REG_BC),
hwRead16(OFFSET_REG_DE),
hwRead16(OFFSET_REG_HL));
log0(" 'AF=%04X 'BC=%04X 'DE=%04X 'HL=%04X\n",
hwRead16(OFFSET_REG_AFp),
hwRead16(OFFSET_REG_BCp),
hwRead16(OFFSET_REG_DEp),
hwRead16(OFFSET_REG_HLp));
log0(" IX=%04X IY=%04X PC=%04X SP=%04X I=%02X R=%02X IFF=%02X\n",
hwRead16(OFFSET_REG_IX),
hwRead16(OFFSET_REG_IY),
hwRead16(OFFSET_REG_PC),
hwRead16(OFFSET_REG_SP),
hwRead8(OFFSET_REG_I),
hwRead8(OFFSET_REG_R),
hwRead8(OFFSET_REG_IFF));
char statusString[8] = "SZYHXPNC";
void output_abcdehlf(char *prefix, uint8_t base_af, uint8_t base_bcdehl) {
uint16_t i;
logs(prefix);
logstr("A=");
loghex2(hwRead8(base_af));
logs(prefix);
logstr("BC=");
loghex4(hwRead16(base_bcdehl));
logs(prefix);
logstr("DE=");
loghex4(hwRead16(base_bcdehl + 2));
logs(prefix);
logstr("HL=");
loghex4(hwRead16(base_bcdehl + 4));
logs(prefix);
logstr("F=");
uint8_t p = hwRead8(base_af + 1);
loghex2(p);
logstr(" (");
char *sp = statusString;
log0(" Status: ");
for (i = 0; i <= 7; i++) {
log0("%c", ((p & 128) ? (*sp) : '-'));
logc(((p & 128) ? (*sp) : '-'));
p <<= 1;
sp++;
}
log0("\n");
logs(")\n");
}
void doCmdRegs(char *params) {
int iff2_iff1_im = hwRead8(OFFSET_REG_IFF) & 15;
logstr("Z80 Registers:\n");
output_abcdehlf(" ", OFFSET_REG_AF, OFFSET_REG_BCDEHL);
output_abcdehlf(" '", OFFSET_REG_AFp, OFFSET_REG_BCDEHLp);
logstr(" R=");
loghex2(hwRead8(OFFSET_REG_R));
logstr(" IX=");
loghex4(hwRead16(OFFSET_REG_IX));
logstr(" IY=");
loghex4(hwRead16(OFFSET_REG_IY));
logstr(" PC=");
loghex4(hwRead16(OFFSET_REG_PC));
logstr(" SP=");
loghex4(hwRead16(OFFSET_REG_SP));
logstr(" I=");
loghex2(hwRead8(OFFSET_REG_I));
logstr(" IM=");
loghex1((iff2_iff1_im & 3));
logstr(" IFF1=");
loghex1((iff2_iff1_im >> 2) & 1);
logstr(" IFF2=");
loghex1((iff2_iff1_im >> 3) & 1);
logc('\n');
}

View File

@ -1,293 +1,308 @@
/*
Status.c
Functions for logging program status to the serial port, to
be used for debugging pruposes etc.
2008-03-21, P.Harvey-Smith.
*/
#include <avr/interrupt.h>
#include <stdio.h>
#include <ctype.h>
#include "terminalcodes.h"
#include "status.h"
#ifdef SERIAL_STATUS
static int StdioSerial_TxByte0(char DataByte, FILE *Stream);
static int StdioSerial_TxByte1(char DataByte, FILE *Stream);
FILE ser0stream = FDEV_SETUP_STREAM(StdioSerial_TxByte0,NULL,_FDEV_SETUP_WRITE);
FILE ser1stream = FDEV_SETUP_STREAM(StdioSerial_TxByte1,NULL,_FDEV_SETUP_WRITE);
void StdioSerial_TxByte(char DataByte, uint8_t Port)
{
#ifdef COOKED_SERIAL
if((DataByte=='\r') || (DataByte=='\n'))
{
if(Port==1)
{
Serial_TxByte1('\r');
Serial_TxByte1('\n');
}
else
{
Serial_TxByte0('\r');
Serial_TxByte0('\n');
}
}
else
#endif
if(Port==1)
Serial_TxByte1(DataByte);
else
Serial_TxByte0(DataByte);
}
int StdioSerial_TxByte0(char DataByte, FILE *Stream)
{
StdioSerial_TxByte(DataByte,0);
return 0;
}
int StdioSerial_TxByte1(char DataByte, FILE *Stream)
{
StdioSerial_TxByte(DataByte,1);
return 0;
}
void cls(uint8_t Port)
{
if(Port==1)
{
log1(ESC_ERASE_DISPLAY);
log1(ESC_CURSOR_POS(0,0));
}
else
{
log0(ESC_ERASE_DISPLAY);
log0(ESC_CURSOR_POS(0,0));
}
}
void USART_Init0(const uint32_t BaudRate)
{
#ifdef UCSR0A
UCSR0A = 0;
UCSR0B = ((1 << RXEN0) | (1 << TXEN0));
UCSR0C = ((1 << UCSZ01) | (1 << UCSZ00));
UBRR0 = SERIAL_UBBRVAL(BaudRate);
#else
UCR = ((1 << RXEN) | (1 << TXEN));
UBRR = SERIAL_UBBRVAL(BaudRate);
#endif
}
void USART_Init1(const uint32_t BaudRate)
{
#ifdef UCSR1A
UCSR1A = 0;
UCSR1B = ((1 << RXEN1) | (1 << TXEN1));
UCSR1C = ((1 << UCSZ11) | (1 << UCSZ10));
UBRR1 = SERIAL_UBBRVAL(BaudRate);
#endif
}
/** Transmits a given byte through the USART.
*
* \param DataByte Byte to transmit through the USART
*/
void Serial_TxByte0(const char DataByte)
{
#ifdef UCSR0A
while ( !( UCSR0A & (1<<UDRE0)) ) ;
UDR0=DataByte;
#else
while ( !( USR & (1<<UDRE)) ) ;
UDR=DataByte;
#endif
}
void Serial_TxByte1(const char DataByte)
{
#ifdef UCSR1A
while ( !( UCSR1A & (1<<UDRE1)) ) ;
UDR1=DataByte;
#endif
}
/** Receives a byte from the USART.
*
* \return Byte received from the USART
*/
char Serial_RxByte0(void)
{
#ifdef UCSR0A
while (!(USR & (1 << RXC0))) ;
return UDR0;
#else
while (!(USR & (1<<RXC))) ;
return UDR;
#endif
}
char Serial_RxByte1(void)
{
#ifdef UCSR1A
while (!(UCSR1A & (1 << RXC1))) ;
return UDR1;
#else
return 0;
#endif
}
uint8_t Serial_ByteRecieved0(void)
{
#ifdef UCSR0A
return (UCSR0A & (1 << RXC0));
#else
return (USR & (1<<RXC));
#endif
}
uint8_t Serial_ByteRecieved1(void)
{
#ifdef UCSR1A
return (UCSR1A & (1 << RXC1));
#else
return 0;
#endif
}
void Serial_Init(const uint32_t BaudRate0,
const uint32_t BaudRate1)
{
if (BaudRate0<=0)
USART_Init0(DefaultBaudRate);
else
USART_Init0(BaudRate0);
if (BaudRate1<=0)
USART_Init1(DefaultBaudRate);
else
USART_Init1(BaudRate1);
cls(0);
cls(1);
// log0("stdio initialised\n");
// log0("SerialPort0\n");
// log1("SerialPort1\n");
}
#ifdef USE_HEXDUMP
void HexDump(const uint8_t *Buff,
uint16_t Length,
uint8_t Port)
{
char LineBuff[80];
char *LineBuffPos;
uint16_t LineOffset;
uint16_t CharOffset;
const uint8_t *BuffPtr;
BuffPtr=Buff;
for(LineOffset=0;LineOffset<Length;LineOffset+=16, BuffPtr+=16)
{
LineBuffPos=LineBuff;
LineBuffPos+=sprintf(LineBuffPos,"%4.4X ",LineOffset);
for(CharOffset=0;CharOffset<16;CharOffset++)
{
if((LineOffset+CharOffset)<Length)
LineBuffPos+=sprintf(LineBuffPos,"%2.2X ",BuffPtr[CharOffset]);
else
LineBuffPos+=sprintf(LineBuffPos," ");
}
for(CharOffset=0;CharOffset<16;CharOffset++)
{
if((LineOffset+CharOffset)<Length)
{
if(isprint(BuffPtr[CharOffset]))
LineBuffPos+=sprintf(LineBuffPos,"%c",BuffPtr[CharOffset]);
else
LineBuffPos+=sprintf(LineBuffPos," ");
}
else
LineBuffPos+=sprintf(LineBuffPos,".");
}
switch (Port)
{
case 0 : log0("%s\n",LineBuff); break;
case 1 : log1("%s\n",LineBuff); break;
}
}
}
void HexDumpHead(const uint8_t *Buff,
uint16_t Length,
uint8_t Port)
{
FILE *File;
File=&ser0stream;
switch (Port)
{
case 0 : File=&ser0stream; break;
case 1 : File=&ser1stream; break;
}
fprintf_P(File,PSTR("%d\n"),Buff);
fprintf_P(File,PSTR("Addr 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F ASCII\n"));
fprintf_P(File,PSTR("----------------------------------------------------------\n"));
HexDump(Buff,Length,Port);
};
#else
void HexDump(const uint8_t *Buff,
uint16_t Length,
uint8_t Port) {};
void HexDumpHead(const uint8_t *Buff,
uint16_t Length,
uint8_t Port) {};
#endif
#else
void USART_Init0(const uint32_t BaudRate) {};
void Serial_TxByte0(const char DataByte) {};
char Serial_RxByte0(void) {};
uint8_t Serial_ByteRecieved0(void) {};
void USART_Init1(const uint32_t BaudRate) {};
void Serial_TxByte1(const char DataByte) {};
char Serial_RxByte1(void) {};
uint8_t Serial_ByteRecieved1(void) {};
void Serial_Init(const uint32_t BaudRate0,
const uint32_t BaudRate1) {};
void cls(uint8_t Port) {};
void HexDump(const uint8_t *Buff,
uint16_t Length,
uint8_t Port) {};
void HexDumpHead(const uint8_t *Buff,
uint16_t Length,
uint8_t Port) {};
#endif
/*
Status.c
Functions for logging program status to the serial port, to
be used for debugging pruposes etc.
2008-03-21, P.Harvey-Smith.
*/
#include <stdio.h>
#include <stdlib.h>
#include "terminalcodes.h"
#include "status.h"
static int StdioSerial_TxByte0(char DataByte, FILE *Stream);
FILE ser0stream = FDEV_SETUP_STREAM(StdioSerial_TxByte0,NULL,_FDEV_SETUP_WRITE);
void StdioSerial_TxByte(char DataByte)
{
if((DataByte=='\r') || (DataByte=='\n')) {
Serial_TxByte0('\r');
Serial_TxByte0('\n');
} else {
Serial_TxByte0(DataByte);
}
}
int StdioSerial_TxByte0(char DataByte, FILE *Stream)
{
StdioSerial_TxByte(DataByte);
return 0;
}
void cls()
{
logs(ESC_ERASE_DISPLAY);
logs(ESC_CURSOR_POS(0,0));
}
void USART_Init0(const uint32_t BaudRate)
{
#ifdef UCSR0A
UCSR0A = 0;
UCSR0B = ((1 << RXEN0) | (1 << TXEN0));
UCSR0C = ((1 << UCSZ01) | (1 << UCSZ00));
UBRR0 = SERIAL_UBBRVAL(BaudRate);
#else
UCR = ((1 << RXEN) | (1 << TXEN));
UBRR = SERIAL_UBBRVAL(BaudRate);
#endif
}
/** Transmits a given byte through the USART.
*
* \param DataByte Byte to transmit through the USART
*/
void Serial_TxByte0(const char DataByte)
{
#ifdef UCSR0A
while ( !( UCSR0A & (1<<UDRE0)) ) ;
UDR0=DataByte;
#else
while ( !( USR & (1<<UDRE)) ) ;
UDR=DataByte;
#endif
}
/** Receives a byte from the USART.
*
* \return Byte received from the USART
*/
char Serial_RxByte0(void)
{
#ifdef UCSR0A
while (!(USR & (1 << RXC0))) ;
return UDR0;
#else
while (!(USR & (1<<RXC))) ;
return UDR;
#endif
}
uint8_t Serial_ByteRecieved0(void)
{
#ifdef UCSR0A
return (UCSR0A & (1 << RXC0));
#else
return (USR & (1<<RXC));
#endif
}
void Serial_Init(const uint32_t BaudRate0)
{
if (BaudRate0<=0)
USART_Init0(DefaultBaudRate);
else
USART_Init0(BaudRate0);
cls();
}
/********************************************************
* Simple string logger, as log0 is expensive
********************************************************/
void logc(char c) {
StdioSerial_TxByte(c);
}
void logs(const char *s) {
while (*s) {
logc(*s++);
}
}
void logpgmstr(const char *s) {
char c;
do {
c = pgm_read_byte(s++);
if (c) {
logc(c);
}
} while (c);
}
char hex1(uint8_t i) {
i &= 0x0f;
if (i < 10) {
i += '0';
} else {
i += ('A' - 10);
}
return i;
}
void loghex1(uint8_t i) {
logc(hex1(i));
}
void loghex2(uint8_t i) {
loghex1(i >> 4);
loghex1(i);
}
void loghex4(uint16_t i) {
loghex2(i >> 8);
loghex2(i);
}
void logint(int i) {
char buffer[16];
strint(buffer, i);
logs(buffer);
}
void loglong(long i) {
char buffer[16];
strlong(buffer, i);
logs(buffer);
}
char *strfill(char *buffer, char c, uint8_t i) {
while (i-- > 0) {
*buffer++ = c;
}
return buffer;
}
char *strhex1(char *buffer, uint8_t i) {
*buffer++ = hex1(i);
return buffer;
}
char *strhex2(char *buffer, uint8_t i) {
buffer = strhex1(buffer, i >> 4);
buffer = strhex1(buffer, i);
return buffer;
}
char *strhex4(char *buffer, uint16_t i) {
buffer = strhex2(buffer, i >> 8);
buffer = strhex2(buffer, i);
return buffer;
}
char *strint(char *buffer, int i) {
return itoa(i, buffer, 10);
}
char *strlong(char *buffer, long i) {
return ltoa(i, buffer, 10);
}
char *strinsert(char *buffer, const char *s) {
while (*s) {
*buffer++ = *s++;
}
return buffer;
}
int8_t convhex(char c) {
// Make range continuous
if (c >= 'a' && c <= 'f') {
c -= 'a' - '9' - 1;
} else if (c >= 'A' && c <= 'F') {
c -= 'A' - '9' - 1;
}
if (c >= '0' && c <= '0' + 15) {
return c & 0x0F;
} else {
return -1;
}
}
int8_t convdec(char c) {
if (c >= '0' && c <= '0' + 9) {
return c & 0x0F;
} else {
return -1;
}
}
char *parselong(char *params, long *val) {
long ret = 0;
int8_t sign = 1;
// Skip any spaces
if (params) {
while (*params == ' ') {
params++;
}
// Note sign
if (*params == '-') {
sign = -1;
params++;
}
do {
int8_t c = convhex(*params);
if (c < 0) {
break;
}
ret *= 10;
ret += c;
if (val) {
*val = sign * ret;
}
params++;
} while (1);
}
return params;
}
static char *parsehex4common(char *params, uint16_t *val, uint8_t required) {
uint16_t ret = 0;
if (params) {
// Skip any spaces
while (*params == ' ') {
params++;
}
char *tmp = params;
do {
int8_t c = convhex(*params);
if (c < 0) {
break;
}
ret <<= 4;
ret += c;
if (val) {
*val = ret;
}
params++;
} while (1);
if (required && params == tmp) {
return 0;
}
}
return params;
}
char *parsehex4(char *params, uint16_t *val) {
return parsehex4common(params, val, 0);
}
char *parsehex4required(char *params, uint16_t *val) {
return parsehex4common(params, val, 1);
}
char *parsehex2(char *params, uint8_t *val) {
uint16_t tmp = 0xffff;
params = parsehex4common(params, &tmp, 0);
if (tmp != 0xffff) {
*val = (tmp & 0xff);
}
return params;
}
char *parsehex2required(char *params, uint8_t *val) {
uint16_t tmp = 0xffff;
params = parsehex4common(params, &tmp, 1);
if (tmp != 0xffff) {
*val = (tmp & 0xff);
}
return params;
}

View File

@ -1,85 +1,95 @@
/*
Status.h
Functions for logging program status to the serial port, to
be used for debugging pruposes etc.
2008-03-21, P.Harvey-Smith.
Some functions and macros borrowed from Dean Camera's LURFA
USB libraries.
*/
#include <avr/io.h>
#include <avr/pgmspace.h>
#include <stdbool.h>
#include <stdio.h>
#ifndef __STATUS_DEFINES__
#define __STATUS_DEFINES__
#ifdef SERIAL_STATUS
#define log0(format,...) fprintf_P(&ser0stream,PSTR(format),##__VA_ARGS__)
#define log1(format,...) fprintf_P(&ser1stream,PSTR(format),##__VA_ARGS__)
#else
#define log0(format,...)
#define log1(format,...)
#endif
//
// For stdio
//
extern FILE ser0stream;
extern FILE ser1stream;
/* Default baud rate if 0 passed to Serial_Init */
#define DefaultBaudRate 9600
/** Indicates whether a character has been received through the USART - boolean false if no character
* has been received, or non-zero if a character is waiting to be read from the reception buffer.
*/
#define Serial_IsCharReceived() ((UCSR1A & (1 << RXC1)) ? true : false)
/** Macro for calculating the baud value from a given baud rate when the U2X (double speed) bit is
* not set.
*/
#define SERIAL_UBBRVAL(baud) (((F_CPU / 16) / baud) - 1)
/** Macro for calculating the baud value from a given baud rate when the U2X (double speed) bit is
* set.
*/
#define SERIAL_2X_UBBRVAL(baud) (((F_CPU / 8) / baud) - 1)
#define SerEOL0() { Serial_TxByte0('\r'); Serial_TxByte0('\n'); }
#ifdef NOUSART1
#undef UCSR1A
#endif
void USART_Init0(const uint32_t BaudRate);
void Serial_TxByte0(const char DataByte);
char Serial_RxByte0(void);
uint8_t Serial_ByteRecieved0(void);
void USART_Init1(const uint32_t BaudRate);
void Serial_TxByte1(const char DataByte);
char Serial_RxByte1(void);
uint8_t Serial_ByteRecieved1(void);
void Serial_Init(const uint32_t BaudRate0,
const uint32_t BaudRate1);
void cls(uint8_t Port);
void HexDump(const uint8_t *Buff,
uint16_t Length,
uint8_t Port);
void HexDumpHead(const uint8_t *Buff,
uint16_t Length,
uint8_t Port);
#endif
/*
Status.h
Functions for logging program status to the serial port, to
be used for debugging pruposes etc.
2008-03-21, P.Harvey-Smith.
Some functions and macros borrowed from Dean Camera's LURFA
USB libraries.
*/
#include <avr/io.h>
#include <avr/pgmspace.h>
#include <stdbool.h>
#include <stdio.h>
#ifndef __STATUS_DEFINES__
#define __STATUS_DEFINES__
/********************************************************
* Simple string logger, as log0 is expensive
********************************************************/
#define logstr(s) logpgmstr(PSTR((s)))
void logc(char c);
void logs(const char *s);
void logpgmstr(const char *s);
void loghex1(uint8_t i);
void loghex2(uint8_t i);
void loghex4(uint16_t i);
void logint(int i);
void loglong(long i);
char *strfill(char *buffer, char c, uint8_t i);
char *strhex1(char *buffer, uint8_t i);
char *strhex2(char *buffer, uint8_t i);
char *strhex4(char *buffer, uint16_t i);
char *strint(char *buffer, int i);
char *strlong(char *buffer, long i);
char *strinsert(char *buffer, const char *s);
char *parselong(char *params, long *val);
char *parsehex2required(char *params, uint8_t *val);
char *parsehex4required(char *params, uint16_t *val);
char *parsehex2(char *params, uint8_t *val);
char *parsehex4(char *params, uint16_t *val);
#define log0(format,...) fprintf_P(&ser0stream,PSTR(format),##__VA_ARGS__)
//
// For stdio
//
extern FILE ser0stream;
/* Default baud rate if 0 passed to Serial_Init */
#define DefaultBaudRate 9600
/** Indicates whether a character has been received through the USART - boolean false if no character
* has been received, or non-zero if a character is waiting to be read from the reception buffer.
*/
#define Serial_IsCharReceived() ((UCSR1A & (1 << RXC1)) ? true : false)
/** Macro for calculating the baud value from a given baud rate when the U2X (double speed) bit is
* not set.
*/
#define SERIAL_UBBRVAL(baud) (((F_CPU / 16) / baud) - 1)
/** Macro for calculating the baud value from a given baud rate when the U2X (double speed) bit is
* set.
*/
#define SERIAL_2X_UBBRVAL(baud) (((F_CPU / 8) / baud) - 1)
#define SerEOL0() { Serial_TxByte0('\r'); Serial_TxByte0('\n'); }
#ifdef NOUSART1
#undef UCSR1A
#endif
void USART_Init0(const uint32_t BaudRate);
void Serial_TxByte0(const char DataByte);
char Serial_RxByte0(void);
uint8_t Serial_ByteRecieved0(void);
void Serial_Init(const uint32_t BaudRate0);
void cls();
#endif

View File

@ -1,176 +1,176 @@
/*
LUFA Library
Copyright (C) Dean Camera, 2008.
dean [at] fourwalledcubicle [dot] com
www.fourwalledcubicle.com
*/
/*
Copyright 2008 Dean Camera (dean [at] fourwalledcubicle [dot] com)
Permission to use, copy, modify, and distribute this software
and its documentation for any purpose and without fee is hereby
granted, provided that the above copyright notice appear in all
copies and that both that the copyright notice and this
permission notice and warranty disclaimer appear in supporting
documentation, and that the name of the author not be used in
advertising or publicity pertaining to distribution of the
software without specific, written prior permission.
The author disclaim all warranties with regard to this
software, including all implied warranties of merchantability
and fitness. In no event shall the author be liable for any
special, indirect or consequential damages or any damages
whatsoever resulting from loss of use, data or profits, whether
in an action of contract, negligence or other tortious action,
arising out of or in connection with the use or performance of
this software.
*/
/** \file
*
* ANSI terminal compatible escape sequences. These escape sequences are designed to be concatenated with existing
* strings to modify their display on a compatible terminal application.
*
* \note If desired, the macro DISABLE_TERMINAL_CODES can be defined in the project makefile and passed to the GCC
* compiler via the -D switch to disable the terminal codes without modifying the source, for use with non
* compatible terminals (any terminal code then equate to empty strings).
*
* Example Usage:
* \code
* printf("Some String, " ESC_BOLD_ON " Some bold string");
* \endcode
*/
#ifndef __TERMINALCODES_H__
#define __TERMINALCODES_H__
/* Public Interface - May be used in end-application: */
/* Macros: */
#if !defined(DISABLE_TERMINAL_CODES)
/** Creates an ANSII escape sequence with the payload specified by "c". */
#define ANSI_ESCAPE_SEQUENCE(c) "\33[" c
#else
#define ANSI_ESCAPE_SEQUENCE(c)
#endif
/** Resets any escape sequence modifiers back to their defaults. */
#define ESC_RESET ANSI_ESCAPE_SEQUENCE("0m")
/** Turns on bold so that any following text is printed to the terminal in bold. */
#define ESC_BOLD_ON ANSI_ESCAPE_SEQUENCE("1m")
/** Turns on italics so that any following text is printed to the terminal in italics. */
#define ESC_ITALICS_ON ANSI_ESCAPE_SEQUENCE("3m")
/** Turns on underline so that any following text is printed to the terminal underlined. */
#define ESC_UNDERLINE_ON ANSI_ESCAPE_SEQUENCE("4m")
/** Turns on inverse so that any following text is printed to the terminal in inverted colours. */
#define ESC_INVERSE_ON ANSI_ESCAPE_SEQUENCE("7m")
/** Turns on strikethrough so that any following text is printed to the terminal with a line through the
* center.
*/
#define ESC_STRIKETHROUGH_ON ANSI_ESCAPE_SEQUENCE("9m")
/** Turns off bold so that any following text is printed to the terminal in non bold. */
#define ESC_BOLD_OFF ANSI_ESCAPE_SEQUENCE("22m")
/** Turns off italics so that any following text is printed to the terminal in non italics. */
#define ESC_ITALICS_OFF ANSI_ESCAPE_SEQUENCE("23m")
/** Turns off underline so that any following text is printed to the terminal non underlined. */
#define ESC_UNDERLINE_OFF ANSI_ESCAPE_SEQUENCE("24m")
/** Turns off inverse so that any following text is printed to the terminal in non inverted colours. */
#define ESC_INVERSE_OFF ANSI_ESCAPE_SEQUENCE("27m")
/** Turns off strikethrough so that any following text is printed to the terminal without a line through
* the center.
*/
#define ESC_STRIKETHROUGH_OFF ANSI_ESCAPE_SEQUENCE("29m")
/** Sets the foreground (text) colour to black. */
#define ESC_FG_BLACK ANSI_ESCAPE_SEQUENCE("30m")
/** Sets the foreground (text) colour to red. */
#define ESC_FG_RED ANSI_ESCAPE_SEQUENCE("31m")
/** Sets the foreground (text) colour to green. */
#define ESC_FG_GREEN ANSI_ESCAPE_SEQUENCE("32m")
/** Sets the foreground (text) colour to yellow. */
#define ESC_FG_YELLOW ANSI_ESCAPE_SEQUENCE("33m")
/** Sets the foreground (text) colour to blue. */
#define ESC_FG_BLUE ANSI_ESCAPE_SEQUENCE("34m")
/** Sets the foreground (text) colour to magenta. */
#define ESC_FG_MAGENTA ANSI_ESCAPE_SEQUENCE("35m")
/** Sets the foreground (text) colour to cyan. */
#define ESC_FG_CYAN ANSI_ESCAPE_SEQUENCE("36m")
/** Sets the foreground (text) colour to white. */
#define ESC_FG_WHITE ANSI_ESCAPE_SEQUENCE("37m")
/** Sets the foreground (text) colour to the terminal's default. */
#define ESC_FG_DEFAULT ANSI_ESCAPE_SEQUENCE("39m")
/** Sets the text background colour to black. */
#define ESC_BG_BLACK ANSI_ESCAPE_SEQUENCE("40m")
/** Sets the text background colour to red. */
#define ESC_BG_RED ANSI_ESCAPE_SEQUENCE("41m")
/** Sets the text background colour to green. */
#define ESC_BG_GREEN ANSI_ESCAPE_SEQUENCE("42m")
/** Sets the text background colour to yellow. */
#define ESC_BG_YELLOW ANSI_ESCAPE_SEQUENCE("43m")
/** Sets the text background colour to blue. */
#define ESC_BG_BLUE ANSI_ESCAPE_SEQUENCE("44m")
/** Sets the text background colour to magenta. */
#define ESC_BG_MAGENTA ANSI_ESCAPE_SEQUENCE("45m")
/** Sets the text background colour to cyan. */
#define ESC_BG_CYAN ANSI_ESCAPE_SEQUENCE("46m")
/** Sets the text background colour to white. */
#define ESC_BG_WHITE ANSI_ESCAPE_SEQUENCE("47m")
/** Sets the text background colour to the terminal's default. */
#define ESC_BG_DEFAULT ANSI_ESCAPE_SEQUENCE("49m")
/** Sets the cursor position to the given line and column. */
#define ESC_CURSOR_POS(L, C) ANSI_ESCAPE_SEQUENCE(#L ";" #C "H")
/** Moves the cursor up the given number of lines. */
#define ESC_CURSOR_UP(L) ANSI_ESCAPE_SEQUENCE(#L "A")
/** Moves the cursor down the given number of lines. */
#define ESC_CURSOR_DOWN(L) ANSI_ESCAPE_SEQUENCE(#L "B")
/** Moves the cursor to the right the given number of columns. */
#define ESC_CURSOR_FORWARD(C) ANSI_ESCAPE_SEQUENCE(#C "C")
/** Moves the cursor to the left the given number of columns. */
#define ESC_CURSOR_BACKWARD(C) ANSI_ESCAPE_SEQUENCE(#C "D")
/** Saves the current cursor position so that it may be restored with ESC_CURSOR_POS_RESTORE. */
#define ESC_CURSOR_POS_SAVE ANSI_ESCAPE_SEQUENCE("s")
/** Restores the cursor position to the last position saved with ESC_CURSOR_POS_SAVE. */
#define ESC_CURSOR_POS_RESTORE ANSI_ESCAPE_SEQUENCE("u")
/** Erases the entire display, returning the cursor to the top left. */
#define ESC_ERASE_DISPLAY ANSI_ESCAPE_SEQUENCE("2J")
/** Erases the current line, returning the cursor to the far left. */
#define ESC_ERASE_LINE ANSI_ESCAPE_SEQUENCE("K")
#endif
/*
LUFA Library
Copyright (C) Dean Camera, 2008.
dean [at] fourwalledcubicle [dot] com
www.fourwalledcubicle.com
*/
/*
Copyright 2008 Dean Camera (dean [at] fourwalledcubicle [dot] com)
Permission to use, copy, modify, and distribute this software
and its documentation for any purpose and without fee is hereby
granted, provided that the above copyright notice appear in all
copies and that both that the copyright notice and this
permission notice and warranty disclaimer appear in supporting
documentation, and that the name of the author not be used in
advertising or publicity pertaining to distribution of the
software without specific, written prior permission.
The author disclaim all warranties with regard to this
software, including all implied warranties of merchantability
and fitness. In no event shall the author be liable for any
special, indirect or consequential damages or any damages
whatsoever resulting from loss of use, data or profits, whether
in an action of contract, negligence or other tortious action,
arising out of or in connection with the use or performance of
this software.
*/
/** \file
*
* ANSI terminal compatible escape sequences. These escape sequences are designed to be concatenated with existing
* strings to modify their display on a compatible terminal application.
*
* \note If desired, the macro DISABLE_TERMINAL_CODES can be defined in the project makefile and passed to the GCC
* compiler via the -D switch to disable the terminal codes without modifying the source, for use with non
* compatible terminals (any terminal code then equate to empty strings).
*
* Example Usage:
* \code
* printf("Some String, " ESC_BOLD_ON " Some bold string");
* \endcode
*/
#ifndef __TERMINALCODES_H__
#define __TERMINALCODES_H__
/* Public Interface - May be used in end-application: */
/* Macros: */
#if !defined(DISABLE_TERMINAL_CODES)
/** Creates an ANSII escape sequence with the payload specified by "c". */
#define ANSI_ESCAPE_SEQUENCE(c) "\33[" c
#else
#define ANSI_ESCAPE_SEQUENCE(c)
#endif
/** Resets any escape sequence modifiers back to their defaults. */
#define ESC_RESET ANSI_ESCAPE_SEQUENCE("0m")
/** Turns on bold so that any following text is printed to the terminal in bold. */
#define ESC_BOLD_ON ANSI_ESCAPE_SEQUENCE("1m")
/** Turns on italics so that any following text is printed to the terminal in italics. */
#define ESC_ITALICS_ON ANSI_ESCAPE_SEQUENCE("3m")
/** Turns on underline so that any following text is printed to the terminal underlined. */
#define ESC_UNDERLINE_ON ANSI_ESCAPE_SEQUENCE("4m")
/** Turns on inverse so that any following text is printed to the terminal in inverted colours. */
#define ESC_INVERSE_ON ANSI_ESCAPE_SEQUENCE("7m")
/** Turns on strikethrough so that any following text is printed to the terminal with a line through the
* center.
*/
#define ESC_STRIKETHROUGH_ON ANSI_ESCAPE_SEQUENCE("9m")
/** Turns off bold so that any following text is printed to the terminal in non bold. */
#define ESC_BOLD_OFF ANSI_ESCAPE_SEQUENCE("22m")
/** Turns off italics so that any following text is printed to the terminal in non italics. */
#define ESC_ITALICS_OFF ANSI_ESCAPE_SEQUENCE("23m")
/** Turns off underline so that any following text is printed to the terminal non underlined. */
#define ESC_UNDERLINE_OFF ANSI_ESCAPE_SEQUENCE("24m")
/** Turns off inverse so that any following text is printed to the terminal in non inverted colours. */
#define ESC_INVERSE_OFF ANSI_ESCAPE_SEQUENCE("27m")
/** Turns off strikethrough so that any following text is printed to the terminal without a line through
* the center.
*/
#define ESC_STRIKETHROUGH_OFF ANSI_ESCAPE_SEQUENCE("29m")
/** Sets the foreground (text) colour to black. */
#define ESC_FG_BLACK ANSI_ESCAPE_SEQUENCE("30m")
/** Sets the foreground (text) colour to red. */
#define ESC_FG_RED ANSI_ESCAPE_SEQUENCE("31m")
/** Sets the foreground (text) colour to green. */
#define ESC_FG_GREEN ANSI_ESCAPE_SEQUENCE("32m")
/** Sets the foreground (text) colour to yellow. */
#define ESC_FG_YELLOW ANSI_ESCAPE_SEQUENCE("33m")
/** Sets the foreground (text) colour to blue. */
#define ESC_FG_BLUE ANSI_ESCAPE_SEQUENCE("34m")
/** Sets the foreground (text) colour to magenta. */
#define ESC_FG_MAGENTA ANSI_ESCAPE_SEQUENCE("35m")
/** Sets the foreground (text) colour to cyan. */
#define ESC_FG_CYAN ANSI_ESCAPE_SEQUENCE("36m")
/** Sets the foreground (text) colour to white. */
#define ESC_FG_WHITE ANSI_ESCAPE_SEQUENCE("37m")
/** Sets the foreground (text) colour to the terminal's default. */
#define ESC_FG_DEFAULT ANSI_ESCAPE_SEQUENCE("39m")
/** Sets the text background colour to black. */
#define ESC_BG_BLACK ANSI_ESCAPE_SEQUENCE("40m")
/** Sets the text background colour to red. */
#define ESC_BG_RED ANSI_ESCAPE_SEQUENCE("41m")
/** Sets the text background colour to green. */
#define ESC_BG_GREEN ANSI_ESCAPE_SEQUENCE("42m")
/** Sets the text background colour to yellow. */
#define ESC_BG_YELLOW ANSI_ESCAPE_SEQUENCE("43m")
/** Sets the text background colour to blue. */
#define ESC_BG_BLUE ANSI_ESCAPE_SEQUENCE("44m")
/** Sets the text background colour to magenta. */
#define ESC_BG_MAGENTA ANSI_ESCAPE_SEQUENCE("45m")
/** Sets the text background colour to cyan. */
#define ESC_BG_CYAN ANSI_ESCAPE_SEQUENCE("46m")
/** Sets the text background colour to white. */
#define ESC_BG_WHITE ANSI_ESCAPE_SEQUENCE("47m")
/** Sets the text background colour to the terminal's default. */
#define ESC_BG_DEFAULT ANSI_ESCAPE_SEQUENCE("49m")
/** Sets the cursor position to the given line and column. */
#define ESC_CURSOR_POS(L, C) ANSI_ESCAPE_SEQUENCE(#L ";" #C "H")
/** Moves the cursor up the given number of lines. */
#define ESC_CURSOR_UP(L) ANSI_ESCAPE_SEQUENCE(#L "A")
/** Moves the cursor down the given number of lines. */
#define ESC_CURSOR_DOWN(L) ANSI_ESCAPE_SEQUENCE(#L "B")
/** Moves the cursor to the right the given number of columns. */
#define ESC_CURSOR_FORWARD(C) ANSI_ESCAPE_SEQUENCE(#C "C")
/** Moves the cursor to the left the given number of columns. */
#define ESC_CURSOR_BACKWARD(C) ANSI_ESCAPE_SEQUENCE(#C "D")
/** Saves the current cursor position so that it may be restored with ESC_CURSOR_POS_RESTORE. */
#define ESC_CURSOR_POS_SAVE ANSI_ESCAPE_SEQUENCE("s")
/** Restores the cursor position to the last position saved with ESC_CURSOR_POS_SAVE. */
#define ESC_CURSOR_POS_RESTORE ANSI_ESCAPE_SEQUENCE("u")
/** Erases the entire display, returning the cursor to the top left. */
#define ESC_ERASE_DISPLAY ANSI_ESCAPE_SEQUENCE("2J")
/** Erases the current line, returning the cursor to the far left. */
#define ESC_ERASE_LINE ANSI_ESCAPE_SEQUENCE("K")
#endif

2
kicad/.gitignore vendored
View File

@ -1,2 +1,4 @@
*.bak
*-bak
fp-info-cache
*cache.lib

File diff suppressed because it is too large Load Diff

Binary file not shown.

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@ -0,0 +1,267 @@
update=Sun 22 Sep 2019 15:18:06 BST
version=1
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=60
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.25
MinViaDiameter=0.6
MinViaDrill=0.3
MinMicroViaDiameter=0.3
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth2=0.25
TrackWidth3=0.4
TrackWidth4=0.6
TrackWidth5=0.8
TrackWidth6=1
TrackWidth7=1.5
TrackWidth8=2
ViaDiameter1=0.6
ViaDrill1=0.3
ViaDiameter2=0.6
ViaDrill2=0.3
ViaDiameter3=0.8
ViaDrill3=0.4
dPairWidth1=0.25
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.2
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.25
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=Power
Clearance=0.2
TrackWidth=0.4
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.25
dPairGap=0.25
dPairViaGap=0.25

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@ -1,6 +1,26 @@
EESchema-LIBRARY Version 2.3 Date: Tue 25 Jun 2013 05:14:51 PM PDT
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 74LV1T125
#
DEF 74LV1T125 U 0 40 Y Y 1 F N
F0 "U" 0 250 60 H V C CNN
F1 "74LV1T125" 0 -250 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
IPC_SOT65P210X110-6N
$ENDFPLIST
DRAW
S -300 200 300 -200 0 1 0 N
X OE 1 -500 100 200 R 50 50 1 1 I
X A 2 -500 0 200 R 50 50 1 1 I
X GND 3 -500 -100 200 R 50 50 1 1 W
X Y 4 500 -100 200 L 50 50 1 1 T
X VCC 5 500 100 200 L 50 50 1 1 W
ENDDRAW
ENDDEF
#
# 74LVC1T45
#
DEF 74LVC1T45 U 0 40 Y Y 1 F N
@ -58,7 +78,22 @@ $ENDFPLIST
DRAW
S -500 650 500 -650 0 1 0 N
X VCCA 1 -700 550 200 R 50 50 1 1 W
X A8 10 -700 -350 200 R 50 50 1 1 B
X GND 11 -700 -450 200 R 50 50 1 1 W
X GND 12 -700 -550 200 R 50 50 1 1 W
X GND 13 700 -550 200 L 50 50 1 1 W
X B8 14 700 -450 200 L 50 50 1 1 B
X B7 15 700 -350 200 L 50 50 1 1 B
X B6 16 700 -250 200 L 50 50 1 1 B
X B5 17 700 -150 200 L 50 50 1 1 B
X B4 18 700 -50 200 L 50 50 1 1 B
X B3 19 700 50 200 L 50 50 1 1 B
X DIR 2 -700 450 200 R 50 50 1 1 I
X B2 20 700 150 200 L 50 50 1 1 B
X B1 21 700 250 200 L 50 50 1 1 B
X OE# 22 700 350 200 L 50 50 1 1 I
X VCCB 23 700 450 200 L 50 50 1 1 W
X VCCB 24 700 550 200 L 50 50 1 1 W
X A1 3 -700 350 200 R 50 50 1 1 B
X A2 4 -700 250 200 R 50 50 1 1 B
X A3 5 -700 150 200 R 50 50 1 1 B
@ -66,21 +101,6 @@ X A4 6 -700 50 200 R 50 50 1 1 B
X A5 7 -700 -50 200 R 50 50 1 1 B
X A6 8 -700 -150 200 R 50 50 1 1 B
X A7 9 -700 -250 200 R 50 50 1 1 B
X A8 10 -700 -350 200 R 50 50 1 1 B
X B2 20 700 150 200 L 50 50 1 1 B
X GND 11 -700 -450 200 R 50 50 1 1 W
X B1 21 700 250 200 L 50 50 1 1 B
X GND 12 -700 -550 200 R 50 50 1 1 W
X OE# 22 700 350 200 L 50 50 1 1 I
X GND 13 700 -550 200 L 50 50 1 1 W
X VCCB 23 700 450 200 L 50 50 1 1 W
X B8 14 700 -450 200 L 50 50 1 1 B
X VCCB 24 700 550 200 L 50 50 1 1 W
X B7 15 700 -350 200 L 50 50 1 1 B
X B6 16 700 -250 200 L 50 50 1 1 B
X B5 17 700 -150 200 L 50 50 1 1 B
X B4 18 700 -50 200 L 50 50 1 1 B
X B3 19 700 50 200 L 50 50 1 1 B
ENDDRAW
ENDDEF
#

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(module SW_Tactile_SKHH_Angled (layer F.Cu) (tedit 5D78E89C)
(descr "tactile switch 6mm ALPS SKHH right angle http://www.alps.com/prod/info/E/HTML/Tact/SnapIn/SKHH/SKHHLUA010.html")
(tags "tactile switch 6mm ALPS SKHH right angle")
(fp_text reference REF** (at 2.25 2.5) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value SW_Tactile_SKHH_Angled (at 2.25 5.09) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.62 3.82) (end -1.62 4.12) (layer F.SilkS) (width 0.12))
(fp_line (start -0.73 4.12) (end -0.73 3.77) (layer F.SilkS) (width 0.12))
(fp_line (start -0.73 4.12) (end -1.62 4.12) (layer F.SilkS) (width 0.12))
(fp_circle (center -1.25 2.5) (end -2.393 2.5) (layer B.Mask) (width 0.1))
(fp_circle (center 4.5 0) (end 3.611 0) (layer B.Mask) (width 0.1))
(fp_circle (center 0 0) (end -0.889 0) (layer B.Mask) (width 0.1))
(fp_circle (center 5.75 2.5) (end 4.607 2.5) (layer B.Mask) (width 0.1))
(fp_circle (center -1.25 2.5) (end -1.885 2.5) (layer F.Mask) (width 0.1))
(fp_circle (center 5.75 2.5) (end 5.115 2.5) (layer F.Mask) (width 0.1))
(fp_circle (center 4.5 0) (end 4.0555 0) (layer F.Mask) (width 0.1))
(fp_circle (center 0 0) (end -0.4445 0) (layer F.Mask) (width 0.1))
(fp_line (start -0.24 1.57) (end 4.74 1.57) (layer F.SilkS) (width 0.12))
(fp_line (start -1.62 -2.67) (end -1.62 1.18) (layer F.SilkS) (width 0.12))
(fp_line (start 6.12 -2.67) (end -1.62 -2.67) (layer F.SilkS) (width 0.12))
(fp_line (start 6.12 1.18) (end 6.12 -2.67) (layer F.SilkS) (width 0.12))
(fp_line (start 3.9 -2.55) (end 3.9 -5.85) (layer F.Fab) (width 0.1))
(fp_line (start 0.6 -2.55) (end 0.6 -5.85) (layer F.Fab) (width 0.1))
(fp_line (start 6 -2.55) (end -1.5 -2.55) (layer F.Fab) (width 0.1))
(fp_line (start -0.85 1.45) (end -0.85 4) (layer F.Fab) (width 0.1))
(fp_line (start 5.35 1.45) (end 5.35 4) (layer F.Fab) (width 0.1))
(fp_line (start 5.35 1.45) (end -0.85 1.45) (layer F.Fab) (width 0.1))
(fp_line (start -1.5 4) (end -1.5 -2.55) (layer F.Fab) (width 0.1))
(fp_line (start -0.85 4) (end -1.5 4) (layer F.Fab) (width 0.1))
(fp_line (start 6 4) (end 5.35 4) (layer F.Fab) (width 0.1))
(fp_line (start 6 -2.55) (end 6 4) (layer F.Fab) (width 0.1))
(fp_line (start 0.6 -5.85) (end 3.9 -5.85) (layer F.Fab) (width 0.1))
(fp_line (start 4.4 1.7) (end 4.4 4.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.1 4.25) (end 0.1 1.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.35 -2.8) (end -1.75 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.35 -6.1) (end 0.35 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.15 -6.1) (end 0.35 -6.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.15 -2.8) (end 4.15 -6.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.25 -2.8) (end 4.15 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.1 1.7) (end 4.4 1.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.25 1.1) (end 6.25 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.1 1.1) (end 6.25 1.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.1 4.25) (end 7.1 1.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.4 4.25) (end 7.1 4.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 1.15) (end -1.75 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.6 1.15) (end -1.75 1.15) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.6 4.25) (end -2.6 1.15) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.1 4.25) (end -2.6 4.25) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 2.25 -1.5) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 6.12 3.82) (end 6.12 4.12) (layer F.SilkS) (width 0.12))
(fp_line (start 6.12 4.12) (end 5.23 4.12) (layer F.SilkS) (width 0.12))
(fp_line (start 5.23 4.12) (end 5.23 3.77) (layer F.SilkS) (width 0.12))
(pad 1 thru_hole circle (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 4.5 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad "" thru_hole circle (at -1.25 2.5 180) (size 2.2 2.2) (drill 1.3) (layers *.Cu *.Mask))
(pad "" thru_hole circle (at 5.75 2.5 180) (size 2.2 2.2) (drill 1.3) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Button_Switch_THT.3dshapes/SW_Tactile_SKHH_Angled.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

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@ -0,0 +1,23 @@
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4-e60b266~84~ubuntu18.04.1*
G04 #@! TF.CreationDate,2019-10-24T10:36:49+01:00*
G04 #@! TF.ProjectId,6502_adapter,36353032-5f61-4646-9170-7465722e6b69,rev?*
G04 #@! TF.SameCoordinates,PX9fdfbc0PY791ddc0*
G04 #@! TF.FileFunction,Profile,NP*
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 5.1.4-e60b266~84~ubuntu18.04.1) date 2019-10-24 10:36:49*
%MOMM*%
%LPD*%
G04 APERTURE LIST*
%ADD10C,0.150000*%
G04 APERTURE END LIST*
D10*
X49911000Y77216000D02*
X49911000Y2032000D01*
X49911000Y2032000D02*
X889000Y2032000D01*
X889000Y2032000D02*
X889000Y77216000D01*
X889000Y77216000D02*
X49911000Y77216000D01*
M02*

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@ -0,0 +1,224 @@
M48
; DRILL file {KiCad 5.1.4-e60b266~84~ubuntu18.04.1} date Thu 24 Oct 2019 10:36:55 BST
; FORMAT={-:-/ absolute / inch / decimal}
; #@! TF.CreationDate,2019-10-24T10:36:55+01:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.4-e60b266~84~ubuntu18.04.1
FMAT,2
INCH
T1C0.0118
T2C0.0157
T3C0.0354
T4C0.0394
T5C0.0512
%
G90
G05
T1
X0.76Y1.195
X0.775Y0.9
X0.79Y2.44
X0.79Y2.35
X0.79Y2.15
X0.79Y2.1
X0.79Y2.05
X0.79Y2.0
X0.79Y1.95
X0.79Y1.6
X0.79Y1.55
X0.79Y1.5
X0.79Y1.45
X0.79Y1.4
X0.79Y1.25
X0.79Y0.675
X0.79Y0.625
X0.79Y0.575
X0.79Y0.525
X0.8Y2.3
X0.85Y2.66
X1.2Y1.55
X1.2Y1.5
X1.2Y0.885
X1.215Y2.425
X1.215Y2.34
X1.215Y2.215
X1.215Y2.175
X1.215Y2.135
X1.215Y2.025
X1.215Y1.825
X1.215Y1.65
X1.215Y1.6
X1.215Y1.45
X1.215Y1.4
X1.215Y1.35
X1.215Y1.3
X1.215Y1.02
X1.215Y0.8
X1.215Y0.7
X1.215Y0.6
X1.225Y1.525
X1.475Y2.475
X1.475Y1.775
X1.4751Y1.09
T2
X0.4Y2.01
X0.4Y1.7
X0.4Y1.0525
X0.4Y0.975
X0.425Y2.425
X0.455Y0.37
X0.5Y1.8
X0.5Y1.75
X0.68Y1.85
X0.68Y1.75
X0.68Y1.65
X0.7Y2.25
X0.72Y1.85
X0.72Y1.75
X0.72Y1.65
X0.9Y0.15
X0.92Y2.425
X0.92Y2.375
X0.925Y1.7
X0.925Y1.65
X0.925Y0.975
X0.925Y0.925
X0.95Y1.275
X0.95Y0.55
X0.96Y2.2
X1.0Y1.94
X1.05Y2.275
X1.05Y1.56
X1.05Y0.55
X1.075Y1.9
X1.075Y1.2
X1.075Y1.15
X1.28Y1.05
X1.28Y0.95
X1.3Y2.15
X1.3Y0.4
X1.32Y1.05
X1.32Y0.95
X1.45Y0.3
X1.465Y0.925
X1.5Y1.02
X1.5Y0.98
X1.575Y1.875
X1.575Y1.15
X1.6Y1.8
X1.62Y2.26
X1.69Y0.98
X1.69Y0.9
X1.69Y0.725
X1.69Y0.65
X1.69Y0.475
X1.6902Y0.5498
X1.79Y0.39
T3
X0.925Y2.925
X1.025Y2.925
X0.525Y2.925
X0.625Y2.925
X0.725Y2.925
X0.825Y2.925
T4
X1.6478Y2.925
X1.825Y2.925
X0.1675Y2.925
X0.3447Y2.925
X1.8Y2.4
X1.8Y2.3
X1.8Y2.2
X1.8Y2.1
X1.8Y2.0
X1.8Y1.9
X1.8Y1.8
X1.8Y1.7
X1.8Y1.6
X1.8Y1.5
X1.8Y1.4
X1.8Y1.3
X1.8Y1.2
X1.8Y1.1
X1.8Y1.0
X1.8Y0.9
X1.8Y0.8
X1.8Y0.7
X1.8Y0.6
X1.8Y0.5
X1.9Y2.4
X1.9Y2.3
X1.9Y2.2
X1.9Y2.1
X1.9Y2.0
X1.9Y1.9
X1.9Y1.8
X1.9Y1.7
X1.9Y1.6
X1.9Y1.5
X1.9Y1.4
X1.9Y1.3
X1.9Y1.2
X1.9Y1.1
X1.9Y1.0
X1.9Y0.9
X1.9Y0.8
X1.9Y0.7
X1.9Y0.6
X1.9Y0.5
X1.55Y0.35
X1.55Y0.25
X1.55Y0.15
X0.1Y2.4
X0.1Y2.3
X0.1Y2.2
X0.1Y2.1
X0.1Y2.0
X0.1Y1.9
X0.1Y1.8
X0.1Y1.7
X0.1Y1.6
X0.1Y1.5
X0.1Y1.4
X0.1Y1.3
X0.1Y1.2
X0.1Y1.1
X0.1Y1.0
X0.1Y0.9
X0.1Y0.8
X0.1Y0.7
X0.1Y0.6
X0.1Y0.5
X0.2Y2.4
X0.2Y2.3
X0.2Y2.2
X0.2Y2.1
X0.2Y2.0
X0.2Y1.9
X0.2Y1.8
X0.2Y1.7
X0.2Y1.6
X0.2Y1.5
X0.2Y1.4
X0.2Y1.3
X0.2Y1.2
X0.2Y1.1
X0.2Y1.0
X0.2Y0.9
X0.2Y0.8
X0.2Y0.7
X0.2Y0.6
X0.2Y0.5
X0.475Y2.725
X0.475Y2.625
X0.475Y2.525
X0.475Y0.25
X0.475Y0.15
X1.5Y2.675
X1.5Y2.575
T5
X1.5986Y2.8266
X1.8742Y2.8266
X0.1183Y2.8266
X0.3939Y2.8266
T0
M30

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@ -0,0 +1,16 @@
#!/bin/bash
SRC=6502_adapter
DST=6502_adapter
mv $SRC-B_Cu.gbl $DST.gbl
mv $SRC-B_Mask.gbs $DST.gbs
mv $SRC-B_SilkS.gbo $DST.gbo
mv $SRC.drl $DST.xln
mv $SRC-Edge_Cuts.gm1 $DST.gko
mv $SRC-F_Cu.gtl $DST.gtl
mv $SRC-F_Mask.gts $DST.gts
mv $SRC-F_SilkS.gto $DST.gto
rm -f manufacturing.zip
zip -qr manufacturing.zip $DST.*

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@ -0,0 +1,4 @@
(sym_lib_table
(lib (name 65xx)(type Legacy)(uri ${KIPRJMOD}/65xx.lib)(options "")(descr ""))
(lib (name 74lvc)(type Legacy)(uri ${KIPRJMOD}/74lvc.lib)(options "")(descr ""))
)

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@ -1,317 +0,0 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# 74LVC8T245
#
DEF 74LVC8T245 U 0 40 Y Y 1 F N
F0 "U" -500 700 60 H V L CNN
F1 "74LVC8T245" -500 -700 60 H V L CNN
F2 "" 0 -100 60 H V C CNN
F3 "" 0 -100 60 H V C CNN
$FPLIST
IPC_SOP65P640X120-24N
$ENDFPLIST
DRAW
S -500 650 500 -650 0 1 0 N
X VCCA 1 -700 550 200 R 50 50 1 1 W
X DIR 2 -700 450 200 R 50 50 1 1 I
X A1 3 -700 350 200 R 50 50 1 1 B
X A2 4 -700 250 200 R 50 50 1 1 B
X A3 5 -700 150 200 R 50 50 1 1 B
X A4 6 -700 50 200 R 50 50 1 1 B
X A5 7 -700 -50 200 R 50 50 1 1 B
X A6 8 -700 -150 200 R 50 50 1 1 B
X A7 9 -700 -250 200 R 50 50 1 1 B
X A8 10 -700 -350 200 R 50 50 1 1 B
X B2 20 700 150 200 L 50 50 1 1 B
X GND 11 -700 -450 200 R 50 50 1 1 W
X B1 21 700 250 200 L 50 50 1 1 B
X GND 12 -700 -550 200 R 50 50 1 1 W
X OE# 22 700 350 200 L 50 50 1 1 I
X GND 13 700 -550 200 L 50 50 1 1 W
X VCCB 23 700 450 200 L 50 50 1 1 W
X B8 14 700 -450 200 L 50 50 1 1 B
X VCCB 24 700 550 200 L 50 50 1 1 W
X B7 15 700 -350 200 L 50 50 1 1 B
X B6 16 700 -250 200 L 50 50 1 1 B
X B5 17 700 -150 200 L 50 50 1 1 B
X B4 18 700 -50 200 L 50 50 1 1 B
X B3 19 700 50 200 L 50 50 1 1 B
ENDDRAW
ENDDEF
#
# CONN_01X02
#
DEF CONN_01X02 P 0 40 Y N 1 F N
F0 "P" 0 150 50 H V C CNN
F1 "CONN_01X02" 100 0 50 V V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
Pin_Header_Straight_1X02
Pin_Header_Angled_1X02
Socket_Strip_Straight_1X02
Socket_Strip_Angled_1X02
$ENDFPLIST
DRAW
S -50 -45 10 -55 0 1 0 N
S -50 55 10 45 0 1 0 N
S -50 100 50 -100 0 1 0 N
X P1 1 -200 50 150 R 50 50 1 1 P
X P2 2 -200 -50 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_01X03
#
DEF CONN_01X03 P 0 40 Y N 1 F N
F0 "P" 0 200 50 H V C CNN
F1 "CONN_01X03" 100 0 50 V V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
Pin_Header_Straight_1X03
Pin_Header_Angled_1X03
Socket_Strip_Straight_1X03
Socket_Strip_Angled_1X03
$ENDFPLIST
DRAW
S -50 -95 10 -105 0 1 0 N
S -50 5 10 -5 0 1 0 N
S -50 105 10 95 0 1 0 N
S -50 150 50 -150 0 1 0 N
X P1 1 -200 100 150 R 50 50 1 1 P
X P2 2 -200 0 150 R 50 50 1 1 P
X P3 3 -200 -100 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CONN_02X20
#
DEF CONN_02X20 P 0 1 Y N 1 F N
F0 "P" 0 1050 50 H V C CNN
F1 "CONN_02X20" 0 0 50 V V C CNN
F2 "" 0 -950 50 H V C CNN
F3 "" 0 -950 50 H V C CNN
$FPLIST
Pin_Header_Straight_2X20
Pin_Header_Angled_2X20
Socket_Strip_Straight_2X20
Socket_Strip_Angled_2X20
$ENDFPLIST
DRAW
S -100 -945 -50 -955 0 1 0 N
S -100 -845 -50 -855 0 1 0 N
S -100 -745 -50 -755 0 1 0 N
S -100 -645 -50 -655 0 1 0 N
S -100 -545 -50 -555 0 1 0 N
S -100 -445 -50 -455 0 1 0 N
S -100 -345 -50 -355 0 1 0 N
S -100 -245 -50 -255 0 1 0 N
S -100 -145 -50 -155 0 1 0 N
S -100 -45 -50 -55 0 1 0 N
S -100 55 -50 45 0 1 0 N
S -100 155 -50 145 0 1 0 N
S -100 255 -50 245 0 1 0 N
S -100 355 -50 345 0 1 0 N
S -100 455 -50 445 0 1 0 N
S -100 555 -50 545 0 1 0 N
S -100 655 -50 645 0 1 0 N
S -100 755 -50 745 0 1 0 N
S -100 855 -50 845 0 1 0 N
S -100 955 -50 945 0 1 0 N
S -100 1000 100 -1000 0 1 0 N
S 50 -945 100 -955 0 1 0 N
S 50 -845 100 -855 0 1 0 N
S 50 -745 100 -755 0 1 0 N
S 50 -645 100 -655 0 1 0 N
S 50 -545 100 -555 0 1 0 N
S 50 -445 100 -455 0 1 0 N
S 50 -345 100 -355 0 1 0 N
S 50 -245 100 -255 0 1 0 N
S 50 -145 100 -155 0 1 0 N
S 50 -45 100 -55 0 1 0 N
S 50 55 100 45 0 1 0 N
S 50 155 100 145 0 1 0 N
S 50 255 100 245 0 1 0 N
S 50 355 100 345 0 1 0 N
S 50 455 100 445 0 1 0 N
S 50 555 100 545 0 1 0 N
S 50 655 100 645 0 1 0 N
S 50 755 100 745 0 1 0 N
S 50 855 100 845 0 1 0 N
S 50 955 100 945 0 1 0 N
X P1 1 -250 950 150 R 50 50 1 1 P
X P2 2 250 950 150 L 50 50 1 1 P
X P3 3 -250 850 150 R 50 50 1 1 P
X P4 4 250 850 150 L 50 50 1 1 P
X P5 5 -250 750 150 R 50 50 1 1 P
X P6 6 250 750 150 L 50 50 1 1 P
X P7 7 -250 650 150 R 50 50 1 1 P
X P8 8 250 650 150 L 50 50 1 1 P
X P9 9 -250 550 150 R 50 50 1 1 P
X P10 10 250 550 150 L 50 50 1 1 P
X P20 20 250 50 150 L 50 50 1 1 P
X P30 30 250 -450 150 L 50 50 1 1 P
X P40 40 250 -950 150 L 50 50 1 1 P
X P11 11 -250 450 150 R 50 50 1 1 P
X P21 21 -250 -50 150 R 50 50 1 1 P
X P31 31 -250 -550 150 R 50 50 1 1 P
X P12 12 250 450 150 L 50 50 1 1 P
X P22 22 250 -50 150 L 50 50 1 1 P
X P32 32 250 -550 150 L 50 50 1 1 P
X P13 13 -250 350 150 R 50 50 1 1 P
X P23 23 -250 -150 150 R 50 50 1 1 P
X P33 33 -250 -650 150 R 50 50 1 1 P
X P14 14 250 350 150 L 50 50 1 1 P
X P24 24 250 -150 150 L 50 50 1 1 P
X P34 34 250 -650 150 L 50 50 1 1 P
X P15 15 -250 250 150 R 50 50 1 1 P
X P25 25 -250 -250 150 R 50 50 1 1 P
X P35 35 -250 -750 150 R 50 50 1 1 P
X P16 16 250 250 150 L 50 50 1 1 P
X P26 26 250 -250 150 L 50 50 1 1 P
X P36 36 250 -750 150 L 50 50 1 1 P
X P17 17 -250 150 150 R 50 50 1 1 P
X P27 27 -250 -350 150 R 50 50 1 1 P
X P37 37 -250 -850 150 R 50 50 1 1 P
X P18 18 250 150 150 L 50 50 1 1 P
X P28 28 250 -350 150 L 50 50 1 1 P
X P38 38 250 -850 150 L 50 50 1 1 P
X P19 19 -250 50 150 R 50 50 1 1 P
X P29 29 -250 -450 150 R 50 50 1 1 P
X P39 39 -250 -950 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# CP1_Small
#
DEF CP1_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "CP1_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
CP*
Elko*
TantalC*
C*elec
c_elec*
SMD*_Pol
$ENDFPLIST
DRAW
A 0 -140 125 1186 614 0 1 12 N -60 -30 60 -30
P 2 0 1 12 -60 20 60 20 N
P 2 0 1 0 -50 60 -30 60 N
P 2 0 1 0 -40 50 -40 70 N
X ~ 1 0 100 80 D 40 40 1 1 P
X ~ 2 0 -100 80 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# C_Small
#
DEF C_Small C 0 10 N N 1 F N
F0 "C" 10 70 50 H V L CNN
F1 "C_Small" 10 -80 50 H V L CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
C?
C_????_*
C_????
SMD*_c
Capacitor*
$ENDFPLIST
DRAW
P 2 0 1 13 -60 -20 60 -20 N
P 2 0 1 12 -60 20 60 20 N
X ~ 1 0 100 75 D 40 40 1 1 P
X ~ 2 0 -100 80 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# PWR_FLAG
#
DEF PWR_FLAG #FLG 0 0 N N 1 F P
F0 "#FLG" 0 95 50 H I C CNN
F1 "PWR_FLAG" 0 180 50 H V C CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
DRAW
X pwr 1 0 0 0 U 50 50 0 0 w
P 6 0 1 0 0 0 0 50 -75 100 0 150 75 100 0 50 N
ENDDRAW
ENDDEF
#
# R_Small
#
DEF R_Small R 0 10 N N 1 F N
F0 "R" 30 20 50 H V L CNN
F1 "R_Small" 30 -40 50 H V L CNN
F2 "" 0 0 50 H V C CNN
F3 "" 0 0 50 H V C CNN
$FPLIST
Resistor_*
R_*
$ENDFPLIST
DRAW
S -30 70 30 -70 0 1 8 N
X ~ 1 0 100 30 D 40 40 1 1 P
X ~ 2 0 -100 30 U 40 40 1 1 P
ENDDRAW
ENDDEF
#
# WD65C02
#
DEF WD65C02 U 0 40 Y Y 1 F N
F0 "U" 0 -1150 60 H V C CNN
F1 "WD65C02" 0 -100 60 V V C CNN
F2 "" -500 200 60 H V C CNN
F3 "" -500 200 60 H V C CNN
DRAW
S -350 1000 350 -1050 0 1 0 N
X ~VP 1 -650 900 300 R 50 50 1 1 O
X RDY 2 -650 800 300 R 50 50 1 1 B
X PHI1out 3 -650 700 300 R 50 50 1 1 O
X ~IRQ 4 -650 600 300 R 50 50 1 1 I
X ~ML 5 -650 500 300 R 50 50 1 1 O
X ~NMI 6 -650 400 300 R 50 50 1 1 I
X SYNC 7 -650 300 300 R 50 50 1 1 O
X VCC 8 -650 200 300 R 50 50 1 1 W
X A0 9 -650 100 300 R 50 50 1 1 O
X A1 10 -650 0 300 R 50 50 1 1 O
X A11 20 -650 -1000 300 R 50 50 1 1 O
X D3 30 650 -100 300 L 50 50 1 1 T
X ~RESET 40 650 900 300 L 50 50 1 1 I
X A2 11 -650 -100 300 R 50 50 1 1 O
X GND 21 650 -1000 300 L 50 50 1 1 W
X D2 31 650 0 300 L 50 50 1 1 T
X A3 12 -650 -200 300 R 50 50 1 1 O
X A12 22 650 -900 300 L 50 50 1 1 O
X D1 32 650 100 300 L 50 50 1 1 T
X A4 13 -650 -300 300 R 50 50 1 1 O
X A13 23 650 -800 300 L 50 50 1 1 O
X D0 33 650 200 300 L 50 50 1 1 T
X A5 14 -650 -400 300 R 50 50 1 1 O
X A14 24 650 -700 300 L 50 50 1 1 O
X R/~W 34 650 300 300 L 50 50 1 1 O
X A6 15 -650 -500 300 R 50 50 1 1 O
X A15 25 650 -600 300 L 50 50 1 1 O
X NC 35 650 400 300 L 50 50 1 1 N
X A7 16 -650 -600 300 R 50 50 1 1 O
X D7 26 650 -500 300 L 50 50 1 1 T
X BE 36 650 500 300 L 50 50 1 1 I
X A8 17 -650 -700 300 R 50 50 1 1 O
X D6 27 650 -400 300 L 50 50 1 1 T
X PHI2 37 650 600 300 L 50 50 1 1 I
X A9 18 -650 -800 300 R 50 50 1 1 O
X D5 28 650 -300 300 L 50 50 1 1 T
X ~SO 38 650 700 300 L 50 50 1 1 O
X A10 19 -650 -900 300 R 50 50 1 1 O
X D4 29 650 -200 300 L 50 50 1 1 T
X PHI2out 39 650 800 300 L 50 50 1 1 O
ENDDRAW
ENDDEF
#
#End Library

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(export (version D)
(design
(source /home/dmb/atom/AtomBusMon/kicad/6502_adapter.sch)
(date "Mon 24 Jul 2017 21:45:18 BST")
(tool "Eeschema 4.0.6-e0-6349~53~ubuntu14.04.1")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title)
(company)
(rev)
(date)
(source 6502_adapter.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref U1)
(value WD65C02)
(footprint footprints:dip40_smt_header)
(libsource (lib 65xx) (part WD65C02))
(sheetpath (names /) (tstamps /))
(tstamp 5975BF41))
(comp (ref U4)
(value 74LVC4245)
(footprint footprints:SOIC-24W_7.5x15.4mm_Pitch1.27mm)
(libsource (lib 74lvc) (part 74LVC8T245))
(sheetpath (names /) (tstamps /))
(tstamp 5975C5CE))
(comp (ref P2)
(value CONN_02X20)
(footprint footprints:Socket_Strip_Straight_2x20_Pitch2.54mm)
(libsource (lib conn) (part CONN_02X20))
(sheetpath (names /) (tstamps /))
(tstamp 5975C737))
(comp (ref P1)
(value CONN_02X20)
(footprint footprints:Socket_Strip_Straight_2x20_Pitch2.54mm)
(libsource (lib conn) (part CONN_02X20))
(sheetpath (names /) (tstamps /))
(tstamp 5975C7A4))
(comp (ref U5)
(value 74LVC4245)
(footprint footprints:SOIC-24W_7.5x15.4mm_Pitch1.27mm)
(libsource (lib 74lvc) (part 74LVC8T245))
(sheetpath (names /) (tstamps /))
(tstamp 5975C870))
(comp (ref U2)
(value 74LVC4245)
(footprint footprints:SOIC-24W_7.5x15.4mm_Pitch1.27mm)
(libsource (lib 74lvc) (part 74LVC8T245))
(sheetpath (names /) (tstamps /))
(tstamp 5975C8C1))
(comp (ref U3)
(value 74LVC4245)
(footprint footprints:SOIC-24W_7.5x15.4mm_Pitch1.27mm)
(libsource (lib 74lvc) (part 74LVC8T245))
(sheetpath (names /) (tstamps /))
(tstamp 5975C914))
(comp (ref U6)
(value 74LVC4245)
(footprint footprints:SOIC-24W_7.5x15.4mm_Pitch1.27mm)
(libsource (lib 74lvc) (part 74LVC8T245))
(sheetpath (names /) (tstamps /))
(tstamp 5975C957))
(comp (ref P3)
(value CONN_01X03)
(footprint footprints:Pin_Header_Straight_1x03_Pitch2.00mm)
(libsource (lib conn) (part CONN_01X03))
(sheetpath (names /) (tstamps /))
(tstamp 59760CE2))
(comp (ref P4)
(value CONN_01X02)
(footprint footprints:Pin_Header_Straight_1x02_Pitch2.00mm)
(libsource (lib conn) (part CONN_01X02))
(sheetpath (names /) (tstamps /))
(tstamp 5976110F))
(comp (ref R1)
(value 4K7)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part R_Small))
(sheetpath (names /) (tstamps /))
(tstamp 59761BB3))
(comp (ref C1)
(value 100nF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part C_Small))
(sheetpath (names /) (tstamps /))
(tstamp 597620E8))
(comp (ref C2)
(value 100nF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part C_Small))
(sheetpath (names /) (tstamps /))
(tstamp 5976220A))
(comp (ref C3)
(value 100nF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part C_Small))
(sheetpath (names /) (tstamps /))
(tstamp 59762254))
(comp (ref C4)
(value 100nF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part C_Small))
(sheetpath (names /) (tstamps /))
(tstamp 59762296))
(comp (ref C5)
(value 100nF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part C_Small))
(sheetpath (names /) (tstamps /))
(tstamp 597622DF))
(comp (ref C7)
(value 100nF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part C_Small))
(sheetpath (names /) (tstamps /))
(tstamp 597624D7))
(comp (ref C8)
(value 100nF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part C_Small))
(sheetpath (names /) (tstamps /))
(tstamp 5976252A))
(comp (ref C9)
(value 100nF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part C_Small))
(sheetpath (names /) (tstamps /))
(tstamp 59762588))
(comp (ref C10)
(value 100nF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part C_Small))
(sheetpath (names /) (tstamps /))
(tstamp 597625E5))
(comp (ref C11)
(value 100nF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part C_Small))
(sheetpath (names /) (tstamps /))
(tstamp 59762645))
(comp (ref C6)
(value 10uF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part CP1_Small))
(sheetpath (names /) (tstamps /))
(tstamp 597630BE))
(comp (ref C12)
(value 10uF)
(footprint Capacitors_SMD:C_0805_HandSoldering)
(libsource (lib device) (part CP1_Small))
(sheetpath (names /) (tstamps /))
(tstamp 59763501)))
(libparts
(libpart (lib 74lvc) (part 74LVC8T245)
(footprints
(fp IPC_SOP65P640X120-24N))
(fields
(field (name Reference) U)
(field (name Value) 74LVC8T245))
(pins
(pin (num 1) (name VCCA) (type power_in))
(pin (num 2) (name DIR) (type input))
(pin (num 3) (name A1) (type BiDi))
(pin (num 4) (name A2) (type BiDi))
(pin (num 5) (name A3) (type BiDi))
(pin (num 6) (name A4) (type BiDi))
(pin (num 7) (name A5) (type BiDi))
(pin (num 8) (name A6) (type BiDi))
(pin (num 9) (name A7) (type BiDi))
(pin (num 10) (name A8) (type BiDi))
(pin (num 11) (name GND) (type power_in))
(pin (num 12) (name GND) (type power_in))
(pin (num 13) (name GND) (type power_in))
(pin (num 14) (name B8) (type BiDi))
(pin (num 15) (name B7) (type BiDi))
(pin (num 16) (name B6) (type BiDi))
(pin (num 17) (name B5) (type BiDi))
(pin (num 18) (name B4) (type BiDi))
(pin (num 19) (name B3) (type BiDi))
(pin (num 20) (name B2) (type BiDi))
(pin (num 21) (name B1) (type BiDi))
(pin (num 22) (name OE#) (type input))
(pin (num 23) (name VCCB) (type power_in))
(pin (num 24) (name VCCB) (type power_in))))
(libpart (lib conn) (part CONN_01X02)
(description "Connector 01x02")
(footprints
(fp Pin_Header_Straight_1X02)
(fp Pin_Header_Angled_1X02)
(fp Socket_Strip_Straight_1X02)
(fp Socket_Strip_Angled_1X02))
(fields
(field (name Reference) P)
(field (name Value) CONN_01X02))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name P2) (type passive))))
(libpart (lib conn) (part CONN_01X03)
(description "Connector 01x03")
(footprints
(fp Pin_Header_Straight_1X03)
(fp Pin_Header_Angled_1X03)
(fp Socket_Strip_Straight_1X03)
(fp Socket_Strip_Angled_1X03))
(fields
(field (name Reference) P)
(field (name Value) CONN_01X03))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name P2) (type passive))
(pin (num 3) (name P3) (type passive))))
(libpart (lib conn) (part CONN_02X20)
(description "Connector 02x20")
(footprints
(fp Pin_Header_Straight_2X20)
(fp Pin_Header_Angled_2X20)
(fp Socket_Strip_Straight_2X20)
(fp Socket_Strip_Angled_2X20))
(fields
(field (name Reference) P)
(field (name Value) CONN_02X20))
(pins
(pin (num 1) (name P1) (type passive))
(pin (num 2) (name P2) (type passive))
(pin (num 3) (name P3) (type passive))
(pin (num 4) (name P4) (type passive))
(pin (num 5) (name P5) (type passive))
(pin (num 6) (name P6) (type passive))
(pin (num 7) (name P7) (type passive))
(pin (num 8) (name P8) (type passive))
(pin (num 9) (name P9) (type passive))
(pin (num 10) (name P10) (type passive))
(pin (num 11) (name P11) (type passive))
(pin (num 12) (name P12) (type passive))
(pin (num 13) (name P13) (type passive))
(pin (num 14) (name P14) (type passive))
(pin (num 15) (name P15) (type passive))
(pin (num 16) (name P16) (type passive))
(pin (num 17) (name P17) (type passive))
(pin (num 18) (name P18) (type passive))
(pin (num 19) (name P19) (type passive))
(pin (num 20) (name P20) (type passive))
(pin (num 21) (name P21) (type passive))
(pin (num 22) (name P22) (type passive))
(pin (num 23) (name P23) (type passive))
(pin (num 24) (name P24) (type passive))
(pin (num 25) (name P25) (type passive))
(pin (num 26) (name P26) (type passive))
(pin (num 27) (name P27) (type passive))
(pin (num 28) (name P28) (type passive))
(pin (num 29) (name P29) (type passive))
(pin (num 30) (name P30) (type passive))
(pin (num 31) (name P31) (type passive))
(pin (num 32) (name P32) (type passive))
(pin (num 33) (name P33) (type passive))
(pin (num 34) (name P34) (type passive))
(pin (num 35) (name P35) (type passive))
(pin (num 36) (name P36) (type passive))
(pin (num 37) (name P37) (type passive))
(pin (num 38) (name P38) (type passive))
(pin (num 39) (name P39) (type passive))
(pin (num 40) (name P40) (type passive))))
(libpart (lib device) (part CP1_Small)
(description "Polarised capacitor")
(footprints
(fp CP*)
(fp Elko*)
(fp TantalC*)
(fp C*elec)
(fp c_elec*)
(fp SMD*_Pol))
(fields
(field (name Reference) C)
(field (name Value) CP1_Small))
(pins
(pin (num 1) (name ~) (type passive))
(pin (num 2) (name ~) (type passive))))
(libpart (lib device) (part C_Small)
(description "Unpolarized capacitor")
(footprints
(fp C?)
(fp C_????_*)
(fp C_????)
(fp SMD*_c)
(fp Capacitor*))
(fields
(field (name Reference) C)
(field (name Value) C_Small))
(pins
(pin (num 1) (name ~) (type passive))
(pin (num 2) (name ~) (type passive))))
(libpart (lib device) (part R_Small)
(description Resistor)
(footprints
(fp Resistor_*)
(fp R_*))
(fields
(field (name Reference) R)
(field (name Value) R_Small))
(pins
(pin (num 1) (name ~) (type passive))
(pin (num 2) (name ~) (type passive))))
(libpart (lib 65xx) (part WD65C02)
(fields
(field (name Reference) U)
(field (name Value) WD65C02))
(pins
(pin (num 1) (name ~VP) (type output))
(pin (num 2) (name RDY) (type BiDi))
(pin (num 3) (name PHI1out) (type output))
(pin (num 4) (name ~IRQ) (type input))
(pin (num 5) (name ~ML) (type output))
(pin (num 6) (name ~NMI) (type input))
(pin (num 7) (name SYNC) (type output))
(pin (num 8) (name VCC) (type power_in))
(pin (num 9) (name A0) (type output))
(pin (num 10) (name A1) (type output))
(pin (num 11) (name A2) (type output))
(pin (num 12) (name A3) (type output))
(pin (num 13) (name A4) (type output))
(pin (num 14) (name A5) (type output))
(pin (num 15) (name A6) (type output))
(pin (num 16) (name A7) (type output))
(pin (num 17) (name A8) (type output))
(pin (num 18) (name A9) (type output))
(pin (num 19) (name A10) (type output))
(pin (num 20) (name A11) (type output))
(pin (num 21) (name GND) (type power_in))
(pin (num 22) (name A12) (type output))
(pin (num 23) (name A13) (type output))
(pin (num 24) (name A14) (type output))
(pin (num 25) (name A15) (type output))
(pin (num 26) (name D7) (type 3state))
(pin (num 27) (name D6) (type 3state))
(pin (num 28) (name D5) (type 3state))
(pin (num 29) (name D4) (type 3state))
(pin (num 30) (name D3) (type 3state))
(pin (num 31) (name D2) (type 3state))
(pin (num 32) (name D1) (type 3state))
(pin (num 33) (name D0) (type 3state))
(pin (num 34) (name R/~W) (type output))
(pin (num 35) (name NC) (type NotConnected))
(pin (num 36) (name BE) (type input))
(pin (num 37) (name PHI2) (type input))
(pin (num 38) (name ~SO) (type output))
(pin (num 39) (name PHI2out) (type output))
(pin (num 40) (name ~RESET) (type input)))))
(libraries
(library (logical device)
(uri /usr/share/kicad/library/device.lib))
(library (logical 65xx)
(uri 65xx.lib))
(library (logical 74lvc)
(uri 74lvc.lib))
(library (logical conn)
(uri /usr/share/kicad/library/conn.lib)))
(nets
(net (code 1) (name "Net-(P1-Pad39)")
(node (ref P1) (pin 39)))
(net (code 2) (name "Net-(P1-Pad40)")
(node (ref P1) (pin 40)))
(net (code 3) (name /5V)
(node (ref U4) (pin 1))
(node (ref C6) (pin 1))
(node (ref C4) (pin 1))
(node (ref U2) (pin 1))
(node (ref U6) (pin 1))
(node (ref C2) (pin 1))
(node (ref U5) (pin 1))
(node (ref P2) (pin 11))
(node (ref C3) (pin 1))
(node (ref U3) (pin 1))
(node (ref R1) (pin 1))
(node (ref P1) (pin 11))
(node (ref C1) (pin 1))
(node (ref U1) (pin 8))
(node (ref C5) (pin 1)))
(net (code 4) (name /3V3)
(node (ref U6) (pin 24))
(node (ref U5) (pin 24))
(node (ref U5) (pin 23))
(node (ref U5) (pin 13))
(node (ref U2) (pin 24))
(node (ref U2) (pin 23))
(node (ref U6) (pin 23))
(node (ref U4) (pin 23))
(node (ref C12) (pin 1))
(node (ref C7) (pin 1))
(node (ref U4) (pin 24))
(node (ref C8) (pin 1))
(node (ref C10) (pin 1))
(node (ref U3) (pin 24))
(node (ref C11) (pin 1))
(node (ref P2) (pin 29))
(node (ref P1) (pin 29))
(node (ref C9) (pin 1))
(node (ref U3) (pin 23)))
(net (code 5) (name /GND)
(node (ref U1) (pin 21))
(node (ref P1) (pin 30))
(node (ref P1) (pin 12))
(node (ref P2) (pin 12))
(node (ref U6) (pin 22))
(node (ref U6) (pin 13))
(node (ref U4) (pin 13))
(node (ref U4) (pin 12))
(node (ref U4) (pin 11))
(node (ref U4) (pin 2))
(node (ref P2) (pin 30))
(node (ref U2) (pin 2))
(node (ref C4) (pin 2))
(node (ref C5) (pin 2))
(node (ref C8) (pin 2))
(node (ref C9) (pin 2))
(node (ref C10) (pin 2))
(node (ref C11) (pin 2))
(node (ref C6) (pin 2))
(node (ref C12) (pin 2))
(node (ref U6) (pin 12))
(node (ref C7) (pin 2))
(node (ref U5) (pin 12))
(node (ref U5) (pin 11))
(node (ref U2) (pin 13))
(node (ref U2) (pin 12))
(node (ref U2) (pin 11))
(node (ref U2) (pin 22))
(node (ref U3) (pin 11))
(node (ref U3) (pin 13))
(node (ref C1) (pin 2))
(node (ref U3) (pin 12))
(node (ref C2) (pin 2))
(node (ref U3) (pin 2))
(node (ref C3) (pin 2))
(node (ref P3) (pin 3))
(node (ref U6) (pin 11)))
(net (code 6) (name "Net-(P1-Pad25)")
(node (ref P1) (pin 25)))
(net (code 7) (name "Net-(P2-Pad25)")
(node (ref P2) (pin 25)))
(net (code 8) (name "Net-(P2-Pad28)")
(node (ref P2) (pin 28)))
(net (code 9) (name "Net-(P2-Pad14)")
(node (ref P2) (pin 14)))
(net (code 10) (name "Net-(P2-Pad16)")
(node (ref P2) (pin 16)))
(net (code 11) (name "Net-(P2-Pad15)")
(node (ref P2) (pin 15)))
(net (code 12) (name "Net-(P2-Pad13)")
(node (ref P2) (pin 13)))
(net (code 13) (name "Net-(P1-Pad38)")
(node (ref P1) (pin 38)))
(net (code 14) (name "Net-(P1-Pad28)")
(node (ref P1) (pin 28)))
(net (code 15) (name "Net-(P1-Pad27)")
(node (ref P1) (pin 27)))
(net (code 16) (name "Net-(P2-Pad27)")
(node (ref P2) (pin 27)))
(net (code 17) (name "Net-(P1-Pad26)")
(node (ref P1) (pin 26)))
(net (code 18) (name "Net-(P1-Pad24)")
(node (ref P1) (pin 24)))
(net (code 19) (name "Net-(P1-Pad14)")
(node (ref P1) (pin 14)))
(net (code 20) (name "Net-(P1-Pad10)")
(node (ref P1) (pin 10)))
(net (code 21) (name "Net-(P1-Pad8)")
(node (ref P1) (pin 8)))
(net (code 22) (name "Net-(P1-Pad6)")
(node (ref P1) (pin 6)))
(net (code 23) (name "Net-(P1-Pad4)")
(node (ref P1) (pin 4)))
(net (code 24) (name "Net-(P1-Pad2)")
(node (ref P1) (pin 2)))
(net (code 25) (name "Net-(P2-Pad39)")
(node (ref P2) (pin 39)))
(net (code 26) (name /nML)
(node (ref U2) (pin 5))
(node (ref P4) (pin 2)))
(net (code 27) (name /RnW)
(node (ref U2) (pin 4))
(node (ref U5) (pin 2))
(node (ref U1) (pin 34)))
(net (code 28) (name "Net-(U1-Pad35)")
(node (ref U1) (pin 35)))
(net (code 29) (name "Net-(P3-Pad2)")
(node (ref U1) (pin 1))
(node (ref P3) (pin 2)))
(net (code 30) (name "Net-(U2-Pad15)")
(node (ref U2) (pin 15)))
(net (code 31) (name "Net-(U2-Pad9)")
(node (ref U2) (pin 9)))
(net (code 32) (name "Net-(P1-Pad13)")
(node (ref P1) (pin 13)))
(net (code 33) (name "Net-(U6-Pad21)")
(node (ref U6) (pin 21)))
(net (code 34) (name "Net-(U6-Pad3)")
(node (ref U6) (pin 3)))
(net (code 35) (name "Net-(U2-Pad10)")
(node (ref U2) (pin 10)))
(net (code 36) (name "Net-(P4-Pad1)")
(node (ref U1) (pin 5))
(node (ref P4) (pin 1)))
(net (code 37) (name "Net-(R1-Pad2)")
(node (ref U6) (pin 2))
(node (ref R1) (pin 2)))
(net (code 38) (name "Net-(P1-Pad9)")
(node (ref P1) (pin 9)))
(net (code 39) (name "Net-(P1-Pad7)")
(node (ref P1) (pin 7)))
(net (code 40) (name "Net-(P1-Pad5)")
(node (ref P1) (pin 5)))
(net (code 41) (name "Net-(P1-Pad3)")
(node (ref P1) (pin 3)))
(net (code 42) (name "Net-(P1-Pad1)")
(node (ref P1) (pin 1)))
(net (code 43) (name "Net-(U2-Pad14)")
(node (ref U2) (pin 14)))
(net (code 44) (name "Net-(P2-Pad3)")
(node (ref P2) (pin 3)))
(net (code 45) (name "Net-(P2-Pad1)")
(node (ref P2) (pin 1)))
(net (code 46) (name "Net-(P2-Pad2)")
(node (ref P2) (pin 2)))
(net (code 47) (name "Net-(P2-Pad4)")
(node (ref P2) (pin 4)))
(net (code 48) (name /BE)
(node (ref U6) (pin 9))
(node (ref U1) (pin 36)))
(net (code 49) (name /nSO)
(node (ref U6) (pin 6))
(node (ref U1) (pin 38)))
(net (code 50) (name /nIRQ)
(node (ref U1) (pin 4))
(node (ref U6) (pin 7)))
(net (code 51) (name /PHI2)
(node (ref U1) (pin 37))
(node (ref U6) (pin 8)))
(net (code 52) (name /nNMI)
(node (ref U1) (pin 6))
(node (ref U6) (pin 10)))
(net (code 53) (name /PHI2OUT)
(node (ref U1) (pin 39))
(node (ref U2) (pin 7)))
(net (code 54) (name /PHI1OUT)
(node (ref U2) (pin 6))
(node (ref U1) (pin 3)))
(net (code 55) (name /nVP)
(node (ref U2) (pin 8))
(node (ref P3) (pin 1)))
(net (code 56) (name /SYNC)
(node (ref U2) (pin 3))
(node (ref U1) (pin 7)))
(net (code 57) (name /nRST)
(node (ref U1) (pin 40))
(node (ref U6) (pin 4)))
(net (code 58) (name /RDY)
(node (ref U1) (pin 2))
(node (ref U6) (pin 5)))
(net (code 59) (name /LV_A11)
(node (ref U4) (pin 21))
(node (ref P2) (pin 37)))
(net (code 60) (name /LV_A0)
(node (ref U3) (pin 14))
(node (ref P2) (pin 18)))
(net (code 61) (name /LV_A10)
(node (ref P2) (pin 38))
(node (ref U4) (pin 20)))
(net (code 62) (name /LV_A3)
(node (ref P2) (pin 19))
(node (ref U3) (pin 17)))
(net (code 63) (name /LV_A1)
(node (ref P2) (pin 17))
(node (ref U3) (pin 15)))
(net (code 64) (name /LV_D2)
(node (ref U5) (pin 19))
(node (ref P1) (pin 20)))
(net (code 65) (name /LV_A5)
(node (ref P2) (pin 21))
(node (ref U3) (pin 19)))
(net (code 66) (name /LV_A14)
(node (ref U4) (pin 15))
(node (ref P2) (pin 31)))
(net (code 67) (name /LV_A4)
(node (ref P2) (pin 22))
(node (ref U3) (pin 18)))
(net (code 68) (name /LV_A15)
(node (ref U4) (pin 14))
(node (ref P2) (pin 32)))
(net (code 69) (name /LV_A7)
(node (ref P2) (pin 23))
(node (ref U3) (pin 21)))
(net (code 70) (name /LV_A12)
(node (ref U4) (pin 17))
(node (ref P2) (pin 33)))
(net (code 71) (name /LV_A6)
(node (ref P2) (pin 24))
(node (ref U3) (pin 20)))
(net (code 72) (name /LV_A13)
(node (ref P2) (pin 34))
(node (ref U4) (pin 16)))
(net (code 73) (name /LV_A9)
(node (ref P2) (pin 35))
(node (ref U4) (pin 19)))
(net (code 74) (name /LV_OEAL)
(node (ref P2) (pin 26))
(node (ref U3) (pin 22)))
(net (code 75) (name /LV_A8)
(node (ref P2) (pin 36))
(node (ref U4) (pin 18)))
(net (code 76) (name /LV_D5)
(node (ref U5) (pin 16))
(node (ref P1) (pin 17)))
(net (code 77) (name /LV_nRST)
(node (ref P1) (pin 37))
(node (ref U6) (pin 20)))
(net (code 78) (name /LV_D4)
(node (ref P1) (pin 18))
(node (ref U5) (pin 17)))
(net (code 79) (name /LV_D3)
(node (ref P1) (pin 19))
(node (ref U5) (pin 18)))
(net (code 80) (name /LV_RDY)
(node (ref P1) (pin 36))
(node (ref U6) (pin 19)))
(net (code 81) (name /LV_PHI2)
(node (ref P1) (pin 33))
(node (ref U6) (pin 16)))
(net (code 82) (name /LV_D1)
(node (ref U5) (pin 20))
(node (ref P1) (pin 21)))
(net (code 83) (name /LV_nNMI)
(node (ref U6) (pin 14))
(node (ref P1) (pin 31)))
(net (code 84) (name /LV_D0)
(node (ref U5) (pin 21))
(node (ref P1) (pin 22)))
(net (code 85) (name /LV_BE)
(node (ref U6) (pin 15))
(node (ref P1) (pin 32)))
(net (code 86) (name /LV_OED)
(node (ref P1) (pin 23))
(node (ref U5) (pin 22)))
(net (code 87) (name /LV_OEAH)
(node (ref P2) (pin 40))
(node (ref U4) (pin 22)))
(net (code 88) (name /LV_nIRQ)
(node (ref P1) (pin 34))
(node (ref U6) (pin 17)))
(net (code 89) (name /LV_D7)
(node (ref P1) (pin 15))
(node (ref U5) (pin 14)))
(net (code 90) (name /LV_nSO)
(node (ref P1) (pin 35))
(node (ref U6) (pin 18)))
(net (code 91) (name /LV_D6)
(node (ref P1) (pin 16))
(node (ref U5) (pin 15)))
(net (code 92) (name /LV_A2)
(node (ref U3) (pin 16))
(node (ref P2) (pin 20)))
(net (code 93) (name /A0)
(node (ref U1) (pin 9))
(node (ref U3) (pin 10)))
(net (code 94) (name /A1)
(node (ref U3) (pin 9))
(node (ref U1) (pin 10)))
(net (code 95) (name /A2)
(node (ref U1) (pin 11))
(node (ref U3) (pin 8)))
(net (code 96) (name /A3)
(node (ref U1) (pin 12))
(node (ref U3) (pin 7)))
(net (code 97) (name /A4)
(node (ref U3) (pin 6))
(node (ref U1) (pin 13)))
(net (code 98) (name /A5)
(node (ref U3) (pin 5))
(node (ref U1) (pin 14)))
(net (code 99) (name /A6)
(node (ref U1) (pin 15))
(node (ref U3) (pin 4)))
(net (code 100) (name /A7)
(node (ref U1) (pin 16))
(node (ref U3) (pin 3)))
(net (code 101) (name /D0)
(node (ref U5) (pin 3))
(node (ref U1) (pin 33)))
(net (code 102) (name /D1)
(node (ref U1) (pin 32))
(node (ref U5) (pin 4)))
(net (code 103) (name /D2)
(node (ref U1) (pin 31))
(node (ref U5) (pin 5)))
(net (code 104) (name /D3)
(node (ref U1) (pin 30))
(node (ref U5) (pin 6)))
(net (code 105) (name /D4)
(node (ref U5) (pin 7))
(node (ref U1) (pin 29)))
(net (code 106) (name /D5)
(node (ref U5) (pin 8))
(node (ref U1) (pin 28)))
(net (code 107) (name /D6)
(node (ref U5) (pin 9))
(node (ref U1) (pin 27)))
(net (code 108) (name /D7)
(node (ref U5) (pin 10))
(node (ref U1) (pin 26)))
(net (code 109) (name /A12)
(node (ref U4) (pin 7))
(node (ref U1) (pin 22)))
(net (code 110) (name /A8)
(node (ref U1) (pin 17))
(node (ref U4) (pin 6)))
(net (code 111) (name /A9)
(node (ref U4) (pin 5))
(node (ref U1) (pin 18)))
(net (code 112) (name /A10)
(node (ref U1) (pin 19))
(node (ref U4) (pin 4)))
(net (code 113) (name /A11)
(node (ref U4) (pin 3))
(node (ref U1) (pin 20)))
(net (code 114) (name /A15)
(node (ref U1) (pin 25))
(node (ref U4) (pin 10)))
(net (code 115) (name /A14)
(node (ref U4) (pin 9))
(node (ref U1) (pin 24)))
(net (code 116) (name /A13)
(node (ref U1) (pin 23))
(node (ref U4) (pin 8)))
(net (code 117) (name /LV_RnW)
(node (ref P2) (pin 10))
(node (ref U2) (pin 20)))
(net (code 118) (name /LV_SYNC)
(node (ref P2) (pin 9))
(node (ref U2) (pin 21)))
(net (code 119) (name /LV_nVP)
(node (ref U2) (pin 16))
(node (ref P2) (pin 6)))
(net (code 120) (name /LV_PHI2OUT)
(node (ref U2) (pin 17))
(node (ref P2) (pin 5)))
(net (code 121) (name /LV_PHI1OUT)
(node (ref U2) (pin 18))
(node (ref P2) (pin 8)))
(net (code 122) (name /LV_nML)
(node (ref U2) (pin 19))
(node (ref P2) (pin 7)))))

View File

@ -1,62 +0,0 @@
update=Mon 24 Jul 2017 11:02:39 BST
version=1
last_client=kicad
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
[eeschema/libraries]
LibName1=power
LibName2=device
LibName3=transistors
LibName4=conn
LibName5=linear
LibName6=regul
LibName7=74xx
LibName8=cmos4000
LibName9=adc-dac
LibName10=memory
LibName11=xilinx
LibName12=microcontrollers
LibName13=dsp
LibName14=microchip
LibName15=analog_switches
LibName16=motorola
LibName17=texas
LibName18=intel
LibName19=audio
LibName20=interface
LibName21=digital-audio
LibName22=philips
LibName23=display
LibName24=cypress
LibName25=siliconi
LibName26=opto
LibName27=atmel
LibName28=contrib
LibName29=valves
LibName30=65xx
LibName31=74lvc

View File

@ -1,952 +0,0 @@
EESchema Schematic File Version 2
LIBS:power
LIBS:device
LIBS:transistors
LIBS:conn
LIBS:linear
LIBS:regul
LIBS:74xx
LIBS:cmos4000
LIBS:adc-dac
LIBS:memory
LIBS:xilinx
LIBS:microcontrollers
LIBS:dsp
LIBS:microchip
LIBS:analog_switches
LIBS:motorola
LIBS:texas
LIBS:intel
LIBS:audio
LIBS:interface
LIBS:digital-audio
LIBS:philips
LIBS:display
LIBS:cypress
LIBS:siliconi
LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
LIBS:65xx
LIBS:74lvc
EELAYER 25 0
EELAYER END
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Title ""
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$Comp
L WD65C02 U1
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F 2 "footprints:dip40_smt_header" H 5300 3800 60 0001 C CNN
F 3 "" H 5300 3800 60 0000 C CNN
1 5800 3600
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$EndComp
$Comp
L 74LVC8T245 U4
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F 3 "" H 3650 5500 60 0000 C CNN
1 3650 5600
-1 0 0 1
$EndComp
$Comp
L CONN_02X20 P2
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P 1200 4100
F 0 "P2" H 1200 5150 50 0000 C CNN
F 1 "CONN_02X20" V 1200 4100 50 0000 C CNN
F 2 "footprints:Socket_Strip_Straight_2x20_Pitch2.54mm" H 1200 3150 50 0001 C CNN
F 3 "" H 1200 3150 50 0000 C CNN
1 1200 4100
1 0 0 -1
$EndComp
$Comp
L CONN_02X20 P1
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F 0 "P1" H 10450 5000 50 0000 C CNN
F 1 "CONN_02X20" V 10450 3950 50 0000 C CNN
F 2 "footprints:Socket_Strip_Straight_2x20_Pitch2.54mm" H 10450 3000 50 0001 C CNN
F 3 "" H 10450 3000 50 0000 C CNN
1 10450 3950
-1 0 0 1
$EndComp
$Comp
L 74LVC8T245 U5
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F 3 "" H 8100 3650 60 0000 C CNN
1 8100 3750
1 0 0 -1
$EndComp
$Comp
L 74LVC8T245 U2
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$EndComp
$Comp
L 74LVC8T245 U3
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$EndComp
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L 74LVC8T245 U6
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$EndComp
Text Label 6700 3400 0 60 ~ 0
D0
Text Label 6700 3500 0 60 ~ 0
D1
Text Label 6700 3600 0 60 ~ 0
D2
Text Label 6700 3700 0 60 ~ 0
D3
Text Label 6700 3800 0 60 ~ 0
D4
Text Label 6700 3900 0 60 ~ 0
D5
Text Label 6700 4000 0 60 ~ 0
D6
Text Label 6700 4100 0 60 ~ 0
D7
Text Label 6450 4600 0 60 ~ 0
GND
Text Label 7400 4300 2 60 ~ 0
GND
Text Label 7400 4200 2 60 ~ 0
GND
Text Label 7400 3200 2 60 ~ 0
5V
Text Label 8800 3200 0 60 ~ 0
3V3
Text Label 8800 3300 0 60 ~ 0
3V3
Text Label 3950 3300 0 60 ~ 0
GND
Text Label 3950 3400 0 60 ~ 0
GND
Text Label 3950 4300 0 60 ~ 0
GND
Text Label 3950 4400 0 60 ~ 0
5V
Text Label 2550 4400 2 60 ~ 0
3V3
Text Label 2550 4300 2 60 ~ 0
3V3
Text Label 2550 3300 2 60 ~ 0
GND
Text Label 4600 3500 2 60 ~ 0
A0
Text Label 4600 3600 2 60 ~ 0
A1
Text Label 4600 3700 2 60 ~ 0
A2
Text Label 4600 3800 2 60 ~ 0
A3
Text Label 4600 3900 2 60 ~ 0
A4
Text Label 4600 4000 2 60 ~ 0
A5
Text Label 4600 4100 2 60 ~ 0
A6
Text Label 4600 4200 2 60 ~ 0
A7
Text Label 5150 3400 2 60 ~ 0
5V
Text Label 8800 4300 0 60 ~ 0
3V3
Text Label 4500 5650 0 60 ~ 0
A8
Text Label 4500 5750 0 60 ~ 0
A9
Text Label 4500 5850 0 60 ~ 0
A10
Text Label 4500 5950 0 60 ~ 0
A11
Text Label 4500 5250 0 60 ~ 0
A15
Text Label 4500 5350 0 60 ~ 0
A14
Text Label 4500 5450 0 60 ~ 0
A13
Text Label 4500 5550 0 60 ~ 0
A12
Text Label 4350 5050 0 60 ~ 0
GND
Text Label 4350 5150 0 60 ~ 0
GND
Text Label 4350 6050 0 60 ~ 0
GND
Text Label 4350 6150 0 60 ~ 0
5V
Text Label 2950 5050 2 60 ~ 0
GND
Text Label 2950 6050 2 60 ~ 0
3V3
Text Label 2950 6150 2 60 ~ 0
3V3
Text Label 950 3650 2 60 ~ 0
5V
Text Label 1450 3650 0 60 ~ 0
GND
Text Label 950 4550 2 60 ~ 0
3V3
Text Label 1450 4550 0 60 ~ 0
GND
Text Label 10200 4400 2 60 ~ 0
GND
Text Label 10200 3500 2 60 ~ 0
GND
Text Label 10700 4400 0 60 ~ 0
5V
Text Label 10700 3500 0 60 ~ 0
3V3
Text Label 4000 1100 0 60 ~ 0
GND
Text Label 4000 1200 0 60 ~ 0
GND
Text Label 4000 2200 0 60 ~ 0
5V
Text Label 2600 2200 2 60 ~ 0
3V3
Text Label 2600 2100 2 60 ~ 0
3V3
Text Label 2600 1100 2 60 ~ 0
GND
Text Label 7400 2400 2 60 ~ 0
GND
Text Label 7400 2500 2 60 ~ 0
GND
Text Label 7400 1400 2 60 ~ 0
5V
Text Label 8800 1400 0 60 ~ 0
3V3
Text Label 8800 1500 0 60 ~ 0
3V3
Text Label 8800 2500 0 60 ~ 0
GND
Text Label 4450 1500 0 60 ~ 0
nVP
Text Label 4450 1600 0 60 ~ 0
PHI2OUT
Text Label 4450 1700 0 60 ~ 0
PHI1OUT
Text Label 4450 1800 0 60 ~ 0
nML
Text Label 4450 1900 0 60 ~ 0
RnW
Text Label 4450 2000 0 60 ~ 0
SYNC
Text Label 7250 1700 2 60 ~ 0
nRST
Text Label 7250 1800 2 60 ~ 0
RDY
Text Label 7250 1900 2 60 ~ 0
nSO
Text Label 7250 2000 2 60 ~ 0
nIRQ
Text Label 7250 2100 2 60 ~ 0
PHI2
Text Label 7250 2200 2 60 ~ 0
BE
Text Label 7250 2300 2 60 ~ 0
nNMI
NoConn ~ 6450 3200
$Comp
L CONN_01X03 P3
U 1 1 59760CE2
P 5150 1050
F 0 "P3" H 5150 1250 50 0000 C CNN
F 1 "CONN_01X03" V 5250 1050 50 0000 C CNN
F 2 "footprints:Pin_Header_Straight_1x03_Pitch2.00mm" H 5150 1050 50 0001 C CNN
F 3 "" H 5150 1050 50 0000 C CNN
1 5150 1050
0 -1 -1 0
$EndComp
Text Label 5350 1250 0 60 ~ 0
GND
$Comp
L CONN_01X02 P4
U 1 1 5976110F
P 4300 2850
F 0 "P4" H 4300 3000 50 0000 C CNN
F 1 "CONN_01X02" V 4400 2850 50 0000 C CNN
F 2 "footprints:Pin_Header_Straight_1x02_Pitch2.00mm" H 4300 2850 50 0001 C CNN
F 3 "" H 4300 2850 50 0000 C CNN
1 4300 2850
-1 0 0 1
$EndComp
Text Label 2550 3400 2 60 ~ 0
LV_A0
Text Label 2550 3500 2 60 ~ 0
LV_A1
Text Label 2550 3600 2 60 ~ 0
LV_A2
Text Label 2550 3700 2 60 ~ 0
LV_A3
Text Label 2550 3800 2 60 ~ 0
LV_A4
Text Label 2550 3900 2 60 ~ 0
LV_A5
Text Label 2550 4000 2 60 ~ 0
LV_A6
Text Label 2550 4100 2 60 ~ 0
LV_A7
Text Label 2550 4200 2 60 ~ 0
LV_OEAL
Text Label 2950 5150 2 60 ~ 0
LV_A15
Text Label 2950 5250 2 60 ~ 0
LV_A14
Text Label 2950 5350 2 60 ~ 0
LV_A13
Text Label 2950 5450 2 60 ~ 0
LV_A12
Text Label 2950 5550 2 60 ~ 0
LV_A8
Text Label 2950 5650 2 60 ~ 0
LV_A9
Text Label 2950 5750 2 60 ~ 0
LV_A10
Text Label 2950 5850 2 60 ~ 0
LV_A11
Text Label 2950 5950 2 60 ~ 0
LV_OEAH
Text Label 8800 3400 0 60 ~ 0
LV_OED
Text Label 8800 3500 0 60 ~ 0
LV_D0
Text Label 8800 3600 0 60 ~ 0
LV_D1
Text Label 8800 3700 0 60 ~ 0
LV_D2
Text Label 8800 3800 0 60 ~ 0
LV_D3
Text Label 8800 3900 0 60 ~ 0
LV_D4
Text Label 8800 4000 0 60 ~ 0
LV_D5
Text Label 8800 4100 0 60 ~ 0
LV_D6
Text Label 8800 4200 0 60 ~ 0
LV_D7
Text Label 8800 1600 0 60 ~ 0
GND
Text Label 8800 1800 0 60 ~ 0
LV_nRST
Text Label 8800 1900 0 60 ~ 0
LV_RDY
Text Label 8800 2000 0 60 ~ 0
LV_nSO
Text Label 8800 2100 0 60 ~ 0
LV_nIRQ
Text Label 8800 2200 0 60 ~ 0
LV_PHI2
Text Label 8800 2300 0 60 ~ 0
LV_BE
Text Label 8800 2400 0 60 ~ 0
LV_nNMI
NoConn ~ 8800 1700
NoConn ~ 7400 1600
NoConn ~ 4000 1300
NoConn ~ 4000 1400
NoConn ~ 2600 1300
Text Label 2600 2000 2 60 ~ 0
GND
Text Label 4000 2100 0 60 ~ 0
GND
Text Label 2600 1400 2 60 ~ 0
LV_nVP
Text Label 2600 1500 2 60 ~ 0
LV_PHI2OUT
Text Label 2600 1600 2 60 ~ 0
LV_PHI1OUT
Text Label 2600 1700 2 60 ~ 0
LV_nML
Text Label 2600 1800 2 60 ~ 0
LV_RnW
Text Label 2600 1900 2 60 ~ 0
LV_SYNC
$Comp
L R_Small R1
U 1 1 59761BB3
P 7050 1100
F 0 "R1" H 7080 1120 50 0000 L CNN
F 1 "4K7" H 7080 1060 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 7050 1100 50 0001 C CNN
F 3 "" H 7050 1100 50 0000 C CNN
1 7050 1100
1 0 0 -1
$EndComp
Text Label 7050 900 2 60 ~ 0
5V
$Comp
L C_Small C1
U 1 1 597620E8
P 1100 6900
F 0 "C1" H 1110 6970 50 0000 L CNN
F 1 "100nF" H 1110 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 1100 6900 50 0001 C CNN
F 3 "" H 1100 6900 50 0000 C CNN
1 1100 6900
1 0 0 -1
$EndComp
$Comp
L C_Small C2
U 1 1 5976220A
P 1400 6900
F 0 "C2" H 1410 6970 50 0000 L CNN
F 1 "100nF" H 1410 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 1400 6900 50 0001 C CNN
F 3 "" H 1400 6900 50 0000 C CNN
1 1400 6900
1 0 0 -1
$EndComp
$Comp
L C_Small C3
U 1 1 59762254
P 1700 6900
F 0 "C3" H 1710 6970 50 0000 L CNN
F 1 "100nF" H 1710 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 1700 6900 50 0001 C CNN
F 3 "" H 1700 6900 50 0000 C CNN
1 1700 6900
1 0 0 -1
$EndComp
$Comp
L C_Small C4
U 1 1 59762296
P 2000 6900
F 0 "C4" H 2010 6970 50 0000 L CNN
F 1 "100nF" H 2010 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 2000 6900 50 0001 C CNN
F 3 "" H 2000 6900 50 0000 C CNN
1 2000 6900
1 0 0 -1
$EndComp
$Comp
L C_Small C5
U 1 1 597622DF
P 2300 6900
F 0 "C5" H 2310 6970 50 0000 L CNN
F 1 "100nF" H 2310 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 2300 6900 50 0001 C CNN
F 3 "" H 2300 6900 50 0000 C CNN
1 2300 6900
1 0 0 -1
$EndComp
$Comp
L C_Small C7
U 1 1 597624D7
P 3250 6900
F 0 "C7" H 3260 6970 50 0000 L CNN
F 1 "100nF" H 3260 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 3250 6900 50 0001 C CNN
F 3 "" H 3250 6900 50 0000 C CNN
1 3250 6900
1 0 0 -1
$EndComp
$Comp
L C_Small C8
U 1 1 5976252A
P 3550 6900
F 0 "C8" H 3560 6970 50 0000 L CNN
F 1 "100nF" H 3560 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 3550 6900 50 0001 C CNN
F 3 "" H 3550 6900 50 0000 C CNN
1 3550 6900
1 0 0 -1
$EndComp
$Comp
L C_Small C9
U 1 1 59762588
P 3850 6900
F 0 "C9" H 3860 6970 50 0000 L CNN
F 1 "100nF" H 3860 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 3850 6900 50 0001 C CNN
F 3 "" H 3850 6900 50 0000 C CNN
1 3850 6900
1 0 0 -1
$EndComp
$Comp
L C_Small C10
U 1 1 597625E5
P 4150 6900
F 0 "C10" H 4160 6970 50 0000 L CNN
F 1 "100nF" H 4160 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 4150 6900 50 0001 C CNN
F 3 "" H 4150 6900 50 0000 C CNN
1 4150 6900
1 0 0 -1
$EndComp
$Comp
L C_Small C11
U 1 1 59762645
P 4450 6900
F 0 "C11" H 4460 6970 50 0000 L CNN
F 1 "100nF" H 4460 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 4450 6900 50 0001 C CNN
F 3 "" H 4450 6900 50 0000 C CNN
1 4450 6900
1 0 0 -1
$EndComp
$Comp
L CP1_Small C6
U 1 1 597630BE
P 2600 6900
F 0 "C6" H 2610 6970 50 0000 L CNN
F 1 "10uF" H 2610 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 2600 6900 50 0001 C CNN
F 3 "" H 2600 6900 50 0000 C CNN
1 2600 6900
1 0 0 -1
$EndComp
$Comp
L CP1_Small C12
U 1 1 59763501
P 4750 6900
F 0 "C12" H 4760 6970 50 0000 L CNN
F 1 "10uF" H 4760 6820 50 0000 L CNN
F 2 "Capacitors_SMD:C_0805_HandSoldering" H 4750 6900 50 0001 C CNN
F 3 "" H 4750 6900 50 0000 C CNN
1 4750 6900
1 0 0 -1
$EndComp
Text Label 2600 6700 2 60 ~ 0
5V
Text Label 4750 6700 2 60 ~ 0
3V3
Text Label 2900 7100 2 60 ~ 0
GND
Text Label 10700 3100 0 60 ~ 0
LV_nRST
Text Label 10700 3200 0 60 ~ 0
LV_nSO
Text Label 10700 3300 0 60 ~ 0
LV_PHI2
Text Label 10700 3400 0 60 ~ 0
LV_nNMI
Text Label 10200 3200 2 60 ~ 0
LV_RDY
Text Label 10200 3300 2 60 ~ 0
LV_nIRQ
Text Label 10200 3400 2 60 ~ 0
LV_BE
Text Label 10700 4200 0 60 ~ 0
LV_D7
Text Label 10700 4100 0 60 ~ 0
LV_D5
Text Label 10700 4000 0 60 ~ 0
LV_D3
Text Label 10700 3900 0 60 ~ 0
LV_D1
Text Label 10200 4200 2 60 ~ 0
LV_D6
Text Label 10200 4100 2 60 ~ 0
LV_D4
Text Label 10200 4000 2 60 ~ 0
LV_D2
Text Label 10200 3900 2 60 ~ 0
LV_D0
NoConn ~ 10700 3000
NoConn ~ 10200 3000
Text Label 10700 3800 0 60 ~ 0
LV_OED
Text Label 1450 4650 0 60 ~ 0
LV_A15
Text Label 1450 4750 0 60 ~ 0
LV_A13
Text Label 1450 4850 0 60 ~ 0
LV_A8
Text Label 1450 4950 0 60 ~ 0
LV_A10
Text Label 950 4650 2 60 ~ 0
LV_A14
Text Label 950 4750 2 60 ~ 0
LV_A12
Text Label 950 4850 2 60 ~ 0
LV_A9
Text Label 950 4950 2 60 ~ 0
LV_A11
Text Label 1450 5050 0 60 ~ 0
LV_OEAH
Text Label 1450 3950 0 60 ~ 0
LV_A0
Text Label 1450 4050 0 60 ~ 0
LV_A2
Text Label 1450 4150 0 60 ~ 0
LV_A4
Text Label 1450 4250 0 60 ~ 0
LV_A6
Text Label 1450 4350 0 60 ~ 0
LV_OEAL
Text Label 950 3950 2 60 ~ 0
LV_A1
Text Label 950 4050 2 60 ~ 0
LV_A3
Text Label 950 4150 2 60 ~ 0
LV_A5
Text Label 950 4250 2 60 ~ 0
LV_A7
NoConn ~ 950 5050
NoConn ~ 950 4450
NoConn ~ 950 4350
NoConn ~ 1450 4450
NoConn ~ 1450 3750
NoConn ~ 1450 3850
NoConn ~ 950 3850
NoConn ~ 950 3750
NoConn ~ 10200 3100
NoConn ~ 10200 3600
NoConn ~ 10700 3600
NoConn ~ 10700 3700
NoConn ~ 10200 3700
NoConn ~ 10200 3800
NoConn ~ 10200 4300
NoConn ~ 10200 4500
NoConn ~ 10200 4600
NoConn ~ 10200 4700
NoConn ~ 10200 4800
NoConn ~ 10200 4900
NoConn ~ 10700 4300
NoConn ~ 10700 4500
NoConn ~ 10700 4600
NoConn ~ 10700 4700
NoConn ~ 10700 4800
NoConn ~ 10700 4900
NoConn ~ 2600 1200
Text Label 950 3550 2 60 ~ 0
LV_SYNC
Text Label 950 3450 2 60 ~ 0
LV_nML
Text Label 950 3350 2 60 ~ 0
LV_PHI2OUT
Text Label 1450 3550 0 60 ~ 0
LV_RnW
Text Label 1450 3450 0 60 ~ 0
LV_PHI1OUT
Text Label 1450 3350 0 60 ~ 0
LV_nVP
NoConn ~ 950 3250
NoConn ~ 950 3150
NoConn ~ 1450 3150
NoConn ~ 1450 3250
$Comp
L PWR_FLAG #FLG01
U 1 1 597673C3
P 1100 6700
F 0 "#FLG01" H 1100 6795 50 0001 C CNN
F 1 "PWR_FLAG" H 1100 6880 50 0000 C CNN
F 2 "" H 1100 6700 50 0000 C CNN
F 3 "" H 1100 6700 50 0000 C CNN
1 1100 6700
1 0 0 -1
$EndComp
$Comp
L PWR_FLAG #FLG02
U 1 1 59767405
P 3250 6700
F 0 "#FLG02" H 3250 6795 50 0001 C CNN
F 1 "PWR_FLAG" H 3250 6880 50 0000 C CNN
F 2 "" H 3250 6700 50 0000 C CNN
F 3 "" H 3250 6700 50 0000 C CNN
1 3250 6700
1 0 0 -1
$EndComp
$Comp
L PWR_FLAG #FLG03
U 1 1 59767675
P 800 7100
F 0 "#FLG03" H 800 7195 50 0001 C CNN
F 1 "PWR_FLAG" H 800 7280 50 0000 C CNN
F 2 "" H 800 7100 50 0000 C CNN
F 3 "" H 800 7100 50 0000 C CNN
1 800 7100
1 0 0 -1
$EndComp
Wire Wire Line
6450 3400 7400 3400
Wire Wire Line
6450 3500 7400 3500
Wire Wire Line
6450 3600 7400 3600
Wire Wire Line
6450 3700 7400 3700
Wire Wire Line
6450 3800 7400 3800
Wire Wire Line
6450 3900 7400 3900
Wire Wire Line
6450 4000 7400 4000
Wire Wire Line
6450 4100 7400 4100
Wire Wire Line
5150 3500 3950 3500
Wire Wire Line
3950 3600 5150 3600
Wire Wire Line
5150 3700 3950 3700
Wire Wire Line
3950 3800 5150 3800
Wire Wire Line
3950 3900 5150 3900
Wire Wire Line
3950 4000 5150 4000
Wire Wire Line
3950 4100 5150 4100
Wire Wire Line
3950 4200 5150 4200
Wire Wire Line
5150 4300 4850 4300
Wire Wire Line
5150 4400 4950 4400
Wire Wire Line
5150 4500 5050 4500
Wire Wire Line
6450 4500 6650 4500
Wire Wire Line
6450 4400 6750 4400
Wire Wire Line
6450 4300 6850 4300
Wire Wire Line
6450 4200 6950 4200
Wire Wire Line
6450 2800 6550 2800
Wire Wire Line
6550 2800 6550 1600
Wire Wire Line
6550 1600 4000 1600
Wire Wire Line
5150 2900 4950 2900
Wire Wire Line
4950 2900 4950 1700
Wire Wire Line
4950 1700 4000 1700
Wire Wire Line
6450 3300 7400 3300
Wire Wire Line
5150 3300 4550 3300
Wire Wire Line
4550 3300 4550 2000
Wire Wire Line
6450 2700 6750 2700
Wire Wire Line
6750 2700 6750 1700
Wire Wire Line
6750 1700 7400 1700
Wire Wire Line
5150 2800 5050 2800
Wire Wire Line
5050 2800 5050 1800
Wire Wire Line
5050 1800 7400 1800
Wire Wire Line
6450 2900 6850 2900
Wire Wire Line
6850 2900 6850 1900
Wire Wire Line
6850 1900 7400 1900
Wire Wire Line
5150 3000 4850 3000
Wire Wire Line
4850 3000 4850 2000
Wire Wire Line
4850 2000 7400 2000
Wire Wire Line
6450 3000 6950 3000
Wire Wire Line
6950 3000 6950 2100
Wire Wire Line
6950 2100 7400 2100
Wire Wire Line
6450 3100 7050 3100
Wire Wire Line
7050 3100 7050 2200
Wire Wire Line
7050 2200 7400 2200
Wire Wire Line
5150 3200 4650 3200
Wire Wire Line
4650 3200 4650 2300
Wire Wire Line
4650 2300 7400 2300
Wire Wire Line
4550 2000 4000 2000
Wire Wire Line
6650 1900 4000 1900
Wire Wire Line
6650 3300 6650 1900
Wire Wire Line
5050 1500 5050 1250
Wire Wire Line
5150 1250 5150 2700
Wire Wire Line
5250 1250 5350 1250
Wire Wire Line
4000 1500 5050 1500
Wire Wire Line
5150 3100 4750 3100
Wire Wire Line
4750 3100 4750 2900
Wire Wire Line
4750 2900 4500 2900
Wire Wire Line
4500 2800 4750 2800
Wire Wire Line
4750 2800 4750 1800
Wire Wire Line
4750 1800 4000 1800
Connection ~ 6650 3300
Wire Wire Line
7050 1000 7050 900
Wire Wire Line
1100 7000 1100 7100
Wire Wire Line
800 7100 4750 7100
Wire Wire Line
4450 7100 4450 7000
Wire Wire Line
4150 7000 4150 7100
Connection ~ 4150 7100
Wire Wire Line
3850 7000 3850 7100
Wire Wire Line
3850 7100 3900 7100
Connection ~ 3900 7100
Wire Wire Line
3550 7000 3550 7100
Connection ~ 3550 7100
Wire Wire Line
3250 7000 3250 7100
Connection ~ 3250 7100
Wire Wire Line
2300 7000 2300 7100
Connection ~ 2300 7100
Wire Wire Line
2000 7000 2000 7100
Connection ~ 2000 7100
Wire Wire Line
1700 7000 1700 7100
Connection ~ 1700 7100
Wire Wire Line
1400 7000 1400 7100
Connection ~ 1400 7100
Wire Wire Line
1100 6800 1100 6700
Wire Wire Line
1100 6700 2600 6700
Wire Wire Line
2300 6700 2300 6800
Wire Wire Line
2000 6800 2000 6700
Connection ~ 2000 6700
Wire Wire Line
1700 6800 1700 6700
Connection ~ 1700 6700
Wire Wire Line
1400 6800 1400 6700
Connection ~ 1400 6700
Wire Wire Line
3250 6800 3250 6700
Wire Wire Line
3250 6700 4750 6700
Wire Wire Line
4450 6700 4450 6800
Wire Wire Line
4150 6800 4150 6700
Connection ~ 4150 6700
Wire Wire Line
3850 6800 3850 6700
Connection ~ 3850 6700
Wire Wire Line
3550 6800 3550 6700
Connection ~ 3550 6700
Wire Wire Line
2600 6700 2600 6800
Connection ~ 2300 6700
Wire Wire Line
2600 7000 2600 7100
Connection ~ 2600 7100
Wire Wire Line
4750 6700 4750 6800
Connection ~ 4450 6700
Wire Wire Line
4750 7100 4750 7000
Connection ~ 4450 7100
Connection ~ 1100 7100
Wire Wire Line
7400 1500 7050 1500
Wire Wire Line
7050 1500 7050 1200
Wire Wire Line
4350 5250 6950 5250
Wire Wire Line
6950 5250 6950 4200
Wire Wire Line
6850 4300 6850 5350
Wire Wire Line
6850 5350 4350 5350
Wire Wire Line
6750 4400 6750 5450
Wire Wire Line
6750 5450 4350 5450
Wire Wire Line
4350 5550 6650 5550
Wire Wire Line
6650 5550 6650 4500
Wire Wire Line
4850 4300 4850 5650
Wire Wire Line
4850 5650 4350 5650
Wire Wire Line
4350 5750 4950 5750
Wire Wire Line
4950 5750 4950 4400
Wire Wire Line
5050 4500 5050 5850
Wire Wire Line
5050 5850 4350 5850
Wire Wire Line
5150 4600 5150 5950
Wire Wire Line
5150 5950 4350 5950
$EndSCHEMATC

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@ -0,0 +1,267 @@
update=Sun 22 Sep 2019 15:18:06 BST
version=1
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=60
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.25
MinViaDiameter=0.6
MinViaDrill=0.3
MinMicroViaDiameter=0.3
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth2=0.25
TrackWidth3=0.4
TrackWidth4=0.6
TrackWidth5=0.8
TrackWidth6=1
TrackWidth7=1.5
TrackWidth8=2
ViaDiameter1=0.6
ViaDrill1=0.3
ViaDiameter2=0.6
ViaDrill2=0.3
ViaDiameter3=0.8
ViaDrill3=0.4
dPairWidth1=0.25
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.2
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.25
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=Power
Clearance=0.2
TrackWidth=0.4
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.25
dPairGap=0.25
dPairViaGap=0.25

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107
kicad/6809e/v1/74lvc.lib Normal file
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@ -0,0 +1,107 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 74LV1T125
#
DEF 74LV1T125 U 0 40 Y Y 1 F N
F0 "U" 0 250 60 H V C CNN
F1 "74LV1T125" 0 -250 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
IPC_SOT65P210X110-6N
$ENDFPLIST
DRAW
S -300 200 300 -200 0 1 0 N
X OE 1 -500 100 200 R 50 50 1 1 I
X A 2 -500 0 200 R 50 50 1 1 I
X GND 3 -500 -100 200 R 50 50 1 1 W
X Y 4 500 -100 200 L 50 50 1 1 T
X VCC 5 500 100 200 L 50 50 1 1 W
ENDDRAW
ENDDEF
#
# 74LVC1T45
#
DEF 74LVC1T45 U 0 40 Y Y 1 F N
F0 "U" 0 250 60 H V C CNN
F1 "74LVC1T45" 0 -250 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
IPC_SOT65P210X110-6N
$ENDFPLIST
DRAW
S -300 200 300 -200 0 1 0 N
X VCCA 1 -500 100 200 R 50 50 1 1 W
X GND 2 -500 0 200 R 50 50 1 1 W
X A 3 -500 -100 200 R 50 50 1 1 B
X B 4 500 -100 200 L 50 50 1 1 B
X DIR 5 500 0 200 L 50 50 1 1 I
X VCCB 6 500 100 200 L 50 50 1 1 W
ENDDRAW
ENDDEF
#
# 74LVC2T45
#
DEF 74LVC2T45 U 0 40 Y Y 1 F N
F0 "U" 0 400 60 H V C CNN
F1 "74LVC2T45" 0 300 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
IPC_SOP50P310X100-8N
$ENDFPLIST
DRAW
S -300 250 300 -250 0 1 0 N
X VCCA 1 -500 150 200 R 50 50 1 1 W
X A1 2 -500 50 200 R 50 50 1 1 B
X A2 3 -500 -50 200 R 50 50 1 1 B
X GND 4 -500 -150 200 R 50 50 1 1 W
X DIR 5 500 -150 200 L 50 50 1 1 I
X B2 6 500 -50 200 L 50 50 1 1 B
X B1 7 500 50 200 L 50 50 1 1 B
X VCCB 8 500 150 200 L 50 50 1 1 W
ENDDRAW
ENDDEF
#
# 74LVC8T245
#
DEF 74LVC8T245 U 0 40 Y Y 1 F N
F0 "U" -500 700 60 H V L CNN
F1 "74LVC8T245" -500 -700 60 H V L CNN
F2 "" 0 -100 60 H V C CNN
F3 "" 0 -100 60 H V C CNN
$FPLIST
IPC_SOP65P640X120-24N
$ENDFPLIST
DRAW
S -500 650 500 -650 0 1 0 N
X VCCA 1 -700 550 200 R 50 50 1 1 W
X A8 10 -700 -350 200 R 50 50 1 1 B
X GND 11 -700 -450 200 R 50 50 1 1 W
X GND 12 -700 -550 200 R 50 50 1 1 W
X GND 13 700 -550 200 L 50 50 1 1 W
X B8 14 700 -450 200 L 50 50 1 1 B
X B7 15 700 -350 200 L 50 50 1 1 B
X B6 16 700 -250 200 L 50 50 1 1 B
X B5 17 700 -150 200 L 50 50 1 1 B
X B4 18 700 -50 200 L 50 50 1 1 B
X B3 19 700 50 200 L 50 50 1 1 B
X DIR 2 -700 450 200 R 50 50 1 1 I
X B2 20 700 150 200 L 50 50 1 1 B
X B1 21 700 250 200 L 50 50 1 1 B
X OE# 22 700 350 200 L 50 50 1 1 I
X VCCB 23 700 450 200 L 50 50 1 1 W
X VCCB 24 700 550 200 L 50 50 1 1 W
X A1 3 -700 350 200 R 50 50 1 1 B
X A2 4 -700 250 200 R 50 50 1 1 B
X A3 5 -700 150 200 R 50 50 1 1 B
X A4 6 -700 50 200 R 50 50 1 1 B
X A5 7 -700 -50 200 R 50 50 1 1 B
X A6 8 -700 -150 200 R 50 50 1 1 B
X A7 9 -700 -250 200 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
#End Library

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@ -0,0 +1,59 @@
(module SOIC-24W_7.5x15.4mm_Pitch1.27mm (layer F.Cu) (tedit 58CC8F64)
(descr "24-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
(tags "SOIC 1.27")
(attr smd)
(fp_text reference REF** (at 0 -8.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value SOIC-24W_7.5x15.4mm_Pitch1.27mm (at 0 8.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -2.75 -7.7) (end 3.75 -7.7) (layer F.Fab) (width 0.15))
(fp_line (start 3.75 -7.7) (end 3.75 7.7) (layer F.Fab) (width 0.15))
(fp_line (start 3.75 7.7) (end -3.75 7.7) (layer F.Fab) (width 0.15))
(fp_line (start -3.75 7.7) (end -3.75 -6.7) (layer F.Fab) (width 0.15))
(fp_line (start -3.75 -6.7) (end -2.75 -7.7) (layer F.Fab) (width 0.15))
(fp_line (start -5.95 -8.05) (end -5.95 8.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.95 -8.05) (end 5.95 8.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.95 -8.05) (end 5.95 -8.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.95 8.05) (end 5.95 8.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.875 -7.875) (end -3.875 -7.6) (layer F.SilkS) (width 0.15))
(fp_line (start 3.875 -7.875) (end 3.875 -7.51) (layer F.SilkS) (width 0.15))
(fp_line (start 3.875 7.875) (end 3.875 7.51) (layer F.SilkS) (width 0.15))
(fp_line (start -3.875 7.875) (end -3.875 7.51) (layer F.SilkS) (width 0.15))
(fp_line (start -3.875 -7.875) (end 3.875 -7.875) (layer F.SilkS) (width 0.15))
(fp_line (start -3.875 7.875) (end 3.875 7.875) (layer F.SilkS) (width 0.15))
(fp_line (start -3.875 -7.6) (end -5.7 -7.6) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -4.7 -6.985) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -4.7 -5.715) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -4.7 -4.445) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -4.7 -3.175) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -4.7 -1.905) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -4.7 -0.635) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -4.7 0.635) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -4.7 1.905) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -4.7 3.175) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at -4.7 4.445) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at -4.7 5.715) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at -4.7 6.985) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at 4.7 6.985) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at 4.7 5.715) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at 4.7 4.445) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at 4.7 3.175) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at 4.7 1.905) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at 4.7 0.635) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at 4.7 -0.635) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at 4.7 -1.905) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 21 smd rect (at 4.7 -3.175) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at 4.7 -4.445) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at 4.7 -5.715) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at 4.7 -6.985) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(model Housings_SOIC.3dshapes/SOIC-24_7.5x15.4mm_Pitch1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

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@ -0,0 +1,67 @@
(module SW_Tactile_SKHH_Angled (layer F.Cu) (tedit 5D78E89C)
(descr "tactile switch 6mm ALPS SKHH right angle http://www.alps.com/prod/info/E/HTML/Tact/SnapIn/SKHH/SKHHLUA010.html")
(tags "tactile switch 6mm ALPS SKHH right angle")
(fp_text reference REF** (at 2.25 2.5) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value SW_Tactile_SKHH_Angled (at 2.25 5.09) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.62 3.82) (end -1.62 4.12) (layer F.SilkS) (width 0.12))
(fp_line (start -0.73 4.12) (end -0.73 3.77) (layer F.SilkS) (width 0.12))
(fp_line (start -0.73 4.12) (end -1.62 4.12) (layer F.SilkS) (width 0.12))
(fp_circle (center -1.25 2.5) (end -2.393 2.5) (layer B.Mask) (width 0.1))
(fp_circle (center 4.5 0) (end 3.611 0) (layer B.Mask) (width 0.1))
(fp_circle (center 0 0) (end -0.889 0) (layer B.Mask) (width 0.1))
(fp_circle (center 5.75 2.5) (end 4.607 2.5) (layer B.Mask) (width 0.1))
(fp_circle (center -1.25 2.5) (end -1.885 2.5) (layer F.Mask) (width 0.1))
(fp_circle (center 5.75 2.5) (end 5.115 2.5) (layer F.Mask) (width 0.1))
(fp_circle (center 4.5 0) (end 4.0555 0) (layer F.Mask) (width 0.1))
(fp_circle (center 0 0) (end -0.4445 0) (layer F.Mask) (width 0.1))
(fp_line (start -0.24 1.57) (end 4.74 1.57) (layer F.SilkS) (width 0.12))
(fp_line (start -1.62 -2.67) (end -1.62 1.18) (layer F.SilkS) (width 0.12))
(fp_line (start 6.12 -2.67) (end -1.62 -2.67) (layer F.SilkS) (width 0.12))
(fp_line (start 6.12 1.18) (end 6.12 -2.67) (layer F.SilkS) (width 0.12))
(fp_line (start 3.9 -2.55) (end 3.9 -5.85) (layer F.Fab) (width 0.1))
(fp_line (start 0.6 -2.55) (end 0.6 -5.85) (layer F.Fab) (width 0.1))
(fp_line (start 6 -2.55) (end -1.5 -2.55) (layer F.Fab) (width 0.1))
(fp_line (start -0.85 1.45) (end -0.85 4) (layer F.Fab) (width 0.1))
(fp_line (start 5.35 1.45) (end 5.35 4) (layer F.Fab) (width 0.1))
(fp_line (start 5.35 1.45) (end -0.85 1.45) (layer F.Fab) (width 0.1))
(fp_line (start -1.5 4) (end -1.5 -2.55) (layer F.Fab) (width 0.1))
(fp_line (start -0.85 4) (end -1.5 4) (layer F.Fab) (width 0.1))
(fp_line (start 6 4) (end 5.35 4) (layer F.Fab) (width 0.1))
(fp_line (start 6 -2.55) (end 6 4) (layer F.Fab) (width 0.1))
(fp_line (start 0.6 -5.85) (end 3.9 -5.85) (layer F.Fab) (width 0.1))
(fp_line (start 4.4 1.7) (end 4.4 4.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.1 4.25) (end 0.1 1.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.35 -2.8) (end -1.75 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.35 -6.1) (end 0.35 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.15 -6.1) (end 0.35 -6.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.15 -2.8) (end 4.15 -6.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.25 -2.8) (end 4.15 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.1 1.7) (end 4.4 1.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.25 1.1) (end 6.25 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.1 1.1) (end 6.25 1.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.1 4.25) (end 7.1 1.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.4 4.25) (end 7.1 4.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 1.15) (end -1.75 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.6 1.15) (end -1.75 1.15) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.6 4.25) (end -2.6 1.15) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.1 4.25) (end -2.6 4.25) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 2.25 -1.5) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 6.12 3.82) (end 6.12 4.12) (layer F.SilkS) (width 0.12))
(fp_line (start 6.12 4.12) (end 5.23 4.12) (layer F.SilkS) (width 0.12))
(fp_line (start 5.23 4.12) (end 5.23 3.77) (layer F.SilkS) (width 0.12))
(pad 1 thru_hole circle (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 4.5 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad "" thru_hole circle (at -1.25 2.5 180) (size 2.2 2.2) (drill 1.3) (layers *.Cu *.Mask))
(pad "" thru_hole circle (at 5.75 2.5 180) (size 2.2 2.2) (drill 1.3) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Button_Switch_THT.3dshapes/SW_Tactile_SKHH_Angled.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

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@ -0,0 +1,54 @@
(module dip40_smt_header (layer F.Cu) (tedit 5975E0E7)
(fp_text reference REF** (at -7.62 -2.54) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value dip40_smt_header (at -7.62 50.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_arc (start -7.62 0) (end -6.35 0) (angle 90) (layer F.SilkS) (width 0.15))
(fp_arc (start -7.62 0) (end -7.62 1.27) (angle 90) (layer F.SilkS) (width 0.15))
(fp_line (start -13.97 0) (end -13.97 48.26) (layer F.SilkS) (width 0.15))
(fp_line (start -13.97 48.26) (end -1.27 48.26) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 48.26) (end -1.27 0) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 0) (end -13.97 0) (layer F.SilkS) (width 0.15))
(pad 21 smd rect (at -15.24 48.26) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at 0 0) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at 0 2.54) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 0 5.08) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 0 7.62) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 0 10.16) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at 0 12.7) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at 0 15.24) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at 0 17.78) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at 0 20.32) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at 0 22.86) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at 0 25.4) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at 0 27.94) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at 0 30.48) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at 0 33.02) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at 0 35.56) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at 0 38.1) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at 0 40.64) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at 0 43.18) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at 0 45.72) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at 0 48.26) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at -15.24 45.72) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at -15.24 43.18) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at -15.24 40.64) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 25 smd rect (at -15.24 38.1) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 26 smd rect (at -15.24 35.56) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 27 smd rect (at -15.24 33.02) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 28 smd rect (at -15.24 30.48) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 29 smd rect (at -15.24 27.94) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 30 smd rect (at -15.24 25.4) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 31 smd rect (at -15.24 22.86) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 32 smd rect (at -15.24 20.32) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 33 smd rect (at -15.24 17.78) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 34 smd rect (at -15.24 15.24) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 35 smd rect (at -15.24 12.7) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 36 smd rect (at -15.24 10.16) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 37 smd rect (at -15.24 7.62) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 38 smd rect (at -15.24 5.08) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 39 smd rect (at -15.24 2.54) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 40 smd rect (at -15.24 0) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
)

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@ -0,0 +1,3 @@
(fp_lib_table
(lib (name footprints)(type KiCad)(uri "$(KIPRJMOD)/footprints.pretty")(options "")(descr ""))
)

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@ -0,0 +1,23 @@
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4-e60b266~84~ubuntu18.04.1*
G04 #@! TF.CreationDate,2019-10-24T14:21:48+01:00*
G04 #@! TF.ProjectId,6809e_adapter,36383039-655f-4616-9461-707465722e6b,rev?*
G04 #@! TF.SameCoordinates,PX9fdfbc0PY791ddc0*
G04 #@! TF.FileFunction,Profile,NP*
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 5.1.4-e60b266~84~ubuntu18.04.1) date 2019-10-24 14:21:48*
%MOMM*%
%LPD*%
G04 APERTURE LIST*
%ADD10C,0.150000*%
G04 APERTURE END LIST*
D10*
X49911000Y77216000D02*
X49911000Y2032000D01*
X49911000Y2032000D02*
X889000Y2032000D01*
X889000Y2032000D02*
X889000Y77216000D01*
X889000Y77216000D02*
X49911000Y77216000D01*
M02*

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M48
; DRILL file {KiCad 5.1.4-e60b266~84~ubuntu18.04.1} date Thu 24 Oct 2019 14:21:52 BST
; FORMAT={-:-/ absolute / inch / decimal}
; #@! TF.CreationDate,2019-10-24T14:21:52+01:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.4-e60b266~84~ubuntu18.04.1
FMAT,2
INCH
T1C0.0118
T2C0.0157
T3C0.0354
T4C0.0394
T5C0.0512
%
G90
G05
T1
X0.775Y2.275
X0.775Y2.2
X0.775Y2.125
X0.775Y2.025
X0.775Y1.925
X0.775Y1.0
X0.775Y0.9
X0.775Y0.8
X0.775Y0.7
X0.775Y0.6
X0.775Y0.5
X0.79Y1.6
X0.79Y1.55
X0.79Y1.5
X0.79Y1.45
X0.79Y1.4
X0.79Y1.35
X0.79Y1.3
X1.2Y1.625
X1.2Y1.45
X1.225Y2.4
X1.225Y2.275
X1.225Y2.2
X1.225Y2.125
X1.225Y2.0
X1.225Y1.9
X1.225Y1.79
X1.225Y1.74
X1.225Y1.65
X1.225Y1.595
X1.225Y1.55
X1.225Y1.5
X1.225Y1.07
X1.225Y1.015
X1.225Y0.88
X1.225Y0.8
X1.225Y0.7
X1.225Y0.6
X1.225Y0.5
X1.475Y1.775
X1.4751Y1.09
T2
X0.325Y1.98
X0.4Y1.7
X0.4Y1.04
X0.4Y0.975
X0.425Y2.425
X0.455Y0.37
X0.525Y1.825
X0.525Y1.775
X0.68Y1.85
X0.68Y1.75
X0.7Y2.25
X0.72Y1.85
X0.72Y1.75
X0.9Y0.15
X0.92Y2.425
X0.92Y2.375
X0.925Y1.7
X0.925Y1.65
X0.925Y0.975
X0.925Y0.925
X0.95Y1.275
X0.95Y0.55
X1.01Y1.97
X1.05Y2.28
X1.05Y1.525
X1.05Y0.55
X1.075Y1.9
X1.075Y1.2
X1.075Y1.15
X1.28Y1.05
X1.28Y0.95
X1.3Y2.25
X1.3Y0.4
X1.32Y1.05
X1.32Y0.95
X1.45Y0.3
X1.465Y0.925
X1.5Y1.02
X1.5Y0.98
X1.575Y1.875
X1.575Y1.15
X1.6Y1.8
X1.675Y2.35
X1.69Y0.98
X1.69Y0.9
X1.69Y0.725
X1.69Y0.65
X1.69Y0.475
X1.6902Y0.5498
X1.79Y0.39
T3
X0.925Y2.925
X1.025Y2.925
X0.725Y2.925
X0.825Y2.925
X0.525Y2.925
X0.625Y2.925
T4
X0.475Y0.25
X0.475Y0.15
X1.8Y2.4
X1.8Y2.3
X1.8Y2.2
X1.8Y2.1
X1.8Y2.0
X1.8Y1.9
X1.8Y1.8
X1.8Y1.7
X1.8Y1.6
X1.8Y1.5
X1.8Y1.4
X1.8Y1.3
X1.8Y1.2
X1.8Y1.1
X1.8Y1.0
X1.8Y0.9
X1.8Y0.8
X1.8Y0.7
X1.8Y0.6
X1.8Y0.5
X1.9Y2.4
X1.9Y2.3
X1.9Y2.2
X1.9Y2.1
X1.9Y2.0
X1.9Y1.9
X1.9Y1.8
X1.9Y1.7
X1.9Y1.6
X1.9Y1.5
X1.9Y1.4
X1.9Y1.3
X1.9Y1.2
X1.9Y1.1
X1.9Y1.0
X1.9Y0.9
X1.9Y0.8
X1.9Y0.7
X1.9Y0.6
X1.9Y0.5
X0.1Y2.4
X0.1Y2.3
X0.1Y2.2
X0.1Y2.1
X0.1Y2.0
X0.1Y1.9
X0.1Y1.8
X0.1Y1.7
X0.1Y1.6
X0.1Y1.5
X0.1Y1.4
X0.1Y1.3
X0.1Y1.2
X0.1Y1.1
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X0.1Y0.9
X0.1Y0.8
X0.1Y0.7
X0.1Y0.6
X0.1Y0.5
X0.2Y2.4
X0.2Y2.3
X0.2Y2.2
X0.2Y2.1
X0.2Y2.0
X0.2Y1.9
X0.2Y1.8
X0.2Y1.7
X0.2Y1.6
X0.2Y1.5
X0.2Y1.4
X0.2Y1.3
X0.2Y1.2
X0.2Y1.1
X0.2Y1.0
X0.2Y0.9
X0.2Y0.8
X0.2Y0.7
X0.2Y0.6
X0.2Y0.5
X1.55Y0.35
X1.55Y0.25
X1.55Y0.15
X1.6478Y2.925
X1.825Y2.925
X0.1675Y2.925
X0.3447Y2.925
T5
X1.5986Y2.8266
X1.8742Y2.8266
X0.1183Y2.8266
X0.3939Y2.8266
T0
M30

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#!/bin/bash
SRC=6809e_adapter
DST=6809e_adapter
mv $SRC-B_Cu.gbl $DST.gbl
mv $SRC-B_Mask.gbs $DST.gbs
mv $SRC-B_SilkS.gbo $DST.gbo
mv $SRC.drl $DST.xln
mv $SRC-Edge_Cuts.gm1 $DST.gko
mv $SRC-F_Cu.gtl $DST.gtl
mv $SRC-F_Mask.gts $DST.gts
mv $SRC-F_SilkS.gto $DST.gto
rm -f manufacturing.zip
zip -qr manufacturing.zip $DST.*

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(sym_lib_table
(lib (name 74lvc)(type Legacy)(uri ${KIPRJMOD}/74lvc.lib)(options "")(descr ""))
)

107
kicad/z80/v1/74lvc.lib Normal file
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EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# 74LV1T125
#
DEF 74LV1T125 U 0 40 Y Y 1 F N
F0 "U" 0 250 60 H V C CNN
F1 "74LV1T125" 0 -250 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
IPC_SOT65P210X110-6N
$ENDFPLIST
DRAW
S -300 200 300 -200 0 1 0 N
X OE 1 -500 100 200 R 50 50 1 1 I
X A 2 -500 0 200 R 50 50 1 1 I
X GND 3 -500 -100 200 R 50 50 1 1 W
X Y 4 500 -100 200 L 50 50 1 1 T
X VCC 5 500 100 200 L 50 50 1 1 W
ENDDRAW
ENDDEF
#
# 74LVC1T45
#
DEF 74LVC1T45 U 0 40 Y Y 1 F N
F0 "U" 0 250 60 H V C CNN
F1 "74LVC1T45" 0 -250 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
IPC_SOT65P210X110-6N
$ENDFPLIST
DRAW
S -300 200 300 -200 0 1 0 N
X VCCA 1 -500 100 200 R 50 50 1 1 W
X GND 2 -500 0 200 R 50 50 1 1 W
X A 3 -500 -100 200 R 50 50 1 1 B
X B 4 500 -100 200 L 50 50 1 1 B
X DIR 5 500 0 200 L 50 50 1 1 I
X VCCB 6 500 100 200 L 50 50 1 1 W
ENDDRAW
ENDDEF
#
# 74LVC2T45
#
DEF 74LVC2T45 U 0 40 Y Y 1 F N
F0 "U" 0 400 60 H V C CNN
F1 "74LVC2T45" 0 300 60 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
$FPLIST
IPC_SOP50P310X100-8N
$ENDFPLIST
DRAW
S -300 250 300 -250 0 1 0 N
X VCCA 1 -500 150 200 R 50 50 1 1 W
X A1 2 -500 50 200 R 50 50 1 1 B
X A2 3 -500 -50 200 R 50 50 1 1 B
X GND 4 -500 -150 200 R 50 50 1 1 W
X DIR 5 500 -150 200 L 50 50 1 1 I
X B2 6 500 -50 200 L 50 50 1 1 B
X B1 7 500 50 200 L 50 50 1 1 B
X VCCB 8 500 150 200 L 50 50 1 1 W
ENDDRAW
ENDDEF
#
# 74LVC8T245
#
DEF 74LVC8T245 U 0 40 Y Y 1 F N
F0 "U" -500 700 60 H V L CNN
F1 "74LVC8T245" -500 -700 60 H V L CNN
F2 "" 0 -100 60 H V C CNN
F3 "" 0 -100 60 H V C CNN
$FPLIST
IPC_SOP65P640X120-24N
$ENDFPLIST
DRAW
S -500 650 500 -650 0 1 0 N
X VCCA 1 -700 550 200 R 50 50 1 1 W
X A8 10 -700 -350 200 R 50 50 1 1 B
X GND 11 -700 -450 200 R 50 50 1 1 W
X GND 12 -700 -550 200 R 50 50 1 1 W
X GND 13 700 -550 200 L 50 50 1 1 W
X B8 14 700 -450 200 L 50 50 1 1 B
X B7 15 700 -350 200 L 50 50 1 1 B
X B6 16 700 -250 200 L 50 50 1 1 B
X B5 17 700 -150 200 L 50 50 1 1 B
X B4 18 700 -50 200 L 50 50 1 1 B
X B3 19 700 50 200 L 50 50 1 1 B
X DIR 2 -700 450 200 R 50 50 1 1 I
X B2 20 700 150 200 L 50 50 1 1 B
X B1 21 700 250 200 L 50 50 1 1 B
X OE# 22 700 350 200 L 50 50 1 1 I
X VCCB 23 700 450 200 L 50 50 1 1 W
X VCCB 24 700 550 200 L 50 50 1 1 W
X A1 3 -700 350 200 R 50 50 1 1 B
X A2 4 -700 250 200 R 50 50 1 1 B
X A3 5 -700 150 200 R 50 50 1 1 B
X A4 6 -700 50 200 R 50 50 1 1 B
X A5 7 -700 -50 200 R 50 50 1 1 B
X A6 8 -700 -150 200 R 50 50 1 1 B
X A7 9 -700 -250 200 R 50 50 1 1 B
ENDDRAW
ENDDEF
#
#End Library

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(module Pin_Header_Straight_1x02_Pitch2.00mm (layer F.Cu) (tedit 59650533)
(descr "Through hole straight pin header, 1x02, 2.00mm pitch, single row")
(tags "Through hole pin header THT 1x02 2.00mm single row")
(fp_text reference REF** (at 0 -2.06) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Pin_Header_Straight_1x02_Pitch2.00mm (at 0 4.06) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.5 -1) (end 1 -1) (layer F.Fab) (width 0.1))
(fp_line (start 1 -1) (end 1 3) (layer F.Fab) (width 0.1))
(fp_line (start 1 3) (end -1 3) (layer F.Fab) (width 0.1))
(fp_line (start -1 3) (end -1 -0.5) (layer F.Fab) (width 0.1))
(fp_line (start -1 -0.5) (end -0.5 -1) (layer F.Fab) (width 0.1))
(fp_line (start -1.06 3.06) (end 1.06 3.06) (layer F.SilkS) (width 0.12))
(fp_line (start -1.06 1) (end -1.06 3.06) (layer F.SilkS) (width 0.12))
(fp_line (start 1.06 1) (end 1.06 3.06) (layer F.SilkS) (width 0.12))
(fp_line (start -1.06 1) (end 1.06 1) (layer F.SilkS) (width 0.12))
(fp_line (start -1.06 0) (end -1.06 -1.06) (layer F.SilkS) (width 0.12))
(fp_line (start -1.06 -1.06) (end 0 -1.06) (layer F.SilkS) (width 0.12))
(fp_line (start -1.5 -1.5) (end -1.5 3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.5 3.5) (end 1.5 3.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.5 3.5) (end 1.5 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.5 -1.5) (end -1.5 -1.5) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 1 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask))
(pad 2 thru_hole oval (at 0 2) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask))
(model Pin_Headers.3dshapes/Pin_Header_Straight_1x02.wrl
(at (xyz 0 0 0))
(scale (xyz 0.7874 0.7874 0.7874))
(rotate (xyz 0 0 0))
)
)

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(module Pin_Header_Straight_1x03_Pitch2.00mm (layer F.Cu) (tedit 59650533)
(descr "Through hole straight pin header, 1x03, 2.00mm pitch, single row")
(tags "Through hole pin header THT 1x03 2.00mm single row")
(fp_text reference REF** (at 0 -2.06) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Pin_Header_Straight_1x03_Pitch2.00mm (at 0 6.06) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.5 -1) (end 1 -1) (layer F.Fab) (width 0.1))
(fp_line (start 1 -1) (end 1 5) (layer F.Fab) (width 0.1))
(fp_line (start 1 5) (end -1 5) (layer F.Fab) (width 0.1))
(fp_line (start -1 5) (end -1 -0.5) (layer F.Fab) (width 0.1))
(fp_line (start -1 -0.5) (end -0.5 -1) (layer F.Fab) (width 0.1))
(fp_line (start -1.06 5.06) (end 1.06 5.06) (layer F.SilkS) (width 0.12))
(fp_line (start -1.06 1) (end -1.06 5.06) (layer F.SilkS) (width 0.12))
(fp_line (start 1.06 1) (end 1.06 5.06) (layer F.SilkS) (width 0.12))
(fp_line (start -1.06 1) (end 1.06 1) (layer F.SilkS) (width 0.12))
(fp_line (start -1.06 0) (end -1.06 -1.06) (layer F.SilkS) (width 0.12))
(fp_line (start -1.06 -1.06) (end 0 -1.06) (layer F.SilkS) (width 0.12))
(fp_line (start -1.5 -1.5) (end -1.5 5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.5 5.5) (end 1.5 5.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.5 5.5) (end 1.5 -1.5) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.5 -1.5) (end -1.5 -1.5) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 0 2 90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask))
(pad 2 thru_hole oval (at 0 2) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask))
(pad 3 thru_hole oval (at 0 4) (size 1.35 1.35) (drill 0.8) (layers *.Cu *.Mask))
(model Pin_Headers.3dshapes/Pin_Header_Straight_1x03.wrl
(at (xyz 0 0 0))
(scale (xyz 0.7874 0.7874 0.7874))
(rotate (xyz 0 0 0))
)
)

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@ -0,0 +1,59 @@
(module SOIC-24W_7.5x15.4mm_Pitch1.27mm (layer F.Cu) (tedit 58CC8F64)
(descr "24-Lead Plastic Small Outline (SO) - Wide, 7.50 mm Body [SOIC] (see Microchip Packaging Specification 00000049BS.pdf)")
(tags "SOIC 1.27")
(attr smd)
(fp_text reference REF** (at 0 -8.8) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value SOIC-24W_7.5x15.4mm_Pitch1.27mm (at 0 8.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -2.75 -7.7) (end 3.75 -7.7) (layer F.Fab) (width 0.15))
(fp_line (start 3.75 -7.7) (end 3.75 7.7) (layer F.Fab) (width 0.15))
(fp_line (start 3.75 7.7) (end -3.75 7.7) (layer F.Fab) (width 0.15))
(fp_line (start -3.75 7.7) (end -3.75 -6.7) (layer F.Fab) (width 0.15))
(fp_line (start -3.75 -6.7) (end -2.75 -7.7) (layer F.Fab) (width 0.15))
(fp_line (start -5.95 -8.05) (end -5.95 8.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.95 -8.05) (end 5.95 8.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.95 -8.05) (end 5.95 -8.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.95 8.05) (end 5.95 8.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -3.875 -7.875) (end -3.875 -7.6) (layer F.SilkS) (width 0.15))
(fp_line (start 3.875 -7.875) (end 3.875 -7.51) (layer F.SilkS) (width 0.15))
(fp_line (start 3.875 7.875) (end 3.875 7.51) (layer F.SilkS) (width 0.15))
(fp_line (start -3.875 7.875) (end -3.875 7.51) (layer F.SilkS) (width 0.15))
(fp_line (start -3.875 -7.875) (end 3.875 -7.875) (layer F.SilkS) (width 0.15))
(fp_line (start -3.875 7.875) (end 3.875 7.875) (layer F.SilkS) (width 0.15))
(fp_line (start -3.875 -7.6) (end -5.7 -7.6) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -4.7 -6.985) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at -4.7 -5.715) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at -4.7 -4.445) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -4.7 -3.175) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -4.7 -1.905) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at -4.7 -0.635) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -4.7 0.635) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at -4.7 1.905) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at -4.7 3.175) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at -4.7 4.445) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at -4.7 5.715) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at -4.7 6.985) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at 4.7 6.985) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at 4.7 5.715) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at 4.7 4.445) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at 4.7 3.175) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at 4.7 1.905) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at 4.7 0.635) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at 4.7 -0.635) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at 4.7 -1.905) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 21 smd rect (at 4.7 -3.175) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at 4.7 -4.445) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at 4.7 -5.715) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at 4.7 -6.985) (size 2 0.6) (layers F.Cu F.Paste F.Mask))
(model Housings_SOIC.3dshapes/SOIC-24_7.5x15.4mm_Pitch1.27mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

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(module SW_Tactile_SKHH_Angled (layer F.Cu) (tedit 5D78E89C)
(descr "tactile switch 6mm ALPS SKHH right angle http://www.alps.com/prod/info/E/HTML/Tact/SnapIn/SKHH/SKHHLUA010.html")
(tags "tactile switch 6mm ALPS SKHH right angle")
(fp_text reference REF** (at 2.25 2.5) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value SW_Tactile_SKHH_Angled (at 2.25 5.09) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.62 3.82) (end -1.62 4.12) (layer F.SilkS) (width 0.12))
(fp_line (start -0.73 4.12) (end -0.73 3.77) (layer F.SilkS) (width 0.12))
(fp_line (start -0.73 4.12) (end -1.62 4.12) (layer F.SilkS) (width 0.12))
(fp_circle (center -1.25 2.5) (end -2.393 2.5) (layer B.Mask) (width 0.1))
(fp_circle (center 4.5 0) (end 3.611 0) (layer B.Mask) (width 0.1))
(fp_circle (center 0 0) (end -0.889 0) (layer B.Mask) (width 0.1))
(fp_circle (center 5.75 2.5) (end 4.607 2.5) (layer B.Mask) (width 0.1))
(fp_circle (center -1.25 2.5) (end -1.885 2.5) (layer F.Mask) (width 0.1))
(fp_circle (center 5.75 2.5) (end 5.115 2.5) (layer F.Mask) (width 0.1))
(fp_circle (center 4.5 0) (end 4.0555 0) (layer F.Mask) (width 0.1))
(fp_circle (center 0 0) (end -0.4445 0) (layer F.Mask) (width 0.1))
(fp_line (start -0.24 1.57) (end 4.74 1.57) (layer F.SilkS) (width 0.12))
(fp_line (start -1.62 -2.67) (end -1.62 1.18) (layer F.SilkS) (width 0.12))
(fp_line (start 6.12 -2.67) (end -1.62 -2.67) (layer F.SilkS) (width 0.12))
(fp_line (start 6.12 1.18) (end 6.12 -2.67) (layer F.SilkS) (width 0.12))
(fp_line (start 3.9 -2.55) (end 3.9 -5.85) (layer F.Fab) (width 0.1))
(fp_line (start 0.6 -2.55) (end 0.6 -5.85) (layer F.Fab) (width 0.1))
(fp_line (start 6 -2.55) (end -1.5 -2.55) (layer F.Fab) (width 0.1))
(fp_line (start -0.85 1.45) (end -0.85 4) (layer F.Fab) (width 0.1))
(fp_line (start 5.35 1.45) (end 5.35 4) (layer F.Fab) (width 0.1))
(fp_line (start 5.35 1.45) (end -0.85 1.45) (layer F.Fab) (width 0.1))
(fp_line (start -1.5 4) (end -1.5 -2.55) (layer F.Fab) (width 0.1))
(fp_line (start -0.85 4) (end -1.5 4) (layer F.Fab) (width 0.1))
(fp_line (start 6 4) (end 5.35 4) (layer F.Fab) (width 0.1))
(fp_line (start 6 -2.55) (end 6 4) (layer F.Fab) (width 0.1))
(fp_line (start 0.6 -5.85) (end 3.9 -5.85) (layer F.Fab) (width 0.1))
(fp_line (start 4.4 1.7) (end 4.4 4.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.1 4.25) (end 0.1 1.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.35 -2.8) (end -1.75 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.35 -6.1) (end 0.35 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.15 -6.1) (end 0.35 -6.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.15 -2.8) (end 4.15 -6.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.25 -2.8) (end 4.15 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.1 1.7) (end 4.4 1.7) (layer F.CrtYd) (width 0.05))
(fp_line (start 6.25 1.1) (end 6.25 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.1 1.1) (end 6.25 1.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 7.1 4.25) (end 7.1 1.1) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.4 4.25) (end 7.1 4.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 1.15) (end -1.75 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.6 1.15) (end -1.75 1.15) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.6 4.25) (end -2.6 1.15) (layer F.CrtYd) (width 0.05))
(fp_line (start 0.1 4.25) (end -2.6 4.25) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at 2.25 -1.5) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 6.12 3.82) (end 6.12 4.12) (layer F.SilkS) (width 0.12))
(fp_line (start 6.12 4.12) (end 5.23 4.12) (layer F.SilkS) (width 0.12))
(fp_line (start 5.23 4.12) (end 5.23 3.77) (layer F.SilkS) (width 0.12))
(pad 1 thru_hole circle (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 2 thru_hole circle (at 4.5 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad "" thru_hole circle (at -1.25 2.5 180) (size 2.2 2.2) (drill 1.3) (layers *.Cu *.Mask))
(pad "" thru_hole circle (at 5.75 2.5 180) (size 2.2 2.2) (drill 1.3) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Button_Switch_THT.3dshapes/SW_Tactile_SKHH_Angled.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)

View File

@ -0,0 +1,74 @@
(module Socket_Strip_Straight_2x20_Pitch2.54mm (layer F.Cu) (tedit 58CD544A)
(descr "Through hole straight socket strip, 2x20, 2.54mm pitch, double rows")
(tags "Through hole socket strip THT 2x20 2.54mm double row")
(fp_text reference REF** (at -1.27 -2.33) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value Socket_Strip_Straight_2x20_Pitch2.54mm (at -1.27 50.59) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -3.81 -1.27) (end -3.81 49.53) (layer F.Fab) (width 0.1))
(fp_line (start -3.81 49.53) (end 1.27 49.53) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 49.53) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 1.27 -1.27) (end -3.81 -1.27) (layer F.Fab) (width 0.1))
(fp_line (start 1.33 1.27) (end 1.33 49.59) (layer F.SilkS) (width 0.12))
(fp_line (start 1.33 49.59) (end -3.87 49.59) (layer F.SilkS) (width 0.12))
(fp_line (start -3.87 49.59) (end -3.87 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -3.87 -1.33) (end -1.27 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -1.27 -1.33) (end -1.27 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start -1.27 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
(fp_line (start 1.33 0) (end 1.33 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start 1.33 -1.33) (end 0.06 -1.33) (layer F.SilkS) (width 0.12))
(fp_line (start -4.35 -1.8) (end -4.35 50.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.35 50.05) (end 1.8 50.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 50.05) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 1.8 -1.8) (end -4.35 -1.8) (layer F.CrtYd) (width 0.05))
(fp_text user %R (at -1.27 -2.33) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 2 thru_hole oval (at -2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 3 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 4 thru_hole oval (at -2.54 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 6 thru_hole oval (at -2.54 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 7 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 8 thru_hole oval (at -2.54 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 9 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 10 thru_hole oval (at -2.54 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 11 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 12 thru_hole oval (at -2.54 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 13 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 14 thru_hole oval (at -2.54 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 15 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 16 thru_hole oval (at -2.54 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 17 thru_hole oval (at 0 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 18 thru_hole oval (at -2.54 20.32) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 19 thru_hole oval (at 0 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 20 thru_hole oval (at -2.54 22.86) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 21 thru_hole oval (at 0 25.4) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 22 thru_hole oval (at -2.54 25.4) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 23 thru_hole oval (at 0 27.94) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 24 thru_hole oval (at -2.54 27.94) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 25 thru_hole oval (at 0 30.48) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 26 thru_hole oval (at -2.54 30.48) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 27 thru_hole oval (at 0 33.02) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 28 thru_hole oval (at -2.54 33.02) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 29 thru_hole oval (at 0 35.56) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 30 thru_hole oval (at -2.54 35.56) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 31 thru_hole oval (at 0 38.1) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 32 thru_hole oval (at -2.54 38.1) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 33 thru_hole oval (at 0 40.64) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 34 thru_hole oval (at -2.54 40.64) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 35 thru_hole oval (at 0 43.18) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 36 thru_hole oval (at -2.54 43.18) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 37 thru_hole oval (at 0 45.72) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 38 thru_hole oval (at -2.54 45.72) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 39 thru_hole oval (at 0 48.26) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 40 thru_hole oval (at -2.54 48.26) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(model Socket_Strips.3dshapes/Socket_Strip_Straight_2x20.wrl
(at (xyz -0.05 -0.95 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 270))
)
)

View File

@ -0,0 +1,54 @@
(module dip40_smt_header (layer F.Cu) (tedit 5975E0E7)
(fp_text reference REF** (at -7.62 -2.54) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value dip40_smt_header (at -7.62 50.8) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_arc (start -7.62 0) (end -6.35 0) (angle 90) (layer F.SilkS) (width 0.15))
(fp_arc (start -7.62 0) (end -7.62 1.27) (angle 90) (layer F.SilkS) (width 0.15))
(fp_line (start -13.97 0) (end -13.97 48.26) (layer F.SilkS) (width 0.15))
(fp_line (start -13.97 48.26) (end -1.27 48.26) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 48.26) (end -1.27 0) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 0) (end -13.97 0) (layer F.SilkS) (width 0.15))
(pad 21 smd rect (at -15.24 48.26) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 1 smd rect (at 0 0) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at 0 2.54) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 0 5.08) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 0 7.62) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 0 10.16) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at 0 12.7) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at 0 15.24) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at 0 17.78) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at 0 20.32) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at 0 22.86) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at 0 25.4) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at 0 27.94) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at 0 30.48) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at 0 33.02) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at 0 35.56) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at 0 38.1) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at 0 40.64) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at 0 43.18) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at 0 45.72) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 20 smd rect (at 0 48.26) (size 3.5 1) (drill (offset 1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 22 smd rect (at -15.24 45.72) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 23 smd rect (at -15.24 43.18) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 24 smd rect (at -15.24 40.64) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 25 smd rect (at -15.24 38.1) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 26 smd rect (at -15.24 35.56) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 27 smd rect (at -15.24 33.02) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 28 smd rect (at -15.24 30.48) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 29 smd rect (at -15.24 27.94) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 30 smd rect (at -15.24 25.4) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 31 smd rect (at -15.24 22.86) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 32 smd rect (at -15.24 20.32) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 33 smd rect (at -15.24 17.78) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 34 smd rect (at -15.24 15.24) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 35 smd rect (at -15.24 12.7) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 36 smd rect (at -15.24 10.16) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 37 smd rect (at -15.24 7.62) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 38 smd rect (at -15.24 5.08) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 39 smd rect (at -15.24 2.54) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
(pad 40 smd rect (at -15.24 0) (size 3.5 1) (drill (offset -1.3 0)) (layers F.Cu F.Paste F.Mask))
)

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@ -0,0 +1,3 @@
(fp_lib_table
(lib (name footprints)(type KiCad)(uri "$(KIPRJMOD)/footprints.pretty")(options "")(descr ""))
)

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@ -0,0 +1,16 @@
#!/bin/bash
SRC=z80_adapter
DST=z80_adapter
mv $SRC-B_Cu.gbl $DST.gbl
mv $SRC-B_Mask.gbs $DST.gbs
mv $SRC-B_SilkS.gbo $DST.gbo
mv $SRC.drl $DST.xln
mv $SRC-Edge_Cuts.gm1 $DST.gko
mv $SRC-F_Cu.gtl $DST.gtl
mv $SRC-F_Mask.gts $DST.gts
mv $SRC-F_SilkS.gto $DST.gto
rm -f manufacturing.zip
zip -qr manufacturing.zip $DST.*

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@ -0,0 +1,23 @@
G04 #@! TF.GenerationSoftware,KiCad,Pcbnew,5.1.4-e60b266~84~ubuntu18.04.1*
G04 #@! TF.CreationDate,2019-09-22T15:50:52+01:00*
G04 #@! TF.ProjectId,z80_adapter,7a38305f-6164-4617-9074-65722e6b6963,rev?*
G04 #@! TF.SameCoordinates,PX9fdfbc0PY791ddc0*
G04 #@! TF.FileFunction,Profile,NP*
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW 5.1.4-e60b266~84~ubuntu18.04.1) date 2019-09-22 15:50:52*
%MOMM*%
%LPD*%
G04 APERTURE LIST*
%ADD10C,0.150000*%
G04 APERTURE END LIST*
D10*
X49911000Y77216000D02*
X49911000Y2032000D01*
X49911000Y2032000D02*
X889000Y2032000D01*
X889000Y2032000D02*
X889000Y77216000D01*
X889000Y77216000D02*
X49911000Y77216000D01*
M02*

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@ -0,0 +1,214 @@
M48
; DRILL file {KiCad 5.1.4-e60b266~84~ubuntu18.04.1} date Sun 22 Sep 2019 15:50:54 BST
; FORMAT={-:-/ absolute / inch / decimal}
; #@! TF.CreationDate,2019-09-22T15:50:54+01:00
; #@! TF.GenerationSoftware,Kicad,Pcbnew,5.1.4-e60b266~84~ubuntu18.04.1
FMAT,2
INCH
T1C0.0118
T2C0.0157
T3C0.0354
T4C0.0394
T5C0.0512
%
G90
G05
T1
X0.525Y1.05
X0.775Y2.325
X0.775Y2.275
X0.775Y2.175
X0.775Y2.075
X0.775Y1.975
X0.775Y1.5
X0.775Y1.45
X0.775Y1.4
X0.775Y1.35
X0.775Y1.3
X0.775Y1.075
X0.775Y0.975
X0.775Y0.9
X0.775Y0.8
X0.775Y0.575
X0.775Y0.525
X0.7759Y1.5509
X0.8Y1.6
X0.8Y1.25
X0.875Y1.025
X1.02Y0.425
X1.025Y0.475
X1.025Y0.175
X1.125Y0.175
X1.2Y1.825
X1.2Y1.775
X1.225Y2.35
X1.225Y2.3
X1.225Y2.25
X1.225Y2.2
X1.225Y2.15
X1.225Y2.1
X1.225Y2.0
X1.225Y1.925
X1.225Y1.8
X1.225Y1.2
X1.225Y1.15
X1.225Y0.875
X1.225Y0.825
X1.225Y0.775
X1.225Y0.725
X1.225Y0.675
X1.225Y0.625
T2
X0.39Y1.7
X0.4Y2.025
X0.4Y1.05
X0.425Y2.425
X0.425Y0.975
X0.45Y0.35
X0.52Y1.82
X0.52Y1.78
X0.68Y1.85
X0.68Y1.75
X0.7Y1.44
X0.7Y1.36
X0.72Y1.85
X0.72Y1.75
X0.775Y2.425
X0.775Y2.375
X0.825Y0.15
X0.925Y1.7
X0.925Y1.65
X0.925Y0.975
X0.925Y0.925
X0.95Y2.275
X0.95Y1.99
X0.95Y1.3
X0.95Y0.55
X1.05Y2.275
X1.05Y1.55
X1.05Y0.85
X1.075Y1.925
X1.075Y1.875
X1.075Y1.2
X1.075Y1.15
X1.075Y0.475
X1.075Y0.425
X1.075Y0.35
X1.075Y0.175
X1.28Y1.05
X1.28Y0.95
X1.32Y1.05
X1.32Y0.95
X1.5Y1.05
X1.54Y1.05
X1.575Y1.875
X1.575Y1.15
X1.575Y0.425
X1.585Y1.6
X1.6Y1.8
X1.6Y0.825
X1.675Y2.32
T3
X0.725Y2.925
X0.825Y2.925
X0.925Y2.925
X1.025Y2.925
X0.525Y2.925
X0.625Y2.925
T4
X0.1675Y2.925
X0.3447Y2.925
X1.6478Y2.925
X1.825Y2.925
X1.8Y2.4
X1.8Y2.3
X1.8Y2.2
X1.8Y2.1
X1.8Y2.0
X1.8Y1.9
X1.8Y1.8
X1.8Y1.7
X1.8Y1.6
X1.8Y1.5
X1.8Y1.4
X1.8Y1.3
X1.8Y1.2
X1.8Y1.1
X1.8Y1.0
X1.8Y0.9
X1.8Y0.8
X1.8Y0.7
X1.8Y0.6
X1.8Y0.5
X1.9Y2.4
X1.9Y2.3
X1.9Y2.2
X1.9Y2.1
X1.9Y2.0
X1.9Y1.9
X1.9Y1.8
X1.9Y1.7
X1.9Y1.6
X1.9Y1.5
X1.9Y1.4
X1.9Y1.3
X1.9Y1.2
X1.9Y1.1
X1.9Y1.0
X1.9Y0.9
X1.9Y0.8
X1.9Y0.7
X1.9Y0.6
X1.9Y0.5
X0.475Y0.25
X0.475Y0.15
X0.1Y2.4
X0.1Y2.3
X0.1Y2.2
X0.1Y2.1
X0.1Y2.0
X0.1Y1.9
X0.1Y1.8
X0.1Y1.7
X0.1Y1.6
X0.1Y1.5
X0.1Y1.4
X0.1Y1.3
X0.1Y1.2
X0.1Y1.1
X0.1Y1.0
X0.1Y0.9
X0.1Y0.8
X0.1Y0.7
X0.1Y0.6
X0.1Y0.5
X0.2Y2.4
X0.2Y2.3
X0.2Y2.2
X0.2Y2.1
X0.2Y2.0
X0.2Y1.9
X0.2Y1.8
X0.2Y1.7
X0.2Y1.6
X0.2Y1.5
X0.2Y1.4
X0.2Y1.3
X0.2Y1.2
X0.2Y1.1
X0.2Y1.0
X0.2Y0.9
X0.2Y0.8
X0.2Y0.7
X0.2Y0.6
X0.2Y0.5
X1.55Y0.35
X1.55Y0.25
X1.55Y0.15
T5
X0.1183Y2.8266
X0.3939Y2.8266
X1.5986Y2.8266
X1.8742Y2.8266
T0
M30

View File

@ -0,0 +1,3 @@
(sym_lib_table
(lib (name 74lvc)(type Legacy)(uri ${KIPRJMOD}/74lvc.lib)(options "")(descr ""))
)

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Binary file not shown.

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@ -0,0 +1,267 @@
update=Sun 22 Sep 2019 14:49:27 BST
version=1
last_client=kicad
[cvpcb]
version=1
NetIExt=net
[general]
version=1
[eeschema]
version=1
LibDir=
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=Pcbnew
SpiceAjustPassiveValues=0
LabSize=60
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.25
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth2=0.25
TrackWidth3=0.4
TrackWidth4=0.6
TrackWidth5=0.8
TrackWidth6=1
TrackWidth7=1.5
TrackWidth8=2
ViaDiameter1=0.6
ViaDrill1=0.3
ViaDiameter2=0.6
ViaDrill2=0.3
ViaDiameter3=0.8
ViaDrill3=0.4
dPairWidth1=0.25
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.15
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.2
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.25
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=Power
Clearance=0.2
TrackWidth=0.4
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.25
dPairGap=0.25
dPairViaGap=0.25

1361
kicad/z80/v1/z80_adapter.sch Normal file

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View File

@ -16,8 +16,9 @@ pushd target
make clean
make
cp --parents */*/*.bit ../${DIR}
cp --parents */*/*.mcs ../${DIR}
cp --parents */*/ice*.bit ../${DIR}
cp --parents */*/ice*.bin ../${DIR}
cp --parents */*/ice*.mcs ../${DIR}
popd
@ -27,5 +28,3 @@ popd
echo "Built release in: "${DIR}
unzip -l releases/${NAME}.zip

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@ -1,161 +0,0 @@
--------------------------------------------------------------------------------
-- Copyright (c) 2015 David Banks
--
--------------------------------------------------------------------------------
-- ____ ____
-- / /\/ /
-- /___/ \ /
-- \ \ \/
-- \ \
-- / / Filename : AtomBusMon.vhd
-- /___/ /\ Timestamp : 30/05/2015
-- \ \ / \
-- \___\/\___\
--
--Design Name: AtomBusMon
--Device: XC3S250E
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
entity AtomBusMon is
generic (
LEDsActiveHigh : boolean := false; -- default value correct for GODIL
SW1ActiveHigh : boolean := true; -- default value correct for GODIL
SW2ActiveHigh : boolean := false; -- default value correct for GODIL
ClkMult : integer := 10; -- default value correct for GODIL
ClkDiv : integer := 31; -- default value correct for GODIL
ClkPer : real := 20.345 -- default value correct for GODIL
);
port (
clock49 : in std_logic;
-- 6502 Signals
Addr : in std_logic_vector(15 downto 0);
Phi2 : in std_logic;
RNW : in std_logic;
Sync : in std_logic;
Rdy : out std_logic;
nRST : inout std_logic;
-- External trigger inputs
trig : in std_logic_vector(1 downto 0);
-- HD44780 LCD
--lcd_rs : out std_logic;
--lcd_rw : out std_logic;
--lcd_e : out std_logic;
--lcd_db : inout std_logic_vector(7 downto 4);
-- AVR Serial Port
avr_RxD : in std_logic;
avr_TxD : out std_logic;
-- GODIL Switches
sw1 : in std_logic;
sw2 : in std_logic;
-- GODIL LEDs
led3 : out std_logic;
led6 : out std_logic;
led8 : out std_logic;
-- OHO_DY1 connected to test connector
tmosi : out std_logic;
tdin : out std_logic;
tcclk : out std_logic
);
end AtomBusMon;
architecture behavioral of AtomBusMon is
signal clock_avr : std_logic;
signal Rdy_int : std_logic;
signal nRSTin : std_logic;
signal nRSTout : std_logic;
signal led3_n : std_logic; -- led to indicate ext trig 0 is active
signal led6_n : std_logic; -- led to indicate ext trig 1 is active
signal led8_n : std_logic; -- led to indicate CPU has hit a breakpoint (and is stopped)
signal sw_interrupt_n : std_logic; -- switch to pause the CPU
signal sw_reset_n : std_logic; -- switch to reset the CPU
begin
-- Generics allows polarity of switches/LEDs to be tweaked from the project file
sw_interrupt_n <= not sw1 when SW1ActiveHigh else sw1;
sw_reset_n <= not sw2 when SW2ActiveHigh else sw2;
led3 <= not led3_n when LEDsActiveHigh else led3_n;
led6 <= not led6_n when LEDsActiveHigh else led6_n;
led8 <= not led8_n when LEDsActiveHigh else led8_n;
inst_dcm0 : entity work.DCM0
generic map (
ClkMult => ClkMult,
ClkDiv => ClkDiv,
ClkPer => ClkPer
)
port map(
CLKIN_IN => clock49,
CLKFX_OUT => clock_avr
);
mon : entity work.BusMonCore
generic map (
avr_prog_mem_size => 1024 * 8
)
port map (
clock_avr => clock_avr,
busmon_clk => Phi2,
busmon_clken => '1',
cpu_clk => not Phi2,
cpu_clken => '1',
Addr => Addr,
Data => (others => '0'),
Rd_n => not RNW,
Wr_n => RNW,
RdIO_n => '1',
WrIO_n => '1',
Sync => Sync,
Rdy => Rdy_int,
nRSTin => nRSTin,
nRSTout => nRSTout,
CountCycle => Rdy_int,
Regs => (others => '0'),
RdMemOut => open,
WrMemOut => open,
RdIOOut => open,
WrIOOut => open,
AddrOut => open,
DataOut => open,
DataIn => (others => '0'),
Done => '1',
trig => trig,
lcd_rs => open,
lcd_rw => open,
lcd_e => open,
lcd_db => open,
avr_RxD => avr_RxD,
avr_TxD => avr_TxD,
sw1 => not sw_interrupt_n,
nsw2 => sw_reset_n,
led3 => led3_n,
led6 => led6_n,
led8 => led8_n,
tmosi => tmosi,
tdin => tdin,
tcclk => tcclk,
SS_Step => open,
SS_Single => open
);
Rdy <= Rdy_int;
-- Tristate buffer driving reset back out
nRSTin <= nRST;
nRST <= '0' when nRSTout <= '0' else 'Z';
end behavioral;

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@ -1,281 +0,0 @@
--------------------------------------------------------------------------------
-- Copyright (c) 2015 David Banks
--
--------------------------------------------------------------------------------
-- ____ ____
-- / /\/ /
-- /___/ \ /
-- \ \ \/
-- \ \
-- / / Filename : AtomBusMon.vhd
-- /___/ /\ Timestamp : 30/05/2015
-- \ \ / \
-- \___\/\___\
--
--Design Name: AtomBusMon
--Device: XC3S250E
--
-- This desing uses a DCM to generate a 16x internal clock from Phi0
-- Output signals can be placed in units of 1/16th Phi0
--
-- There are two constraints to be aware of:
--
-- 1. There is no defined phase relationship between Phi0 and Phi1/2
-- This is because Phi is typically too slow for a Spartan -6 DLL
-- If the host system also uses Phi0, then this may cause problems.
--
-- 2. Phi0 must be a single frequency clock, or the DCM will not lock
-- This will not, therefore, work in a Beeb because of the clock
-- stretching when IO devices are accessed.
--
-- The Atom satisfies both of these constraints.
--
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
use work.OhoPack.all ;
entity AtomFast6502 is
generic (
UseT65Core : boolean := true;
UseAlanDCore : boolean := false;
LEDsActiveHigh : boolean := false; -- default value correct for GODIL
SW1ActiveHigh : boolean := true; -- default value correct for GODIL
SW2ActiveHigh : boolean := false; -- default value correct for GODIL
ClkMult : integer := 10; -- default value correct for GODIL
ClkDiv : integer := 31; -- default value correct for GODIL
ClkPer : real := 20.345 -- default value correct for GODIL
);
port (
clock49 : in std_logic;
-- 6502 Signals
--Rdy : in std_logic;
Phi0 : in std_logic;
Phi1 : out std_logic;
Phi2 : out std_logic;
IRQ_n : in std_logic;
NMI_n : in std_logic;
Sync : out std_logic;
Addr : out std_logic_vector(15 downto 0);
R_W_n : out std_logic;
Data : inout std_logic_vector(7 downto 0);
SO_n : in std_logic;
Res_n : inout std_logic;
-- External trigger inputs
trig : in std_logic_vector(1 downto 0);
-- Serial Console
avr_RxD : in std_logic;
avr_TxD : out std_logic;
-- GODIL Switches
sw1 : in std_logic;
sw2 : in std_logic;
-- GODIL LEDs
led3 : out std_logic;
led6 : out std_logic;
led8 : out std_logic;
-- OHO_DY1 connected to test connector
tmosi : out std_logic;
tdin : out std_logic;
tcclk : out std_logic
);
end AtomFast6502;
architecture behavioral of AtomFast6502 is
-- Clocking
signal clock_avr : std_logic;
signal clock_16x : std_logic;
signal clk_div : std_logic_vector(3 downto 0);
signal cpu_clken : std_logic;
signal cpu_dataen : std_logic;
signal busmon_clken : std_logic;
-- DCM watchdog
signal dcm_reset : std_logic;
signal dcm_locked : std_logic;
signal dcm_count : std_logic_vector(9 downto 0);
signal edge0 : std_logic;
signal edge1 : std_logic;
signal Din : std_logic_vector(7 downto 0);
signal Addr0 : std_logic_vector(15 downto 0);
signal R_W_n0 : std_logic;
signal Sync0 : std_logic;
signal Dout0 : std_logic_vector(7 downto 0);
signal Addr1 : std_logic_vector(15 downto 0);
signal R_W_n1 : std_logic;
signal Sync1 : std_logic;
signal Dout1 : std_logic_vector(7 downto 0);
signal IRQ_n_sync : std_logic;
signal NMI_n_sync : std_logic;
signal Res_n_in : std_logic;
signal Res_n_out : std_logic;
signal led3_n : std_logic; -- led to indicate ext trig 0 is active
signal led6_n : std_logic; -- led to indicate ext trig 1 is active
signal led8_n : std_logic; -- led to indicate CPU has hit a breakpoint (and is stopped)
signal sw_interrupt_n : std_logic; -- switch to pause the CPU
signal sw_reset_n : std_logic; -- switch to reset the CPU
begin
-- Generics allows polarity of switches/LEDs to be tweaked from the project file
sw_interrupt_n <= not sw1 when SW1ActiveHigh else sw1;
sw_reset_n <= not sw2 when SW2ActiveHigh else sw2;
led3 <= not led3_n when LEDsActiveHigh else led3_n;
led6 <= not led6_n when LEDsActiveHigh else led6_n;
led8 <= not led8_n when LEDsActiveHigh else led8_n;
inst_dcm0 : entity work.DCM0
generic map (
ClkMult => ClkMult,
ClkDiv => ClkDiv,
ClkPer => ClkPer
)
port map(
CLKIN_IN => clock49,
CLKFX_OUT => clock_avr
);
inst_dcm2 : entity work.DCM2 port map(
CLKIN_IN => Phi0,
CLKFX_OUT => clock_16x,
LOCKED => dcm_locked,
RESET => dcm_reset
);
core : entity work.MOS6502CpuMonCore
generic map (
UseT65Core => UseT65Core,
UseAlanDCore => UseAlanDCore,
avr_prog_mem_size => 1024 * 8
)
port map (
clock_avr => clock_avr,
busmon_clk => clock_16x,
busmon_clken => busmon_clken,
cpu_clk => clock_16x,
cpu_clken => cpu_clken,
IRQ_n => IRQ_n_sync,
NMI_n => NMI_n_sync,
Sync => Sync0,
Addr => Addr0,
R_W_n => R_W_n0,
Din => Din,
Dout => Dout0,
SO_n => SO_n,
Res_n_in => Res_n_in,
Res_n_out => Res_n_out,
Rdy => '1',
trig => trig,
avr_RxD => avr_RxD,
avr_TxD => avr_TxD,
sw1 => not sw_interrupt_n,
nsw2 => sw_reset_n,
led3 => led3_n,
led6 => led6_n,
led8 => led8_n,
tmosi => tmosi,
tdin => tdin,
tcclk => tcclk
);
-- Tristate buffer driving reset back out
Res_n_in <= Res_n;
Res_n <= '0' when Res_n_out <= '0' else 'Z';
sync_gen : process(clock_16x)
begin
if rising_edge(clock_16x) then
NMI_n_sync <= NMI_n;
IRQ_n_sync <= IRQ_n;
end if;
end process;
Addr <= Addr1;
R_W_n <= R_W_n1;
Sync <= Sync1;
Data <= Dout1 when cpu_dataen = '1' and R_W_n1 = '0' else (others => 'Z');
-- Din is registered in cpu_clken in BusMonCore
Din <= Data;
process(clock_16x)
begin
if rising_edge(clock_16x) then
-- internal clock running 16x Phi0
clk_div <= clk_div + 1;
-- clock the CPU on cycle 0
if (clk_div = "1111") then
cpu_clken <= '1';
else
cpu_clken <= '0';
end if;
-- clock the Busmon out of phase with the cpu
-- exactly which cycle is not critical
if (clk_div = "0111") then
busmon_clken <= '1';
else
busmon_clken <= '0';
end if;
-- toggle Phi1/2 on cycles 0 and 8
if (clk_div = "0000") then
Phi1 <= '1';
Phi2 <= '0';
elsif (clk_div = "1000") then
Phi1 <= '0';
Phi2 <= '1';
end if;
-- Skew address by one cycle wrt Phi1/2
-- and hold for a complete cycle
if (clk_div = "0001") then
Addr1 <= Addr0;
R_W_n1 <= R_W_n0;
Sync1 <= Sync0;
end if;
-- Skew data release by one cycle wrt Phi1/2
if (clk_div = "1000") then
cpu_dataen <= '1';
Dout1 <= Dout0;
elsif (clk_div = "0001") then
cpu_dataen <= '0';
Dout1 <= (others => '1');
end if;
end if;
end process;
-- This reset the DCM if is seems to have stopped outputting a clock
process(clock49)
begin
if rising_edge(clock49) then
edge0 <= clk_div(0);
edge1 <= edge0;
-- Look for an edge on the clock
if (edge0 /= edge1) then
dcm_count <= (others => '0');
elsif (dcm_count = "1111001111") then
dcm_reset <= '0';
elsif (dcm_count = "1000000000") then
dcm_reset <= '1';
dcm_count <= dcm_count + 1;
else
dcm_count <= dcm_count + 1;
end if;
end if;
end process;
end behavioral;

View File

@ -2,15 +2,15 @@
-- Copyright (c) 2015 David Banks
--
--------------------------------------------------------------------------------
-- ____ ____
-- / /\/ /
-- /___/ \ /
-- \ \ \/
-- \ \
-- ____ ____
-- / /\/ /
-- /___/ \ /
-- \ \ \/
-- \ \
-- / / Filename : BusMonCore.vhd
-- /___/ /\ Timestamp : 30/05/2015
-- \ \ / \
-- \___\/\___\
-- \ \ / \
-- \___\/\___\
--
--Design Name: AtomBusMon
--Device: XC3S250E
@ -51,47 +51,48 @@ entity BusMonCore is
nRSTout : out std_logic;
CountCycle : in std_logic;
-- CPU Registers
-- unused in pure bus monitor mode
Regs : in std_logic_vector(255 downto 0);
-- CPI Specific data
PdcData : in std_logic_vector(7 downto 0) := x"00";
-- CPU Memory Read/Write
-- unused in pure bus monitor mode
RdMemOut : out std_logic;
WrMemOut : out std_logic;
RdIOOut : out std_logic;
WrIOOut : out std_logic;
ExecOut : out std_logic;
AddrOut : out std_logic_vector(15 downto 0);
DataOut : out std_logic_vector(7 downto 0);
DataIn : in std_logic_vector(7 downto 0);
Done : in std_logic;
-- External Interrupt Control
int_ctrl : out std_logic_vector(7 downto 0) := x"00";
-- Single Step interface
SS_Single : out std_logic;
SS_Step : out std_logic;
-- External trigger inputs
trig : in std_logic_vector(1 downto 0);
-- HD44780 LCD
lcd_rs : out std_logic;
lcd_rw : out std_logic;
lcd_e : out std_logic;
lcd_db : inout std_logic_vector(7 downto 4);
-- AVR Serial Port
avr_RxD : in std_logic;
avr_TxD : out std_logic;
-- GODIL Switches
sw1 : in std_logic;
nsw2 : in std_logic;
-- Switches
sw_reset_cpu : in std_logic;
sw_reset_avr : in std_logic;
-- GODIL LEDs
led3 : out std_logic;
led6 : out std_logic;
led8 : out std_logic;
-- LEDs
led_bkpt : out std_logic;
led_trig0 : out std_logic;
led_trig1 : out std_logic;
-- OHO_DY1 connected to test connector
tmosi : out std_logic;
@ -102,11 +103,16 @@ end BusMonCore;
architecture behavioral of BusMonCore is
signal cpu_reset_n : std_logic;
signal nrst_avr : std_logic;
signal lcd_rw_int : std_logic;
signal lcd_db_in : std_logic_vector(7 downto 4);
signal lcd_db_out : std_logic_vector(7 downto 4);
signal nrst1 : std_logic;
signal nrst2 : std_logic;
signal nrst3 : std_logic;
-- debounce time is 2^17 / 16MHz = 8.192ms
signal nrst_counter : unsigned(17 downto 0);
signal dy_counter : std_logic_vector(31 downto 0);
signal dy_data : y2d_type ;
@ -115,15 +121,21 @@ architecture behavioral of BusMonCore is
signal cmd_edge : std_logic;
signal cmd_edge1 : std_logic;
signal cmd_edge2 : std_logic;
signal cmd : std_logic_vector(4 downto 0);
signal cmd_ack : std_logic;
signal cmd_ack1 : std_logic;
signal cmd_ack2 : std_logic;
signal cmd : std_logic_vector(5 downto 0);
signal addr_sync : std_logic_vector(15 downto 0);
signal addr_inst : std_logic_vector(15 downto 0);
signal Addr1 : std_logic_vector(15 downto 0);
signal Data1 : std_logic_vector(7 downto 0);
signal ext_clk : std_logic;
signal timer0Count : std_logic_vector(23 downto 0);
signal timer1Count : std_logic_vector(23 downto 0);
signal cycleCount : std_logic_vector(23 downto 0);
signal cycleCount_inst : std_logic_vector(23 downto 0);
signal instrCount : std_logic_vector(23 downto 0);
signal single : std_logic;
signal reset : std_logic;
@ -131,19 +143,21 @@ architecture behavioral of BusMonCore is
signal bw_status : std_logic_vector(3 downto 0);
signal bw_status1 : std_logic_vector(3 downto 0);
signal auto_inc : std_logic;
signal brkpt_reg : std_logic_vector(num_comparators * reg_width - 1 downto 0);
signal brkpt_enable : std_logic;
signal brkpt_active : std_logic;
signal brkpt_active1 : std_logic;
signal watch_active : std_logic;
signal fifo_din : std_logic_vector(fifo_width - 1 downto 0);
signal fifo_dout : std_logic_vector(fifo_width - 1 downto 0);
signal fifo_empty : std_logic;
signal fifo_empty_n : std_logic;
signal fifo_full : std_logic;
signal fifo_not_empty1 : std_logic;
signal fifo_not_empty2 : std_logic;
signal fifo_rd : std_logic;
signal fifo_rd_en : std_logic;
signal fifo_wr : std_logic;
@ -154,17 +168,24 @@ architecture behavioral of BusMonCore is
signal memory_wr : std_logic;
signal io_rd : std_logic;
signal io_wr : std_logic;
signal exec : std_logic;
signal addr_dout_reg : std_logic_vector(23 downto 0);
signal din_reg : std_logic_vector(7 downto 0);
signal Rdy_int : std_logic;
signal unused_a3 : std_logic;
signal unused_b6 : std_logic;
signal unused_b7 : std_logic;
signal unused_d6 : std_logic;
signal unused_d7 : std_logic;
signal last_done : std_logic;
signal cmd_done : std_logic;
signal reset_counter : std_logic_vector(9 downto 0);
signal dropped_counter : std_logic_vector(3 downto 0);
signal timer_mode : std_logic_vector(1 downto 0);
begin
inst_oho_dy1 : entity work.Oho_Dy1 port map (
@ -181,7 +202,7 @@ begin
dy_ser => tcclk,
dy_rclk => tmosi
);
Inst_AVR8: entity work.AVR8
generic map(
CDATAMEMSIZE => avr_data_mem_size,
@ -191,23 +212,8 @@ begin
clk16M => clock_avr,
nrst => nrst_avr,
portain(0) => '0',
portain(1) => '0',
portain(2) => '0',
portain(3) => '0',
portain(4) => lcd_db_in(4),
portain(5) => lcd_db_in(5),
portain(6) => lcd_db_in(6),
portain(7) => lcd_db_in(7),
portaout(0) => lcd_rs,
portaout(1) => lcd_rw_int,
portaout(2) => lcd_e,
portaout(3) => unused_a3,
portaout(4) => lcd_db_out(4),
portaout(5) => lcd_db_out(5),
portaout(6) => lcd_db_out(6),
portaout(7) => lcd_db_out(7),
portain => PdcData,
portaout => open,
-- Command Port
portbin(0) => '0',
@ -223,10 +229,10 @@ begin
portbout(2) => cmd(2),
portbout(3) => cmd(3),
portbout(4) => cmd(4),
portbout(5) => cmd_edge,
portbout(6) => unused_b6,
portbout(7) => unused_b7,
portbout(5) => cmd(5),
portbout(6) => cmd_edge,
portbout(7) => open,
-- Status Port
portdin(0) => '0',
portdin(1) => '0',
@ -234,9 +240,9 @@ begin
portdin(3) => '0',
portdin(4) => '0',
portdin(5) => '0',
portdin(6) => sw1,
portdin(7) => fifo_empty_n,
portdin(6) => cmd_ack2,
portdin(7) => fifo_not_empty2,
portdout(0) => muxsel(0),
portdout(1) => muxsel(1),
portdout(2) => muxsel(2),
@ -249,15 +255,26 @@ begin
-- Mux Port
portein => mux,
porteout => open,
spi_mosio => open,
spi_scko => open,
spi_misoi => '0',
rxd => avr_RxD,
txd => avr_TxD
);
fifo_empty_n <= not fifo_empty;
);
-- Syncronise signals crossing busmon_clk / clock_avr boundary
process (clock_avr)
begin
if rising_edge(clock_avr) then
fifo_not_empty1 <= not fifo_empty;
fifo_not_empty2 <= fifo_not_empty1;
cmd_ack1 <= cmd_ack;
cmd_ack2 <= cmd_ack1;
end if;
end process;
WatchEvents_inst : entity work.WatchEvents port map(
clk => busmon_clk,
@ -266,51 +283,67 @@ begin
wr_en => fifo_wr_en,
rd_en => fifo_rd_en,
dout => fifo_dout,
full => open,
full => fifo_full,
empty => fifo_empty
);
fifo_wr_en <= fifo_wr and busmon_clken;
fifo_rd_en <= fifo_rd and busmon_clken;
-- The fifo is writen the cycle after the break point
-- Addr1 is the address bus delayed by 1 cycle
-- DataWr1 is the data being written delayed by 1 cycle
-- DataRd is the data being read, that is already one cycle late
-- bw_state1(1) is 1 for writes, and 0 for reads
fifo_din <= cycleCount_inst & "0000" & bw_status1 & Data1 & Addr1 & addr_inst;
fifo_din <= instrCount & dropped_counter & bw_status1 & Data1 & Addr1 & addr_inst;
lcd_rw <= lcd_rw_int;
lcd_db <= lcd_db_out when lcd_rw_int = '0' else (others => 'Z');
lcd_db_in <= lcd_db;
-- Implement a 4-bit saturating counter of the number of dropped events
process (busmon_clk)
begin
if rising_edge(busmon_clk) then
if busmon_clken = '1' then
if fifo_rst = '1' then
dropped_counter <= x"0";
elsif fifo_wr_en = '1' then
if fifo_full = '1' then
if dropped_counter /= x"F" then
dropped_counter <= dropped_counter + 1;
end if;
else
dropped_counter <= x"0";
end if;
end if;
end if;
end if;
end process;
led3 <= not trig(0); -- red
led6 <= not trig(1); -- red
led8 <= not brkpt_active; -- green
led_trig0 <= trig(0);
led_trig1 <= trig(1);
led_bkpt <= brkpt_active;
nrst_avr <= not sw_reset_avr;
nrst_avr <= nsw2;
-- OHO DY1 Display for Testing
dy_data(0) <= hex & "0000" & Addr(3 downto 0);
dy_data(1) <= hex & "0000" & Addr(7 downto 4);
dy_data(2) <= hex & "0000" & "00" & (not nsw2) & sw1;
dy_data(2) <= hex & "0000" & "00" & sw_reset_avr & sw_reset_cpu;
mux <= addr_inst(7 downto 0) when muxsel = 0 else
addr_inst(15 downto 8) when muxsel = 1 else
din_reg when muxsel = 2 else
cycleCount(23 downto 16) when muxsel = 3 else
cycleCount(7 downto 0) when muxsel = 4 else
cycleCount(15 downto 8) when muxsel = 5 else
instrCount(23 downto 16) when muxsel = 3 else
instrCount(7 downto 0) when muxsel = 4 else
instrCount(15 downto 8) when muxsel = 5 else
fifo_dout(7 downto 0) when muxsel = 6 else
fifo_dout(15 downto 8) when muxsel = 7 else
fifo_dout(23 downto 16) when muxsel = 8 else
fifo_dout(31 downto 24) when muxsel = 9 else
fifo_dout(31 downto 24) when muxsel = 9 else
fifo_dout(39 downto 32) when muxsel = 10 else
fifo_dout(47 downto 40) when muxsel = 11 else
fifo_dout(55 downto 48) when muxsel = 12 else
fifo_dout(63 downto 56) when muxsel = 13 else
fifo_dout(71 downto 64) when muxsel = 14 else
Regs(8 * to_integer(unsigned(muxsel(4 downto 0))) + 7 downto 8 * to_integer(unsigned(muxsel(4 downto 0))));
-- Combinatorial set of comparators to decode breakpoint/watch addresses
@ -324,7 +357,7 @@ begin
variable reg_mode_biw : std_logic;
variable reg_mode_bx : std_logic;
variable reg_mode_wmr : std_logic;
variable reg_mode_wmw : std_logic;
variable reg_mode_wmw : std_logic;
variable reg_mode_wir : std_logic;
variable reg_mode_wiw : std_logic;
variable reg_mode_wx : std_logic;
@ -402,40 +435,57 @@ begin
brkpt_active <= bactive;
bw_status <= status;
end process;
-- CPU Control Commands
-- 0000x Enable/Disable single strpping
-- 0001x Enable/Disable breakpoints / watches
-- 0010x Load breakpoint / watch register
-- 0011x Reset CPU
-- 01000 Singe Step CPU
-- 01001 Read FIFO
-- 01010 Reset FIFO
-- 01011 Unused
-- 0110x Load address/data register
-- 0111x Unused
-- 10000 Read Memory
-- 10001 Read Memory and Auto Inc Address
-- 10010 Write Memory
-- 10011 Write Memory and Auto Inc Address
-- 10000 Read Memory
-- 10001 Read Memory and Auto Inc Address
-- 10010 Write Memory
-- 10011 Write Memory and Auto Inc Address
-- 1x1xx Unused
-- 11xxx Unused
-- 00000x Enable/Disable single stepping
-- 00001x Enable/Disable breakpoints / watches
-- 00010x Load breakpoint / watch register
-- 00011x Reset CPU
-- 001000 Singe Step CPU
-- 001001 Read FIFO
-- 001010 Reset FIFO
-- 001011 Unused
-- 00110x Load address/data register
-- 00111x Unused
-- 010000 Read Memory
-- 010001 Read Memory and Auto Inc Address
-- 010010 Write Memory
-- 010011 Write Memory and Auto Inc Address
-- 010100 Read IO
-- 010101 Read IO and Auto Inc Address
-- 010110 Write IO
-- 010111 Write IO and Auto Inc Address
-- 011000 Execute 6502 instruction
-- 0111xx Unused
-- 011x1x Unused
-- 011xx1 Unused
-- 10xxxx Int Ctrl
-- 1100xx Timer Mode
-- 00 - count cpu cycles where clken = 1 and CountCycle = 1
-- 01 - count cpu cycles where clken = 1 (ignoring CountCycle)
-- 10 - free running timer, using busmon_clk as the source
-- 11 - free running timer, using trig0 as the source
-- Use trig0 to drive a free running counter for absolute timings
ext_clk <= trig(0);
timer1Process: process (ext_clk)
begin
if rising_edge(ext_clk) then
timer1Count <= timer1Count + 1;
end if;
end process;
cpuProcess: process (busmon_clk)
begin
if rising_edge(busmon_clk) then
timer0Count <= timer0Count + 1;
if busmon_clken = '1' then
-- Cycle counter, wraps every 16s at 1MHz
if (nRSTin = '0') then
-- Cycle counter
if (cpu_reset_n = '0') then
cycleCount <= (others => '0');
elsif (CountCycle = '1') then
elsif (CountCycle = '1' or timer_mode(0) = '1') then
cycleCount <= cycleCount + 1;
end if;
-- Command processing
cmd_edge1 <= cmd_edge;
cmd_edge2 <= cmd_edge1;
@ -446,83 +496,109 @@ begin
memory_wr <= '0';
io_rd <= '0';
io_wr <= '0';
exec <= '0';
SS_Step <= '0';
if (cmd_edge2 = '0' and cmd_edge1 = '1') then
if (cmd(4 downto 1) = "0000") then
if (cmd_edge2 /= cmd_edge1) then
if (cmd(5 downto 1) = "00000") then
single <= cmd(0);
end if;
if (cmd(4 downto 1) = "0001") then
if (cmd(5 downto 1) = "00001") then
brkpt_enable <= cmd(0);
end if;
if (cmd(4 downto 1) = "0010") then
if (cmd(5 downto 1) = "00010") then
brkpt_reg <= cmd(0) & brkpt_reg(brkpt_reg'length - 1 downto 1);
end if;
if (cmd(4 downto 1) = "0110") then
if (cmd(5 downto 1) = "00110") then
addr_dout_reg <= cmd(0) & addr_dout_reg(addr_dout_reg'length - 1 downto 1);
end if;
if (cmd(4 downto 1) = "0011") then
if (cmd(5 downto 1) = "00011") then
reset <= cmd(0);
end if;
if (cmd(4 downto 0) = "01001") then
if (cmd(5 downto 0) = "01001") then
fifo_rd <= '1';
end if;
end if;
if (cmd(4 downto 0) = "01010") then
if (cmd(5 downto 0) = "01010") then
fifo_rst <= '1';
end if;
if (cmd(4 downto 1) = "1000") then
if (cmd(5 downto 1) = "01000") then
memory_rd <= '1';
auto_inc <= cmd(0);
auto_inc <= cmd(0);
end if;
if (cmd(4 downto 1) = "1001") then
if (cmd(5 downto 1) = "01001") then
memory_wr <= '1';
auto_inc <= cmd(0);
auto_inc <= cmd(0);
end if;
if (cmd(4 downto 1) = "1010") then
if (cmd(5 downto 1) = "01010") then
io_rd <= '1';
auto_inc <= cmd(0);
auto_inc <= cmd(0);
end if;
if (cmd(4 downto 1) = "1011") then
if (cmd(5 downto 1) = "01011") then
io_wr <= '1';
auto_inc <= cmd(0);
auto_inc <= cmd(0);
end if;
if (cmd(5 downto 0) = "011000") then
exec <= '1';
end if;
if (cmd(5 downto 4) = "10") then
int_ctrl(to_integer(unsigned(cmd(3 downto 2))) * 2 + 1 downto to_integer(unsigned(cmd(3 downto 2))) * 2) <= cmd(1 downto 0);
end if;
if (cmd(5 downto 2) = "1100") then
timer_mode <= cmd(1 downto 0);
end if;
-- Acknowlege certain commands immediately
if cmd(5 downto 4) /= "01" then
cmd_ack <= not cmd_ack;
end if;
end if;
-- Auto increment the memory address reg the cycle after a rd/wr
if (auto_inc = '1' and Done = '1') then
addr_dout_reg(23 downto 8) <= addr_dout_reg(23 downto 8) + 1;
if cmd_done = '1' then
-- Acknowlege memory access commands when thet complete
cmd_ack <= not cmd_ack;
-- Auto increment the memory address reg the cycle after a rd/wr
if auto_inc = '1' then
addr_dout_reg(23 downto 8) <= addr_dout_reg(23 downto 8) + 1;
end if;
end if;
-- Single Stepping
if (brkpt_active = '1') then
single <= '1';
end if;
if ((single = '0') or (cmd_edge2 = '0' and cmd_edge1 = '1' and cmd = "01000")) then
if ((single = '0') or (cmd_edge2 /= cmd_edge1 and cmd = "001000")) then
Rdy_int <= (not brkpt_active);
SS_Step <= (not brkpt_active);
SS_Step <= (not brkpt_active);
else
Rdy_int <= (not Sync);
end if;
nRSTout <= not reset;
-- Latch instruction address for the whole cycle
if (Sync = '1') then
addr_inst <= Addr;
cycleCount_inst <= cycleCount;
if timer_mode = "10" then
instrCount <= timer0Count;
elsif timer_mode = "11" then
instrCount <= timer1Count;
else
instrCount <= cycleCount;
end if;
end if;
-- Breakpoints and Watches written to the FIFO
brkpt_active1 <= brkpt_active;
bw_status1 <= bw_status;
@ -544,10 +620,17 @@ begin
if (Done = '1') then
din_reg <= DataIn;
end if;
-- Delay the increnting of the address by one cycle
last_done <= Done;
if Done = '1' and last_done = '0' then
cmd_done <= '1';
else
cmd_done <= '0';
end if;
end if;
end if;
end process;
Rdy <= Rdy_int;
RdMemOut <= memory_rd;
WrMemOut <= memory_wr;
@ -556,7 +639,53 @@ begin
AddrOut <= addr_dout_reg(23 downto 8);
DataOut <= addr_dout_reg(7 downto 0);
SS_Single <= single;
ExecOut <= exec;
-- Reset Logic
-- Generate a short (~1ms @ 1MHz) power up reset pulse
--
-- This is in case FPGA configuration takes longer than
-- the length of the host system reset pulse.
--
-- Some 6502 cores (particularly the AlanD core) needs
-- reset to be asserted to start.
-- Debounce nRSTin using clock_avr as this is always 16MHz
-- nrst1 is the possibly glitchy input
-- nrst2 is the filtered output
process(clock_avr)
begin
if rising_edge(clock_avr) then
-- Syncronise nRSTin
nrst1 <= nRSTin and (not sw_reset_cpu);
-- De-glitch NRST
if nrst1 = '0' then
nrst_counter <= to_unsigned(0, nrst_counter'length);
nrst2 <= '0';
elsif nrst_counter(nrst_counter'high) = '0' then
nrst_counter <= nrst_counter + 1;
else
nrst2 <= '1';
end if;
end if;
end process;
process(cpu_clk)
begin
if rising_edge(cpu_clk) then
if cpu_clken = '1' then
if reset_counter(reset_counter'high) = '0' then
reset_counter <= reset_counter + 1;
end if;
nrst3 <= nrst2 and reset_counter(reset_counter'high) and (not reset);
cpu_reset_n <= nrst3;
end if;
end if;
end process;
nRSTout <= cpu_reset_n;
end behavioral;

View File

@ -1,59 +0,0 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library UNISIM;
use UNISIM.Vcomponents.all;
entity DCM2 is
port (CLKIN_IN : in std_logic;
RESET : in std_logic;
CLKFX_OUT : out std_logic;
LOCKED : out std_logic);
end DCM2;
architecture BEHAVIORAL of DCM2 is
signal CLKFX_BUF : std_logic;
signal CLKIN_IBUFG : std_logic;
signal GND_BIT : std_logic;
begin
GND_BIT <= '0';
CLKFX_BUFG_INST : BUFG
port map (I => CLKFX_BUF, O => CLKFX_OUT);
DCM_INST : DCM
generic map(CLK_FEEDBACK => "NONE",
CLKDV_DIVIDE => 4.0,
CLKFX_DIVIDE => 1,
CLKFX_MULTIPLY => 16,
CLKIN_DIVIDE_BY_2 => false,
CLKIN_PERIOD => 1000.00,
CLKOUT_PHASE_SHIFT => "NONE",
DESKEW_ADJUST => "SYSTEM_SYNCHRONOUS",
DFS_FREQUENCY_MODE => "LOW",
DLL_FREQUENCY_MODE => "LOW",
DUTY_CYCLE_CORRECTION => true,
FACTORY_JF => x"C080",
PHASE_SHIFT => 0,
STARTUP_WAIT => false)
port map (CLKFB => GND_BIT,
CLKIN => CLKIN_IN,
DSSEN => GND_BIT,
PSCLK => GND_BIT,
PSEN => GND_BIT,
PSINCDEC => GND_BIT,
RST => RESET,
CLKDV => open,
CLKFX => CLKFX_BUF,
CLKFX180 => open,
CLK0 => open,
CLK2X => open,
CLK2X180 => open,
CLK90 => open,
CLK180 => open,
CLK270 => open,
LOCKED => LOCKED,
PSDONE => open,
STATUS => open);
end BEHAVIORAL;

View File

@ -1,5 +1,5 @@
--------------------------------------------------------------------------------
-- Copyright (c) 2015 David Banks
-------------------------------------------------------------------------------
-- Copyright (c) 2019 David Banks
--
--------------------------------------------------------------------------------
-- ____ ____
@ -7,51 +7,43 @@
-- /___/ \ /
-- \ \ \/
-- \ \
-- / / Filename : MC6808ECpuMon.vhd
-- /___/ /\ Timestamp : 02/07/2015
-- / / Filename : MC6808CpuMon.vhd
-- /___/ /\ Timestamp : 24/10/2019
-- \ \ / \
-- \___\/\___\
--
--Design Name: MC6808ECpuMon
--Device: XC3S250E
--Design Name: MC6808CpuMon
--Device: multiple
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
use work.OhoPack.all ;
entity MC6809ECpuMon is
entity MC6809CpuMon is
generic (
UseCPU09Core : boolean := true;
LEDsActiveHigh : boolean := false; -- default value correct for GODIL
SW1ActiveHigh : boolean := true; -- default value correct for GODIL
SW2ActiveHigh : boolean := false; -- default value correct for GODIL
ClkMult : integer := 10; -- default value correct for GODIL
ClkDiv : integer := 31; -- default value correct for GODIL
ClkPer : real := 20.345 -- default value correct for GODIL
ClkMult : integer;
ClkDiv : integer;
ClkPer : real;
num_comparators : integer;
avr_prog_mem_size : integer
);
port (
clock49 : in std_logic;
-- Fast clock
clock : in std_logic;
-- A locally generated test clock
-- 1.8457 MHz in E Mode (6809E) so it can drive E (PIN34)
-- 7.3728 MHz in Normal Mode (6809) so it can drive EXTAL (PIN38)
clock_test : out std_logic;
-- 6809/6809E mode selection
-- Jumper is between pins B1 and D1
-- Jumper off is 6809 mode, where a 4x clock should be fed into EXTAL (PIN38)
-- Jumper on is 6909E mode, where a 1x clock should be fed into E (PIN34)
EMode_n : in std_logic;
-- Quadrature clocks
E : in std_logic;
Q : in std_logic;
--6809 Signals
PIN33 : inout std_logic;
PIN34 : inout std_logic;
PIN35 : inout std_logic;
PIN36 : inout std_logic;
PIN38 : inout std_logic;
PIN39 : in std_logic;
DMA_n_BREQ_n : in std_logic;
-- 6809E Sig
TSC : in std_logic;
LIC : out std_logic;
AVMA : out std_logic;
BUSY : out std_logic;
-- Signals common to both 6809 and 6809E
RES_n : in std_logic;
@ -73,14 +65,14 @@ entity MC6809ECpuMon is
avr_RxD : in std_logic;
avr_TxD : out std_logic;
-- GODIL Switches
sw1 : in std_logic;
sw2 : in std_logic;
-- Switches
sw_reset_cpu : in std_logic;
sw_reset_avr : in std_logic;
-- GODIL LEDs
led3 : out std_logic;
led6 : out std_logic;
led8 : out std_logic;
-- LEDs
led_bkpt : out std_logic;
led_trig0 : out std_logic;
led_trig1 : out std_logic;
-- OHO_DY1 connected to test connector
tmosi : out std_logic;
@ -92,25 +84,25 @@ entity MC6809ECpuMon is
test2 : out std_logic
);
end MC6809ECpuMon;
end MC6809CpuMon;
architecture behavioral of MC6809ECpuMon is
architecture behavioral of MC6809CpuMon is
signal clock_avr : std_logic;
signal cpu_clk : std_logic;
signal cpu_reset_n : std_logic;
signal busmon_clk : std_logic;
signal R_W_n_int : std_logic;
signal NMI_sync : std_logic;
signal IRQ_sync : std_logic;
signal FIRQ_sync : std_logic;
signal nRST_sync : std_logic;
signal HALT_sync : std_logic;
signal Addr_int : std_logic_vector(15 downto 0);
signal Din : std_logic_vector(7 downto 0);
signal Dout : std_logic_vector(7 downto 0);
signal Dbusmon : std_logic_vector(7 downto 0);
signal Sync_int : std_logic;
signal Rdy_int : std_logic;
signal hold : std_logic;
signal memory_rd : std_logic;
@ -132,44 +124,36 @@ architecture behavioral of MC6809ECpuMon is
signal SS_Single : std_logic;
signal SS_Step : std_logic;
signal CountCycle : std_logic;
signal int_ctrl : std_logic_vector(7 downto 0);
signal clk_count : std_logic_vector(1 downto 0);
signal quadrature : std_logic_vector(1 downto 0);
signal LIC : std_logic;
signal AVMA : std_logic;
signal XTAL : std_logic;
signal EXTAL : std_logic;
signal MRDY : std_logic;
signal TSC : std_logic;
signal BUSY : std_logic;
signal Q : std_logic;
signal E : std_logic;
signal DMA_n_BREQ_n : std_logic;
signal clock7_3728 : std_logic;
signal LIC_int : std_logic;
signal E_a : std_logic; -- E delayed by 0..20ns
signal E_b : std_logic; -- E delayed by 20..40ns
signal E_c : std_logic; -- E delayed by 40..60ns
signal E_d : std_logic; -- E delayed by 60..80ns
signal E_e : std_logic; -- E delayed by 80..100ns
signal E_f : std_logic; -- E delayed by 100..120ns
signal E_g : std_logic; -- E delayed by 120..140ns
signal E_h : std_logic; -- E delayed by 120..140ns
signal E_i : std_logic; -- E delayed by 120..140ns
signal data_wr : std_logic;
signal nRSTout : std_logic;
signal led3_n : std_logic; -- led to indicate ext trig 0 is active
signal led6_n : std_logic; -- led to indicate ext trig 1 is active
signal led8_n : std_logic; -- led to indicate CPU has hit a breakpoint (and is stopped)
signal sw_interrupt_n : std_logic; -- switch to pause the CPU
signal sw_reset_n : std_logic; -- switch to reset the CPU
signal FIRQ_n_masked : std_logic;
signal IRQ_n_masked : std_logic;
signal NMI_n_masked : std_logic;
signal RES_n_masked : std_logic;
begin
-- Generics allows polarity of switches/LEDs to be tweaked from the project file
sw_interrupt_n <= not sw1 when SW1ActiveHigh else sw1;
sw_reset_n <= not sw2 when SW2ActiveHigh else sw2;
led3 <= not led3_n when LEDsActiveHigh else led3_n;
led6 <= not led6_n when LEDsActiveHigh else led6_n;
led8 <= not led8_n when LEDsActiveHigh else led8_n;
LIC <= LIC_int;
-- The following outputs are not implemented
-- BUSY (6809E mode)
BUSY <= '0';
-- The following inputs are not implemented
-- DMA_n_BREQ_n (6809 mode)
inst_dcm0 : entity work.DCM0
generic map (
@ -178,14 +162,14 @@ begin
ClkPer => ClkPer
)
port map(
CLKIN_IN => clock49,
CLKIN_IN => clock,
CLKFX_OUT => clock_avr
);
mon : entity work.BusMonCore
generic map (
num_comparators => 8,
avr_prog_mem_size => 1024 * 9
num_comparators => num_comparators,
avr_prog_mem_size => avr_prog_mem_size
)
port map (
clock_avr => clock_avr,
@ -194,28 +178,24 @@ begin
cpu_clk => cpu_clk,
cpu_clken => '1',
Addr => Addr_int,
Data => Data,
Data => Dbusmon,
Rd_n => not R_W_n_int,
Wr_n => R_W_n_int,
RdIO_n => '1',
WrIO_n => '1',
Sync => Sync_int,
Rdy => Rdy_int,
nRSTin => nRST_sync,
nRSTout => nRSTout,
Rdy => open,
nRSTin => RES_n_masked,
nRSTout => cpu_reset_n,
CountCycle => CountCycle,
trig => trig,
lcd_rs => open,
lcd_rw => open,
lcd_e => open,
lcd_db => open,
avr_RxD => avr_RxD,
avr_TxD => avr_TxD,
sw1 => not sw_interrupt_n,
nsw2 => sw_reset_n,
led3 => led3_n,
led6 => led6_n,
led8 => led8_n,
sw_reset_cpu => sw_reset_cpu,
sw_reset_avr => sw_reset_avr,
led_bkpt => led_bkpt,
led_trig0 => led_trig0,
led_trig1 => led_trig1,
tmosi => tmosi,
tdin => tdin,
tcclk => tcclk,
@ -228,10 +208,29 @@ begin
DataOut => memory_dout,
DataIn => memory_din,
Done => memory_done,
int_ctrl => int_ctrl,
SS_Step => SS_Step,
SS_Single => SS_Single
);
-- The two int control bits work as follows
-- 00 -> IRQ_n (enabled)
-- 01 -> IRQ_n or SS_Single (enabled when free-running)
-- 10 -> 0 (forced)
-- 11 -> 1 (disabled)
FIRQ_n_masked <= int_ctrl(0) when int_ctrl(1) = '1' else
FIRQ_n or (int_ctrl(0) and SS_single);
IRQ_n_masked <= int_ctrl(2) when int_ctrl(3) = '1' else
IRQ_n or (int_ctrl(2) and SS_single);
NMI_n_masked <= int_ctrl(4) when int_ctrl(5) = '1' else
NMI_n or (int_ctrl(4) and SS_single);
RES_n_masked <= int_ctrl(6) when int_ctrl(7) = '1' else
RES_n or (int_ctrl(6) and SS_single);
-- The CPU is slightly pipelined and the register update of the last
-- instruction overlaps with the opcode fetch of the next instruction.
--
@ -258,38 +257,35 @@ begin
Regs1(111 downto 96) <= Regs(111 downto 96);
Regs1(255 downto 112) <= (others => '0');
GenCPU09Core: if UseCPU09Core generate
inst_cpu09: entity work.cpu09 port map (
clk => cpu_clk,
rst => not nRST_sync,
vma => AVMA,
lic_out => LIC,
ifetch => ifetch,
opfetch => open,
ba => BA,
bs => BS,
addr => Addr_int,
rw => R_W_n_int,
data_out => Dout,
data_in => Din,
irq => IRQ_sync,
firq => FIRQ_sync,
nmi => NMI_sync,
halt => HALT_sync,
hold => hold,
Regs => Regs
inst_cpu09: entity work.cpu09 port map (
clk => cpu_clk,
rst => not cpu_reset_n,
vma => AVMA,
lic_out => LIC_int,
ifetch => ifetch,
opfetch => open,
ba => BA,
bs => BS,
addr => Addr_int,
rw => R_W_n_int,
data_out => Dout,
data_in => Din,
irq => IRQ_sync,
firq => FIRQ_sync,
nmi => NMI_sync,
halt => HALT_sync,
hold => hold,
Regs => Regs
);
end generate;
-- Synchronize all external inputs, to avoid subtle bugs like missed interrupts
irq_gen : process(cpu_clk)
begin
if falling_edge(cpu_clk) then
NMI_sync <= not NMI_n;
IRQ_sync <= not IRQ_n;
FIRQ_sync <= not FIRQ_n;
nRST_sync <= RES_n and nRSTout;
NMI_sync <= not NMI_n_masked;
IRQ_sync <= not IRQ_n_masked;
FIRQ_sync <= not FIRQ_n_masked;
HALT_sync <= not HALT_n;
end if;
end process;
@ -301,7 +297,7 @@ begin
begin
if rising_edge(cpu_clk) then
if (hold = '0') then
ifetch1 <= ifetch and not LIC;
ifetch1 <= ifetch and not LIC_int;
end if;
end if;
end process;
@ -359,94 +355,52 @@ begin
Dout when TSC = '0' and data_wr = '1' and R_W_n_int = '0' and memory_rd1 = '0' else
(others => 'Z');
-- Version of data seen by the Bus Mon need to use Din rather than the
-- external bus value as by the rising edge of cpu_clk we will have stopped driving
-- the external bus. On the ALS version we get away way this, but on the GODIL
-- version, due to the pullups, we don't. So all write watch breakpoints see
-- the data bus as 0xFF.
Dbusmon <= Din when R_W_n_int = '1' else Dout;
memory_done <= memory_rd1 or memory_wr1;
-- The following outputs are not implemented
-- BUSY (6809E mode)
BUSY <= '0';
-- The following inputs are not implemented
-- DMA_n_BREQ_n (6809 mode)
-- Pins whose functions are dependent on "E" mode
PIN33 <= BUSY when EMode_n = '0' else 'Z';
DMA_n_BREQ_n <= '1' when EMode_n = '0' else PIN33;
PIN34 <= 'Z' when EMode_n = '0' else E;
E <= PIN34 when EMode_n = '0' else quadrature(1);
PIN35 <= 'Z' when EMode_n = '0' else Q;
Q <= PIN35 when EMode_n = '0' else quadrature(0);
PIN36 <= AVMA when EMode_n = '0' else 'Z';
MRDY <= '1' when EMode_n = '0' else PIN36;
PIN38 <= LIC when EMode_n = '0' else 'Z';
EXTAL <= '0' when EMode_n = '0' else PIN38;
TSC <= PIN39 when EMode_n = '0' else '0';
XTAL <= '0' when EMode_n = '0' else PIN39;
-- A locally generated test clock
-- 1.8457 MHz in E Mode (6809E) so it can drive E (PIN34)
-- 7.3728 MHz in Normal Mode (6809) so it can drive EXTAL (PIN38)
clock_test <= clk_count(1) when EMode_n = '0' else clock7_3728;
-- Delayed version of the E clock
-- E_e is delayed by 80-100ns which is a close approximation to the real 6809
-- E_c is delayed by 40-60ns which is used to provide extra data hold time on writes
e_gen : process(clock49)
-- Delayed/Deglitched version of the E clock
e_gen : process(clock)
begin
if rising_edge(clock49) then
E_a <= E;
E_b <= E_a;
E_c <= E_b;
E_d <= E_c;
E_e <= E_d;
end if;
end process;
-- Main clocks
cpu_clk <= not E_e;
busmon_clk <= E_e;
data_wr <= E_c;
-- Quadrature clock generator, unused in 6809E mode
quadrature_gen : process(EXTAL)
begin
if rising_edge(EXTAL) then
if (MRDY = '1') then
if (quadrature = "00") then
quadrature <= "01";
elsif (quadrature = "01") then
quadrature <= "11";
elsif (quadrature = "11") then
quadrature <= "10";
else
quadrature <= "00";
end if;
if rising_edge(clock) then
E_a <= E;
E_b <= E_a;
if E_b /= E_i then
E_c <= E_b;
end if;
E_d <= E_c;
E_e <= E_d;
E_f <= E_e;
E_g <= E_f;
E_h <= E_g;
E_i <= E_h;
end if;
end process;
-- Seperate piece of circuitry that emits a 7.3728MHz clock
-- Main clock timing control
-- E_c is delayed by 40-60ns
-- On a real 6809 the output delay (to ADDR, RNW, BA, BS) is 65ns (measured)
cpu_clk <= not E_c;
busmon_clk <= E_c;
inst_dcm1 : entity work.DCM1 port map(
CLKIN_IN => clock49,
CLK0_OUT => clock7_3728,
CLK0_OUT1 => open,
CLK2X_OUT => open
);
clk_gen : process(clock7_3728)
begin
if rising_edge(clock7_3728) then
clk_count <= clk_count + 1;
end if;
end process;
-- Data bus write timing control
--
-- When data_wr is 0 the bus is high impedence
--
-- This avoids bus conflicts when the direction of the data bus
-- changes from read to write (or visa versa).
--
-- Note: on the dragon this is not critical; setting to '1' seemed to work
data_wr <= Q or E;
-- Spare pins used for testing
test1 <= Sync_int;
test2 <= RDY_int;
test1 <= E_a;
test2 <= E_c;
end behavioral;

175
src/MC6809CpuMonALS.vhd Normal file
View File

@ -0,0 +1,175 @@
--------------------------------------------------------------------------------
-- Copyright (c) 2019 David Banks
--
--------------------------------------------------------------------------------
-- ____ ____
-- / /\/ /
-- /___/ \ /
-- \ \ \/
-- \ \
-- / / Filename : MC6809CpuMonALS.vhd
-- /___/ /\ Timestamp : 24/10/2019
-- \ \ / \
-- \___\/\___\
--
--Design Name: MC6809CpuMonALS
--Device: XC6SLX9
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
entity MC6809CpuMonALS is
generic (
num_comparators : integer := 8; -- default value correct for ALS
avr_prog_mem_size : integer := 1024 * 9 -- default value correct for ALS
);
port (
clock : in std_logic;
--6809 Signals
BUSY : out std_logic;
E : in std_logic;
Q : in std_logic;
AVMA : out std_logic;
LIC : out std_logic;
TSC : in std_logic;
-- Signals common to both 6809 and 6809E
RES_n : in std_logic;
NMI_n : in std_logic;
IRQ_n : in std_logic;
FIRQ_n : in std_logic;
HALT_n : in std_logic;
BS : out std_logic;
BA : out std_logic;
R_W_n : out std_logic_vector(1 downto 0);
Addr : out std_logic_vector(15 downto 0);
Data : inout std_logic_vector(7 downto 0);
-- Level Shifers Controls
OERW_n : out std_logic;
OEAL_n : out std_logic;
OEAH_n : out std_logic;
OED_n : out std_logic;
DIRD : out std_logic;
-- External trigger inputs
trig : in std_logic_vector(1 downto 0);
-- ID/mode inputs
mode : in std_logic;
id : in std_logic_vector(3 downto 0);
-- Serial Console
avr_RxD : in std_logic;
avr_TxD : out std_logic;
-- Switches
sw1 : in std_logic;
sw2 : in std_logic;
-- LEDs
led1 : out std_logic;
led2 : out std_logic;
led3 : out std_logic
);
end MC6809CpuMonALS;
architecture behavioral of MC6809CpuMonALS is
signal R_W_n_int : std_logic;
signal sw_reset_cpu : std_logic;
signal sw_reset_avr : std_logic;
signal led_bkpt : std_logic;
signal led_trig0 : std_logic;
signal led_trig1 : std_logic;
begin
sw_reset_cpu <= not sw1;
sw_reset_avr <= not sw2;
led1 <= led_bkpt;
led2 <= led_trig0;
led3 <= led_trig1;
wrapper : entity work.MC6809CpuMon
generic map (
ClkMult => 12,
ClkDiv => 25,
ClkPer => 20.000,
num_comparators => num_comparators,
avr_prog_mem_size => avr_prog_mem_size
)
port map (
-- Fast clock
clock => clock,
-- Quadrature clocks
E => E,
Q => Q,
--6809 Signals
DMA_n_BREQ_n => '1',
-- 6809E Signals
TSC => TSC,
LIC => LIC,
AVMA => AVMA,
BUSY => BUSY,
-- Signals common to both 6809 and 6809E
RES_n => RES_n,
NMI_n => NMI_n,
IRQ_n => IRQ_n,
FIRQ_n => FIRQ_n,
HALT_n => HALT_n,
BS => BS,
BA => BA,
R_W_n => R_W_n_int,
Addr => Addr,
Data => Data,
-- External trigger inputs
trig => trig,
-- Serial Console
avr_RxD => avr_RxD,
avr_TxD => avr_TxD,
-- Switches
sw_reset_cpu => sw_reset_cpu,
sw_reset_avr => sw_reset_avr,
-- LEDs
led_bkpt => led_bkpt,
led_trig0 => led_trig0,
led_trig1 => led_trig1,
-- OHO_DY1 connected to test connector
tmosi => open,
tdin => open,
tcclk => open,
-- Debugging signals
test1 => open,
test2 => open
);
-- 6809 Outputs
R_W_n <= R_W_n_int & R_W_n_int;
-- Level Shifter Controls
OERW_n <= TSC;
OEAH_n <= TSC;
OEAL_n <= TSC;
OED_n <= TSC or not (Q or E);
DIRD <= R_W_n_int;
end behavioral;

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