4 Commits

Author SHA1 Message Date
David Banks
85f52ef918 Update firmware version to 0.984
Change-Id: I2793e20f7b949c3d3c2a73d2a2a8604cc5d51391
2020-05-17 09:56:25 +01:00
David Banks
46d859f68c Firware: Fix a race condition when single stepping at slow (<= 1MHz) clock rates
Change-Id: Iee127a2765559d46f25c7fa1b2ad50cccba6cb9d
2020-05-17 09:55:56 +01:00
David Banks
ac69ecdc21 Update firmware version to 0.983
Change-Id: I4430c306cc289410bbd5b84aef936bce83d4e977
2020-01-29 14:47:33 +00:00
David Banks
9bbefbe631 65C02: BE pin now operates as DBE (works in BBC Master)
Change-Id: I85d3220158362bc304303f0a13280df38522f0a5
2020-01-29 14:47:20 +00:00
2 changed files with 24 additions and 5 deletions

View File

@@ -14,7 +14,7 @@
* VERSION and NAME are used in the start-up message
********************************************************/
#define VERSION "0.982"
#define VERSION "0.984"
#if defined(CPU_Z80)
#define NAME "ICE-Z80"
@@ -1053,6 +1053,9 @@ uint8_t logDetails() {
}
void logAddr() {
// Delay works around a race condition with slow CPUs
// (really the STEP and RESET commands should be synchronous)
Delay_us(100);
memAddr = hwRead16(OFFSET_IAL);
// Update the serial console
logCycleCount(OFFSET_CNTL, OFFSET_CNTH);

View File

@@ -104,6 +104,11 @@ architecture behavioral of MOS6502CpuMonALS is
signal led_trig0 : std_logic;
signal led_trig1 : std_logic;
signal PhiIn1 : std_logic;
signal PhiIn2 : std_logic;
signal PhiIn3 : std_logic;
signal PhiIn4 : std_logic;
begin
sw_reset_cpu <= not sw1;
@@ -171,11 +176,22 @@ begin
ML_n <= '1';
VP_n <= '1';
process(clock)
begin
if rising_edge(clock) then
PhiIn1 <= PhiIn;
PhiIn2 <= PhiIn1;
PhiIn3 <= PhiIn2;
PhiIn4 <= PhiIn3;
end if;
end process;
-- Level Shifter Controls
OERW_n <= not (BE);
OEAH_n <= not (BE);
OEAL_n <= not (BE);
OED_n <= not (BE and PhiIn); -- TODO: might need to use a slightly delayed version of Phi2 here
OERW_n <= '0'; -- not (BE);
OEAH_n <= '0'; -- not (BE);
OEAL_n <= '0'; -- not (BE);
OED_n <= not (BE and PhiIn and PhiIn4); -- TODO: might need to use a slightly delayed version of Phi2 here
DIRD <= R_W_n_int;
end behavioral;