mirror of
https://github.com/hoglet67/AtomBusMon.git
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43df61cd06
Change-Id: Ic21b05ae8ecb828d32e55fe36be501800cfb3407
322 lines
13 KiB
VHDL
322 lines
13 KiB
VHDL
--************************************************************************************************
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-- ALU(internal module) for AVR core
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-- Version 1.2
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-- Designed by Ruslan Lepetenok
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-- Modified 02.08.2003
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-- (CPC/SBC/SBCI Z-flag bug found)
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-- H-flag with NEG instruction found
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--************************************************************************************************
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library IEEE;
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use IEEE.std_logic_1164.all;
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entity alu_avr is port(
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alu_data_r_in : in std_logic_vector(7 downto 0);
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alu_data_d_in : in std_logic_vector(7 downto 0);
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alu_c_flag_in : in std_logic;
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alu_z_flag_in : in std_logic;
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-- OPERATION SIGNALS INPUTS
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idc_add :in std_logic;
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idc_adc :in std_logic;
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idc_adiw :in std_logic;
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idc_sub :in std_logic;
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idc_subi :in std_logic;
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idc_sbc :in std_logic;
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idc_sbci :in std_logic;
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idc_sbiw :in std_logic;
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adiw_st : in std_logic;
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sbiw_st : in std_logic;
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idc_and :in std_logic;
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idc_andi :in std_logic;
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idc_or :in std_logic;
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idc_ori :in std_logic;
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idc_eor :in std_logic;
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idc_com :in std_logic;
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idc_neg :in std_logic;
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idc_inc :in std_logic;
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idc_dec :in std_logic;
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idc_cp :in std_logic;
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idc_cpc :in std_logic;
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idc_cpi :in std_logic;
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idc_cpse :in std_logic;
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idc_lsr :in std_logic;
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idc_ror :in std_logic;
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idc_asr :in std_logic;
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idc_swap :in std_logic;
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-- DATA OUTPUT
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alu_data_out : out std_logic_vector(7 downto 0);
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-- FLAGS OUTPUT
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alu_c_flag_out : out std_logic;
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alu_z_flag_out : out std_logic;
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alu_n_flag_out : out std_logic;
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alu_v_flag_out : out std_logic;
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alu_s_flag_out : out std_logic;
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alu_h_flag_out : out std_logic
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);
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end alu_avr;
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architecture rtl of alu_avr is
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-- ####################################################
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-- INTERNAL SIGNALS
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-- ####################################################
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signal alu_data_out_int : std_logic_vector (7 downto 0);
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-- ALU FLAGS (INTERNAL)
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signal alu_z_flag_out_int : std_logic;
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signal alu_c_flag_in_int : std_logic; -- INTERNAL CARRY FLAG
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signal alu_n_flag_out_int : std_logic;
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signal alu_v_flag_out_int : std_logic;
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signal alu_c_flag_out_int : std_logic;
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-- ADDER SIGNALS --
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signal adder_nadd_sub : std_logic; -- 0 -> ADD ,1 -> SUB
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signal adder_v_flag_out : std_logic;
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signal adder_carry : std_logic_vector(8 downto 0);
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signal adder_d_in : std_logic_vector(8 downto 0);
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signal adder_r_in : std_logic_vector(8 downto 0);
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signal adder_out : std_logic_vector(8 downto 0);
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-- NEG OPERATOR SIGNALS
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signal neg_op_in : std_logic_vector(7 downto 0);
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signal neg_op_carry : std_logic_vector(8 downto 0);
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signal neg_op_out : std_logic_vector(8 downto 0);
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-- INC, DEC OPERATOR SIGNALS
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signal incdec_op_in : std_logic_vector (7 downto 0);
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signal incdec_op_carry : std_logic_vector(7 downto 0);
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signal incdec_op_out : std_logic_vector(7 downto 0);
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signal com_op_out : std_logic_vector(7 downto 0);
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signal and_op_out : std_logic_vector(7 downto 0);
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signal or_op_out : std_logic_vector(7 downto 0);
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signal eor_op_out : std_logic_vector(7 downto 0);
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-- SHIFT SIGNALS
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signal right_shift_out : std_logic_vector(7 downto 0);
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-- SWAP SIGNALS
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signal swap_out : std_logic_vector(7 downto 0);
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begin
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-- ########################################################################
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-- ############### ALU
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-- ########################################################################
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adder_nadd_sub <=(idc_sub or idc_subi or idc_sbc or idc_sbci or idc_sbiw or sbiw_st or
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idc_cp or idc_cpc or idc_cpi or idc_cpse ); -- '0' -> '+'; '1' -> '-'
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-- SREG C FLAG (ALU INPUT)
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alu_c_flag_in_int <= alu_c_flag_in and
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(idc_adc or adiw_st or idc_sbc or idc_sbci or sbiw_st or
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idc_cpc or
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idc_ror);
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-- SREG Z FLAG ()
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-- alu_z_flag_out <= (alu_z_flag_out_int and not(adiw_st or sbiw_st)) or
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-- ((alu_z_flag_in and alu_z_flag_out_int) and (adiw_st or sbiw_st));
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alu_z_flag_out <= (alu_z_flag_out_int and not(adiw_st or sbiw_st or idc_cpc or idc_sbc or idc_sbci)) or
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((alu_z_flag_in and alu_z_flag_out_int) and (adiw_st or sbiw_st))or
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(alu_z_flag_in and alu_z_flag_out_int and(idc_cpc or idc_sbc or idc_sbci)); -- Previous value (for CPC/SBC/SBCI instructions)
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-- SREG N FLAG
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alu_n_flag_out <= alu_n_flag_out_int;
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-- SREG V FLAG
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alu_v_flag_out <= alu_v_flag_out_int;
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alu_c_flag_out <= alu_c_flag_out_int;
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alu_data_out <= alu_data_out_int;
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-- #########################################################################################
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adder_d_in <= '0'&alu_data_d_in;
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adder_r_in <= '0'&alu_data_r_in;
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--########################## ADDEER ###################################
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adder_out(0) <= adder_d_in(0) xor adder_r_in(0) xor alu_c_flag_in_int;
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adder_carry(0) <= ((adder_d_in(0) xor adder_nadd_sub) and adder_r_in(0)) or
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(((adder_d_in(0) xor adder_nadd_sub) or adder_r_in(0)) and alu_c_flag_in_int);
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summator:for i in 1 to 8 generate
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adder_out(i) <= adder_d_in(i) xor adder_r_in(i) xor adder_carry(i-1);
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adder_carry(i) <= ((adder_d_in(i) xor adder_nadd_sub) and adder_r_in(i)) or
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(((adder_d_in(i) xor adder_nadd_sub) or adder_r_in(i)) and adder_carry(i-1));
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end generate;
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-- FLAGS FOR ADDER INSTRUCTIONS:
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-- CARRY FLAG (C) -> adder_out(8)
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-- HALF CARRY FLAG (H) -> adder_carry(3)
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-- TOW'S COMPLEMENT OVERFLOW (V) ->
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adder_v_flag_out <= (((adder_d_in(7) and adder_r_in(7) and not adder_out(7)) or
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(not adder_d_in(7) and not adder_r_in(7) and adder_out(7))) and not adder_nadd_sub) or -- ADD
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(((adder_d_in(7) and not adder_r_in(7) and not adder_out(7)) or
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(not adder_d_in(7) and adder_r_in(7) and adder_out(7))) and adder_nadd_sub);
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-- SUB
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--#####################################################################
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-- LOGICAL OPERATIONS FOR ONE OPERAND
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--########################## NEG OPERATION ####################
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neg_op_out(0) <= not alu_data_d_in(0) xor '1';
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neg_op_carry(0) <= not alu_data_d_in(0) and '1';
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neg_op:for i in 1 to 7 generate
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neg_op_out(i) <= not alu_data_d_in(i) xor neg_op_carry(i-1);
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neg_op_carry(i) <= not alu_data_d_in(i) and neg_op_carry(i-1);
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end generate;
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neg_op_out(8) <= neg_op_carry(7) xor '1';
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neg_op_carry(8) <= neg_op_carry(7); -- ??!!
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-- CARRY FLAGS FOR NEG INSTRUCTION:
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-- CARRY FLAG -> neg_op_out(8)
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-- HALF CARRY FLAG -> neg_op_carry(3)
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-- TOW's COMPLEMENT OVERFLOW FLAG -> alu_data_d_in(7) and neg_op_carry(6)
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--############################################################################
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--########################## INC, DEC OPERATIONS ####################
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incdec_op_out(0) <= alu_data_d_in(0) xor '1';
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incdec_op_carry(0) <= alu_data_d_in(0) xor idc_dec;
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inc_dec:for i in 1 to 7 generate
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incdec_op_out(i) <= alu_data_d_in(i) xor incdec_op_carry(i-1);
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incdec_op_carry(i) <= (alu_data_d_in(i) xor idc_dec) and incdec_op_carry(i-1);
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end generate;
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-- TOW's COMPLEMENT OVERFLOW FLAG -> (alu_data_d_in(7) xor idc_dec) and incdec_op_carry(6)
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--####################################################################
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--########################## COM OPERATION ###################################
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com_op_out <= not alu_data_d_in;
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-- FLAGS
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-- TOW's COMPLEMENT OVERFLOW FLAG (V) -> '0'
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-- CARRY FLAG (C) -> '1'
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--############################################################################
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-- LOGICAL OPERATIONS FOR TWO OPERANDS
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--########################## AND OPERATION ###################################
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and_op_out <= alu_data_d_in and alu_data_r_in;
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-- FLAGS
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-- TOW's COMPLEMENT OVERFLOW FLAG (V) -> '0'
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--############################################################################
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--########################## OR OPERATION ###################################
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or_op_out <= alu_data_d_in or alu_data_r_in;
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-- FLAGS
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-- TOW's COMPLEMENT OVERFLOW FLAG (V) -> '0'
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--############################################################################
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--########################## EOR OPERATION ###################################
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eor_op_out <= alu_data_d_in xor alu_data_r_in;
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-- FLAGS
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-- TOW's COMPLEMENT OVERFLOW FLAG (V) -> '0'
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--############################################################################
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-- SHIFT OPERATIONS
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-- ########################## RIGHT(LSR, ROR, ASR) #######################
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right_shift_out(7) <= (idc_ror and alu_c_flag_in_int) or (idc_asr and alu_data_d_in(7)); -- right_shift_out(7)
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shift_right:for i in 6 downto 0 generate
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right_shift_out(i) <= alu_data_d_in(i+1);
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end generate;
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-- FLAGS
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-- CARRY FLAG (C) -> alu_data_d_in(0)
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-- NEGATIVE FLAG (N) -> right_shift_out(7)
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-- TOW's COMPLEMENT OVERFLOW FLAG (V) -> N xor C (left_shift_out(7) xor alu_data_d_in(0))
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-- #######################################################################
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-- ################################## SWAP ###############################
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swap_h:for i in 7 downto 4 generate
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swap_out(i) <= alu_data_d_in(i-4);
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end generate;
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swap_l:for i in 3 downto 0 generate
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swap_out(i) <= alu_data_d_in(i+4);
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end generate;
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-- #######################################################################
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-- ALU OUTPUT MUX
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alu_data_out_mux:for i in alu_data_out_int'range generate
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alu_data_out_int(i) <= (adder_out(i) and (idc_add or idc_adc or (idc_adiw or adiw_st) or -- !!!!!
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idc_sub or idc_subi or idc_sbc or idc_sbci or
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(idc_sbiw or sbiw_st) or -- !!!!!
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idc_cpse or idc_cp or idc_cpc or idc_cpi)) or
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(neg_op_out(i) and idc_neg) or -- NEG
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(incdec_op_out(i) and (idc_inc or idc_dec)) or -- INC/DEC
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(com_op_out(i) and idc_com) or -- COM
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(and_op_out(i) and (idc_and or idc_andi)) or -- AND/ANDI
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(or_op_out(i) and (idc_or or idc_ori)) or -- OR/ORI
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(eor_op_out(i) and idc_eor) or -- EOR
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(right_shift_out(i) and (idc_lsr or idc_ror or idc_asr)) or -- LSR/ROR/ASR
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(swap_out(i) and idc_swap); -- SWAP
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end generate;
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--@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@ ALU FLAGS OUTPUTS @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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alu_h_flag_out <= (adder_carry(3) and -- ADDER INSTRUCTIONS
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(idc_add or idc_adc or idc_sub or idc_subi or idc_sbc or idc_sbci or idc_cp or idc_cpc or idc_cpi)) or
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(not neg_op_carry(3) and idc_neg); -- H-flag problem with NEG instruction fixing -- NEG
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alu_s_flag_out <= alu_n_flag_out_int xor alu_v_flag_out_int;
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alu_v_flag_out_int <= (adder_v_flag_out and
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(idc_add or idc_adc or idc_sub or idc_subi or idc_sbc or idc_sbci or adiw_st or sbiw_st or idc_cp or idc_cpi or idc_cpc)) or
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((alu_data_d_in(7) and neg_op_carry(6)) and idc_neg) or -- NEG
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(not alu_data_d_in(7) and incdec_op_carry(6) and idc_inc) or -- INC
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(alu_data_d_in(7) and incdec_op_carry(6) and idc_dec) or -- DEC
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((alu_n_flag_out_int xor alu_c_flag_out_int) and (idc_lsr or idc_ror or idc_asr)); -- LSR,ROR,ASR
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alu_n_flag_out_int <= alu_data_out_int(7);
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alu_z_flag_out_int <= '1' when alu_data_out_int="00000000" else '0';
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alu_c_flag_out_int <= (adder_out(8) and
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(idc_add or idc_adc or (idc_adiw or adiw_st) or idc_sub or idc_subi or idc_sbc or idc_sbci or (idc_sbiw or sbiw_st) or idc_cp or idc_cpc or idc_cpi)) or -- ADDER
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(not alu_z_flag_out_int and idc_neg) or -- NEG
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(alu_data_d_in(0) and (idc_lsr or idc_ror or idc_asr)) or idc_com;
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-- @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
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end rtl;
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