mirror of
https://github.com/hoglet67/AtomBusMon.git
synced 2024-12-23 07:29:39 +00:00
727a1c0f2a
Change-Id: Iad5cb406bd96a8020ccb65be5cd440bebec20481
1200 lines
24 KiB
C
1200 lines
24 KiB
C
#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <ctype.h>
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#include <avr/pgmspace.h>
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#include "AtomBusMon.h"
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#define VERSION "0.47"
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#if (CPU == Z80)
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#define NAME "ICE-T80"
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#else
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#define NAME "ICE-T65"
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#endif
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#ifdef CPUEMBEDDED
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#if (CPU == Z80)
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#define NUM_CMDS 28
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#else
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#define NUM_CMDS 22
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#endif
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#else
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#define NUM_CMDS 14
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#endif
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#define CRC_POLY 0x002d
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#define CTRL_PORT PORTB
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#define CTRL_DDR DDRB
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#define CTRL_DIN PINB
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#define MUXSEL_PORT PORTD
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#define STATUS_PORT PORTD
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#define STATUS_DDR DDRD
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#define STATUS_DIN PIND
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#define MUX_PORT PORTE
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#define MUX_DDR DDRE
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#define MUX_DIN PINE
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// Hardware registers
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#define OFFSET_IAL 0
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#define OFFSET_IAH 1
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#define OFFSET_DATA 2
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#define OFFSET_CNTH 3
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#define OFFSET_CNTL 4
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#define OFFSET_CNTM 5
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// Hardware fifo
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#define OFFSET_BW_IAL 6
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#define OFFSET_BW_IAH 7
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#define OFFSET_BW_BAL 8
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#define OFFSET_BW_BAH 9
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#define OFFSET_BW_BD 10
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#define OFFSET_BW_M 11
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#define OFFSET_BW_CNTL 12
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#define OFFSET_BW_CNTM 13
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#define OFFSET_BW_CNTH 14
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// Processor registers
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#if (CPU == Z80)
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#define OFFSET_REG_BC 32
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#define OFFSET_REG_DE 34
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#define OFFSET_REG_HL 36
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#define OFFSET_REG_IX 38
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#define OFFSET_REG_BCp 40
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#define OFFSET_REG_DEp 42
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#define OFFSET_REG_HLp 44
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#define OFFSET_REG_IY 46
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#define OFFSET_REG_AF 48
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#define OFFSET_REG_AFp 50
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#define OFFSET_REG_SP 52
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#define OFFSET_REG_PC 54
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#define OFFSET_REG_I 56
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#define OFFSET_REG_R 57
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#define OFFSET_REG_IFF 58
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#else
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#define OFFSET_REG_A 32
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#define OFFSET_REG_X 33
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#define OFFSET_REG_Y 34
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#define OFFSET_REG_P 35
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#define OFFSET_REG_SP 36
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#define OFFSET_REG_PC 38
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#endif
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// Commands:
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//
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// 0000x Enable/Disable single strpping
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// 0001x Enable/Disable breakpoints / watches
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// 0010x Load breakpoint / watch register
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// 0011x Reset CPU
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// 01000 Singe Step CPU
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// 01001 Read FIFO
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// 01010 Reset FIFO
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// 01011 Unused
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// 0110x Load address/data register
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// 0111x Unused
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// 10000 Read Memory
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// 10001 Read Memory and Auto Inc Address
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// 10010 Write Memory
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// 10011 Write Memory and Auto Inc Address
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// 10000 Read Memory
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// 10001 Read Memory and Auto Inc Address
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// 10010 Write Memory
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// 10011 Write Memory and Auto Inc Address
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// 1x1xx Unused
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// 11xxx Unused
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#define CMD_SINGLE_ENABLE 0x00
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#define CMD_BRKPT_ENABLE 0x02
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#define CMD_LOAD_BRKPT 0x04
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#define CMD_RESET 0x06
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#define CMD_STEP 0x08
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#define CMD_WATCH_READ 0x09
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#define CMD_FIFO_RST 0x0A
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#define CMD_LOAD_MEM 0x0C
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#define CMD_RD_MEM 0x10
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#define CMD_RD_MEM_INC 0x11
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#define CMD_WR_MEM 0x12
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#define CMD_WR_MEM_INC 0x13
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#define CMD_RD_IO 0x14
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#define CMD_RD_IO_INC 0x15
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#define CMD_WR_IO 0x16
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#define CMD_WR_IO_INC 0x17
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// Control bits
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#define CMD_MASK 0x3F
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#define CMD_EDGE 0x20
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#define MUXSEL_MASK 0x3F
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#define MUXSEL_BIT 0
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// Status bits
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#define INTERRUPTED_MASK 0x40
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#define BW_ACTIVE_MASK 0x80
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// Breakpoint Modes
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#define BRKPT_MEM_READ 0
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#define WATCH_MEM_READ 1
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#define BRKPT_MEM_WRITE 2
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#define WATCH_MEM_WRITE 3
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#define BRKPT_IO_READ 4
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#define WATCH_IO_READ 5
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#define BRKPT_IO_WRITE 6
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#define WATCH_IO_WRITE 7
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#define BRKPT_EXEC 8
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#define WATCH_EXEC 9
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#define UNDEFINED 10
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// Breakpoint Mode Strings, should match the modes
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char *modeStrings[10] = {
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"Mem Rd Brkpt",
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"Mem Rd Watch",
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"Mem Wr Brkpt",
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"Mem Wr Watch",
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"IO Rd Brkpt",
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"IO Rd Watch",
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"IO Wr Brkpt",
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"IO Wr Watch",
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"Ex Brkpt",
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"Ex Watch"
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};
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// Mask for all breakpoint types
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#define B_MASK ((1<<BRKPT_MEM_READ) | (1<<BRKPT_MEM_WRITE) | (1<<BRKPT_IO_READ) | (1<<BRKPT_IO_WRITE) | (1<<BRKPT_EXEC))
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// Mask for all watch types
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#define W_MASK ((1<<WATCH_MEM_READ) | (1<<WATCH_MEM_WRITE) | (1<<WATCH_IO_READ) | (1<<WATCH_IO_WRITE) | (1<<WATCH_EXEC))
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// Mask for all breakpoints/watches that read memory or IO
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#define BW_RD_MASK ((1<<BRKPT_MEM_READ) | (1<<WATCH_MEM_READ) | (1<<BRKPT_IO_READ) | (1<<WATCH_IO_READ))
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// Mask for all breakpoints/watches that write memory or IO
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#define BW_WR_MASK ((1<<BRKPT_MEM_WRITE) | (1<<WATCH_MEM_WRITE) | (1<<BRKPT_IO_WRITE) | (1<<WATCH_IO_WRITE))
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// Mask for all breakpoint or watches that read/write Memory or IO
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#define BW_RDWR_MASK (BW_RD_MASK | BW_WR_MASK)
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// Mask for all breakpoints that read/write Memory or IO
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#define B_RDWR_MASK (BW_RD_MASK & B_MASK)
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char *testNames[6] = {
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"Fixed",
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"Checkerboard",
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"Inverse checkerboard",
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"Address pattern",
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"Inverse address pattern",
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"Random"
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};
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#define NUM_TRIGGERS 16
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#define TRIGGER_ALWAYS 15
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char *triggerStrings[NUM_TRIGGERS] = {
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"Never",
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"~T0 and ~T1",
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"T0 and ~T1",
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"~T1",
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"~T0 and T1",
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"~T0",
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"T0 xor T1",
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"~T0 or ~T1",
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"T0 and T1",
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"T0 xnor T1",
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"T0",
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"T0 or ~T1",
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"T1",
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"~T0 or T1",
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"T0 or T1",
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"Always",
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};
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long trace;
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long instructions = 1;
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unsigned int memAddr = 0;
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#if (CPU == Z80)
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char statusString[8] = "SZIH-P-C";
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#else
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char statusString[8] = "NV-BDIZC";
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#endif
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int numbkpts = 0;
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#if (CPU == Z80)
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#define MAXBKPTS 4
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#else
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#define MAXBKPTS 8
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#endif
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unsigned int breakpoints[MAXBKPTS];
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unsigned int masks[MAXBKPTS];
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unsigned int modes[MAXBKPTS];
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int triggers[MAXBKPTS];
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char *cmdStrings[NUM_CMDS] = {
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"help",
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"continue",
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#ifdef CPUEMBEDDED
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"regs",
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"dis",
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"fill",
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"crc",
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"mem",
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"rdm",
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"wrm",
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#if (CPU == Z80)
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"io",
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"rdi",
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"wri",
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#else
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"test",
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#endif
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#endif
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"reset",
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"step",
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"trace",
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"blist",
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"breakx",
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"watchx",
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"breakrm",
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"watchrm",
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"breakwm",
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"watchwm",
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#if (CPU == Z80)
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"breakri",
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"watchri",
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"breakwi",
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"watchwi",
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#endif
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"clear",
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"trigger"
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};
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#define Delay_us(__us) \
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if((unsigned long) (F_CPU/1000000.0 * __us) != F_CPU/1000000.0 * __us)\
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__builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000000.0 * __us)+1);\
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else __builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000000.0 * __us))
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#define Delay_ms(__ms) \
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if((unsigned long) (F_CPU/1000.0 * __ms) != F_CPU/1000.0 * __ms)\
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__builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000.0 * __ms)+1);\
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else __builtin_avr_delay_cycles((unsigned long) ( F_CPU/1000.0 * __ms))
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char message[32];
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char command[32];
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void readCmd(char *cmd) {
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char c;
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int i = 0;
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log0(">> ");
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while (1) {
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c = Serial_RxByte0();
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if (c == 8) {
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// Handle backspace/delete
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if (i > 0) {
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i--;
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Serial_TxByte0(c);
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Serial_TxByte0(32);
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Serial_TxByte0(c);
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}
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} else if (c == 13) {
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// Handle return
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if (i == 0) {
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while (cmd[i]) {
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Serial_TxByte0(cmd[i++]);
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}
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} else {
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cmd[i] = 0;
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}
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Serial_TxByte0(10);
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Serial_TxByte0(13);
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return;
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} else {
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// Handle any other character
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Serial_TxByte0(c);
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cmd[i] = c;
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i++;
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}
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}
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}
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void hwCmd(unsigned int cmd, unsigned int param) {
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cmd |= param;
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CTRL_PORT &= ~CMD_MASK;
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CTRL_PORT |= cmd;
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Delay_us(2);
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CTRL_PORT |= CMD_EDGE;
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Delay_us(2);
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}
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unsigned int hwRead8(unsigned int offset) {
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MUXSEL_PORT &= ~MUXSEL_MASK;
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MUXSEL_PORT |= offset << MUXSEL_BIT;
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Delay_us(1);
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return MUX_DIN;
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}
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unsigned int hwRead16(unsigned int offset) {
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unsigned int lsb;
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MUXSEL_PORT &= ~MUXSEL_MASK;
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MUXSEL_PORT |= offset << MUXSEL_BIT;
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Delay_us(1);
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lsb = MUX_DIN;
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MUXSEL_PORT |= 1 << MUXSEL_BIT;
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Delay_us(1);
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return (MUX_DIN << 8) | lsb;
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}
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void setSingle(int single) {
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hwCmd(CMD_SINGLE_ENABLE, single ? 1 : 0);
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}
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void setTrace(long i) {
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trace = i;
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if (trace) {
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log0("Tracing every %ld instructions while single stepping\n", trace);
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} else {
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log0("Tracing disabled\n");
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}
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}
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void version() {
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#ifdef CPUEMBEDDED
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log0("%s In-Circuit Emulator version %s\n", NAME, VERSION);
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#else
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log0("%s Bus Monitor version %s\n", NAME, VERSION);
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#endif
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log0("Compiled at %s on %s\n",__TIME__,__DATE__);
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log0("%d watches/breakpoints implemented\n",MAXBKPTS);
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}
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#ifdef LCD
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void lcdAddr(unsigned int addr) {
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int i;
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int nibble;
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lcd_goto(6);
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// Avoid using sprintf, as it adds quite a lot of code
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for (i = 3; i >= 0; i--) {
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nibble = addr >> (i * 4);
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nibble &= 0x0F;
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nibble += '0';
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if (nibble > '9') {
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nibble += 'A' - '9' - 1;
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}
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lcd_putc(nibble);
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}
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}
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#endif
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int lookupBreakpoint(char *params) {
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int i;
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int n = -1;
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sscanf(params, "%x", &n);
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// First, look assume n is an address, and try to map to an index
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for (i = 0; i < numbkpts; i++) {
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if (breakpoints[i] == n) {
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n = i;
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break;
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}
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}
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if (n < numbkpts) {
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return n;
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}
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log0("Breakpoint/watch not set at %04X\n", n);
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return -1;
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}
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void logCycleCount(int offsetLow, int offsetHigh) {
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unsigned long count = (((unsigned long) hwRead8(offsetHigh)) << 16) | hwRead16(offsetLow);
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unsigned long countSecs = count / 1000000;
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unsigned long countMicros = count % 1000000;
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log0("%02ld.%06ld: ", countSecs, countMicros);
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}
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void logMode(unsigned int mode) {
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int i;
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int first = 1;
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for (i = 0; i < UNDEFINED; i++) {
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if (mode & 1) {
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if (!first) {
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log0(", ");
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}
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log0("%s", modeStrings[i]);
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first = 0;
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}
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mode >>= 1;
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}
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}
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void logTrigger(int trigger) {
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if (trigger >= 0 && trigger < NUM_TRIGGERS) {
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log0("trigger: %s", triggerStrings[trigger]);
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} else {
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log0("trigger: ILLEGAL");
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}
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}
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int logDetails() {
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unsigned int i_addr = hwRead16(OFFSET_BW_IAL);
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unsigned int b_addr = hwRead16(OFFSET_BW_BAL);
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unsigned int b_data = hwRead8(OFFSET_BW_BD);
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unsigned int mode = hwRead8(OFFSET_BW_M);
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unsigned int watch = mode & 1;
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// Convert from 4-bit compressed to 10 bit expanded mode representation
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mode = 1 << mode;
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// Update the serial console
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if (mode & W_MASK) {
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logCycleCount(OFFSET_BW_CNTL, OFFSET_BW_CNTH);
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}
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logMode(mode);
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log0(" hit at %04X", i_addr);
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if (mode & BW_RDWR_MASK) {
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if (mode & BW_WR_MASK) {
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log0(" writing");
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} else {
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log0(" reading");
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}
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log0(" %04X = %02X\n", b_addr, b_data);
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} else {
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log0("\n");
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}
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#ifdef CPUEMBEDDED
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if (mode & B_RDWR_MASK) {
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// It's only safe to do this for brkpts, as it makes memory accesses
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logCycleCount(OFFSET_BW_CNTL, OFFSET_BW_CNTH);
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disMem(i_addr);
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}
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#endif
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return watch;
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}
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#ifdef CPUEMBEDDED
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void loadData(unsigned int data) {
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int i;
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for (i = 0; i <= 7; i++) {
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hwCmd(CMD_LOAD_MEM, data & 1);
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data >>= 1;
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}
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}
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void loadAddr(unsigned int addr) {
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int i;
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for (i = 0; i <= 15; i++) {
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hwCmd(CMD_LOAD_MEM, addr & 1);
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addr >>= 1;
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}
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}
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unsigned int readMemByte() {
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hwCmd(CMD_RD_MEM, 0);
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Delay_us(10);
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return hwRead8(OFFSET_DATA);
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}
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unsigned int readMemByteInc() {
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hwCmd(CMD_RD_MEM_INC, 0);
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Delay_us(10);
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return hwRead8(OFFSET_DATA);
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}
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void writeMemByte() {
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hwCmd(CMD_WR_MEM, 0);
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}
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void writeMemByteInc() {
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hwCmd(CMD_WR_MEM_INC, 0);
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}
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unsigned int readIOByte() {
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hwCmd(CMD_RD_IO, 0);
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Delay_us(10);
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return hwRead8(OFFSET_DATA);
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}
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unsigned int readIOByteInc() {
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hwCmd(CMD_RD_IO_INC, 0);
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Delay_us(10);
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return hwRead8(OFFSET_DATA);
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}
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void writeIOByte() {
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hwCmd(CMD_WR_IO, 0);
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}
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void writeIOByteInc() {
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hwCmd(CMD_WR_IO_INC, 0);
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}
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unsigned int disMem(unsigned int addr) {
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loadAddr(addr);
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return disassemble(addr);
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}
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#endif
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void logAddr() {
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memAddr = hwRead16(OFFSET_IAL);
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// Update the LCD display
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#ifdef LCD
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lcdAddr(memAddr);
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#endif
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// Update the serial console
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logCycleCount(OFFSET_CNTL, OFFSET_CNTH);
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#ifdef CPUEMBEDDED
|
|
//log0("%04X\n", i_addr);
|
|
disMem(memAddr);
|
|
#else
|
|
log0("%04X\n", memAddr);
|
|
#endif
|
|
return;
|
|
}
|
|
|
|
/*******************************************
|
|
* Commands
|
|
*******************************************/
|
|
|
|
void doCmdHelp(char *params) {
|
|
int i;
|
|
version();
|
|
log0("Commands:\n");
|
|
for (i = 0; i < NUM_CMDS; i++) {
|
|
log0(" %s\n", cmdStrings[i]);
|
|
}
|
|
}
|
|
|
|
|
|
void doCmdStep(char *params) {
|
|
long i;
|
|
long j;
|
|
|
|
sscanf(params, "%ld", &instructions);
|
|
if (instructions <= 0) {
|
|
log0("Number of instuctions must be positive\n");
|
|
return;
|
|
}
|
|
|
|
log0("Stepping %ld instructions\n", instructions);
|
|
|
|
j = trace;
|
|
for (i = 1; i <= instructions; i++) {
|
|
// Step the CPU
|
|
hwCmd(CMD_STEP, 0);
|
|
if (i == instructions || (trace && (--j == 0))) {
|
|
Delay_us(10);
|
|
logAddr();
|
|
j = trace;
|
|
}
|
|
}
|
|
}
|
|
|
|
void doCmdReset(char *params) {
|
|
log0("Resetting CPU\n");
|
|
hwCmd(CMD_RESET, 1);
|
|
Delay_us(50);
|
|
hwCmd(CMD_STEP, 0);
|
|
Delay_us(50);
|
|
hwCmd(CMD_RESET, 0);
|
|
}
|
|
|
|
#ifdef CPUEMBEDDED
|
|
void doCmdRegs(char *params) {
|
|
int i;
|
|
#if (CPU == Z80)
|
|
unsigned int p = hwRead16(OFFSET_REG_AF);
|
|
log0("Z80 Registers:\n");
|
|
log0(" AF=%04X BC=%04X DE=%04X HL=%04X\n",
|
|
p,
|
|
hwRead16(OFFSET_REG_BC),
|
|
hwRead16(OFFSET_REG_DE),
|
|
hwRead16(OFFSET_REG_HL));
|
|
log0(" 'AF=%04X 'BC=%04X 'DE=%04X 'HL=%04X\n",
|
|
hwRead16(OFFSET_REG_AFp),
|
|
hwRead16(OFFSET_REG_BCp),
|
|
hwRead16(OFFSET_REG_DEp),
|
|
hwRead16(OFFSET_REG_HLp));
|
|
log0(" IX=%04X IY=%04X PC=%04X SP=%04X I=%02X R=%02X IFF=%02X\n",
|
|
hwRead16(OFFSET_REG_IX),
|
|
hwRead16(OFFSET_REG_IY),
|
|
hwRead16(OFFSET_REG_PC),
|
|
hwRead16(OFFSET_REG_SP),
|
|
hwRead8(OFFSET_REG_I),
|
|
hwRead8(OFFSET_REG_R),
|
|
hwRead8(OFFSET_REG_IFF));
|
|
#else
|
|
unsigned int p = hwRead8(OFFSET_REG_P);
|
|
log0("6502 Registers:\n A=%02X X=%02X Y=%02X SP=%04X PC=%04X\n",
|
|
hwRead8(OFFSET_REG_A),
|
|
hwRead8(OFFSET_REG_X),
|
|
hwRead8(OFFSET_REG_Y),
|
|
hwRead16(OFFSET_REG_SP),
|
|
hwRead16(OFFSET_REG_PC));
|
|
#endif
|
|
char *sp = statusString;
|
|
log0(" Status: ");
|
|
for (i = 0; i <= 7; i++) {
|
|
log0("%c", ((p & 128) ? (*sp) : '-'));
|
|
p <<= 1;
|
|
sp++;
|
|
}
|
|
log0("\n");
|
|
}
|
|
|
|
void doCmdDis(char *params) {
|
|
int i;
|
|
sscanf(params, "%x", &memAddr);
|
|
loadAddr(memAddr);
|
|
for (i = 0; i < 10; i++) {
|
|
memAddr = disassemble(memAddr);
|
|
}
|
|
}
|
|
|
|
void doCmdFill(char *params) {
|
|
long i;
|
|
unsigned int start;
|
|
unsigned int end;
|
|
unsigned int data;
|
|
sscanf(params, "%x %x %x", &start, &end, &data);
|
|
log0("Wr: %04X to %04X = %02X\n", start, end, data);
|
|
loadData(data);
|
|
loadAddr(start);
|
|
for (i = start; i <= end; i++) {
|
|
writeMemByteInc();
|
|
}
|
|
}
|
|
|
|
void doCmdCrc(char *params) {
|
|
long i;
|
|
int j;
|
|
unsigned int start;
|
|
unsigned int end;
|
|
unsigned int data;
|
|
unsigned long crc = 0;
|
|
sscanf(params, "%x %x", &start, &end);
|
|
loadAddr(start);
|
|
for (i = start; i <= end; i++) {
|
|
data = readMemByteInc();
|
|
for (j = 0; j < 8; j++) {
|
|
crc = crc << 1;
|
|
crc = crc | (data & 1);
|
|
data >>= 1;
|
|
if (crc & 0x10000)
|
|
crc = (crc ^ CRC_POLY) & 0xFFFF;
|
|
}
|
|
}
|
|
log0("crc: %04X\n", crc);
|
|
}
|
|
|
|
void genericDump(char *params, unsigned int (*readFunc)()) {
|
|
int i, j;
|
|
unsigned int row[16];
|
|
sscanf(params, "%x", &memAddr);
|
|
loadAddr(memAddr);
|
|
for (i = 0; i < 0x100; i+= 16) {
|
|
for (j = 0; j < 16; j++) {
|
|
row[j] = (*readFunc)();
|
|
}
|
|
log0("%04X ", memAddr + i);
|
|
for (j = 0; j < 16; j++) {
|
|
log0("%02X ", row[j]);
|
|
}
|
|
log0(" ");
|
|
for (j = 0; j < 16; j++) {
|
|
unsigned int c = row[j];
|
|
if (c < 32 || c > 126) {
|
|
c = '.';
|
|
}
|
|
log0("%c", c);
|
|
}
|
|
log0("\n");
|
|
}
|
|
memAddr += 0x100;
|
|
}
|
|
|
|
void genericWrite(char *params, void (*writeFunc)()) {
|
|
unsigned int addr;
|
|
unsigned int data;
|
|
long count = 1;
|
|
sscanf(params, "%x %x %ld", &addr, &data, &count);
|
|
log0("Wr: %04X = %02X\n", addr, data);
|
|
loadData(data);
|
|
loadAddr(addr);
|
|
while (count-- > 0) {
|
|
(*writeFunc)();
|
|
}
|
|
}
|
|
|
|
void genericRead(char *params, unsigned int (*readFunc)()) {
|
|
unsigned int addr;
|
|
unsigned int data;
|
|
unsigned int data2;
|
|
long count = 1;
|
|
sscanf(params, "%x %ld", &addr, &count);
|
|
loadAddr(addr);
|
|
data = (*readFunc)();
|
|
log0("Rd: %04X = %02X\n", addr, data);
|
|
while (count-- > 1) {
|
|
data2 = (*readFunc)();
|
|
if (data2 != data) {
|
|
log0("Inconsistent Rd: %02X <> %02X\n", data2, data);
|
|
}
|
|
data = data2;
|
|
}
|
|
}
|
|
|
|
void doCmdMem(char *params) {
|
|
genericDump(params, readMemByteInc);
|
|
}
|
|
|
|
void doCmdReadMem(char *params) {
|
|
genericRead(params, readMemByte);
|
|
}
|
|
|
|
void doCmdWriteMem(char *params) {
|
|
genericWrite(params, writeMemByte);
|
|
}
|
|
|
|
#if (CPU == Z80)
|
|
|
|
void doCmdIO(char *params) {
|
|
genericDump(params, readIOByteInc);
|
|
}
|
|
|
|
void doCmdReadIO(char *params) {
|
|
genericRead(params, readIOByte);
|
|
}
|
|
|
|
void doCmdWriteIO(char *params) {
|
|
genericWrite(params, writeIOByte);
|
|
}
|
|
|
|
#else
|
|
|
|
unsigned int getData(unsigned int addr, int data) {
|
|
if (data == -1) {
|
|
// checkerboard
|
|
return (addr & 1) ? 0x55 : 0xAA;
|
|
} else if (data == -2) {
|
|
// inverse checkerboard
|
|
return (addr & 1) ? 0xAA : 0x55;
|
|
} else if (data == -3) {
|
|
// address pattern
|
|
return (0xC3 ^ addr ^ (addr >> 8)) & 0xff;
|
|
} else if (data == -4) {
|
|
// address pattern
|
|
return (0x3C ^ addr ^ (addr >> 8)) & 0xff;
|
|
} else if (data < 0) {
|
|
// random data
|
|
return rand() & 0xff;
|
|
} else {
|
|
// fixed data
|
|
return data & 0xff;
|
|
}
|
|
}
|
|
|
|
void test(unsigned int start, unsigned int end, int data) {
|
|
long i;
|
|
int name;
|
|
int actual;
|
|
int expected;
|
|
unsigned int fail = 0;
|
|
// Write
|
|
srand(data);
|
|
for (i = start; i <= end; i++) {
|
|
loadData(getData(i, data));
|
|
loadAddr(i);
|
|
writeMemByteInc();
|
|
}
|
|
// Read
|
|
srand(data);
|
|
loadAddr(start);
|
|
for (i = start; i <= end; i++) {
|
|
actual = readMemByteInc();
|
|
expected = getData(i, data);
|
|
if (expected != actual) {
|
|
log0("Fail at %04lX (Wrote: %02X, Read back %02X)\n", i, expected, actual);
|
|
fail++;
|
|
}
|
|
}
|
|
name = -data;
|
|
if (name < 0) {
|
|
name = 0;
|
|
}
|
|
if (name > 5) {
|
|
name = 5;
|
|
}
|
|
log0("Memory test: %s", testNames[name]);
|
|
if (data >= 0) {
|
|
log0(" %02X", data);
|
|
}
|
|
if (fail) {
|
|
log0(": failed: %d errors\n", fail);
|
|
} else {
|
|
log0(": passed\n");
|
|
}
|
|
}
|
|
|
|
void doCmdTest(char *params) {
|
|
unsigned int start;
|
|
unsigned int end;
|
|
int data =-100;
|
|
int i;
|
|
sscanf(params, "%x %x %d", &start, &end, &data);
|
|
if (data == -100) {
|
|
test(start, end, 0x55);
|
|
test(start, end, 0xAA);
|
|
test(start, end, 0xFF);
|
|
for (i = 0; i >= -7; i--) {
|
|
test(start, end, i);
|
|
}
|
|
} else {
|
|
test(start, end, data);
|
|
}
|
|
}
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
void doCmdTrace(char *params) {
|
|
long i;
|
|
sscanf(params, "%ld", &i);
|
|
setTrace(i);
|
|
}
|
|
|
|
void doCmdList(char *params) {
|
|
int i;
|
|
if (numbkpts) {
|
|
for (i = 0; i < numbkpts; i++) {
|
|
log0("%d: %04X mask %04X: ", i, breakpoints[i], masks[i]);
|
|
logMode(modes[i]);
|
|
log0(" (");
|
|
logTrigger(triggers[i]);
|
|
log0(")\n");
|
|
}
|
|
} else {
|
|
log0("No breakpoints set\n");
|
|
}
|
|
}
|
|
|
|
void setBreakpoint(int i, unsigned int addr, unsigned int mask, unsigned int mode, int trigger) {
|
|
logMode(mode);
|
|
log0(" set at %04X\n", addr);
|
|
breakpoints[i] = addr & mask;
|
|
masks[i] = mask;
|
|
modes[i] = mode;
|
|
triggers[i] = trigger;
|
|
}
|
|
|
|
void doCmdBreak(char *params, unsigned int mode) {
|
|
int i;
|
|
unsigned int addr;
|
|
unsigned int mask = 0xFFFF;
|
|
int trigger = -1;
|
|
sscanf(params, "%x %x %x", &addr, &mask, &trigger);
|
|
for (i = 0; i < numbkpts; i++) {
|
|
if (breakpoints[i] == addr) {
|
|
if (modes[i] & mode) {
|
|
logMode(mode);
|
|
log0(" already set at %04X\n", addr);
|
|
} else {
|
|
// Preserve the existing trigger, unless it is overridden
|
|
if (trigger == -1) {
|
|
trigger = triggers[i];
|
|
}
|
|
setBreakpoint(i, addr, mask, modes[i] | mode, trigger);
|
|
}
|
|
return;
|
|
}
|
|
}
|
|
if (numbkpts == MAXBKPTS) {
|
|
log0("All %d breakpoints are already set\n", numbkpts);
|
|
return;
|
|
}
|
|
numbkpts++;
|
|
// New breakpoint, so if trigger not specified, set to ALWAYS
|
|
if (trigger == -1) {
|
|
trigger = TRIGGER_ALWAYS;
|
|
}
|
|
for (i = numbkpts - 2; i >= -1; i--) {
|
|
if (i == -1 || breakpoints[i] < addr) {
|
|
setBreakpoint(i + 1, addr, mask, mode, trigger);
|
|
return;
|
|
} else {
|
|
breakpoints[i + 1] = breakpoints[i];
|
|
masks[i + 1] = masks[i];
|
|
modes[i + 1] = modes[i];
|
|
triggers[i + 1] = triggers[i];
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
void doCmdBreakI(char *params) {
|
|
doCmdBreak(params, 1 << BRKPT_EXEC);
|
|
}
|
|
|
|
void doCmdWatchI(char *params) {
|
|
doCmdBreak(params, 1 << WATCH_EXEC);
|
|
}
|
|
|
|
void doCmdBreakRdMem(char *params) {
|
|
doCmdBreak(params, 1 << BRKPT_MEM_READ);
|
|
}
|
|
|
|
void doCmdWatchRdMem(char *params) {
|
|
doCmdBreak(params, 1 << WATCH_MEM_READ);
|
|
}
|
|
|
|
void doCmdBreakWrMem(char *params) {
|
|
doCmdBreak(params, 1 << BRKPT_MEM_WRITE);
|
|
}
|
|
|
|
void doCmdWatchWrMem(char *params) {
|
|
doCmdBreak(params, 1 << WATCH_MEM_WRITE);
|
|
}
|
|
|
|
#if (CPU == Z80)
|
|
|
|
void doCmdBreakRdIO(char *params) {
|
|
doCmdBreak(params, 1 << BRKPT_IO_READ);
|
|
}
|
|
|
|
void doCmdWatchRdIO(char *params) {
|
|
doCmdBreak(params, 1 << WATCH_IO_READ);
|
|
}
|
|
|
|
void doCmdBreakWrIO(char *params) {
|
|
doCmdBreak(params, 1 << BRKPT_IO_WRITE);
|
|
}
|
|
|
|
void doCmdWatchWrIO(char *params) {
|
|
doCmdBreak(params, 1 << WATCH_IO_WRITE);
|
|
}
|
|
|
|
#endif
|
|
|
|
void doCmdClear(char *params) {
|
|
int i;
|
|
int n = lookupBreakpoint(params);
|
|
if (n < 0) {
|
|
return;
|
|
}
|
|
log0("Removing ");
|
|
logMode(modes[n]);
|
|
log0(" at %04X\n", breakpoints[n]);
|
|
for (i = n; i < numbkpts; i++) {
|
|
breakpoints[i] = breakpoints[i + 1];
|
|
masks[i] = masks[i + 1];
|
|
modes[i] = modes[i + 1];
|
|
triggers[i] = triggers[i + 1];
|
|
}
|
|
numbkpts--;
|
|
}
|
|
|
|
void doCmdTrigger(char *params) {
|
|
int trigger = -1;
|
|
int n = lookupBreakpoint(params);
|
|
if (n < 0) {
|
|
log0("Trigger Codes:\n");
|
|
for (trigger = 0; trigger < NUM_TRIGGERS; trigger++) {
|
|
log0(" %X = %s\n", trigger, triggerStrings[trigger]);
|
|
}
|
|
return;
|
|
}
|
|
sscanf(params, "%*x %x", &trigger);
|
|
if (trigger >= 0 && trigger < NUM_TRIGGERS) {
|
|
triggers[n] = trigger;
|
|
} else {
|
|
log0("Illegal trigger code (see help for trigger codes)\n");
|
|
}
|
|
}
|
|
|
|
void shiftBreakpointRegister(unsigned int addr, unsigned int mask, unsigned int mode, int trigger) {
|
|
int i;
|
|
for (i = 0; i <= 15; i++) {
|
|
hwCmd(CMD_LOAD_BRKPT, addr & 1);
|
|
addr >>= 1;
|
|
}
|
|
for (i = 0; i <= 15; i++) {
|
|
hwCmd(CMD_LOAD_BRKPT, mask & 1);
|
|
mask >>= 1;
|
|
}
|
|
for (i = 0; i <= 9; i++) {
|
|
hwCmd(CMD_LOAD_BRKPT, mode & 1);
|
|
mode >>= 1;
|
|
}
|
|
for (i = 0; i <= 3; i++) {
|
|
hwCmd(CMD_LOAD_BRKPT, trigger & 1);
|
|
trigger >>= 1;
|
|
}
|
|
}
|
|
|
|
void doCmdContinue(char *params) {
|
|
int i;
|
|
int status;
|
|
#ifdef LCD
|
|
unsigned int i_addr;
|
|
#endif
|
|
int reset = 0;
|
|
sscanf(params, "%d", &reset);
|
|
|
|
// Disable breakpoints to allow loading
|
|
hwCmd(CMD_BRKPT_ENABLE, 0);
|
|
|
|
// Load breakpoints into comparators
|
|
for (i = 0; i < numbkpts; i++) {
|
|
shiftBreakpointRegister(breakpoints[i], masks[i], modes[i], triggers[i]);
|
|
}
|
|
for (i = numbkpts; i < MAXBKPTS; i++) {
|
|
shiftBreakpointRegister(0, 0, 0, 0);
|
|
}
|
|
|
|
// Step the 6502, otherwise the breakpoint happends again immediately
|
|
hwCmd(CMD_STEP, 0);
|
|
|
|
// Enable breakpoints
|
|
hwCmd(CMD_BRKPT_ENABLE, 1);
|
|
|
|
// Disable single stepping
|
|
setSingle(0);
|
|
|
|
// Reset if required
|
|
if (reset) {
|
|
log0("Resetting CPU\n");
|
|
hwCmd(CMD_RESET, 1);
|
|
Delay_us(100);
|
|
hwCmd(CMD_RESET, 0);
|
|
}
|
|
|
|
// Wait for breakpoint to become active
|
|
log0("CPU free running...\n");
|
|
int cont = 1;
|
|
do {
|
|
// Update the LCD display
|
|
#ifdef LCD
|
|
i_addr = hwRead16(OFFSET_IAL);
|
|
lcdAddr(i_addr);
|
|
#endif
|
|
|
|
status = STATUS_DIN;
|
|
if (status & BW_ACTIVE_MASK) {
|
|
cont = logDetails();
|
|
hwCmd(CMD_WATCH_READ, 0);
|
|
}
|
|
if (status & INTERRUPTED_MASK || Serial_ByteRecieved0()) {
|
|
log0("Interrupted\n");
|
|
cont = 0;
|
|
}
|
|
Delay_us(10);
|
|
} while (cont);
|
|
|
|
// Junk the interrupt character
|
|
if (Serial_ByteRecieved0()) {
|
|
Serial_RxByte0();
|
|
}
|
|
|
|
// Enable single stepping
|
|
setSingle(1);
|
|
|
|
// Disable breakpoints
|
|
hwCmd(CMD_BRKPT_ENABLE, 0);
|
|
|
|
// Show current instruction
|
|
logAddr();
|
|
}
|
|
|
|
void initialize() {
|
|
CTRL_DDR = 255;
|
|
STATUS_DDR = MUXSEL_MASK;
|
|
MUX_DDR = 0;
|
|
CTRL_PORT = 0;
|
|
Serial_Init(57600,57600);
|
|
#ifdef LCD
|
|
lcd_init();
|
|
lcd_puts("Addr: xxxx");
|
|
#endif
|
|
version();
|
|
hwCmd(CMD_RESET, 0);
|
|
hwCmd(CMD_FIFO_RST, 0);
|
|
setSingle(1);
|
|
setTrace(1);
|
|
}
|
|
|
|
void (*cmdFuncs[NUM_CMDS])(char *params) = {
|
|
doCmdHelp,
|
|
doCmdContinue,
|
|
#ifdef CPUEMBEDDED
|
|
doCmdRegs,
|
|
doCmdDis,
|
|
doCmdFill,
|
|
doCmdCrc,
|
|
doCmdMem,
|
|
doCmdReadMem,
|
|
doCmdWriteMem,
|
|
#if (CPU == Z80)
|
|
doCmdIO,
|
|
doCmdReadIO,
|
|
doCmdWriteIO,
|
|
#else
|
|
doCmdTest,
|
|
#endif
|
|
#endif
|
|
doCmdReset,
|
|
doCmdStep,
|
|
doCmdTrace,
|
|
doCmdList,
|
|
doCmdBreakI,
|
|
doCmdWatchI,
|
|
doCmdBreakRdMem,
|
|
doCmdWatchRdMem,
|
|
doCmdBreakWrMem,
|
|
doCmdWatchWrMem,
|
|
#if (CPU == Z80)
|
|
doCmdBreakRdIO,
|
|
doCmdWatchRdIO,
|
|
doCmdBreakWrIO,
|
|
doCmdWatchWrIO,
|
|
#endif
|
|
doCmdClear,
|
|
doCmdTrigger
|
|
};
|
|
|
|
void dispatchCmd(char *cmd) {
|
|
int i;
|
|
char *cmdString;
|
|
int minLen;
|
|
int cmdStringLen;
|
|
int cmdLen = 0;
|
|
while (cmd[cmdLen] >= 'a' && cmd[cmdLen] <= 'z') {
|
|
cmdLen++;
|
|
}
|
|
for (i = 0; i < NUM_CMDS; i++) {
|
|
cmdString = cmdStrings[i];
|
|
cmdStringLen = strlen(cmdString);
|
|
minLen = cmdLen < cmdStringLen ? cmdLen : cmdStringLen;
|
|
if (strncmp(cmdString, cmd, minLen) == 0) {
|
|
(*cmdFuncs[i])(command + cmdLen);
|
|
return;
|
|
}
|
|
}
|
|
log0("Unknown command %s\n", cmd);
|
|
}
|
|
|
|
int main(void) {
|
|
initialize();
|
|
doCmdContinue(NULL);
|
|
while (1) {
|
|
readCmd(command);
|
|
dispatchCmd(command);
|
|
}
|
|
return 0;
|
|
}
|