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Updated Home (markdown)

David Banks 2016-07-15 15:02:39 +01:00
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@ -192,9 +192,11 @@ Within the emulator, there are the following components:
- support processor core: an arduino-compatible AVR8 soft core
- AVR8 Firmware, written in C, and compiled into FPGA Block RAM
Here's a more detailed block diagram showing the emulator hardware design.
<a href="url"><img src="/hoglet67/AtomBusMon/wiki/images/design/block_diagram.png" width="1024" ></a>
The signals on the left are brought out to the pins of the GODIL, and this is how it connects into the system under test.
Regardless of the target processor, the capabilities and command set of the ICE firmware is roughly the same:
Regardless of the target processor, the capabilities and command set of the emulator is roughly the same:
The emulator provides the following feature set:
- instruction breakpoints (which pause the target processor)